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authorIlya Yanok <yanok@emcraft.com>2012-03-05 14:08:36 -0500
committerTony Lindgren <tony@atomide.com>2012-03-05 14:08:36 -0500
commita8195ba87cc746bf765bd507d87a2945602c8adc (patch)
tree49cd90f3f3cd4c26a7ae25792df354417d6eb3de /arch/arm
parentd4860ebef4f7e45ebc37013d5008de85cc24a94e (diff)
ARM: OMAP: move generic EMAC init to separate file
AM35xx SoCs include DaVinci EMAC IP. Initialization code in board-am3517evm.c is pretty board independent and will work for any AM35xx based board so move this code to it's own file to be reused by other boards. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-omap2/Makefile3
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.c117
-rw-r--r--arch/arm/mach-omap2/am35xx-emac.h15
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c117
4 files changed, 137 insertions, 115 deletions
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index bd76394ccaf8..8d6bcca653b5 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -270,4 +270,7 @@ smsc911x-$(CONFIG_SMSC911X) := gpmc-smsc911x.o
270obj-y += $(smsc911x-m) $(smsc911x-y) 270obj-y += $(smsc911x-m) $(smsc911x-y)
271obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o 271obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
272 272
273emac-$(CONFIG_TI_DAVINCI_EMAC) := am35xx-emac.o
274obj-y += $(emac-m) $(emac-y)
275
273obj-y += common-board-devices.o twl-common.o 276obj-y += common-board-devices.o twl-common.o
diff --git a/arch/arm/mach-omap2/am35xx-emac.c b/arch/arm/mach-omap2/am35xx-emac.c
new file mode 100644
index 000000000000..1f97e7475206
--- /dev/null
+++ b/arch/arm/mach-omap2/am35xx-emac.c
@@ -0,0 +1,117 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * Based on mach-omap2/board-am3517evm.c
5 * Copyright (C) 2009 Texas Instruments Incorporated
6 * Author: Ranjith Lohithakshan <ranjithl@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13 * whether express or implied; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 */
17
18#include <linux/clk.h>
19#include <linux/davinci_emac.h>
20#include <linux/platform_device.h>
21#include <plat/irqs.h>
22#include <mach/am35xx.h>
23
24#include "control.h"
25
26static struct mdio_platform_data am35xx_emac_mdio_pdata;
27
28static struct resource am35xx_emac_mdio_resources[] = {
29 DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET, SZ_4K),
30};
31
32static struct platform_device am35xx_emac_mdio_device = {
33 .name = "davinci_mdio",
34 .id = 0,
35 .num_resources = ARRAY_SIZE(am35xx_emac_mdio_resources),
36 .resource = am35xx_emac_mdio_resources,
37 .dev.platform_data = &am35xx_emac_mdio_pdata,
38};
39
40static void am35xx_enable_emac_int(void)
41{
42 u32 regval;
43
44 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
45 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
46 AM35XX_CPGMAC_C0_TX_PULSE_CLR |
47 AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
48 AM35XX_CPGMAC_C0_RX_THRESH_CLR);
49 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
50 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
51}
52
53static void am35xx_disable_emac_int(void)
54{
55 u32 regval;
56
57 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
58 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
59 AM35XX_CPGMAC_C0_TX_PULSE_CLR);
60 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
61 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
62}
63
64static struct emac_platform_data am35xx_emac_pdata = {
65 .ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET,
66 .ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET,
67 .ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET,
68 .ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE,
69 .hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR,
70 .version = EMAC_VERSION_2,
71 .interrupt_enable = am35xx_enable_emac_int,
72 .interrupt_disable = am35xx_disable_emac_int,
73};
74
75static struct resource am35xx_emac_resources[] = {
76 DEFINE_RES_MEM(AM35XX_IPSS_EMAC_BASE, 0x30000),
77 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RXTHRESH_IRQ),
78 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_RX_PULSE_IRQ),
79 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_TX_PULSE_IRQ),
80 DEFINE_RES_IRQ(INT_35XX_EMAC_C0_MISC_PULSE_IRQ),
81};
82
83static struct platform_device am35xx_emac_device = {
84 .name = "davinci_emac",
85 .id = -1,
86 .num_resources = ARRAY_SIZE(am35xx_emac_resources),
87 .resource = am35xx_emac_resources,
88 .dev = {
89 .platform_data = &am35xx_emac_pdata,
90 },
91};
92
93void __init am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en)
94{
95 unsigned int regval;
96 int err;
97
98 am35xx_emac_pdata.rmii_en = rmii_en;
99 am35xx_emac_mdio_pdata.bus_freq = mdio_bus_freq;
100 err = platform_device_register(&am35xx_emac_device);
101 if (err) {
102 pr_err("AM35x: failed registering EMAC device: %d\n", err);
103 return;
104 }
105
106 err = platform_device_register(&am35xx_emac_mdio_device);
107 if (err) {
108 pr_err("AM35x: failed registering EMAC MDIO device: %d\n", err);
109 platform_device_unregister(&am35xx_emac_device);
110 return;
111 }
112
113 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
114 regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
115 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
116 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
117}
diff --git a/arch/arm/mach-omap2/am35xx-emac.h b/arch/arm/mach-omap2/am35xx-emac.h
new file mode 100644
index 000000000000..15c6f9ce59a2
--- /dev/null
+++ b/arch/arm/mach-omap2/am35xx-emac.h
@@ -0,0 +1,15 @@
1/*
2 * Copyright (C) 2011 Ilya Yanok, Emcraft Systems
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#define AM35XX_DEFAULT_MDIO_FREQUENCY 1000000
10
11#if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE)
12void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en);
13#else
14static inline void am35xx_emac_init(unsigned long mdio_bus_freq, u8 rmii_en) {}
15#endif
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index 4b1cfe32e6ba..005905b6ef2b 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -39,124 +39,11 @@
39#include <video/omap-panel-generic-dpi.h> 39#include <video/omap-panel-generic-dpi.h>
40#include <video/omap-panel-dvi.h> 40#include <video/omap-panel-dvi.h>
41 41
42#include "am35xx-emac.h"
42#include "mux.h" 43#include "mux.h"
43#include "control.h" 44#include "control.h"
44#include "hsmmc.h" 45#include "hsmmc.h"
45 46
46#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
47
48static struct mdio_platform_data am3517_evm_mdio_pdata = {
49 .bus_freq = AM35XX_EVM_MDIO_FREQUENCY,
50};
51
52static struct resource am3517_mdio_resources[] = {
53 {
54 .start = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET,
55 .end = AM35XX_IPSS_EMAC_BASE + AM35XX_EMAC_MDIO_OFFSET +
56 SZ_4K - 1,
57 .flags = IORESOURCE_MEM,
58 },
59};
60
61static struct platform_device am3517_mdio_device = {
62 .name = "davinci_mdio",
63 .id = 0,
64 .num_resources = ARRAY_SIZE(am3517_mdio_resources),
65 .resource = am3517_mdio_resources,
66 .dev.platform_data = &am3517_evm_mdio_pdata,
67};
68
69static struct emac_platform_data am3517_evm_emac_pdata = {
70 .rmii_en = 1,
71};
72
73static struct resource am3517_emac_resources[] = {
74 {
75 .start = AM35XX_IPSS_EMAC_BASE,
76 .end = AM35XX_IPSS_EMAC_BASE + 0x2FFFF,
77 .flags = IORESOURCE_MEM,
78 },
79 {
80 .start = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
81 .end = INT_35XX_EMAC_C0_RXTHRESH_IRQ,
82 .flags = IORESOURCE_IRQ,
83 },
84 {
85 .start = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
86 .end = INT_35XX_EMAC_C0_RX_PULSE_IRQ,
87 .flags = IORESOURCE_IRQ,
88 },
89 {
90 .start = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
91 .end = INT_35XX_EMAC_C0_TX_PULSE_IRQ,
92 .flags = IORESOURCE_IRQ,
93 },
94 {
95 .start = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
96 .end = INT_35XX_EMAC_C0_MISC_PULSE_IRQ,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static struct platform_device am3517_emac_device = {
102 .name = "davinci_emac",
103 .id = -1,
104 .num_resources = ARRAY_SIZE(am3517_emac_resources),
105 .resource = am3517_emac_resources,
106};
107
108static void am3517_enable_ethernet_int(void)
109{
110 u32 regval;
111
112 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
113 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
114 AM35XX_CPGMAC_C0_TX_PULSE_CLR |
115 AM35XX_CPGMAC_C0_MISC_PULSE_CLR |
116 AM35XX_CPGMAC_C0_RX_THRESH_CLR);
117 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
118 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
119}
120
121static void am3517_disable_ethernet_int(void)
122{
123 u32 regval;
124
125 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
126 regval = (regval | AM35XX_CPGMAC_C0_RX_PULSE_CLR |
127 AM35XX_CPGMAC_C0_TX_PULSE_CLR);
128 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
129 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
130}
131
132static void am3517_evm_ethernet_init(struct emac_platform_data *pdata)
133{
134 unsigned int regval;
135
136 pdata->ctrl_reg_offset = AM35XX_EMAC_CNTRL_OFFSET;
137 pdata->ctrl_mod_reg_offset = AM35XX_EMAC_CNTRL_MOD_OFFSET;
138 pdata->ctrl_ram_offset = AM35XX_EMAC_CNTRL_RAM_OFFSET;
139 pdata->ctrl_ram_size = AM35XX_EMAC_CNTRL_RAM_SIZE;
140 pdata->version = EMAC_VERSION_2;
141 pdata->hw_ram_addr = AM35XX_EMAC_HW_RAM_ADDR;
142 pdata->interrupt_enable = am3517_enable_ethernet_int;
143 pdata->interrupt_disable = am3517_disable_ethernet_int;
144 am3517_emac_device.dev.platform_data = pdata;
145 platform_device_register(&am3517_emac_device);
146 platform_device_register(&am3517_mdio_device);
147 clk_add_alias(NULL, dev_name(&am3517_mdio_device.dev),
148 NULL, &am3517_emac_device.dev);
149
150 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
151 regval = regval & (~(AM35XX_CPGMACSS_SW_RST));
152 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
153 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
154
155 return ;
156}
157
158
159
160#define LCD_PANEL_PWR 176 47#define LCD_PANEL_PWR 176
161#define LCD_PANEL_BKLIGHT_PWR 182 48#define LCD_PANEL_BKLIGHT_PWR 182
162#define LCD_PANEL_PWM 181 49#define LCD_PANEL_PWM 181
@@ -498,7 +385,7 @@ static void __init am3517_evm_init(void)
498 i2c_register_board_info(1, am3517evm_i2c1_boardinfo, 385 i2c_register_board_info(1, am3517evm_i2c1_boardinfo,
499 ARRAY_SIZE(am3517evm_i2c1_boardinfo)); 386 ARRAY_SIZE(am3517evm_i2c1_boardinfo));
500 /*Ethernet*/ 387 /*Ethernet*/
501 am3517_evm_ethernet_init(&am3517_evm_emac_pdata); 388 am35xx_emac_init(AM35XX_DEFAULT_MDIO_FREQUENCY, 1);
502 389
503 /* MUSB */ 390 /* MUSB */
504 am3517_evm_musb_init(); 391 am3517_evm_musb_init();
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