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authorBen Dooks <ben-linux@fluff.org>2008-01-28 07:01:34 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-01-28 08:20:52 -0500
commit3a38e4be76e86c7b94c36dc8f3ce489987da24e4 (patch)
tree1b8ce87d0002c28fe9a8615151a28a3b666f5c17 /arch/arm
parentc27cb681ac1598352569f75cb19850a12b7ef102 (diff)
[ARM] 4794/1: S3C24XX: Comonise S3C2440 and S3C2442 clock code
Merge together the bits of the S3C2440 and S3C2442 clock code that can be. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-s3c2440/clock.c22
-rw-r--r--arch/arm/mach-s3c2442/clock.c22
-rw-r--r--arch/arm/plat-s3c24xx/Makefile1
-rw-r--r--arch/arm/plat-s3c24xx/s3c244x-clock.c100
4 files changed, 103 insertions, 42 deletions
diff --git a/arch/arm/mach-s3c2440/clock.c b/arch/arm/mach-s3c2440/clock.c
index 79e2ea4adaf3..184d804934c9 100644
--- a/arch/arm/mach-s3c2440/clock.c
+++ b/arch/arm/mach-s3c2440/clock.c
@@ -111,14 +111,9 @@ static struct clk s3c2440_clk_ac97 = {
111 111
112static int s3c2440_clk_add(struct sys_device *sysdev) 112static int s3c2440_clk_add(struct sys_device *sysdev)
113{ 113{
114 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); 114 struct clk *clock_upll;
115 unsigned long clkdivn;
116 struct clk *clock_h; 115 struct clk *clock_h;
117 struct clk *clock_p; 116 struct clk *clock_p;
118 struct clk *clock_upll;
119
120 printk("S3C2440: Clock Support, DVS %s\n",
121 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
122 117
123 clock_p = clk_get(NULL, "pclk"); 118 clock_p = clk_get(NULL, "pclk");
124 clock_h = clk_get(NULL, "hclk"); 119 clock_h = clk_get(NULL, "hclk");
@@ -129,21 +124,6 @@ static int s3c2440_clk_add(struct sys_device *sysdev)
129 return -EINVAL; 124 return -EINVAL;
130 } 125 }
131 126
132 /* check rate of UPLL, and if it is near 96MHz, then change
133 * to using half the UPLL rate for the system */
134
135 if (clk_get_rate(clock_upll) > (94 * MHZ)) {
136 clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
137
138 mutex_lock(&clocks_mutex);
139
140 clkdivn = __raw_readl(S3C2410_CLKDIVN);
141 clkdivn |= S3C2440_CLKDIVN_UCLK;
142 __raw_writel(clkdivn, S3C2410_CLKDIVN);
143
144 mutex_unlock(&clocks_mutex);
145 }
146
147 s3c2440_clk_cam.parent = clock_h; 127 s3c2440_clk_cam.parent = clock_h;
148 s3c2440_clk_ac97.parent = clock_p; 128 s3c2440_clk_ac97.parent = clock_p;
149 s3c2440_clk_cam_upll.parent = clock_upll; 129 s3c2440_clk_cam_upll.parent = clock_upll;
diff --git a/arch/arm/mach-s3c2442/clock.c b/arch/arm/mach-s3c2442/clock.c
index 5b9e830ac4d3..2d030d439fe9 100644
--- a/arch/arm/mach-s3c2442/clock.c
+++ b/arch/arm/mach-s3c2442/clock.c
@@ -115,14 +115,9 @@ static struct clk s3c2442_clk_cam_upll = {
115 115
116static int s3c2442_clk_add(struct sys_device *sysdev) 116static int s3c2442_clk_add(struct sys_device *sysdev)
117{ 117{
118 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); 118 struct clk *clock_upll;
119 unsigned long clkdivn;
120 struct clk *clock_h; 119 struct clk *clock_h;
121 struct clk *clock_p; 120 struct clk *clock_p;
122 struct clk *clock_upll;
123
124 printk("S3C2442: Clock Support, DVS %s\n",
125 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
126 121
127 clock_p = clk_get(NULL, "pclk"); 122 clock_p = clk_get(NULL, "pclk");
128 clock_h = clk_get(NULL, "hclk"); 123 clock_h = clk_get(NULL, "hclk");
@@ -133,21 +128,6 @@ static int s3c2442_clk_add(struct sys_device *sysdev)
133 return -EINVAL; 128 return -EINVAL;
134 } 129 }
135 130
136 /* check rate of UPLL, and if it is near 96MHz, then change
137 * to using half the UPLL rate for the system */
138
139 if (clk_get_rate(clock_upll) > (94 * MHZ)) {
140 clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
141
142 mutex_lock(&clocks_mutex);
143
144 clkdivn = __raw_readl(S3C2410_CLKDIVN);
145 clkdivn |= S3C2440_CLKDIVN_UCLK;
146 __raw_writel(clkdivn, S3C2410_CLKDIVN);
147
148 mutex_unlock(&clocks_mutex);
149 }
150
151 s3c2442_clk_cam.parent = clock_h; 131 s3c2442_clk_cam.parent = clock_h;
152 s3c2442_clk_cam_upll.parent = clock_upll; 132 s3c2442_clk_cam_upll.parent = clock_upll;
153 133
diff --git a/arch/arm/plat-s3c24xx/Makefile b/arch/arm/plat-s3c24xx/Makefile
index 8e5ccaa1f03c..131d20237dd7 100644
--- a/arch/arm/plat-s3c24xx/Makefile
+++ b/arch/arm/plat-s3c24xx/Makefile
@@ -23,6 +23,7 @@ obj-y += clock.o
23 23
24obj-$(CONFIG_CPU_S3C244X) += s3c244x.o 24obj-$(CONFIG_CPU_S3C244X) += s3c244x.o
25obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o 25obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o
26obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o
26obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o 27obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o
27obj-$(CONFIG_PM) += pm.o 28obj-$(CONFIG_PM) += pm.o
28obj-$(CONFIG_PM) += sleep.o 29obj-$(CONFIG_PM) += sleep.o
diff --git a/arch/arm/plat-s3c24xx/s3c244x-clock.c b/arch/arm/plat-s3c24xx/s3c244x-clock.c
new file mode 100644
index 000000000000..0bf5e7fbb2bf
--- /dev/null
+++ b/arch/arm/plat-s3c24xx/s3c244x-clock.c
@@ -0,0 +1,100 @@
1/* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c
2 *
3 * Copyright (c) 2004-2005,2008 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * S3C2440/S3C2442 Common clock support
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24#include <linux/init.h>
25#include <linux/module.h>
26#include <linux/kernel.h>
27#include <linux/list.h>
28#include <linux/errno.h>
29#include <linux/err.h>
30#include <linux/device.h>
31#include <linux/sysdev.h>
32#include <linux/interrupt.h>
33#include <linux/ioport.h>
34#include <linux/mutex.h>
35#include <linux/clk.h>
36
37#include <asm/hardware.h>
38#include <asm/atomic.h>
39#include <asm/irq.h>
40#include <asm/io.h>
41
42#include <asm/arch/regs-clock.h>
43
44#include <asm/plat-s3c24xx/clock.h>
45#include <asm/plat-s3c24xx/cpu.h>
46
47static int s3c244x_clk_add(struct sys_device *sysdev)
48{
49 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN);
50 unsigned long clkdivn;
51 struct clk *clock_upll;
52
53 printk("S3C244X: Clock Support, DVS %s\n",
54 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off");
55
56 clock_upll = clk_get(NULL, "upll");
57 if (IS_ERR(clock_upll)) {
58 printk(KERN_ERR "S3C244X: Failed to get upll clock\n");
59 return -ENOENT;
60 }
61
62 /* check rate of UPLL, and if it is near 96MHz, then change
63 * to using half the UPLL rate for the system */
64
65 if (clk_get_rate(clock_upll) > (94 * MHZ)) {
66 clk_usb_bus.rate = clk_get_rate(clock_upll) / 2;
67
68 mutex_lock(&clocks_mutex);
69
70 clkdivn = __raw_readl(S3C2410_CLKDIVN);
71 clkdivn |= S3C2440_CLKDIVN_UCLK;
72 __raw_writel(clkdivn, S3C2410_CLKDIVN);
73
74 mutex_unlock(&clocks_mutex);
75 }
76
77 return 0;
78}
79
80static struct sysdev_driver s3c2440_clk_driver = {
81 .add = s3c244x_clk_add,
82};
83
84static int s3c2440_clk_init(void)
85{
86 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver);
87}
88
89arch_initcall(s3c2440_clk_init);
90
91static struct sysdev_driver s3c2442_clk_driver = {
92 .add = s3c244x_clk_add,
93};
94
95static int s3c2442_clk_init(void)
96{
97 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver);
98}
99
100arch_initcall(s3c2442_clk_init);