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authorLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-01-09 17:39:22 -0500
commit2ac9d7aaccbd598b5bd19ac40761b723bb675442 (patch)
tree09132a44e33798aaa5e80f10bf025b510015cab3 /arch/arm
parent5ede3ceb7b2c2843e153a1803edbdc8c56655950 (diff)
parentdcf7ec5ee62a78123057a1e286c88ca739717409 (diff)
Merge tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Driver specific changes Again, a lot of platforms have changes in here: pxa, samsung, omap, at91, imx, ... * tag 'drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits) ARM: sa1100: clean up of the clock support ARM: pxa: add dummy clock for sa1100-rtc RTC: sa1100: support sa1100, pxa and mmp soc families RTC: sa1100: remove redundant code of setting alarm RTC: sa1100: Clean out ost register Input: zylonite-wm97xx - replace IRQ_GPIO() with gpio_to_irq() pcmcia: pxa: replace IRQ_GPIO() with gpio_to_irq() ARM: EXYNOS: Modified files for SPI consolidation work ARM: S5P64X0: Enable SDHCI support ARM: S5P64X0: Add lookup of sdhci-s3c clocks using generic names ARM: S5P64X0: Add HSMMC setup for host Controller ARM: EXYNOS: Add USB OHCI support to ORIGEN board USB: Add Samsung Exynos OHCI diver ARM: EXYNOS: Add USB OHCI support to SMDKV310 board ARM: EXYNOS: Add USB OHCI device net: macb: fix build break with !CONFIG_OF i2c: tegra: Support DVC controller in device tree i2c: tegra: Add __devinit/exit to probe/remove net/at91_ether: use gpio_is_valid for phy IRQ line ARM: at91/net: add macb ethernet controller in 9g45/9g20 DT ...
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig4
-rw-r--r--arch/arm/boot/dts/at91sam9g20.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9g45.dtsi7
-rw-r--r--arch/arm/boot/dts/at91sam9m10g45ek.dts5
-rw-r--r--arch/arm/boot/dts/usb_a9g20.dts5
-rw-r--r--arch/arm/mach-exynos/Kconfig12
-rw-r--r--arch/arm/mach-exynos/Makefile2
-rw-r--r--arch/arm/mach-exynos/clock.c73
-rw-r--r--arch/arm/mach-exynos/dev-ohci.c52
-rw-r--r--arch/arm/mach-exynos/include/mach/irqs.h3
-rw-r--r--arch/arm/mach-exynos/include/mach/map.h8
-rw-r--r--arch/arm/mach-exynos/include/mach/ohci.h21
-rw-r--r--arch/arm/mach-exynos/include/mach/spi-clocks.h16
-rw-r--r--arch/arm/mach-exynos/mach-origen.c13
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c13
-rw-r--r--arch/arm/mach-exynos/setup-spi.c72
-rw-r--r--arch/arm/mach-exynos/setup-usb-phy.c15
-rw-r--r--arch/arm/mach-mmp/aspenite.c5
-rw-r--r--arch/arm/mach-mmp/avengers_lite.c1
-rw-r--r--arch/arm/mach-mmp/brownstone.c1
-rw-r--r--arch/arm/mach-mmp/flint.c5
-rw-r--r--arch/arm/mach-mmp/gplugd.c1
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio-pxa.h3
-rw-r--r--arch/arm/mach-mmp/include/mach/gpio.h7
-rw-r--r--arch/arm/mach-mmp/include/mach/irqs.h6
-rw-r--r--arch/arm/mach-mmp/include/mach/mmp2.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa168.h2
-rw-r--r--arch/arm/mach-mmp/include/mach/pxa910.h2
-rw-r--r--arch/arm/mach-mmp/mmp2.c39
-rw-r--r--arch/arm/mach-mmp/pxa168.c40
-rw-r--r--arch/arm/mach-mmp/pxa910.c40
-rw-r--r--arch/arm/mach-mmp/tavorevb.c6
-rw-r--r--arch/arm/mach-mmp/teton_bga.c3
-rw-r--r--arch/arm/mach-mmp/ttc_dkb.c8
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c38
-rw-r--r--arch/arm/mach-mxs/devices-mx28.h3
-rw-r--r--arch/arm/mach-mxs/devices/platform-mxs-saif.c5
-rw-r--r--arch/arm/mach-mxs/include/mach/common.h1
-rw-r--r--arch/arm/mach-mxs/include/mach/devices-common.h4
-rw-r--r--arch/arm/mach-mxs/include/mach/digctl.h21
-rw-r--r--arch/arm/mach-mxs/mach-mx28evk.c18
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c1
-rw-r--r--arch/arm/mach-omap2/board-am3517evm.c22
-rw-r--r--arch/arm/mach-omap2/clock3xxx_data.c26
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c10
-rw-r--r--arch/arm/mach-omap2/hsmmc.c59
-rw-r--r--arch/arm/mach-omap2/hsmmc.h1
-rw-r--r--arch/arm/mach-omap2/usb-host.c100
-rw-r--r--arch/arm/mach-pxa/am200epd.c4
-rw-r--r--arch/arm/mach-pxa/am300epd.c4
-rw-r--r--arch/arm/mach-pxa/balloon3.c2
-rw-r--r--arch/arm/mach-pxa/capc7117.c12
-rw-r--r--arch/arm/mach-pxa/cm-x270.c4
-rw-r--r--arch/arm/mach-pxa/cm-x2xx.c4
-rw-r--r--arch/arm/mach-pxa/cm-x300.c6
-rw-r--r--arch/arm/mach-pxa/colibri-pxa270.c6
-rw-r--r--arch/arm/mach-pxa/colibri-pxa300.c4
-rw-r--r--arch/arm/mach-pxa/colibri-pxa320.c4
-rw-r--r--arch/arm/mach-pxa/corgi.c2
-rw-r--r--arch/arm/mach-pxa/corgi_pm.c21
-rw-r--r--arch/arm/mach-pxa/devices.c50
-rw-r--r--arch/arm/mach-pxa/devices.h1
-rw-r--r--arch/arm/mach-pxa/em-x270.c6
-rw-r--r--arch/arm/mach-pxa/eseries.c4
-rw-r--r--arch/arm/mach-pxa/hx4700.c18
-rw-r--r--arch/arm/mach-pxa/icontrol.c8
-rw-r--r--arch/arm/mach-pxa/idp.c4
-rw-r--r--arch/arm/mach-pxa/include/mach/balloon3.h6
-rw-r--r--arch/arm/mach-pxa/include/mach/corgi.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/csb726.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio-pxa.h133
-rw-r--r--arch/arm/mach-pxa/include/mach/gpio.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/gumstix.h20
-rw-r--r--arch/arm/mach-pxa/include/mach/hx4700.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/idp.h16
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/littleton.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/magician.h2
-rw-r--r--arch/arm/mach-pxa/include/mach/palmld.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmt5.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtc.h4
-rw-r--r--arch/arm/mach-pxa/include/mach/palmtx.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm027.h8
-rw-r--r--arch/arm/mach-pxa/include/mach/pcm990_baseboard.h14
-rw-r--r--arch/arm/mach-pxa/include/mach/poodle.h26
-rw-r--r--arch/arm/mach-pxa/include/mach/spitz.h40
-rw-r--r--arch/arm/mach-pxa/include/mach/tosa.h54
-rw-r--r--arch/arm/mach-pxa/include/mach/trizeps4.h16
-rw-r--r--arch/arm/mach-pxa/irq.c61
-rw-r--r--arch/arm/mach-pxa/littleton.c6
-rw-r--r--arch/arm/mach-pxa/lpd270.c4
-rw-r--r--arch/arm/mach-pxa/lubbock.c4
-rw-r--r--arch/arm/mach-pxa/magician.c8
-rw-r--r--arch/arm/mach-pxa/mainstone.c4
-rw-r--r--arch/arm/mach-pxa/mfp-pxa2xx.c6
-rw-r--r--arch/arm/mach-pxa/mioa701.c8
-rw-r--r--arch/arm/mach-pxa/mxm8x10.c4
-rw-r--r--arch/arm/mach-pxa/pcm990-baseboard.c6
-rw-r--r--arch/arm/mach-pxa/poodle.c6
-rw-r--r--arch/arm/mach-pxa/pxa25x.c7
-rw-r--r--arch/arm/mach-pxa/pxa27x.c7
-rw-r--r--arch/arm/mach-pxa/pxa300.c1
-rw-r--r--arch/arm/mach-pxa/pxa320.c1
-rw-r--r--arch/arm/mach-pxa/pxa3xx.c9
-rw-r--r--arch/arm/mach-pxa/pxa95x.c6
-rw-r--r--arch/arm/mach-pxa/raumfeld.c8
-rw-r--r--arch/arm/mach-pxa/saar.c6
-rw-r--r--arch/arm/mach-pxa/saarb.c2
-rw-r--r--arch/arm/mach-pxa/sharpsl_pm.c24
-rw-r--r--arch/arm/mach-pxa/spitz.c2
-rw-r--r--arch/arm/mach-pxa/spitz_pm.c11
-rw-r--r--arch/arm/mach-pxa/stargate2.c26
-rw-r--r--arch/arm/mach-pxa/tavorevb.c4
-rw-r--r--arch/arm/mach-pxa/tavorevb3.c2
-rw-r--r--arch/arm/mach-pxa/tosa.c4
-rw-r--r--arch/arm/mach-pxa/viper.c12
-rw-r--r--arch/arm/mach-pxa/vpac270.c10
-rw-r--r--arch/arm/mach-pxa/z2.c2
-rw-r--r--arch/arm/mach-pxa/zeus.c20
-rw-r--r--arch/arm/mach-pxa/zylonite.c4
-rw-r--r--arch/arm/mach-pxa/zylonite_pxa300.c4
-rw-r--r--arch/arm/mach-s5p64x0/Kconfig24
-rw-r--r--arch/arm/mach-s5p64x0/Makefile1
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6440.c72
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c72
-rw-r--r--arch/arm/mach-s5p64x0/common.c9
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6440.c25
-rw-r--r--arch/arm/mach-s5p64x0/mach-smdk6450.c26
-rw-r--r--arch/arm/mach-s5p64x0/setup-sdhci-gpio.c104
-rw-r--r--arch/arm/mach-sa1100/clock.c91
-rw-r--r--arch/arm/mach-sa1100/generic.c20
-rw-r--r--arch/arm/plat-omap/include/plat/mmc.h1
-rw-r--r--arch/arm/plat-omap/include/plat/usb.h3
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio-pxa.h44
-rw-r--r--arch/arm/plat-pxa/include/plat/gpio.h30
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h1
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h44
137 files changed, 1377 insertions, 878 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 3cddfd87c727..b3d7b77d2d51 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -597,6 +597,7 @@ config ARCH_MMP
597 select ARCH_REQUIRE_GPIOLIB 597 select ARCH_REQUIRE_GPIOLIB
598 select CLKDEV_LOOKUP 598 select CLKDEV_LOOKUP
599 select GENERIC_CLOCKEVENTS 599 select GENERIC_CLOCKEVENTS
600 select GPIO_PXA
600 select HAVE_SCHED_CLOCK 601 select HAVE_SCHED_CLOCK
601 select TICK_ONESHOT 602 select TICK_ONESHOT
602 select PLAT_PXA 603 select PLAT_PXA
@@ -682,6 +683,7 @@ config ARCH_PXA
682 select CLKSRC_MMIO 683 select CLKSRC_MMIO
683 select ARCH_REQUIRE_GPIOLIB 684 select ARCH_REQUIRE_GPIOLIB
684 select GENERIC_CLOCKEVENTS 685 select GENERIC_CLOCKEVENTS
686 select GPIO_PXA
685 select HAVE_SCHED_CLOCK 687 select HAVE_SCHED_CLOCK
686 select TICK_ONESHOT 688 select TICK_ONESHOT
687 select PLAT_PXA 689 select PLAT_PXA
@@ -749,7 +751,7 @@ config ARCH_SA1100
749 select ARCH_HAS_CPUFREQ 751 select ARCH_HAS_CPUFREQ
750 select CPU_FREQ 752 select CPU_FREQ
751 select GENERIC_CLOCKEVENTS 753 select GENERIC_CLOCKEVENTS
752 select HAVE_CLK 754 select CLKDEV_LOOKUP
753 select HAVE_SCHED_CLOCK 755 select HAVE_SCHED_CLOCK
754 select TICK_ONESHOT 756 select TICK_ONESHOT
755 select ARCH_REQUIRE_GPIOLIB 757 select ARCH_REQUIRE_GPIOLIB
diff --git a/arch/arm/boot/dts/at91sam9g20.dtsi b/arch/arm/boot/dts/at91sam9g20.dtsi
index aeef04269cf8..07603b8c9503 100644
--- a/arch/arm/boot/dts/at91sam9g20.dtsi
+++ b/arch/arm/boot/dts/at91sam9g20.dtsi
@@ -114,6 +114,13 @@
114 atmel,use-dma-tx; 114 atmel,use-dma-tx;
115 status = "disabled"; 115 status = "disabled";
116 }; 116 };
117
118 macb0: ethernet@fffc4000 {
119 compatible = "cdns,at32ap7000-macb", "cdns,macb";
120 reg = <0xfffc4000 0x100>;
121 interrupts = <21>;
122 status = "disabled";
123 };
117 }; 124 };
118 }; 125 };
119}; 126};
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index db6a45202f26..fffa005300a4 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -101,6 +101,13 @@
101 atmel,use-dma-tx; 101 atmel,use-dma-tx;
102 status = "disabled"; 102 status = "disabled";
103 }; 103 };
104
105 macb0: ethernet@fffbc000 {
106 compatible = "cdns,at32ap7000-macb", "cdns,macb";
107 reg = <0xfffbc000 0x100>;
108 interrupts = <25>;
109 status = "disabled";
110 };
104 }; 111 };
105 }; 112 };
106}; 113};
diff --git a/arch/arm/boot/dts/at91sam9m10g45ek.dts b/arch/arm/boot/dts/at91sam9m10g45ek.dts
index 85b34f59cd82..a387e7704ce1 100644
--- a/arch/arm/boot/dts/at91sam9m10g45ek.dts
+++ b/arch/arm/boot/dts/at91sam9m10g45ek.dts
@@ -30,6 +30,11 @@
30 usart1: serial@fff90000 { 30 usart1: serial@fff90000 {
31 status = "okay"; 31 status = "okay";
32 }; 32 };
33
34 macb0: ethernet@fffbc000 {
35 phy-mode = "rmii";
36 status = "okay";
37 };
33 }; 38 };
34 }; 39 };
35}; 40};
diff --git a/arch/arm/boot/dts/usb_a9g20.dts b/arch/arm/boot/dts/usb_a9g20.dts
index d66e2c00ac35..f04b535477f5 100644
--- a/arch/arm/boot/dts/usb_a9g20.dts
+++ b/arch/arm/boot/dts/usb_a9g20.dts
@@ -25,6 +25,11 @@
25 dbgu: serial@fffff200 { 25 dbgu: serial@fffff200 {
26 status = "okay"; 26 status = "okay";
27 }; 27 };
28
29 macb0: ethernet@fffc4000 {
30 phy-mode = "rmii";
31 status = "okay";
32 };
28 }; 33 };
29 }; 34 };
30}; 35};
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index b4bdf297e9fa..5d602f68a0e8 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -89,6 +89,11 @@ config EXYNOS4_DEV_DWMCI
89 help 89 help
90 Compile in platform device definitions for DWMCI 90 Compile in platform device definitions for DWMCI
91 91
92config EXYNOS4_DEV_USB_OHCI
93 bool
94 help
95 Compile in platform device definition for USB OHCI
96
92config EXYNOS4_SETUP_I2C1 97config EXYNOS4_SETUP_I2C1
93 bool 98 bool
94 help 99 help
@@ -150,6 +155,11 @@ config EXYNOS4_SETUP_USB_PHY
150 help 155 help
151 Common setup code for USB PHY controller 156 Common setup code for USB PHY controller
152 157
158config EXYNOS4_SETUP_SPI
159 bool
160 help
161 Common setup code for SPI GPIO configurations.
162
153# machine support 163# machine support
154 164
155if ARCH_EXYNOS4 165if ARCH_EXYNOS4
@@ -187,6 +197,7 @@ config MACH_SMDKV310
187 select EXYNOS4_DEV_DMA 197 select EXYNOS4_DEV_DMA
188 select EXYNOS4_DEV_PD 198 select EXYNOS4_DEV_PD
189 select SAMSUNG_DEV_PWM 199 select SAMSUNG_DEV_PWM
200 select EXYNOS4_DEV_USB_OHCI
190 select EXYNOS4_DEV_SYSMMU 201 select EXYNOS4_DEV_SYSMMU
191 select EXYNOS4_SETUP_FIMD0 202 select EXYNOS4_SETUP_FIMD0
192 select EXYNOS4_SETUP_I2C1 203 select EXYNOS4_SETUP_I2C1
@@ -300,6 +311,7 @@ config MACH_ORIGEN
300 select SAMSUNG_DEV_PWM 311 select SAMSUNG_DEV_PWM
301 select EXYNOS4_DEV_DMA 312 select EXYNOS4_DEV_DMA
302 select EXYNOS4_DEV_PD 313 select EXYNOS4_DEV_PD
314 select EXYNOS4_DEV_USB_OHCI
303 select EXYNOS4_SETUP_FIMD0 315 select EXYNOS4_SETUP_FIMD0
304 select EXYNOS4_SETUP_SDHCI 316 select EXYNOS4_SETUP_SDHCI
305 select EXYNOS4_SETUP_USB_PHY 317 select EXYNOS4_SETUP_USB_PHY
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index ca85a99c159d..5fc202cdfdb6 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -49,6 +49,7 @@ obj-$(CONFIG_EXYNOS4_DEV_PD) += dev-pd.o
49obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o 49obj-$(CONFIG_EXYNOS4_DEV_SYSMMU) += dev-sysmmu.o
50obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o 50obj-$(CONFIG_EXYNOS4_DEV_DWMCI) += dev-dwmci.o
51obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o 51obj-$(CONFIG_EXYNOS4_DEV_DMA) += dma.o
52obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI) += dev-ohci.o
52 53
53obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o 54obj-$(CONFIG_ARCH_EXYNOS4) += setup-i2c0.o
54obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o 55obj-$(CONFIG_EXYNOS4_SETUP_FIMC) += setup-fimc.o
@@ -63,3 +64,4 @@ obj-$(CONFIG_EXYNOS4_SETUP_I2C7) += setup-i2c7.o
63obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o 64obj-$(CONFIG_EXYNOS4_SETUP_KEYPAD) += setup-keypad.o
64obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o 65obj-$(CONFIG_EXYNOS4_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
65obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o 66obj-$(CONFIG_EXYNOS4_SETUP_USB_PHY) += setup-usb-phy.o
67obj-$(CONFIG_EXYNOS4_SETUP_SPI) += setup-spi.o
diff --git a/arch/arm/mach-exynos/clock.c b/arch/arm/mach-exynos/clock.c
index 5d5250df33fd..5a8c42e90005 100644
--- a/arch/arm/mach-exynos/clock.c
+++ b/arch/arm/mach-exynos/clock.c
@@ -1112,36 +1112,6 @@ static struct clksrc_clk clksrcs[] = {
1112 .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 }, 1112 .reg_div = { .reg = S5P_CLKDIV_LCD0, .shift = 0, .size = 4 },
1113 }, { 1113 }, {
1114 .clk = { 1114 .clk = {
1115 .name = "sclk_spi",
1116 .devname = "s3c64xx-spi.0",
1117 .enable = exynos4_clksrc_mask_peril1_ctrl,
1118 .ctrlbit = (1 << 16),
1119 },
1120 .sources = &clkset_group,
1121 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
1122 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
1123 }, {
1124 .clk = {
1125 .name = "sclk_spi",
1126 .devname = "s3c64xx-spi.1",
1127 .enable = exynos4_clksrc_mask_peril1_ctrl,
1128 .ctrlbit = (1 << 20),
1129 },
1130 .sources = &clkset_group,
1131 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
1132 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
1133 }, {
1134 .clk = {
1135 .name = "sclk_spi",
1136 .devname = "s3c64xx-spi.2",
1137 .enable = exynos4_clksrc_mask_peril1_ctrl,
1138 .ctrlbit = (1 << 24),
1139 },
1140 .sources = &clkset_group,
1141 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
1142 .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
1143 }, {
1144 .clk = {
1145 .name = "sclk_fimg2d", 1115 .name = "sclk_fimg2d",
1146 }, 1116 },
1147 .sources = &clkset_mout_g2d, 1117 .sources = &clkset_mout_g2d,
@@ -1258,6 +1228,42 @@ static struct clksrc_clk clk_sclk_mmc3 = {
1258 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 }, 1228 .reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
1259}; 1229};
1260 1230
1231static struct clksrc_clk clk_sclk_spi0 = {
1232 .clk = {
1233 .name = "sclk_spi",
1234 .devname = "s3c64xx-spi.0",
1235 .enable = exynos4_clksrc_mask_peril1_ctrl,
1236 .ctrlbit = (1 << 16),
1237 },
1238 .sources = &clkset_group,
1239 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 16, .size = 4 },
1240 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 0, .size = 4 },
1241};
1242
1243static struct clksrc_clk clk_sclk_spi1 = {
1244 .clk = {
1245 .name = "sclk_spi",
1246 .devname = "s3c64xx-spi.1",
1247 .enable = exynos4_clksrc_mask_peril1_ctrl,
1248 .ctrlbit = (1 << 20),
1249 },
1250 .sources = &clkset_group,
1251 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 20, .size = 4 },
1252 .reg_div = { .reg = S5P_CLKDIV_PERIL1, .shift = 16, .size = 4 },
1253};
1254
1255static struct clksrc_clk clk_sclk_spi2 = {
1256 .clk = {
1257 .name = "sclk_spi",
1258 .devname = "s3c64xx-spi.2",
1259 .enable = exynos4_clksrc_mask_peril1_ctrl,
1260 .ctrlbit = (1 << 24),
1261 },
1262 .sources = &clkset_group,
1263 .reg_src = { .reg = S5P_CLKSRC_PERIL1, .shift = 24, .size = 4 },
1264 .reg_div = { .reg = S5P_CLKDIV_PERIL2, .shift = 0, .size = 4 },
1265};
1266
1261/* Clock initialization code */ 1267/* Clock initialization code */
1262static struct clksrc_clk *sysclks[] = { 1268static struct clksrc_clk *sysclks[] = {
1263 &clk_mout_apll, 1269 &clk_mout_apll,
@@ -1306,6 +1312,10 @@ static struct clksrc_clk *clksrc_cdev[] = {
1306 &clk_sclk_mmc1, 1312 &clk_sclk_mmc1,
1307 &clk_sclk_mmc2, 1313 &clk_sclk_mmc2,
1308 &clk_sclk_mmc3, 1314 &clk_sclk_mmc3,
1315 &clk_sclk_spi0,
1316 &clk_sclk_spi1,
1317 &clk_sclk_spi2,
1318
1309}; 1319};
1310 1320
1311static struct clk_lookup exynos4_clk_lookup[] = { 1321static struct clk_lookup exynos4_clk_lookup[] = {
@@ -1319,6 +1329,9 @@ static struct clk_lookup exynos4_clk_lookup[] = {
1319 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk), 1329 CLKDEV_INIT("s3c-sdhci.3", "mmc_busclk.2", &clk_sclk_mmc3.clk),
1320 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0), 1330 CLKDEV_INIT("dma-pl330.0", "apb_pclk", &clk_pdma0),
1321 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1), 1331 CLKDEV_INIT("dma-pl330.1", "apb_pclk", &clk_pdma1),
1332 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk0", &clk_sclk_spi0.clk),
1333 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk0", &clk_sclk_spi1.clk),
1334 CLKDEV_INIT("s3c64xx-spi.2", "spi_busclk0", &clk_sclk_spi2.clk),
1322}; 1335};
1323 1336
1324static int xtal_rate; 1337static int xtal_rate;
diff --git a/arch/arm/mach-exynos/dev-ohci.c b/arch/arm/mach-exynos/dev-ohci.c
new file mode 100644
index 000000000000..b8e75300c77d
--- /dev/null
+++ b/arch/arm/mach-exynos/dev-ohci.c
@@ -0,0 +1,52 @@
1/* linux/arch/arm/mach-exynos/dev-ohci.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * EXYNOS - OHCI support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15
16#include <mach/irqs.h>
17#include <mach/map.h>
18#include <mach/ohci.h>
19
20#include <plat/devs.h>
21#include <plat/usb-phy.h>
22
23static struct resource exynos4_ohci_resource[] = {
24 [0] = DEFINE_RES_MEM(EXYNOS4_PA_OHCI, SZ_256),
25 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
26};
27
28static u64 exynos4_ohci_dma_mask = DMA_BIT_MASK(32);
29
30struct platform_device exynos4_device_ohci = {
31 .name = "exynos-ohci",
32 .id = -1,
33 .num_resources = ARRAY_SIZE(exynos4_ohci_resource),
34 .resource = exynos4_ohci_resource,
35 .dev = {
36 .dma_mask = &exynos4_ohci_dma_mask,
37 .coherent_dma_mask = DMA_BIT_MASK(32),
38 }
39};
40
41void __init exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd)
42{
43 struct exynos4_ohci_platdata *npd;
44
45 npd = s3c_set_platdata(pd, sizeof(struct exynos4_ohci_platdata),
46 &exynos4_device_ohci);
47
48 if (!npd->phy_init)
49 npd->phy_init = s5p_usb_phy_init;
50 if (!npd->phy_exit)
51 npd->phy_exit = s5p_usb_phy_exit;
52}
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h
index 713dd5251c64..f77bce04789a 100644
--- a/arch/arm/mach-exynos/include/mach/irqs.h
+++ b/arch/arm/mach-exynos/include/mach/irqs.h
@@ -72,6 +72,9 @@
72#define IRQ_IIC5 IRQ_SPI(63) 72#define IRQ_IIC5 IRQ_SPI(63)
73#define IRQ_IIC6 IRQ_SPI(64) 73#define IRQ_IIC6 IRQ_SPI(64)
74#define IRQ_IIC7 IRQ_SPI(65) 74#define IRQ_IIC7 IRQ_SPI(65)
75#define IRQ_SPI0 IRQ_SPI(66)
76#define IRQ_SPI1 IRQ_SPI(67)
77#define IRQ_SPI2 IRQ_SPI(68)
75 78
76#define IRQ_USB_HOST IRQ_SPI(70) 79#define IRQ_USB_HOST IRQ_SPI(70)
77#define IRQ_USB_HSOTG IRQ_SPI(71) 80#define IRQ_USB_HSOTG IRQ_SPI(71)
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index d1829860a0ec..c754a22a2bb3 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -87,6 +87,10 @@
87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000 87#define EXYNOS4_PA_SYSMMU_TV 0x12E20000
88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000 88#define EXYNOS4_PA_SYSMMU_MFC_L 0x13620000
89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000 89#define EXYNOS4_PA_SYSMMU_MFC_R 0x13630000
90#define EXYNOS4_PA_SPI0 0x13920000
91#define EXYNOS4_PA_SPI1 0x13930000
92#define EXYNOS4_PA_SPI2 0x13940000
93
90 94
91#define EXYNOS4_PA_GPIO1 0x11400000 95#define EXYNOS4_PA_GPIO1 0x11400000
92#define EXYNOS4_PA_GPIO2 0x11000000 96#define EXYNOS4_PA_GPIO2 0x11000000
@@ -107,6 +111,7 @@
107#define EXYNOS4_PA_SROMC 0x12570000 111#define EXYNOS4_PA_SROMC 0x12570000
108 112
109#define EXYNOS4_PA_EHCI 0x12580000 113#define EXYNOS4_PA_EHCI 0x12580000
114#define EXYNOS4_PA_OHCI 0x12590000
110#define EXYNOS4_PA_HSPHY 0x125B0000 115#define EXYNOS4_PA_HSPHY 0x125B0000
111#define EXYNOS4_PA_MFC 0x13400000 116#define EXYNOS4_PA_MFC 0x13400000
112 117
@@ -148,6 +153,9 @@
148#define S3C_PA_RTC EXYNOS4_PA_RTC 153#define S3C_PA_RTC EXYNOS4_PA_RTC
149#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG 154#define S3C_PA_WDT EXYNOS4_PA_WATCHDOG
150#define S3C_PA_UART EXYNOS4_PA_UART 155#define S3C_PA_UART EXYNOS4_PA_UART
156#define S3C_PA_SPI0 EXYNOS4_PA_SPI0
157#define S3C_PA_SPI1 EXYNOS4_PA_SPI1
158#define S3C_PA_SPI2 EXYNOS4_PA_SPI2
151 159
152#define S5P_PA_EHCI EXYNOS4_PA_EHCI 160#define S5P_PA_EHCI EXYNOS4_PA_EHCI
153#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0 161#define S5P_PA_FIMC0 EXYNOS4_PA_FIMC0
diff --git a/arch/arm/mach-exynos/include/mach/ohci.h b/arch/arm/mach-exynos/include/mach/ohci.h
new file mode 100644
index 000000000000..c256c595be5e
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/ohci.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * http://www.samsung.com/
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __MACH_EXYNOS_OHCI_H
12#define __MACH_EXYNOS_OHCI_H
13
14struct exynos4_ohci_platdata {
15 int (*phy_init)(struct platform_device *pdev, int type);
16 int (*phy_exit)(struct platform_device *pdev, int type);
17};
18
19extern void exynos4_ohci_set_platdata(struct exynos4_ohci_platdata *pd);
20
21#endif /* __MACH_EXYNOS_OHCI_H */
diff --git a/arch/arm/mach-exynos/include/mach/spi-clocks.h b/arch/arm/mach-exynos/include/mach/spi-clocks.h
new file mode 100644
index 000000000000..576efdf6d091
--- /dev/null
+++ b/arch/arm/mach-exynos/include/mach/spi-clocks.h
@@ -0,0 +1,16 @@
1/* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h
2 *
3 * Copyright (C) 2011 Samsung Electronics Co. Ltd.
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#ifndef __ASM_ARCH_SPI_CLKS_H
11#define __ASM_ARCH_SPI_CLKS_H __FILE__
12
13/* Must source from SCLK_SPI */
14#define EXYNOS4_SPI_SRCCLK_SCLK 0
15
16#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 586eb995aa96..2b11e046d391 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -41,6 +41,7 @@
41#include <plat/fb.h> 41#include <plat/fb.h>
42#include <plat/mfc.h> 42#include <plat/mfc.h>
43 43
44#include <mach/ohci.h>
44#include <mach/map.h> 45#include <mach/map.h>
45 46
46#include "common.h" 47#include "common.h"
@@ -485,6 +486,16 @@ static void __init origen_ehci_init(void)
485 s5p_ehci_set_platdata(pdata); 486 s5p_ehci_set_platdata(pdata);
486} 487}
487 488
489/* USB OHCI */
490static struct exynos4_ohci_platdata origen_ohci_pdata;
491
492static void __init origen_ohci_init(void)
493{
494 struct exynos4_ohci_platdata *pdata = &origen_ohci_pdata;
495
496 exynos4_ohci_set_platdata(pdata);
497}
498
488static struct gpio_keys_button origen_gpio_keys_table[] = { 499static struct gpio_keys_button origen_gpio_keys_table[] = {
489 { 500 {
490 .code = KEY_MENU, 501 .code = KEY_MENU,
@@ -608,6 +619,7 @@ static struct platform_device *origen_devices[] __initdata = {
608 &s5p_device_mfc_l, 619 &s5p_device_mfc_l,
609 &s5p_device_mfc_r, 620 &s5p_device_mfc_r,
610 &s5p_device_mixer, 621 &s5p_device_mixer,
622 &exynos4_device_ohci,
611 &exynos4_device_pd[PD_LCD0], 623 &exynos4_device_pd[PD_LCD0],
612 &exynos4_device_pd[PD_TV], 624 &exynos4_device_pd[PD_TV],
613 &exynos4_device_pd[PD_G3D], 625 &exynos4_device_pd[PD_G3D],
@@ -672,6 +684,7 @@ static void __init origen_machine_init(void)
672 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata); 684 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
673 685
674 origen_ehci_init(); 686 origen_ehci_init();
687 origen_ohci_init();
675 clk_xusbxti.rate = 24000000; 688 clk_xusbxti.rate = 24000000;
676 689
677 s5p_tv_setup(); 690 s5p_tv_setup();
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index a27b23eee9fa..b2c5557f50e4 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -42,6 +42,7 @@
42#include <plat/clock.h> 42#include <plat/clock.h>
43 43
44#include <mach/map.h> 44#include <mach/map.h>
45#include <mach/ohci.h>
45 46
46#include "common.h" 47#include "common.h"
47 48
@@ -245,6 +246,16 @@ static void __init smdkv310_ehci_init(void)
245 s5p_ehci_set_platdata(pdata); 246 s5p_ehci_set_platdata(pdata);
246} 247}
247 248
249/* USB OHCI */
250static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
251
252static void __init smdkv310_ohci_init(void)
253{
254 struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
255
256 exynos4_ohci_set_platdata(pdata);
257}
258
248static struct platform_device *smdkv310_devices[] __initdata = { 259static struct platform_device *smdkv310_devices[] __initdata = {
249 &s3c_device_hsmmc0, 260 &s3c_device_hsmmc0,
250 &s3c_device_hsmmc1, 261 &s3c_device_hsmmc1,
@@ -261,6 +272,7 @@ static struct platform_device *smdkv310_devices[] __initdata = {
261 &s5p_device_fimc3, 272 &s5p_device_fimc3,
262 &exynos4_device_ac97, 273 &exynos4_device_ac97,
263 &exynos4_device_i2s0, 274 &exynos4_device_i2s0,
275 &exynos4_device_ohci,
264 &samsung_device_keypad, 276 &samsung_device_keypad,
265 &s5p_device_mfc, 277 &s5p_device_mfc,
266 &s5p_device_mfc_l, 278 &s5p_device_mfc_l,
@@ -363,6 +375,7 @@ static void __init smdkv310_machine_init(void)
363 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata); 375 s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
364 376
365 smdkv310_ehci_init(); 377 smdkv310_ehci_init();
378 smdkv310_ohci_init();
366 clk_xusbxti.rate = 24000000; 379 clk_xusbxti.rate = 24000000;
367 380
368 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices)); 381 platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
diff --git a/arch/arm/mach-exynos/setup-spi.c b/arch/arm/mach-exynos/setup-spi.c
new file mode 100644
index 000000000000..833ff40ee0e8
--- /dev/null
+++ b/arch/arm/mach-exynos/setup-spi.c
@@ -0,0 +1,72 @@
1/* linux/arch/arm/mach-exynos4/setup-spi.c
2 *
3 * Copyright (C) 2011 Samsung Electronics Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/gpio.h>
12#include <linux/platform_device.h>
13
14#include <plat/gpio-cfg.h>
15#include <plat/s3c64xx-spi.h>
16
17#ifdef CONFIG_S3C64XX_DEV_SPI0
18struct s3c64xx_spi_info s3c64xx_spi0_pdata __initdata = {
19 .fifo_lvl_mask = 0x1ff,
20 .rx_lvl_offset = 15,
21 .high_speed = 1,
22 .clk_from_cmu = true,
23 .tx_st_done = 25,
24};
25
26int s3c64xx_spi0_cfg_gpio(struct platform_device *dev)
27{
28 s3c_gpio_cfgpin(EXYNOS4_GPB(0), S3C_GPIO_SFN(2));
29 s3c_gpio_setpull(EXYNOS4_GPB(0), S3C_GPIO_PULL_UP);
30 s3c_gpio_cfgall_range(EXYNOS4_GPB(2), 2,
31 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
32 return 0;
33}
34#endif
35
36#ifdef CONFIG_S3C64XX_DEV_SPI1
37struct s3c64xx_spi_info s3c64xx_spi1_pdata __initdata = {
38 .fifo_lvl_mask = 0x7f,
39 .rx_lvl_offset = 15,
40 .high_speed = 1,
41 .clk_from_cmu = true,
42 .tx_st_done = 25,
43};
44
45int s3c64xx_spi1_cfg_gpio(struct platform_device *dev)
46{
47 s3c_gpio_cfgpin(EXYNOS4_GPB(4), S3C_GPIO_SFN(2));
48 s3c_gpio_setpull(EXYNOS4_GPB(4), S3C_GPIO_PULL_UP);
49 s3c_gpio_cfgall_range(EXYNOS4_GPB(6), 2,
50 S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
51 return 0;
52}
53#endif
54
55#ifdef CONFIG_S3C64XX_DEV_SPI2
56struct s3c64xx_spi_info s3c64xx_spi2_pdata __initdata = {
57 .fifo_lvl_mask = 0x7f,
58 .rx_lvl_offset = 15,
59 .high_speed = 1,
60 .clk_from_cmu = true,
61 .tx_st_done = 25,
62};
63
64int s3c64xx_spi2_cfg_gpio(struct platform_device *dev)
65{
66 s3c_gpio_cfgpin(EXYNOS4_GPC1(1), S3C_GPIO_SFN(5));
67 s3c_gpio_setpull(EXYNOS4_GPC1(1), S3C_GPIO_PULL_UP);
68 s3c_gpio_cfgall_range(EXYNOS4_GPC1(3), 2,
69 S3C_GPIO_SFN(5), S3C_GPIO_PULL_UP);
70 return 0;
71}
72#endif
diff --git a/arch/arm/mach-exynos/setup-usb-phy.c b/arch/arm/mach-exynos/setup-usb-phy.c
index 39aca045f660..41743d21e8c6 100644
--- a/arch/arm/mach-exynos/setup-usb-phy.c
+++ b/arch/arm/mach-exynos/setup-usb-phy.c
@@ -19,6 +19,13 @@
19#include <plat/cpu.h> 19#include <plat/cpu.h>
20#include <plat/usb-phy.h> 20#include <plat/usb-phy.h>
21 21
22static atomic_t host_usage;
23
24static int exynos4_usb_host_phy_is_on(void)
25{
26 return (readl(EXYNOS4_PHYPWR) & PHY1_STD_ANALOG_POWERDOWN) ? 0 : 1;
27}
28
22static int exynos4_usb_phy1_init(struct platform_device *pdev) 29static int exynos4_usb_phy1_init(struct platform_device *pdev)
23{ 30{
24 struct clk *otg_clk; 31 struct clk *otg_clk;
@@ -27,6 +34,8 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
27 u32 rstcon; 34 u32 rstcon;
28 int err; 35 int err;
29 36
37 atomic_inc(&host_usage);
38
30 otg_clk = clk_get(&pdev->dev, "otg"); 39 otg_clk = clk_get(&pdev->dev, "otg");
31 if (IS_ERR(otg_clk)) { 40 if (IS_ERR(otg_clk)) {
32 dev_err(&pdev->dev, "Failed to get otg clock\n"); 41 dev_err(&pdev->dev, "Failed to get otg clock\n");
@@ -39,6 +48,9 @@ static int exynos4_usb_phy1_init(struct platform_device *pdev)
39 return err; 48 return err;
40 } 49 }
41 50
51 if (exynos4_usb_host_phy_is_on())
52 return 0;
53
42 writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE, 54 writel(readl(S5P_USBHOST_PHY_CONTROL) | S5P_USBHOST_PHY_ENABLE,
43 S5P_USBHOST_PHY_CONTROL); 55 S5P_USBHOST_PHY_CONTROL);
44 56
@@ -95,6 +107,9 @@ static int exynos4_usb_phy1_exit(struct platform_device *pdev)
95 struct clk *otg_clk; 107 struct clk *otg_clk;
96 int err; 108 int err;
97 109
110 if (atomic_dec_return(&host_usage) > 0)
111 return 0;
112
98 otg_clk = clk_get(&pdev->dev, "otg"); 113 otg_clk = clk_get(&pdev->dev, "otg");
99 if (IS_ERR(otg_clk)) { 114 if (IS_ERR(otg_clk)) {
100 dev_err(&pdev->dev, "Failed to get otg clock\n"); 115 dev_err(&pdev->dev, "Failed to get otg clock\n");
diff --git a/arch/arm/mach-mmp/aspenite.c b/arch/arm/mach-mmp/aspenite.c
index 3e6dfab59ef6..17cb76060125 100644
--- a/arch/arm/mach-mmp/aspenite.c
+++ b/arch/arm/mach-mmp/aspenite.c
@@ -120,8 +120,8 @@ static struct resource smc91x_resources[] = {
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121 }, 121 },
122 [1] = { 122 [1] = {
123 .start = gpio_to_irq(27), 123 .start = MMP_GPIO_TO_IRQ(27),
124 .end = gpio_to_irq(27), 124 .end = MMP_GPIO_TO_IRQ(27),
125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 125 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
126 } 126 }
127}; 127};
@@ -232,6 +232,7 @@ static void __init common_init(void)
232 pxa168_add_nand(&aspenite_nand_info); 232 pxa168_add_nand(&aspenite_nand_info);
233 pxa168_add_fb(&aspenite_lcd_info); 233 pxa168_add_fb(&aspenite_lcd_info);
234 pxa168_add_keypad(&aspenite_keypad_info); 234 pxa168_add_keypad(&aspenite_keypad_info);
235 platform_device_register(&pxa168_device_gpio);
235 236
236 /* off-chip devices */ 237 /* off-chip devices */
237 platform_device_register(&smc91x_device); 238 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/avengers_lite.c b/arch/arm/mach-mmp/avengers_lite.c
index 8de3dc6131a4..b148a9dc5a44 100644
--- a/arch/arm/mach-mmp/avengers_lite.c
+++ b/arch/arm/mach-mmp/avengers_lite.c
@@ -38,6 +38,7 @@ static void __init avengers_lite_init(void)
38 38
39 /* on-chip devices */ 39 /* on-chip devices */
40 pxa168_add_uart(2); 40 pxa168_add_uart(2);
41 platform_device_register(&pxa168_device_gpio);
41} 42}
42 43
43MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform") 44MACHINE_START(AVENGERS_LITE, "PXA168 Avengers lite Development Platform")
diff --git a/arch/arm/mach-mmp/brownstone.c b/arch/arm/mach-mmp/brownstone.c
index e16f04b39b15..d839fe6421e6 100644
--- a/arch/arm/mach-mmp/brownstone.c
+++ b/arch/arm/mach-mmp/brownstone.c
@@ -202,6 +202,7 @@ static void __init brownstone_init(void)
202 /* on-chip devices */ 202 /* on-chip devices */
203 mmp2_add_uart(1); 203 mmp2_add_uart(1);
204 mmp2_add_uart(3); 204 mmp2_add_uart(3);
205 platform_device_register(&mmp2_device_gpio);
205 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info)); 206 mmp2_add_twsi(1, NULL, ARRAY_AND_SIZE(brownstone_twsi1_info));
206 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */ 207 mmp2_add_sdhost(0, &mmp2_sdh_platdata_mmc0); /* SD/MMC */
207 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */ 208 mmp2_add_sdhost(2, &mmp2_sdh_platdata_mmc2); /* eMMC */
diff --git a/arch/arm/mach-mmp/flint.c b/arch/arm/mach-mmp/flint.c
index 5a6a27a6cfd0..2ee8cd7829dd 100644
--- a/arch/arm/mach-mmp/flint.c
+++ b/arch/arm/mach-mmp/flint.c
@@ -87,8 +87,8 @@ static struct resource smc91x_resources[] = {
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, 88 },
89 [1] = { 89 [1] = {
90 .start = gpio_to_irq(155), 90 .start = MMP_GPIO_TO_IRQ(155),
91 .end = gpio_to_irq(155), 91 .end = MMP_GPIO_TO_IRQ(155),
92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 92 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
93 } 93 }
94}; 94};
@@ -110,6 +110,7 @@ static void __init flint_init(void)
110 /* on-chip devices */ 110 /* on-chip devices */
111 mmp2_add_uart(1); 111 mmp2_add_uart(1);
112 mmp2_add_uart(2); 112 mmp2_add_uart(2);
113 platform_device_register(&mmp2_device_gpio);
113 114
114 /* off-chip devices */ 115 /* off-chip devices */
115 platform_device_register(&smc91x_device); 116 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/gplugd.c b/arch/arm/mach-mmp/gplugd.c
index 1e3abbe37cac..87765467de63 100644
--- a/arch/arm/mach-mmp/gplugd.c
+++ b/arch/arm/mach-mmp/gplugd.c
@@ -184,6 +184,7 @@ static void __init gplugd_init(void)
184 pxa168_add_uart(3); 184 pxa168_add_uart(3);
185 pxa168_add_ssp(1); 185 pxa168_add_ssp(1);
186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info)); 186 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(gplugd_i2c_board_info));
187 platform_device_register(&pxa168_device_gpio);
187 188
188 pxa168_add_eth(&gplugd_eth_platform_data); 189 pxa168_add_eth(&gplugd_eth_platform_data);
189} 190}
diff --git a/arch/arm/mach-mmp/include/mach/gpio-pxa.h b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
index 99b4ce1b6562..0e135a599f3e 100644
--- a/arch/arm/mach-mmp/include/mach/gpio-pxa.h
+++ b/arch/arm/mach-mmp/include/mach/gpio-pxa.h
@@ -2,6 +2,7 @@
2#define __ASM_MACH_GPIO_PXA_H 2#define __ASM_MACH_GPIO_PXA_H
3 3
4#include <mach/addr-map.h> 4#include <mach/addr-map.h>
5#include <mach/cputype.h>
5#include <mach/irqs.h> 6#include <mach/irqs.h>
6 7
7#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000) 8#define GPIO_REGS_VIRT (APB_VIRT_BASE + 0x19000)
@@ -9,8 +10,6 @@
9#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2)) 10#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
10#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x))) 11#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
11 12
12#define NR_BUILTIN_GPIO IRQ_GPIO_NUM
13
14#define gpio_to_bank(gpio) ((gpio) >> 5) 13#define gpio_to_bank(gpio) ((gpio) >> 5)
15 14
16/* NOTE: these macros are defined here to make optimization of 15/* NOTE: these macros are defined here to make optimization of
diff --git a/arch/arm/mach-mmp/include/mach/gpio.h b/arch/arm/mach-mmp/include/mach/gpio.h
index 681262359d1c..13219ebf5128 100644
--- a/arch/arm/mach-mmp/include/mach/gpio.h
+++ b/arch/arm/mach-mmp/include/mach/gpio.h
@@ -3,11 +3,6 @@
3 3
4#include <asm-generic/gpio.h> 4#include <asm-generic/gpio.h>
5 5
6#define gpio_to_irq(gpio) (IRQ_GPIO_START + (gpio)) 6#include <mach/cputype.h>
7#define irq_to_gpio(irq) ((irq) - IRQ_GPIO_START)
8 7
9#define __gpio_is_inverted(gpio) (0)
10#define __gpio_is_occupied(gpio) (0)
11
12#include <plat/gpio.h>
13#endif /* __ASM_MACH_GPIO_H */ 8#endif /* __ASM_MACH_GPIO_H */
diff --git a/arch/arm/mach-mmp/include/mach/irqs.h b/arch/arm/mach-mmp/include/mach/irqs.h
index a09d328e2ddd..34635a0bbb59 100644
--- a/arch/arm/mach-mmp/include/mach/irqs.h
+++ b/arch/arm/mach-mmp/include/mach/irqs.h
@@ -219,10 +219,10 @@
219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2) 219#define IRQ_MMP2_MUX_END (IRQ_MMP2_SSP_BASE + 2)
220 220
221#define IRQ_GPIO_START 128 221#define IRQ_GPIO_START 128
222#define IRQ_GPIO_NUM 192 222#define MMP_NR_BUILTIN_GPIO 192
223#define IRQ_GPIO(x) (IRQ_GPIO_START + (x)) 223#define MMP_GPIO_TO_IRQ(gpio) (IRQ_GPIO_START + (gpio))
224 224
225#define IRQ_BOARD_START (IRQ_GPIO_START + IRQ_GPIO_NUM) 225#define IRQ_BOARD_START (IRQ_GPIO_START + MMP_NR_BUILTIN_GPIO)
226 226
227#define NR_IRQS (IRQ_BOARD_START) 227#define NR_IRQS (IRQ_BOARD_START)
228 228
diff --git a/arch/arm/mach-mmp/include/mach/mmp2.h b/arch/arm/mach-mmp/include/mach/mmp2.h
index 2f7b2d3c2b18..cba22fed2265 100644
--- a/arch/arm/mach-mmp/include/mach/mmp2.h
+++ b/arch/arm/mach-mmp/include/mach/mmp2.h
@@ -32,6 +32,8 @@ extern struct pxa_device_desc mmp2_device_sdh3;
32extern struct pxa_device_desc mmp2_device_asram; 32extern struct pxa_device_desc mmp2_device_asram;
33extern struct pxa_device_desc mmp2_device_isram; 33extern struct pxa_device_desc mmp2_device_isram;
34 34
35extern struct platform_device mmp2_device_gpio;
36
35static inline int mmp2_add_uart(int id) 37static inline int mmp2_add_uart(int id)
36{ 38{
37 struct pxa_device_desc *d = NULL; 39 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa168.h b/arch/arm/mach-mmp/include/mach/pxa168.h
index a677aa732c26..dc03d580a06d 100644
--- a/arch/arm/mach-mmp/include/mach/pxa168.h
+++ b/arch/arm/mach-mmp/include/mach/pxa168.h
@@ -43,6 +43,8 @@ struct pxa168_usb_pdata {
43/* pdata can be NULL */ 43/* pdata can be NULL */
44int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata); 44int __init pxa168_add_usb_host(struct pxa168_usb_pdata *pdata);
45 45
46extern struct platform_device pxa168_device_gpio;
47
46static inline int pxa168_add_uart(int id) 48static inline int pxa168_add_uart(int id)
47{ 49{
48 struct pxa_device_desc *d = NULL; 50 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/include/mach/pxa910.h b/arch/arm/mach-mmp/include/mach/pxa910.h
index 91be75591398..4de13abef7bb 100644
--- a/arch/arm/mach-mmp/include/mach/pxa910.h
+++ b/arch/arm/mach-mmp/include/mach/pxa910.h
@@ -21,6 +21,8 @@ extern struct pxa_device_desc pxa910_device_pwm3;
21extern struct pxa_device_desc pxa910_device_pwm4; 21extern struct pxa_device_desc pxa910_device_pwm4;
22extern struct pxa_device_desc pxa910_device_nand; 22extern struct pxa_device_desc pxa910_device_nand;
23 23
24extern struct platform_device pxa910_device_gpio;
25
24static inline int pxa910_add_uart(int id) 26static inline int pxa910_add_uart(int id)
25{ 27{
26 struct pxa_device_desc *d = NULL; 28 struct pxa_device_desc *d = NULL;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 5dd1d4a6aeb9..617c60a170a4 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -13,6 +13,7 @@
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/init.h> 14#include <linux/init.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/hardware/cache-tauros2.h> 18#include <asm/hardware/cache-tauros2.h>
18 19
@@ -24,7 +25,6 @@
24#include <mach/irqs.h> 25#include <mach/irqs.h>
25#include <mach/dma.h> 26#include <mach/dma.h>
26#include <mach/mfp.h> 27#include <mach/mfp.h>
27#include <mach/gpio-pxa.h>
28#include <mach/devices.h> 28#include <mach/devices.h>
29#include <mach/mmp2.h> 29#include <mach/mmp2.h>
30 30
@@ -33,8 +33,6 @@
33 33
34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 34#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
35 35
36#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
37
38static struct mfp_addr_map mmp2_addr_map[] __initdata = { 36static struct mfp_addr_map mmp2_addr_map[] __initdata = {
39 37
40 MFP_ADDR_X(GPIO0, GPIO58, 0x54), 38 MFP_ADDR_X(GPIO0, GPIO58, 0x54),
@@ -95,24 +93,9 @@ void mmp2_clear_pmic_int(void)
95 __raw_writel(data, mfpr_pmic); 93 __raw_writel(data, mfpr_pmic);
96} 94}
97 95
98static void __init mmp2_init_gpio(void)
99{
100 int i;
101
102 /* enable GPIO clock */
103 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
104
105 /* unmask GPIO edge detection for all 6 banks -- APMASKx */
106 for (i = 0; i < 6; i++)
107 __raw_writel(0xffffffff, APMASK(i));
108
109 pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
110}
111
112void __init mmp2_init_irq(void) 96void __init mmp2_init_irq(void)
113{ 97{
114 mmp2_init_icu(); 98 mmp2_init_icu();
115 mmp2_init_gpio();
116} 99}
117 100
118static void sdhc_clk_enable(struct clk *clk) 101static void sdhc_clk_enable(struct clk *clk)
@@ -149,6 +132,7 @@ static APBC_CLK(twsi3, MMP2_TWSI3, 0, 26000000);
149static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000); 132static APBC_CLK(twsi4, MMP2_TWSI4, 0, 26000000);
150static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000); 133static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
151static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); 134static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
135static APBC_CLK(gpio, MMP2_GPIO, 0, 26000000);
152 136
153static APMU_CLK(nand, NAND, 0xbf, 100000000); 137static APMU_CLK(nand, NAND, 0xbf, 100000000);
154static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops); 138static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
@@ -168,6 +152,7 @@ static struct clk_lookup mmp2_clkregs[] = {
168 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), 152 INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
169 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), 153 INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
170 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 154 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
155 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
171 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"), 156 INIT_CLKREG(&clk_sdh0, "sdhci-pxav3.0", "PXA-SDHCLK"),
172 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"), 157 INIT_CLKREG(&clk_sdh1, "sdhci-pxav3.1", "PXA-SDHCLK"),
173 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"), 158 INIT_CLKREG(&clk_sdh2, "sdhci-pxav3.2", "PXA-SDHCLK"),
@@ -230,3 +215,21 @@ MMP2_DEVICE(asram, "asram", -1, NONE, 0xe0000000, 0x4000);
230/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */ 215/* 0xd1000000 ~ 0xd101ffff is reserved for secure processor */
231MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000); 216MMP2_DEVICE(isram, "isram", -1, NONE, 0xd1020000, 0x18000);
232 217
218struct resource mmp2_resource_gpio[] = {
219 {
220 .start = 0xd4019000,
221 .end = 0xd4019fff,
222 .flags = IORESOURCE_MEM,
223 }, {
224 .start = IRQ_MMP2_GPIO,
225 .end = IRQ_MMP2_GPIO,
226 .flags = IORESOURCE_IRQ,
227 },
228};
229
230struct platform_device mmp2_device_gpio = {
231 .name = "pxa-gpio",
232 .id = -1,
233 .num_resources = ARRAY_SIZE(mmp2_resource_gpio),
234 .resource = mmp2_resource_gpio,
235};
diff --git a/arch/arm/mach-mmp/pxa168.c b/arch/arm/mach-mmp/pxa168.c
index 13f23867a86a..7bc17eaa12eb 100644
--- a/arch/arm/mach-mmp/pxa168.c
+++ b/arch/arm/mach-mmp/pxa168.c
@@ -13,6 +13,7 @@
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/platform_device.h>
16 17
17#include <asm/mach/time.h> 18#include <asm/mach/time.h>
18#include <mach/addr-map.h> 19#include <mach/addr-map.h>
@@ -20,7 +21,6 @@
20#include <mach/regs-apbc.h> 21#include <mach/regs-apbc.h>
21#include <mach/regs-apmu.h> 22#include <mach/regs-apmu.h>
22#include <mach/irqs.h> 23#include <mach/irqs.h>
23#include <mach/gpio-pxa.h>
24#include <mach/dma.h> 24#include <mach/dma.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
26#include <mach/mfp.h> 26#include <mach/mfp.h>
@@ -43,26 +43,9 @@ static struct mfp_addr_map pxa168_mfp_addr_map[] __initdata =
43 MFP_ADDR_END, 43 MFP_ADDR_END,
44}; 44};
45 45
46#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
47
48static void __init pxa168_init_gpio(void)
49{
50 int i;
51
52 /* enable GPIO clock */
53 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA168_GPIO);
54
55 /* unmask GPIO edge detection for all 4 banks - APMASKx */
56 for (i = 0; i < 4; i++)
57 __raw_writel(0xffffffff, APMASK(i));
58
59 pxa_init_gpio(IRQ_PXA168_GPIOX, 0, 127, NULL);
60}
61
62void __init pxa168_init_irq(void) 46void __init pxa168_init_irq(void)
63{ 47{
64 icu_init_irq(); 48 icu_init_irq();
65 pxa168_init_gpio();
66} 49}
67 50
68/* APB peripheral clocks */ 51/* APB peripheral clocks */
@@ -80,6 +63,7 @@ static APBC_CLK(ssp2, PXA168_SSP2, 4, 0);
80static APBC_CLK(ssp3, PXA168_SSP3, 4, 0); 63static APBC_CLK(ssp3, PXA168_SSP3, 4, 0);
81static APBC_CLK(ssp4, PXA168_SSP4, 4, 0); 64static APBC_CLK(ssp4, PXA168_SSP4, 4, 0);
82static APBC_CLK(ssp5, PXA168_SSP5, 4, 0); 65static APBC_CLK(ssp5, PXA168_SSP5, 4, 0);
66static APBC_CLK(gpio, PXA168_GPIO, 0, 13000000);
83static APBC_CLK(keypad, PXA168_KPC, 0, 32000); 67static APBC_CLK(keypad, PXA168_KPC, 0, 32000);
84 68
85static APMU_CLK(nand, NAND, 0x19b, 156000000); 69static APMU_CLK(nand, NAND, 0x19b, 156000000);
@@ -105,6 +89,7 @@ static struct clk_lookup pxa168_clkregs[] = {
105 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL), 89 INIT_CLKREG(&clk_ssp5, "pxa168-ssp.4", NULL),
106 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
107 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL), 91 INIT_CLKREG(&clk_lcd, "pxa168-fb", NULL),
92 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
108 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL), 93 INIT_CLKREG(&clk_keypad, "pxa27x-keypad", NULL),
109 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"), 94 INIT_CLKREG(&clk_eth, "pxa168-eth", "MFUCLK"),
110 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"), 95 INIT_CLKREG(&clk_usb, "pxa168-ehci", "PXA168-USBCLK"),
@@ -174,6 +159,25 @@ PXA168_DEVICE(fb, "pxa168-fb", -1, LCD, 0xd420b000, 0x1c8);
174PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c); 159PXA168_DEVICE(keypad, "pxa27x-keypad", -1, KEYPAD, 0xd4012000, 0x4c);
175PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff); 160PXA168_DEVICE(eth, "pxa168-eth", -1, MFU, 0xc0800000, 0x0fff);
176 161
162struct resource pxa168_resource_gpio[] = {
163 {
164 .start = 0xd4019000,
165 .end = 0xd4019fff,
166 .flags = IORESOURCE_MEM,
167 }, {
168 .start = IRQ_PXA168_GPIOX,
169 .end = IRQ_PXA168_GPIOX,
170 .flags = IORESOURCE_IRQ,
171 },
172};
173
174struct platform_device pxa168_device_gpio = {
175 .name = "pxa-gpio",
176 .id = -1,
177 .num_resources = ARRAY_SIZE(pxa168_resource_gpio),
178 .resource = pxa168_resource_gpio,
179};
180
177struct resource pxa168_usb_host_resources[] = { 181struct resource pxa168_usb_host_resources[] = {
178 /* USB Host conroller register base */ 182 /* USB Host conroller register base */
179 [0] = { 183 [0] = {
diff --git a/arch/arm/mach-mmp/pxa910.c b/arch/arm/mach-mmp/pxa910.c
index 4ebbfbba39fc..3241a25784d0 100644
--- a/arch/arm/mach-mmp/pxa910.c
+++ b/arch/arm/mach-mmp/pxa910.c
@@ -12,6 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/list.h> 13#include <linux/list.h>
14#include <linux/io.h> 14#include <linux/io.h>
15#include <linux/platform_device.h>
15 16
16#include <asm/mach/time.h> 17#include <asm/mach/time.h>
17#include <mach/addr-map.h> 18#include <mach/addr-map.h>
@@ -19,7 +20,6 @@
19#include <mach/regs-apmu.h> 20#include <mach/regs-apmu.h>
20#include <mach/cputype.h> 21#include <mach/cputype.h>
21#include <mach/irqs.h> 22#include <mach/irqs.h>
22#include <mach/gpio-pxa.h>
23#include <mach/dma.h> 23#include <mach/dma.h>
24#include <mach/mfp.h> 24#include <mach/mfp.h>
25#include <mach/devices.h> 25#include <mach/devices.h>
@@ -77,26 +77,9 @@ static struct mfp_addr_map pxa910_mfp_addr_map[] __initdata =
77 MFP_ADDR_END, 77 MFP_ADDR_END,
78}; 78};
79 79
80#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x09c)
81
82static void __init pxa910_init_gpio(void)
83{
84 int i;
85
86 /* enable GPIO clock */
87 __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_PXA910_GPIO);
88
89 /* unmask GPIO edge detection for all 4 banks - APMASKx */
90 for (i = 0; i < 4; i++)
91 __raw_writel(0xffffffff, APMASK(i));
92
93 pxa_init_gpio(IRQ_PXA910_AP_GPIO, 0, 127, NULL);
94}
95
96void __init pxa910_init_irq(void) 80void __init pxa910_init_irq(void)
97{ 81{
98 icu_init_irq(); 82 icu_init_irq();
99 pxa910_init_gpio();
100} 83}
101 84
102/* APB peripheral clocks */ 85/* APB peripheral clocks */
@@ -108,6 +91,7 @@ static APBC_CLK(pwm1, PXA910_PWM1, 1, 13000000);
108static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000); 91static APBC_CLK(pwm2, PXA910_PWM2, 1, 13000000);
109static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000); 92static APBC_CLK(pwm3, PXA910_PWM3, 1, 13000000);
110static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000); 93static APBC_CLK(pwm4, PXA910_PWM4, 1, 13000000);
94static APBC_CLK(gpio, PXA910_GPIO, 0, 13000000);
111 95
112static APMU_CLK(nand, NAND, 0x19b, 156000000); 96static APMU_CLK(nand, NAND, 0x19b, 156000000);
113static APMU_CLK(u2o, USB, 0x1b, 480000000); 97static APMU_CLK(u2o, USB, 0x1b, 480000000);
@@ -123,6 +107,7 @@ static struct clk_lookup pxa910_clkregs[] = {
123 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL), 107 INIT_CLKREG(&clk_pwm3, "pxa910-pwm.2", NULL),
124 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL), 108 INIT_CLKREG(&clk_pwm4, "pxa910-pwm.3", NULL),
125 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), 109 INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
110 INIT_CLKREG(&clk_gpio, "pxa-gpio", NULL),
126 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"), 111 INIT_CLKREG(&clk_u2o, "pxa-u2o", "U2OCLK"),
127}; 112};
128 113
@@ -179,3 +164,22 @@ PXA910_DEVICE(pwm2, "pxa910-pwm", 1, NONE, 0xd401a400, 0x10);
179PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10); 164PXA910_DEVICE(pwm3, "pxa910-pwm", 2, NONE, 0xd401a800, 0x10);
180PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10); 165PXA910_DEVICE(pwm4, "pxa910-pwm", 3, NONE, 0xd401ac00, 0x10);
181PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99); 166PXA910_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x80, 97, 99);
167
168struct resource pxa910_resource_gpio[] = {
169 {
170 .start = 0xd4019000,
171 .end = 0xd4019fff,
172 .flags = IORESOURCE_MEM,
173 }, {
174 .start = IRQ_PXA910_AP_GPIO,
175 .end = IRQ_PXA910_AP_GPIO,
176 .flags = IORESOURCE_IRQ,
177 },
178};
179
180struct platform_device pxa910_device_gpio = {
181 .name = "pxa-gpio",
182 .id = -1,
183 .num_resources = ARRAY_SIZE(pxa910_resource_gpio),
184 .resource = pxa910_resource_gpio,
185};
diff --git a/arch/arm/mach-mmp/tavorevb.c b/arch/arm/mach-mmp/tavorevb.c
index 257a21283ec1..8e3b5af04a57 100644
--- a/arch/arm/mach-mmp/tavorevb.c
+++ b/arch/arm/mach-mmp/tavorevb.c
@@ -19,6 +19,7 @@
19#include <mach/addr-map.h> 19#include <mach/addr-map.h>
20#include <mach/mfp-pxa910.h> 20#include <mach/mfp-pxa910.h>
21#include <mach/pxa910.h> 21#include <mach/pxa910.h>
22#include <mach/irqs.h>
22 23
23#include "common.h" 24#include "common.h"
24 25
@@ -71,8 +72,8 @@ static struct resource smc91x_resources[] = {
71 .flags = IORESOURCE_MEM, 72 .flags = IORESOURCE_MEM,
72 }, 73 },
73 [1] = { 74 [1] = {
74 .start = gpio_to_irq(80), 75 .start = MMP_GPIO_TO_IRQ(80),
75 .end = gpio_to_irq(80), 76 .end = MMP_GPIO_TO_IRQ(80),
76 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 77 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
77 } 78 }
78}; 79};
@@ -93,6 +94,7 @@ static void __init tavorevb_init(void)
93 94
94 /* on-chip devices */ 95 /* on-chip devices */
95 pxa910_add_uart(1); 96 pxa910_add_uart(1);
97 platform_device_register(&pxa910_device_gpio);
96 98
97 /* off-chip devices */ 99 /* off-chip devices */
98 platform_device_register(&smc91x_device); 100 platform_device_register(&smc91x_device);
diff --git a/arch/arm/mach-mmp/teton_bga.c b/arch/arm/mach-mmp/teton_bga.c
index 8ac22a62bf1a..0523e422990e 100644
--- a/arch/arm/mach-mmp/teton_bga.c
+++ b/arch/arm/mach-mmp/teton_bga.c
@@ -66,7 +66,7 @@ static struct pxa27x_keypad_platform_data teton_bga_keypad_info __initdata = {
66static struct i2c_board_info teton_bga_i2c_info[] __initdata = { 66static struct i2c_board_info teton_bga_i2c_info[] __initdata = {
67 { 67 {
68 I2C_BOARD_INFO("ds1337", 0x68), 68 I2C_BOARD_INFO("ds1337", 0x68),
69 .irq = gpio_to_irq(RTC_INT_GPIO) 69 .irq = MMP_GPIO_TO_IRQ(RTC_INT_GPIO)
70 }, 70 },
71}; 71};
72 72
@@ -78,6 +78,7 @@ static void __init teton_bga_init(void)
78 pxa168_add_uart(1); 78 pxa168_add_uart(1);
79 pxa168_add_keypad(&teton_bga_keypad_info); 79 pxa168_add_keypad(&teton_bga_keypad_info);
80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info)); 80 pxa168_add_twsi(0, NULL, ARRAY_AND_SIZE(teton_bga_i2c_info));
81 platform_device_register(&pxa168_device_gpio);
81} 82}
82 83
83MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform") 84MACHINE_START(TETON_BGA, "PXA168-based Teton BGA Development Platform")
diff --git a/arch/arm/mach-mmp/ttc_dkb.c b/arch/arm/mach-mmp/ttc_dkb.c
index f02658825576..5ac5d5832e45 100644
--- a/arch/arm/mach-mmp/ttc_dkb.c
+++ b/arch/arm/mach-mmp/ttc_dkb.c
@@ -24,12 +24,13 @@
24#include <mach/addr-map.h> 24#include <mach/addr-map.h>
25#include <mach/mfp-pxa910.h> 25#include <mach/mfp-pxa910.h>
26#include <mach/pxa910.h> 26#include <mach/pxa910.h>
27#include <mach/irqs.h>
27 28
28#include "common.h" 29#include "common.h"
29 30
30#define TTCDKB_GPIO_EXT0(x) (NR_BUILTIN_GPIO + ((x < 0) ? 0 : \ 31#define TTCDKB_GPIO_EXT0(x) (MMP_NR_BUILTIN_GPIO + ((x < 0) ? 0 : \
31 ((x < 16) ? x : 15))) 32 ((x < 16) ? x : 15)))
32#define TTCDKB_GPIO_EXT1(x) (NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \ 33#define TTCDKB_GPIO_EXT1(x) (MMP_NR_BUILTIN_GPIO + 16 + ((x < 0) ? 0 : \
33 ((x < 16) ? x : 15))) 34 ((x < 16) ? x : 15)))
34 35
35/* 36/*
@@ -122,6 +123,7 @@ static struct platform_device ttc_dkb_device_onenand = {
122}; 123};
123 124
124static struct platform_device *ttc_dkb_devices[] = { 125static struct platform_device *ttc_dkb_devices[] = {
126 &pxa910_device_gpio,
125 &ttc_dkb_device_onenand, 127 &ttc_dkb_device_onenand,
126}; 128};
127 129
@@ -136,7 +138,7 @@ static struct i2c_board_info ttc_dkb_i2c_info[] = {
136 { 138 {
137 .type = "max7312", 139 .type = "max7312",
138 .addr = 0x23, 140 .addr = 0x23,
139 .irq = IRQ_GPIO(80), 141 .irq = MMP_GPIO_TO_IRQ(80),
140 .platform_data = &max7312_data, 142 .platform_data = &max7312_data,
141 }, 143 },
142}; 144};
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index da6e4aad177c..df0ad3ce234b 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/jiffies.h> 23#include <linux/jiffies.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/spinlock.h>
25 26
26#include <asm/clkdev.h> 27#include <asm/clkdev.h>
27#include <asm/div64.h> 28#include <asm/div64.h>
@@ -29,6 +30,7 @@
29#include <mach/mx28.h> 30#include <mach/mx28.h>
30#include <mach/common.h> 31#include <mach/common.h>
31#include <mach/clock.h> 32#include <mach/clock.h>
33#include <mach/digctl.h>
32 34
33#include "regs-clkctrl-mx28.h" 35#include "regs-clkctrl-mx28.h"
34 36
@@ -43,6 +45,33 @@ static struct clk emi_clk;
43static struct clk saif0_clk; 45static struct clk saif0_clk;
44static struct clk saif1_clk; 46static struct clk saif1_clk;
45static struct clk clk32k_clk; 47static struct clk clk32k_clk;
48static DEFINE_SPINLOCK(clkmux_lock);
49
50/*
51 * HW_SAIF_CLKMUX_SEL:
52 * DIRECT(0x0): SAIF0 clock pins selected for SAIF0 input clocks, and SAIF1
53 * clock pins selected for SAIF1 input clocks.
54 * CROSSINPUT(0x1): SAIF1 clock inputs selected for SAIF0 input clocks, and
55 * SAIF0 clock inputs selected for SAIF1 input clocks.
56 * EXTMSTR0(0x2): SAIF0 clock pin selected for both SAIF0 and SAIF1 input
57 * clocks.
58 * EXTMSTR1(0x3): SAIF1 clock pin selected for both SAIF0 and SAIF1 input
59 * clocks.
60 */
61int mxs_saif_clkmux_select(unsigned int clkmux)
62{
63 if (clkmux > 0x3)
64 return -EINVAL;
65
66 spin_lock(&clkmux_lock);
67 __raw_writel(BM_DIGCTL_CTRL_SAIF_CLKMUX,
68 DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_CLR_ADDR);
69 __raw_writel(clkmux << BP_DIGCTL_CTRL_SAIF_CLKMUX,
70 DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL + MXS_SET_ADDR);
71 spin_unlock(&clkmux_lock);
72
73 return 0;
74}
46 75
47static int _raw_clk_enable(struct clk *clk) 76static int _raw_clk_enable(struct clk *clk)
48{ 77{
@@ -785,6 +814,15 @@ int __init mx28_clocks_init(void)
785 clk_set_parent(&saif0_clk, &pll0_clk); 814 clk_set_parent(&saif0_clk, &pll0_clk);
786 clk_set_parent(&saif1_clk, &pll0_clk); 815 clk_set_parent(&saif1_clk, &pll0_clk);
787 816
817 /*
818 * Set an initial clock rate for the saif internal logic to work
819 * properly. This is important when working in EXTMASTER mode that
820 * uses the other saif's BITCLK&LRCLK but it still needs a basic
821 * clock which should be fast enough for the internal logic.
822 */
823 clk_set_rate(&saif0_clk, 24000000);
824 clk_set_rate(&saif1_clk, 24000000);
825
788 clkdev_add_table(lookups, ARRAY_SIZE(lookups)); 826 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
789 827
790 mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0); 828 mxs_timer_init(&clk32k_clk, MX28_INT_TIMER0);
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h
index c8887103f0e3..4f50094e293d 100644
--- a/arch/arm/mach-mxs/devices-mx28.h
+++ b/arch/arm/mach-mxs/devices-mx28.h
@@ -47,6 +47,7 @@ struct platform_device *__init mx28_add_mxsfb(
47 const struct mxsfb_platform_data *pdata); 47 const struct mxsfb_platform_data *pdata);
48 48
49extern const struct mxs_saif_data mx28_saif_data[] __initconst; 49extern const struct mxs_saif_data mx28_saif_data[] __initconst;
50#define mx28_add_saif(id) mxs_add_saif(&mx28_saif_data[id]) 50#define mx28_add_saif(id, pdata) \
51 mxs_add_saif(&mx28_saif_data[id], pdata)
51 52
52struct platform_device *__init mx28_add_rtc_stmp3xxx(void); 53struct platform_device *__init mx28_add_rtc_stmp3xxx(void);
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
index 1ec965e9fe92..f6e3a60b4201 100644
--- a/arch/arm/mach-mxs/devices/platform-mxs-saif.c
+++ b/arch/arm/mach-mxs/devices/platform-mxs-saif.c
@@ -32,7 +32,8 @@ const struct mxs_saif_data mx28_saif_data[] __initconst = {
32}; 32};
33#endif 33#endif
34 34
35struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data) 35struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data,
36 const struct mxs_saif_platform_data *pdata)
36{ 37{
37 struct resource res[] = { 38 struct resource res[] = {
38 { 39 {
@@ -56,5 +57,5 @@ struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data)
56 }; 57 };
57 58
58 return mxs_add_platform_device("mxs-saif", data->id, res, 59 return mxs_add_platform_device("mxs-saif", data->id, res,
59 ARRAY_SIZE(res), NULL, 0); 60 ARRAY_SIZE(res), pdata, sizeof(*pdata));
60} 61}
diff --git a/arch/arm/mach-mxs/include/mach/common.h b/arch/arm/mach-mxs/include/mach/common.h
index 1388485414c9..e1237ab25862 100644
--- a/arch/arm/mach-mxs/include/mach/common.h
+++ b/arch/arm/mach-mxs/include/mach/common.h
@@ -17,6 +17,7 @@ extern const u32 *mxs_get_ocotp(void);
17extern int mxs_reset_block(void __iomem *); 17extern int mxs_reset_block(void __iomem *);
18extern void mxs_timer_init(struct clk *, int); 18extern void mxs_timer_init(struct clk *, int);
19extern void mxs_restart(char, const char *); 19extern void mxs_restart(char, const char *);
20extern int mxs_saif_clkmux_select(unsigned int clkmux);
20 21
21extern int mx23_register_gpios(void); 22extern int mx23_register_gpios(void);
22extern int mx23_clocks_init(void); 23extern int mx23_clocks_init(void);
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h
index a8080f44c03d..dc369c1239fc 100644
--- a/arch/arm/mach-mxs/include/mach/devices-common.h
+++ b/arch/arm/mach-mxs/include/mach/devices-common.h
@@ -94,6 +94,7 @@ struct platform_device *__init mxs_add_mxs_pwm(
94 resource_size_t iobase, int id); 94 resource_size_t iobase, int id);
95 95
96/* saif */ 96/* saif */
97#include <sound/saif.h>
97struct mxs_saif_data { 98struct mxs_saif_data {
98 int id; 99 int id;
99 resource_size_t iobase; 100 resource_size_t iobase;
@@ -103,4 +104,5 @@ struct mxs_saif_data {
103}; 104};
104 105
105struct platform_device *__init mxs_add_saif( 106struct platform_device *__init mxs_add_saif(
106 const struct mxs_saif_data *data); 107 const struct mxs_saif_data *data,
108 const struct mxs_saif_platform_data *pdata);
diff --git a/arch/arm/mach-mxs/include/mach/digctl.h b/arch/arm/mach-mxs/include/mach/digctl.h
new file mode 100644
index 000000000000..49a888c65d6d
--- /dev/null
+++ b/arch/arm/mach-mxs/include/mach/digctl.h
@@ -0,0 +1,21 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __MACH_DIGCTL_H__
10#define __MACH_DIGCTL_H__
11
12/* MXS DIGCTL SAIF CLKMUX */
13#define MXS_DIGCTL_SAIF_CLKMUX_DIRECT 0x0
14#define MXS_DIGCTL_SAIF_CLKMUX_CROSSINPUT 0x1
15#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0 0x2
16#define MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR1 0x3
17
18#define HW_DIGCTL_CTRL 0x0
19#define BP_DIGCTL_CTRL_SAIF_CLKMUX 10
20#define BM_DIGCTL_CTRL_SAIF_CLKMUX (0x3 << 10)
21#endif
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c
index d0cc37fd23a4..eb0597be4e23 100644
--- a/arch/arm/mach-mxs/mach-mx28evk.c
+++ b/arch/arm/mach-mxs/mach-mx28evk.c
@@ -27,6 +27,7 @@
27 27
28#include <mach/common.h> 28#include <mach/common.h>
29#include <mach/iomux-mx28.h> 29#include <mach/iomux-mx28.h>
30#include <mach/digctl.h>
30 31
31#include "devices-mx28.h" 32#include "devices-mx28.h"
32 33
@@ -421,6 +422,18 @@ static struct gpio mx28evk_lcd_gpios[] = {
421 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, 422 { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" },
422}; 423};
423 424
425static const struct mxs_saif_platform_data
426 mx28evk_mxs_saif_pdata[] __initconst = {
427 /* working on EXTMSTR0 mode (saif0 master, saif1 slave) */
428 {
429 .master_mode = 1,
430 .master_id = 0,
431 }, {
432 .master_mode = 0,
433 .master_id = 0,
434 },
435};
436
424static void __init mx28evk_init(void) 437static void __init mx28evk_init(void)
425{ 438{
426 int ret; 439 int ret;
@@ -454,8 +467,9 @@ static void __init mx28evk_init(void)
454 else 467 else
455 mx28_add_mxsfb(&mx28evk_mxsfb_pdata); 468 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
456 469
457 mx28_add_saif(0); 470 mxs_saif_clkmux_select(MXS_DIGCTL_SAIF_CLKMUX_EXTMSTR0);
458 mx28_add_saif(1); 471 mx28_add_saif(0, &mx28evk_mxs_saif_pdata[0]);
472 mx28_add_saif(1, &mx28evk_mxs_saif_pdata[1]);
459 473
460 mx28_add_mxs_i2c(0); 474 mx28_add_mxs_i2c(0);
461 i2c_register_board_info(0, mxs_i2c0_board_info, 475 i2c_register_board_info(0, mxs_i2c0_board_info,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 5598e00ccf52..4b4c9e25a83e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -410,6 +410,7 @@ static struct omap2_hsmmc_info mmc[] = {
410 { 410 {
411 .mmc = 5, 411 .mmc = 5,
412 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, 412 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD,
413 .pm_caps = MMC_PM_KEEP_POWER,
413 .gpio_cd = -EINVAL, 414 .gpio_cd = -EINVAL,
414 .gpio_wp = -EINVAL, 415 .gpio_wp = -EINVAL,
415 .ocr_mask = MMC_VDD_165_195, 416 .ocr_mask = MMC_VDD_165_195,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f5a3a3f11739..4b1cfe32e6ba 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -24,6 +24,7 @@
24#include <linux/i2c/pca953x.h> 24#include <linux/i2c/pca953x.h>
25#include <linux/can/platform/ti_hecc.h> 25#include <linux/can/platform/ti_hecc.h>
26#include <linux/davinci_emac.h> 26#include <linux/davinci_emac.h>
27#include <linux/mmc/host.h>
27 28
28#include <mach/hardware.h> 29#include <mach/hardware.h>
29#include <mach/am35xx.h> 30#include <mach/am35xx.h>
@@ -40,6 +41,7 @@
40 41
41#include "mux.h" 42#include "mux.h"
42#include "control.h" 43#include "control.h"
44#include "hsmmc.h"
43 45
44#define AM35XX_EVM_MDIO_FREQUENCY (1000000) 46#define AM35XX_EVM_MDIO_FREQUENCY (1000000)
45 47
@@ -455,6 +457,23 @@ static void am3517_evm_hecc_init(struct ti_hecc_platform_data *pdata)
455static struct omap_board_config_kernel am3517_evm_config[] __initdata = { 457static struct omap_board_config_kernel am3517_evm_config[] __initdata = {
456}; 458};
457 459
460static struct omap2_hsmmc_info mmc[] = {
461 {
462 .mmc = 1,
463 .caps = MMC_CAP_4_BIT_DATA,
464 .gpio_cd = 127,
465 .gpio_wp = 126,
466 },
467 {
468 .mmc = 2,
469 .caps = MMC_CAP_4_BIT_DATA,
470 .gpio_cd = 128,
471 .gpio_wp = 129,
472 },
473 {} /* Terminator */
474};
475
476
458static void __init am3517_evm_init(void) 477static void __init am3517_evm_init(void)
459{ 478{
460 omap_board_config = am3517_evm_config; 479 omap_board_config = am3517_evm_config;
@@ -483,6 +502,9 @@ static void __init am3517_evm_init(void)
483 502
484 /* MUSB */ 503 /* MUSB */
485 am3517_evm_musb_init(); 504 am3517_evm_musb_init();
505
506 /* MMC init function */
507 omap2_hsmmc_init(mmc);
486} 508}
487 509
488MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") 510MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index 039cadf84c11..d75e5f6b8a01 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3297,7 +3297,7 @@ static struct omap_clk omap3xxx_clks[] = {
3297 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3297 CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3298 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3298 CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3299 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3299 CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3300 CLK("usbhs-omap.0", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3300 CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3301 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), 3301 CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX),
3302 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), 3302 CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX),
3303 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), 3303 CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX),
@@ -3333,7 +3333,7 @@ static struct omap_clk omap3xxx_clks[] = {
3333 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX), 3333 CLK(NULL, "pka_ick", &pka_ick, CK_34XX | CK_36XX),
3334 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX), 3334 CLK(NULL, "core_l4_ick", &core_l4_ick, CK_3XXX),
3335 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3335 CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3336 CLK("usbhs-omap.0", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3336 CLK("usbhs_omap", "usbtll_ick", &usbtll_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3337 CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3337 CLK("omap_hsmmc.2", "ick", &mmchs3_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3338 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX), 3338 CLK(NULL, "icr_ick", &icr_ick, CK_34XX | CK_36XX),
3339 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX), 3339 CLK("omap-aes", "ick", &aes2_ick, CK_34XX | CK_36XX),
@@ -3379,20 +3379,18 @@ static struct omap_clk omap3xxx_clks[] = {
3379 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX), 3379 CLK(NULL, "cam_ick", &cam_ick, CK_34XX | CK_36XX),
3380 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX), 3380 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_34XX | CK_36XX),
3381 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3381 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3382 CLK("usbhs-omap.0", "hs_fck", &usbhost_120m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3383 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3382 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3384 CLK("usbhs-omap.0", "fs_fck", &usbhost_48m_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3385 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3383 CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3386 CLK("usbhs-omap.0", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), 3384 CLK("usbhs_omap", "usbhost_ick", &usbhost_ick, CK_3430ES2PLUS | CK_AM35XX | CK_36XX),
3387 CLK("usbhs-omap.0", "utmi_p1_gfclk", &dummy_ck, CK_3XXX), 3385 CLK("usbhs_omap", "utmi_p1_gfclk", &dummy_ck, CK_3XXX),
3388 CLK("usbhs-omap.0", "utmi_p2_gfclk", &dummy_ck, CK_3XXX), 3386 CLK("usbhs_omap", "utmi_p2_gfclk", &dummy_ck, CK_3XXX),
3389 CLK("usbhs-omap.0", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX), 3387 CLK("usbhs_omap", "xclk60mhsp1_ck", &dummy_ck, CK_3XXX),
3390 CLK("usbhs-omap.0", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX), 3388 CLK("usbhs_omap", "xclk60mhsp2_ck", &dummy_ck, CK_3XXX),
3391 CLK("usbhs-omap.0", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX), 3389 CLK("usbhs_omap", "usb_host_hs_utmi_p1_clk", &dummy_ck, CK_3XXX),
3392 CLK("usbhs-omap.0", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX), 3390 CLK("usbhs_omap", "usb_host_hs_utmi_p2_clk", &dummy_ck, CK_3XXX),
3393 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX), 3391 CLK("usbhs_omap", "usb_tll_hs_usb_ch0_clk", &dummy_ck, CK_3XXX),
3394 CLK("usbhs-omap.0", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX), 3392 CLK("usbhs_omap", "usb_tll_hs_usb_ch1_clk", &dummy_ck, CK_3XXX),
3395 CLK("usbhs-omap.0", "init_60m_fclk", &dummy_ck, CK_3XXX), 3393 CLK("usbhs_omap", "init_60m_fclk", &dummy_ck, CK_3XXX),
3396 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX), 3394 CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2PLUS | CK_36XX),
3397 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), 3395 CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX),
3398 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), 3396 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX),
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 730097ee0f23..08e86d793a1f 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3304,7 +3304,7 @@ static struct omap_clk omap44xx_clks[] = {
3304 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), 3304 CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
3305 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), 3305 CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
3306 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), 3306 CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
3307 CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), 3307 CLK("usbhs_omap", "fs_fck", &usb_host_fs_fck, CK_443X),
3308 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), 3308 CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
3309 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), 3309 CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
3310 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X), 3310 CLK(NULL, "utmi_p2_gfclk", &utmi_p2_gfclk, CK_443X),
@@ -3315,7 +3315,7 @@ static struct omap_clk omap44xx_clks[] = {
3315 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), 3315 CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
3316 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), 3316 CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
3317 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), 3317 CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
3318 CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), 3318 CLK("usbhs_omap", "hs_fck", &usb_host_hs_fck, CK_443X),
3319 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), 3319 CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
3320 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), 3320 CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
3321 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), 3321 CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
@@ -3323,7 +3323,7 @@ static struct omap_clk omap44xx_clks[] = {
3323 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), 3323 CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
3324 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), 3324 CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
3325 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), 3325 CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
3326 CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), 3326 CLK("usbhs_omap", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
3327 CLK(NULL, "usim_ck", &usim_ck, CK_443X), 3327 CLK(NULL, "usim_ck", &usim_ck, CK_443X),
3328 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), 3328 CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
3329 CLK(NULL, "usim_fck", &usim_fck, CK_443X), 3329 CLK(NULL, "usim_fck", &usim_fck, CK_443X),
@@ -3383,8 +3383,8 @@ static struct omap_clk omap44xx_clks[] = {
3383 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), 3383 CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
3384 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), 3384 CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
3385 CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), 3385 CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
3386 CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), 3386 CLK("usbhs_omap", "usbhost_ick", &dummy_ck, CK_443X),
3387 CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), 3387 CLK("usbhs_omap", "usbtll_fck", &dummy_ck, CK_443X),
3388 CLK("omap_wdt", "ick", &dummy_ck, CK_443X), 3388 CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
3389 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X), 3389 CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
3390 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X), 3390 CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c
index f4a1020559a7..bd844af13af5 100644
--- a/arch/arm/mach-omap2/hsmmc.c
+++ b/arch/arm/mach-omap2/hsmmc.c
@@ -171,6 +171,17 @@ static void omap4_hsmmc1_after_set_reg(struct device *dev, int slot,
171 } 171 }
172} 172}
173 173
174static void hsmmc2_select_input_clk_src(struct omap_mmc_platform_data *mmc)
175{
176 u32 reg;
177
178 if (mmc->slots[0].internal_clock) {
179 reg = omap_ctrl_readl(control_devconf1_offset);
180 reg |= OMAP2_MMCSDIO2ADPCLKISEL;
181 omap_ctrl_writel(reg, control_devconf1_offset);
182 }
183}
184
174static void hsmmc23_before_set_reg(struct device *dev, int slot, 185static void hsmmc23_before_set_reg(struct device *dev, int slot,
175 int power_on, int vdd) 186 int power_on, int vdd)
176{ 187{
@@ -179,16 +190,19 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot,
179 if (mmc->slots[0].remux) 190 if (mmc->slots[0].remux)
180 mmc->slots[0].remux(dev, slot, power_on); 191 mmc->slots[0].remux(dev, slot, power_on);
181 192
182 if (power_on) { 193 if (power_on)
183 /* Only MMC2 supports a CLKIN */ 194 hsmmc2_select_input_clk_src(mmc);
184 if (mmc->slots[0].internal_clock) { 195}
185 u32 reg;
186 196
187 reg = omap_ctrl_readl(control_devconf1_offset); 197static int am35x_hsmmc2_set_power(struct device *dev, int slot,
188 reg |= OMAP2_MMCSDIO2ADPCLKISEL; 198 int power_on, int vdd)
189 omap_ctrl_writel(reg, control_devconf1_offset); 199{
190 } 200 struct omap_mmc_platform_data *mmc = dev->platform_data;
191 } 201
202 if (power_on)
203 hsmmc2_select_input_clk_src(mmc);
204
205 return 0;
192} 206}
193 207
194static int nop_mmc_set_power(struct device *dev, int slot, int power_on, 208static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
@@ -200,10 +214,12 @@ static int nop_mmc_set_power(struct device *dev, int slot, int power_on,
200static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller, 214static inline void omap_hsmmc_mux(struct omap_mmc_platform_data *mmc_controller,
201 int controller_nr) 215 int controller_nr)
202{ 216{
203 if (gpio_is_valid(mmc_controller->slots[0].switch_pin)) 217 if (gpio_is_valid(mmc_controller->slots[0].switch_pin) &&
218 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
204 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin, 219 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
205 OMAP_PIN_INPUT_PULLUP); 220 OMAP_PIN_INPUT_PULLUP);
206 if (gpio_is_valid(mmc_controller->slots[0].gpio_wp)) 221 if (gpio_is_valid(mmc_controller->slots[0].gpio_wp) &&
222 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
207 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp, 223 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
208 OMAP_PIN_INPUT_PULLUP); 224 OMAP_PIN_INPUT_PULLUP);
209 if (cpu_is_omap34xx()) { 225 if (cpu_is_omap34xx()) {
@@ -296,6 +312,7 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
296 mmc->slots[0].name = hc_name; 312 mmc->slots[0].name = hc_name;
297 mmc->nr_slots = 1; 313 mmc->nr_slots = 1;
298 mmc->slots[0].caps = c->caps; 314 mmc->slots[0].caps = c->caps;
315 mmc->slots[0].pm_caps = c->pm_caps;
299 mmc->slots[0].internal_clock = !c->ext_clock; 316 mmc->slots[0].internal_clock = !c->ext_clock;
300 mmc->dma_mask = 0xffffffff; 317 mmc->dma_mask = 0xffffffff;
301 if (cpu_is_omap44xx()) 318 if (cpu_is_omap44xx())
@@ -336,11 +353,17 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
336 * 353 *
337 * temporary HACK: ocr_mask instead of fixed supply 354 * temporary HACK: ocr_mask instead of fixed supply
338 */ 355 */
339 mmc->slots[0].ocr_mask = c->ocr_mask; 356 if (cpu_is_omap3505() || cpu_is_omap3517())
340 357 mmc->slots[0].ocr_mask = MMC_VDD_165_195 |
341 if (cpu_is_omap3517() || cpu_is_omap3505()) 358 MMC_VDD_26_27 |
342 mmc->slots[0].set_power = nop_mmc_set_power; 359 MMC_VDD_27_28 |
360 MMC_VDD_29_30 |
361 MMC_VDD_30_31 |
362 MMC_VDD_31_32;
343 else 363 else
364 mmc->slots[0].ocr_mask = c->ocr_mask;
365
366 if (!cpu_is_omap3517() && !cpu_is_omap3505())
344 mmc->slots[0].features |= HSMMC_HAS_PBIAS; 367 mmc->slots[0].features |= HSMMC_HAS_PBIAS;
345 368
346 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0)) 369 if (cpu_is_omap44xx() && (omap_rev() > OMAP4430_REV_ES1_0))
@@ -363,6 +386,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
363 } 386 }
364 } 387 }
365 388
389 if (cpu_is_omap3517() || cpu_is_omap3505())
390 mmc->slots[0].set_power = nop_mmc_set_power;
391
366 /* OMAP3630 HSMMC1 supports only 4-bit */ 392 /* OMAP3630 HSMMC1 supports only 4-bit */
367 if (cpu_is_omap3630() && 393 if (cpu_is_omap3630() &&
368 (c->caps & MMC_CAP_8_BIT_DATA)) { 394 (c->caps & MMC_CAP_8_BIT_DATA)) {
@@ -372,6 +398,9 @@ static int __init omap_hsmmc_pdata_init(struct omap2_hsmmc_info *c,
372 } 398 }
373 break; 399 break;
374 case 2: 400 case 2:
401 if (cpu_is_omap3517() || cpu_is_omap3505())
402 mmc->slots[0].set_power = am35x_hsmmc2_set_power;
403
375 if (c->ext_clock) 404 if (c->ext_clock)
376 c->transceiver = 1; 405 c->transceiver = 1;
377 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) { 406 if (c->transceiver && (c->caps & MMC_CAP_8_BIT_DATA)) {
diff --git a/arch/arm/mach-omap2/hsmmc.h b/arch/arm/mach-omap2/hsmmc.h
index f757e78d4d4f..c4409730c4bb 100644
--- a/arch/arm/mach-omap2/hsmmc.h
+++ b/arch/arm/mach-omap2/hsmmc.h
@@ -12,6 +12,7 @@ struct omap2_hsmmc_info {
12 u8 mmc; /* controller 1/2/3 */ 12 u8 mmc; /* controller 1/2/3 */
13 u32 caps; /* 4/8 wires and any additional host 13 u32 caps; /* 4/8 wires and any additional host
14 * capabilities OR'd (ref. linux/mmc/host.h) */ 14 * capabilities OR'd (ref. linux/mmc/host.h) */
15 u32 pm_caps; /* PM capabilities */
15 bool transceiver; /* MMC-2 option */ 16 bool transceiver; /* MMC-2 option */
16 bool ext_clock; /* use external pin for input clock */ 17 bool ext_clock; /* use external pin for input clock */
17 bool cover_only; /* No card detect - just cover switch */ 18 bool cover_only; /* No card detect - just cover switch */
diff --git a/arch/arm/mach-omap2/usb-host.c b/arch/arm/mach-omap2/usb-host.c
index 89ae29847c59..771dc781b746 100644
--- a/arch/arm/mach-omap2/usb-host.c
+++ b/arch/arm/mach-omap2/usb-host.c
@@ -28,51 +28,28 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/irqs.h> 29#include <mach/irqs.h>
30#include <plat/usb.h> 30#include <plat/usb.h>
31#include <plat/omap_device.h>
31 32
32#include "mux.h" 33#include "mux.h"
33 34
34#ifdef CONFIG_MFD_OMAP_USB_HOST 35#ifdef CONFIG_MFD_OMAP_USB_HOST
35 36
36#define OMAP_USBHS_DEVICE "usbhs-omap" 37#define OMAP_USBHS_DEVICE "usbhs_omap"
37 38#define USBHS_UHH_HWMODNAME "usb_host_hs"
38static struct resource usbhs_resources[] = { 39#define USBHS_TLL_HWMODNAME "usb_tll_hs"
39 {
40 .name = "uhh",
41 .flags = IORESOURCE_MEM,
42 },
43 {
44 .name = "tll",
45 .flags = IORESOURCE_MEM,
46 },
47 {
48 .name = "ehci",
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .name = "ehci-irq",
53 .flags = IORESOURCE_IRQ,
54 },
55 {
56 .name = "ohci",
57 .flags = IORESOURCE_MEM,
58 },
59 {
60 .name = "ohci-irq",
61 .flags = IORESOURCE_IRQ,
62 }
63};
64
65static struct platform_device usbhs_device = {
66 .name = OMAP_USBHS_DEVICE,
67 .id = 0,
68 .num_resources = ARRAY_SIZE(usbhs_resources),
69 .resource = usbhs_resources,
70};
71 40
72static struct usbhs_omap_platform_data usbhs_data; 41static struct usbhs_omap_platform_data usbhs_data;
73static struct ehci_hcd_omap_platform_data ehci_data; 42static struct ehci_hcd_omap_platform_data ehci_data;
74static struct ohci_hcd_omap_platform_data ohci_data; 43static struct ohci_hcd_omap_platform_data ohci_data;
75 44
45static struct omap_device_pm_latency omap_uhhtll_latency[] = {
46 {
47 .deactivate_func = omap_device_idle_hwmods,
48 .activate_func = omap_device_enable_hwmods,
49 .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
50 },
51};
52
76/* MUX settings for EHCI pins */ 53/* MUX settings for EHCI pins */
77/* 54/*
78 * setup_ehci_io_mux - initialize IO pad mux for USBHOST 55 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
@@ -508,7 +485,10 @@ static void setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
508 485
509void __init usbhs_init(const struct usbhs_omap_board_data *pdata) 486void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
510{ 487{
511 int i; 488 struct omap_hwmod *oh[2];
489 struct omap_device *od;
490 int bus_id = -1;
491 int i;
512 492
513 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) { 493 for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
514 usbhs_data.port_mode[i] = pdata->port_mode[i]; 494 usbhs_data.port_mode[i] = pdata->port_mode[i];
@@ -523,44 +503,34 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
523 usbhs_data.ohci_data = &ohci_data; 503 usbhs_data.ohci_data = &ohci_data;
524 504
525 if (cpu_is_omap34xx()) { 505 if (cpu_is_omap34xx()) {
526 usbhs_resources[0].start = OMAP34XX_UHH_CONFIG_BASE;
527 usbhs_resources[0].end = OMAP34XX_UHH_CONFIG_BASE + SZ_1K - 1;
528 usbhs_resources[1].start = OMAP34XX_USBTLL_BASE;
529 usbhs_resources[1].end = OMAP34XX_USBTLL_BASE + SZ_4K - 1;
530 usbhs_resources[2].start = OMAP34XX_EHCI_BASE;
531 usbhs_resources[2].end = OMAP34XX_EHCI_BASE + SZ_1K - 1;
532 usbhs_resources[3].start = INT_34XX_EHCI_IRQ;
533 usbhs_resources[4].start = OMAP34XX_OHCI_BASE;
534 usbhs_resources[4].end = OMAP34XX_OHCI_BASE + SZ_1K - 1;
535 usbhs_resources[5].start = INT_34XX_OHCI_IRQ;
536 setup_ehci_io_mux(pdata->port_mode); 506 setup_ehci_io_mux(pdata->port_mode);
537 setup_ohci_io_mux(pdata->port_mode); 507 setup_ohci_io_mux(pdata->port_mode);
538 } else if (cpu_is_omap44xx()) { 508 } else if (cpu_is_omap44xx()) {
539 usbhs_resources[0].start = OMAP44XX_UHH_CONFIG_BASE;
540 usbhs_resources[0].end = OMAP44XX_UHH_CONFIG_BASE + SZ_1K - 1;
541 usbhs_resources[1].start = OMAP44XX_USBTLL_BASE;
542 usbhs_resources[1].end = OMAP44XX_USBTLL_BASE + SZ_4K - 1;
543 usbhs_resources[2].start = OMAP44XX_HSUSB_EHCI_BASE;
544 usbhs_resources[2].end = OMAP44XX_HSUSB_EHCI_BASE + SZ_1K - 1;
545 usbhs_resources[3].start = OMAP44XX_IRQ_EHCI;
546 usbhs_resources[4].start = OMAP44XX_HSUSB_OHCI_BASE;
547 usbhs_resources[4].end = OMAP44XX_HSUSB_OHCI_BASE + SZ_1K - 1;
548 usbhs_resources[5].start = OMAP44XX_IRQ_OHCI;
549 setup_4430ehci_io_mux(pdata->port_mode); 509 setup_4430ehci_io_mux(pdata->port_mode);
550 setup_4430ohci_io_mux(pdata->port_mode); 510 setup_4430ohci_io_mux(pdata->port_mode);
551 } 511 }
552 512
553 if (platform_device_add_data(&usbhs_device, 513 oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
554 &usbhs_data, sizeof(usbhs_data)) < 0) { 514 if (!oh[0]) {
555 printk(KERN_ERR "USBHS platform_device_add_data failed\n"); 515 pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
556 goto init_end; 516 return;
557 } 517 }
558 518
559 if (platform_device_register(&usbhs_device) < 0) 519 oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
560 printk(KERN_ERR "USBHS platform_device_register failed\n"); 520 if (!oh[1]) {
521 pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
522 return;
523 }
561 524
562init_end: 525 od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
563 return; 526 (void *)&usbhs_data, sizeof(usbhs_data),
527 omap_uhhtll_latency,
528 ARRAY_SIZE(omap_uhhtll_latency), false);
529 if (IS_ERR(od)) {
530 pr_err("Could not build hwmod devices %s,%s\n",
531 USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532 return;
533 }
564} 534}
565 535
566#else 536#else
@@ -570,5 +540,3 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
570} 540}
571 541
572#endif 542#endif
573
574
diff --git a/arch/arm/mach-pxa/am200epd.c b/arch/arm/mach-pxa/am200epd.c
index 4cb069fd9af2..ccdac4b6a469 100644
--- a/arch/arm/mach-pxa/am200epd.c
+++ b/arch/arm/mach-pxa/am200epd.c
@@ -138,7 +138,7 @@ static void am200_cleanup(struct metronomefb_par *par)
138{ 138{
139 int i; 139 int i;
140 140
141 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 141 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
142 142
143 for (i = 0; i < ARRAY_SIZE(gpios); i++) 143 for (i = 0; i < ARRAY_SIZE(gpios); i++)
144 gpio_free(gpios[i]); 144 gpio_free(gpios[i]);
@@ -292,7 +292,7 @@ static int am200_setup_irq(struct fb_info *info)
292{ 292{
293 int ret; 293 int ret;
294 294
295 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am200_handle_irq, 295 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am200_handle_irq,
296 IRQF_DISABLED|IRQF_TRIGGER_FALLING, 296 IRQF_DISABLED|IRQF_TRIGGER_FALLING,
297 "AM200", info->par); 297 "AM200", info->par);
298 if (ret) 298 if (ret)
diff --git a/arch/arm/mach-pxa/am300epd.c b/arch/arm/mach-pxa/am300epd.c
index fa8bad235d9f..76c4b9494031 100644
--- a/arch/arm/mach-pxa/am300epd.c
+++ b/arch/arm/mach-pxa/am300epd.c
@@ -176,7 +176,7 @@ static void am300_cleanup(struct broadsheetfb_par *par)
176{ 176{
177 int i; 177 int i;
178 178
179 free_irq(IRQ_GPIO(RDY_GPIO_PIN), par); 179 free_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), par);
180 180
181 for (i = 0; i < ARRAY_SIZE(gpios); i++) 181 for (i = 0; i < ARRAY_SIZE(gpios); i++)
182 gpio_free(gpios[i]); 182 gpio_free(gpios[i]);
@@ -240,7 +240,7 @@ static int am300_setup_irq(struct fb_info *info)
240 int ret; 240 int ret;
241 struct broadsheetfb_par *par = info->par; 241 struct broadsheetfb_par *par = info->par;
242 242
243 ret = request_irq(IRQ_GPIO(RDY_GPIO_PIN), am300_handle_irq, 243 ret = request_irq(PXA_GPIO_TO_IRQ(RDY_GPIO_PIN), am300_handle_irq,
244 IRQF_DISABLED|IRQF_TRIGGER_RISING, 244 IRQF_DISABLED|IRQF_TRIGGER_RISING,
245 "AM300", par); 245 "AM300", par);
246 if (ret) 246 if (ret)
diff --git a/arch/arm/mach-pxa/balloon3.c b/arch/arm/mach-pxa/balloon3.c
index a34de9a0d5e5..c35456f02acb 100644
--- a/arch/arm/mach-pxa/balloon3.c
+++ b/arch/arm/mach-pxa/balloon3.c
@@ -180,7 +180,7 @@ static unsigned long balloon3_ac97_pin_config[] __initdata = {
180}; 180};
181 181
182static struct ucb1400_pdata vpac270_ucb1400_pdata = { 182static struct ucb1400_pdata vpac270_ucb1400_pdata = {
183 .irq = IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ), 183 .irq = PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ),
184}; 184};
185 185
186 186
diff --git a/arch/arm/mach-pxa/capc7117.c b/arch/arm/mach-pxa/capc7117.c
index c2f0be040d27..c91727d1fe09 100644
--- a/arch/arm/mach-pxa/capc7117.c
+++ b/arch/arm/mach-pxa/capc7117.c
@@ -50,8 +50,8 @@ static struct resource capc7117_ide_resources[] = {
50 .flags = IORESOURCE_MEM 50 .flags = IORESOURCE_MEM
51 }, 51 },
52 [2] = { 52 [2] = {
53 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 53 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
54 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO76)), 54 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO76)),
55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING 55 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING
56 } 56 }
57}; 57};
@@ -80,7 +80,7 @@ static void __init capc7117_ide_init(void)
80static struct plat_serial8250_port ti16c752_platform_data[] = { 80static struct plat_serial8250_port ti16c752_platform_data[] = {
81 [0] = { 81 [0] = {
82 .mapbase = 0x14000000, 82 .mapbase = 0x14000000,
83 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO78)), 83 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO78)),
84 .irqflags = IRQF_TRIGGER_RISING, 84 .irqflags = IRQF_TRIGGER_RISING,
85 .flags = TI16C752_FLAGS, 85 .flags = TI16C752_FLAGS,
86 .iotype = UPIO_MEM, 86 .iotype = UPIO_MEM,
@@ -89,7 +89,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
89 }, 89 },
90 [1] = { 90 [1] = {
91 .mapbase = 0x14000040, 91 .mapbase = 0x14000040,
92 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO79)), 92 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO79)),
93 .irqflags = IRQF_TRIGGER_RISING, 93 .irqflags = IRQF_TRIGGER_RISING,
94 .flags = TI16C752_FLAGS, 94 .flags = TI16C752_FLAGS,
95 .iotype = UPIO_MEM, 95 .iotype = UPIO_MEM,
@@ -98,7 +98,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
98 }, 98 },
99 [2] = { 99 [2] = {
100 .mapbase = 0x14000080, 100 .mapbase = 0x14000080,
101 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO80)), 101 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO80)),
102 .irqflags = IRQF_TRIGGER_RISING, 102 .irqflags = IRQF_TRIGGER_RISING,
103 .flags = TI16C752_FLAGS, 103 .flags = TI16C752_FLAGS,
104 .iotype = UPIO_MEM, 104 .iotype = UPIO_MEM,
@@ -107,7 +107,7 @@ static struct plat_serial8250_port ti16c752_platform_data[] = {
107 }, 107 },
108 [3] = { 108 [3] = {
109 .mapbase = 0x140000c0, 109 .mapbase = 0x140000c0,
110 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO81)), 110 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO81)),
111 .irqflags = IRQF_TRIGGER_RISING, 111 .irqflags = IRQF_TRIGGER_RISING,
112 .flags = TI16C752_FLAGS, 112 .flags = TI16C752_FLAGS,
113 .iotype = UPIO_MEM, 113 .iotype = UPIO_MEM,
diff --git a/arch/arm/mach-pxa/cm-x270.c b/arch/arm/mach-pxa/cm-x270.c
index 13518a705399..431ef56700c4 100644
--- a/arch/arm/mach-pxa/cm-x270.c
+++ b/arch/arm/mach-pxa/cm-x270.c
@@ -33,7 +33,7 @@
33/* GPIO IRQ usage */ 33/* GPIO IRQ usage */
34#define GPIO83_MMC_IRQ (83) 34#define GPIO83_MMC_IRQ (83)
35 35
36#define CMX270_MMC_IRQ IRQ_GPIO(GPIO83_MMC_IRQ) 36#define CMX270_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO83_MMC_IRQ)
37 37
38/* MMC power enable */ 38/* MMC power enable */
39#define GPIO105_MMC_POWER (105) 39#define GPIO105_MMC_POWER (105)
@@ -380,7 +380,7 @@ static struct spi_board_info cm_x270_spi_devices[] __initdata = {
380 .modalias = "libertas_spi", 380 .modalias = "libertas_spi",
381 .max_speed_hz = 13000000, 381 .max_speed_hz = 13000000,
382 .bus_num = 2, 382 .bus_num = 2,
383 .irq = gpio_to_irq(95), 383 .irq = PXA_GPIO_TO_IRQ(95),
384 .chip_select = 0, 384 .chip_select = 0,
385 .controller_data = &cm_x270_libertas_chip, 385 .controller_data = &cm_x270_libertas_chip,
386 .platform_data = &cm_x270_libertas_pdata, 386 .platform_data = &cm_x270_libertas_pdata,
diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c
index ec170a552c23..8fa4ad27edf3 100644
--- a/arch/arm/mach-pxa/cm-x2xx.c
+++ b/arch/arm/mach-pxa/cm-x2xx.c
@@ -58,8 +58,8 @@ extern void cmx270_init(void);
58#define CMX255_GPIO_IT8152_IRQ (0) 58#define CMX255_GPIO_IT8152_IRQ (0)
59#define CMX270_GPIO_IT8152_IRQ (22) 59#define CMX270_GPIO_IT8152_IRQ (22)
60 60
61#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ) 61#define CMX255_ETHIRQ PXA_GPIO_TO_IRQ(GPIO22_ETHIRQ)
62#define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ) 62#define CMX270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO10_ETHIRQ)
63 63
64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE) 64#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
65static struct resource cmx255_dm9000_resource[] = { 65static struct resource cmx255_dm9000_resource[] = {
diff --git a/arch/arm/mach-pxa/cm-x300.c b/arch/arm/mach-pxa/cm-x300.c
index 7236974da0b7..4b981b82d2a5 100644
--- a/arch/arm/mach-pxa/cm-x300.c
+++ b/arch/arm/mach-pxa/cm-x300.c
@@ -64,7 +64,7 @@
64#define GPIO82_MMC_IRQ (82) 64#define GPIO82_MMC_IRQ (82)
65#define GPIO85_MMC_WP (85) 65#define GPIO85_MMC_WP (85)
66 66
67#define CM_X300_MMC_IRQ IRQ_GPIO(GPIO82_MMC_IRQ) 67#define CM_X300_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO82_MMC_IRQ)
68 68
69#define GPIO95_RTC_CS (95) 69#define GPIO95_RTC_CS (95)
70#define GPIO96_RTC_WR (96) 70#define GPIO96_RTC_WR (96)
@@ -229,8 +229,8 @@ static struct resource dm9000_resources[] = {
229 .flags = IORESOURCE_MEM, 229 .flags = IORESOURCE_MEM,
230 }, 230 },
231 [2] = { 231 [2] = {
232 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 232 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
233 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO99)), 233 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO99)),
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
235 } 235 }
236}; 236};
diff --git a/arch/arm/mach-pxa/colibri-pxa270.c b/arch/arm/mach-pxa/colibri-pxa270.c
index 6a685165c9f2..29d5d541f602 100644
--- a/arch/arm/mach-pxa/colibri-pxa270.c
+++ b/arch/arm/mach-pxa/colibri-pxa270.c
@@ -218,8 +218,8 @@ static struct resource colibri_pxa270_dm9000_resources[] = {
218 .flags = IORESOURCE_MEM, 218 .flags = IORESOURCE_MEM,
219 }, 219 },
220 { 220 {
221 .start = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 221 .start = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
222 .end = gpio_to_irq(GPIO114_COLIBRI_PXA270_ETH_IRQ), 222 .end = PXA_GPIO_TO_IRQ(GPIO114_COLIBRI_PXA270_ETH_IRQ),
223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING, 223 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
224 }, 224 },
225}; 225};
@@ -249,7 +249,7 @@ static pxa2xx_audio_ops_t colibri_pxa270_ac97_pdata = {
249}; 249};
250 250
251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = { 251static struct ucb1400_pdata colibri_pxa270_ucb1400_pdata = {
252 .irq = gpio_to_irq(GPIO113_COLIBRI_PXA270_TS_IRQ), 252 .irq = PXA_GPIO_TO_IRQ(GPIO113_COLIBRI_PXA270_TS_IRQ),
253}; 253};
254 254
255static struct platform_device colibri_pxa270_ucb1400_device = { 255static struct platform_device colibri_pxa270_ucb1400_device = {
diff --git a/arch/arm/mach-pxa/colibri-pxa300.c b/arch/arm/mach-pxa/colibri-pxa300.c
index c01059a61f33..0846d210cb05 100644
--- a/arch/arm/mach-pxa/colibri-pxa300.c
+++ b/arch/arm/mach-pxa/colibri-pxa300.c
@@ -78,8 +78,8 @@ static struct resource colibri_asix_resource[] = {
78 .flags = IORESOURCE_MEM, 78 .flags = IORESOURCE_MEM,
79 }, 79 },
80 [1] = { 80 [1] = {
81 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 81 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
82 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 82 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 83 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
84 } 84 }
85}; 85};
diff --git a/arch/arm/mach-pxa/colibri-pxa320.c b/arch/arm/mach-pxa/colibri-pxa320.c
index 5028f2300d50..6ad3359063af 100644
--- a/arch/arm/mach-pxa/colibri-pxa320.c
+++ b/arch/arm/mach-pxa/colibri-pxa320.c
@@ -115,8 +115,8 @@ static struct resource colibri_asix_resource[] = {
115 .flags = IORESOURCE_MEM, 115 .flags = IORESOURCE_MEM,
116 }, 116 },
117 [1] = { 117 [1] = {
118 .start = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 118 .start = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
119 .end = gpio_to_irq(COLIBRI_ETH_IRQ_GPIO), 119 .end = PXA_GPIO_TO_IRQ(COLIBRI_ETH_IRQ_GPIO),
120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 120 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
121 } 121 }
122}; 122};
diff --git a/arch/arm/mach-pxa/corgi.c b/arch/arm/mach-pxa/corgi.c
index 9d4dc5970b9c..66600f05e436 100644
--- a/arch/arm/mach-pxa/corgi.c
+++ b/arch/arm/mach-pxa/corgi.c
@@ -531,7 +531,7 @@ static struct spi_board_info corgi_spi_devices[] = {
531 .chip_select = 0, 531 .chip_select = 0,
532 .platform_data = &corgi_ads7846_info, 532 .platform_data = &corgi_ads7846_info,
533 .controller_data= &corgi_ads7846_chip, 533 .controller_data= &corgi_ads7846_chip,
534 .irq = gpio_to_irq(CORGI_GPIO_TP_INT), 534 .irq = PXA_GPIO_TO_IRQ(CORGI_GPIO_TP_INT),
535 }, { 535 }, {
536 .modalias = "corgi-lcd", 536 .modalias = "corgi-lcd",
537 .max_speed_hz = 50000, 537 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/corgi_pm.c b/arch/arm/mach-pxa/corgi_pm.c
index 29034778bfda..39e265cfc86d 100644
--- a/arch/arm/mach-pxa/corgi_pm.c
+++ b/arch/arm/mach-pxa/corgi_pm.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/gpio-pxa.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
@@ -40,7 +41,9 @@ static struct gpio charger_gpios[] = {
40 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 41 { CORGI_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
41 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 42 { CORGI_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
42 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" }, 43 { CORGI_GPIO_CHRG_UKN, GPIOF_OUT_INIT_LOW, "Charger Unknown" },
44 { CORGI_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
43 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" }, 45 { CORGI_GPIO_KEY_INT, GPIOF_IN, "Key Interrupt" },
46 { CORGI_GPIO_WAKEUP, GPIOF_IN, "System wakeup notification" },
44}; 47};
45 48
46static void corgi_charger_init(void) 49static void corgi_charger_init(void)
@@ -90,7 +93,12 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
90{ 93{
91 int is_resume = 0; 94 int is_resume = 0;
92 95
93 dev_dbg(sharpsl_pm.dev, "GPLR0 = %x,%x\n", GPLR0, PEDR); 96 dev_dbg(sharpsl_pm.dev, "PEDR = %x, GPIO_AC_IN = %d, "
97 "GPIO_CHRG_FULL = %d, GPIO_KEY_INT = %d, GPIO_WAKEUP = %d\n",
98 PEDR, gpio_get_value(CORGI_GPIO_AC_IN),
99 gpio_get_value(CORGI_GPIO_CHRG_FULL),
100 gpio_get_value(CORGI_GPIO_KEY_INT),
101 gpio_get_value(CORGI_GPIO_WAKEUP));
94 102
95 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) { 103 if ((PEDR & GPIO_bit(CORGI_GPIO_AC_IN))) {
96 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) { 104 if (sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN)) {
@@ -124,14 +132,21 @@ static int corgi_should_wakeup(unsigned int resume_on_alarm)
124 132
125static unsigned long corgi_charger_wakeup(void) 133static unsigned long corgi_charger_wakeup(void)
126{ 134{
127 return ~GPLR0 & ( GPIO_bit(CORGI_GPIO_AC_IN) | GPIO_bit(CORGI_GPIO_KEY_INT) | GPIO_bit(CORGI_GPIO_WAKEUP) ); 135 unsigned long ret;
136
137 ret = (!gpio_get_value(CORGI_GPIO_AC_IN) << GPIO_bit(CORGI_GPIO_AC_IN))
138 | (!gpio_get_value(CORGI_GPIO_KEY_INT)
139 << GPIO_bit(CORGI_GPIO_KEY_INT))
140 | (!gpio_get_value(CORGI_GPIO_WAKEUP)
141 << GPIO_bit(CORGI_GPIO_WAKEUP));
142 return ret;
128} 143}
129 144
130unsigned long corgipm_read_devdata(int type) 145unsigned long corgipm_read_devdata(int type)
131{ 146{
132 switch(type) { 147 switch(type) {
133 case SHARPSL_STATUS_ACIN: 148 case SHARPSL_STATUS_ACIN:
134 return ((GPLR(CORGI_GPIO_AC_IN) & GPIO_bit(CORGI_GPIO_AC_IN)) != 0); 149 return !gpio_get_value(CORGI_GPIO_AC_IN);
135 case SHARPSL_STATUS_LOCK: 150 case SHARPSL_STATUS_LOCK:
136 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 151 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
137 case SHARPSL_STATUS_CHRGFULL: 152 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c
index 2e0425404de5..18fd177073f4 100644
--- a/arch/arm/mach-pxa/devices.c
+++ b/arch/arm/mach-pxa/devices.c
@@ -415,9 +415,29 @@ static struct resource pxa_rtc_resources[] = {
415 }, 415 },
416}; 416};
417 417
418static struct resource sa1100_rtc_resources[] = {
419 [0] = {
420 .start = 0x40900000,
421 .end = 0x409000ff,
422 .flags = IORESOURCE_MEM,
423 },
424 [1] = {
425 .start = IRQ_RTC1Hz,
426 .end = IRQ_RTC1Hz,
427 .flags = IORESOURCE_IRQ,
428 },
429 [2] = {
430 .start = IRQ_RTCAlrm,
431 .end = IRQ_RTCAlrm,
432 .flags = IORESOURCE_IRQ,
433 },
434};
435
418struct platform_device sa1100_device_rtc = { 436struct platform_device sa1100_device_rtc = {
419 .name = "sa1100-rtc", 437 .name = "sa1100-rtc",
420 .id = -1, 438 .id = -1,
439 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
440 .resource = sa1100_rtc_resources,
421}; 441};
422 442
423struct platform_device pxa_device_rtc = { 443struct platform_device pxa_device_rtc = {
@@ -1051,6 +1071,36 @@ struct platform_device pxa3xx_device_ssp4 = {
1051}; 1071};
1052#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */ 1072#endif /* CONFIG_PXA3xx || CONFIG_PXA95x */
1053 1073
1074struct resource pxa_resource_gpio[] = {
1075 {
1076 .start = 0x40e00000,
1077 .end = 0x40e0ffff,
1078 .flags = IORESOURCE_MEM,
1079 }, {
1080 .start = IRQ_GPIO0,
1081 .end = IRQ_GPIO0,
1082 .name = "gpio0",
1083 .flags = IORESOURCE_IRQ,
1084 }, {
1085 .start = IRQ_GPIO1,
1086 .end = IRQ_GPIO1,
1087 .name = "gpio1",
1088 .flags = IORESOURCE_IRQ,
1089 }, {
1090 .start = IRQ_GPIO_2_x,
1091 .end = IRQ_GPIO_2_x,
1092 .name = "gpio_mux",
1093 .flags = IORESOURCE_IRQ,
1094 },
1095};
1096
1097struct platform_device pxa_device_gpio = {
1098 .name = "pxa-gpio",
1099 .id = -1,
1100 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1101 .resource = pxa_resource_gpio,
1102};
1103
1054/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1. 1104/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1055 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */ 1105 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1056void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info) 1106void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
diff --git a/arch/arm/mach-pxa/devices.h b/arch/arm/mach-pxa/devices.h
index 2fd5a8b35757..1475db107254 100644
--- a/arch/arm/mach-pxa/devices.h
+++ b/arch/arm/mach-pxa/devices.h
@@ -16,6 +16,7 @@ extern struct platform_device pxa_device_ficp;
16extern struct platform_device sa1100_device_rtc; 16extern struct platform_device sa1100_device_rtc;
17extern struct platform_device pxa_device_rtc; 17extern struct platform_device pxa_device_rtc;
18extern struct platform_device pxa_device_ac97; 18extern struct platform_device pxa_device_ac97;
19extern struct platform_device pxa_device_gpio;
19 20
20extern struct platform_device pxa27x_device_i2c_power; 21extern struct platform_device pxa27x_device_i2c_power;
21extern struct platform_device pxa27x_device_ohci; 22extern struct platform_device pxa27x_device_ohci;
diff --git a/arch/arm/mach-pxa/em-x270.c b/arch/arm/mach-pxa/em-x270.c
index bd396ba67af7..d80c0ba9a095 100644
--- a/arch/arm/mach-pxa/em-x270.c
+++ b/arch/arm/mach-pxa/em-x270.c
@@ -70,7 +70,7 @@
70/* common GPIOs */ 70/* common GPIOs */
71#define GPIO11_NAND_CS (11) 71#define GPIO11_NAND_CS (11)
72#define GPIO41_ETHIRQ (41) 72#define GPIO41_ETHIRQ (41)
73#define EM_X270_ETHIRQ IRQ_GPIO(GPIO41_ETHIRQ) 73#define EM_X270_ETHIRQ PXA_GPIO_TO_IRQ(GPIO41_ETHIRQ)
74#define GPIO115_WLAN_PWEN (115) 74#define GPIO115_WLAN_PWEN (115)
75#define GPIO19_WLAN_STRAP (19) 75#define GPIO19_WLAN_STRAP (19)
76#define GPIO9_USB_VBUS_EN (9) 76#define GPIO9_USB_VBUS_EN (9)
@@ -805,7 +805,7 @@ static struct spi_board_info em_x270_spi_devices[] __initdata = {
805 .modalias = "libertas_spi", 805 .modalias = "libertas_spi",
806 .max_speed_hz = 13000000, 806 .max_speed_hz = 13000000,
807 .bus_num = 2, 807 .bus_num = 2,
808 .irq = IRQ_GPIO(116), 808 .irq = PXA_GPIO_TO_IRQ(116),
809 .chip_select = 0, 809 .chip_select = 0,
810 .controller_data = &em_x270_libertas_chip, 810 .controller_data = &em_x270_libertas_chip,
811 .platform_data = &em_x270_libertas_pdata, 811 .platform_data = &em_x270_libertas_pdata,
@@ -1203,7 +1203,7 @@ static struct da903x_platform_data em_x270_da9030_info = {
1203 1203
1204static struct i2c_board_info em_x270_i2c_pmic_info = { 1204static struct i2c_board_info em_x270_i2c_pmic_info = {
1205 I2C_BOARD_INFO("da9030", 0x49), 1205 I2C_BOARD_INFO("da9030", 0x49),
1206 .irq = IRQ_GPIO(0), 1206 .irq = PXA_GPIO_TO_IRQ(0),
1207 .platform_data = &em_x270_da9030_info, 1207 .platform_data = &em_x270_da9030_info,
1208}; 1208};
1209 1209
diff --git a/arch/arm/mach-pxa/eseries.c b/arch/arm/mach-pxa/eseries.c
index 69473db97758..f79a610c62fc 100644
--- a/arch/arm/mach-pxa/eseries.c
+++ b/arch/arm/mach-pxa/eseries.c
@@ -119,8 +119,8 @@ struct resource eseries_tmio_resources[] = {
119 .flags = IORESOURCE_MEM, 119 .flags = IORESOURCE_MEM,
120 }, 120 },
121 [1] = { 121 [1] = {
122 .start = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 122 .start = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
123 .end = IRQ_GPIO(GPIO_ESERIES_TMIO_IRQ), 123 .end = PXA_GPIO_TO_IRQ(GPIO_ESERIES_TMIO_IRQ),
124 .flags = IORESOURCE_IRQ, 124 .flags = IORESOURCE_IRQ,
125 }, 125 },
126}; 126};
diff --git a/arch/arm/mach-pxa/hx4700.c b/arch/arm/mach-pxa/hx4700.c
index ce16bdae96de..fb9b62dcf4ca 100644
--- a/arch/arm/mach-pxa/hx4700.c
+++ b/arch/arm/mach-pxa/hx4700.c
@@ -252,8 +252,8 @@ static struct resource asic3_resources[] = {
252 .flags = IORESOURCE_MEM, 252 .flags = IORESOURCE_MEM,
253 }, 253 },
254 [1] = { 254 [1] = {
255 .start = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 255 .start = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
256 .end = gpio_to_irq(GPIO12_HX4700_ASIC3_IRQ), 256 .end = PXA_GPIO_TO_IRQ(GPIO12_HX4700_ASIC3_IRQ),
257 .flags = IORESOURCE_IRQ, 257 .flags = IORESOURCE_IRQ,
258 }, 258 },
259 /* SD part */ 259 /* SD part */
@@ -263,8 +263,8 @@ static struct resource asic3_resources[] = {
263 .flags = IORESOURCE_MEM, 263 .flags = IORESOURCE_MEM,
264 }, 264 },
265 [3] = { 265 [3] = {
266 .start = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 266 .start = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
267 .end = gpio_to_irq(GPIO66_HX4700_ASIC3_nSDIO_IRQ), 267 .end = PXA_GPIO_TO_IRQ(GPIO66_HX4700_ASIC3_nSDIO_IRQ),
268 .flags = IORESOURCE_IRQ, 268 .flags = IORESOURCE_IRQ,
269 }, 269 },
270}; 270};
@@ -587,7 +587,7 @@ static struct spi_board_info tsc2046_board_info[] __initdata = {
587 .modalias = "ads7846", 587 .modalias = "ads7846",
588 .bus_num = 2, 588 .bus_num = 2,
589 .max_speed_hz = 2600000, /* 100 kHz sample rate */ 589 .max_speed_hz = 2600000, /* 100 kHz sample rate */
590 .irq = gpio_to_irq(GPIO58_HX4700_TSC2046_nPENIRQ), 590 .irq = PXA_GPIO_TO_IRQ(GPIO58_HX4700_TSC2046_nPENIRQ),
591 .platform_data = &tsc2046_info, 591 .platform_data = &tsc2046_info,
592 .controller_data = &tsc2046_chip, 592 .controller_data = &tsc2046_chip,
593 }, 593 },
@@ -635,15 +635,15 @@ static struct resource power_supply_resources[] = {
635 .name = "ac", 635 .name = "ac",
636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 636 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
637 IORESOURCE_IRQ_LOWEDGE, 637 IORESOURCE_IRQ_LOWEDGE,
638 .start = gpio_to_irq(GPIOD9_nAC_IN), 638 .start = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
639 .end = gpio_to_irq(GPIOD9_nAC_IN), 639 .end = PXA_GPIO_TO_IRQ(GPIOD9_nAC_IN),
640 }, 640 },
641 [1] = { 641 [1] = {
642 .name = "usb", 642 .name = "usb",
643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 643 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
644 IORESOURCE_IRQ_LOWEDGE, 644 IORESOURCE_IRQ_LOWEDGE,
645 .start = gpio_to_irq(GPIOD14_nUSBC_DETECT), 645 .start = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
646 .end = gpio_to_irq(GPIOD14_nUSBC_DETECT), 646 .end = PXA_GPIO_TO_IRQ(GPIOD14_nUSBC_DETECT),
647 }, 647 },
648}; 648};
649 649
diff --git a/arch/arm/mach-pxa/icontrol.c b/arch/arm/mach-pxa/icontrol.c
index e239b82c99d7..67400192ed3b 100644
--- a/arch/arm/mach-pxa/icontrol.c
+++ b/arch/arm/mach-pxa/icontrol.c
@@ -86,7 +86,7 @@ static struct spi_board_info mcp251x_board_info[] = {
86 .chip_select = 0, 86 .chip_select = 0,
87 .platform_data = &mcp251x_info, 87 .platform_data = &mcp251x_info,
88 .controller_data = &mcp251x_chip_info1, 88 .controller_data = &mcp251x_chip_info1,
89 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ1) 89 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ1)
90 }, 90 },
91 { 91 {
92 .modalias = "mcp2515", 92 .modalias = "mcp2515",
@@ -95,7 +95,7 @@ static struct spi_board_info mcp251x_board_info[] = {
95 .chip_select = 1, 95 .chip_select = 1,
96 .platform_data = &mcp251x_info, 96 .platform_data = &mcp251x_info,
97 .controller_data = &mcp251x_chip_info2, 97 .controller_data = &mcp251x_chip_info2,
98 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ2) 98 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ2)
99 }, 99 },
100 { 100 {
101 .modalias = "mcp2515", 101 .modalias = "mcp2515",
@@ -104,7 +104,7 @@ static struct spi_board_info mcp251x_board_info[] = {
104 .chip_select = 0, 104 .chip_select = 0,
105 .platform_data = &mcp251x_info, 105 .platform_data = &mcp251x_info,
106 .controller_data = &mcp251x_chip_info3, 106 .controller_data = &mcp251x_chip_info3,
107 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ3) 107 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ3)
108 }, 108 },
109 { 109 {
110 .modalias = "mcp2515", 110 .modalias = "mcp2515",
@@ -113,7 +113,7 @@ static struct spi_board_info mcp251x_board_info[] = {
113 .chip_select = 1, 113 .chip_select = 1,
114 .platform_data = &mcp251x_info, 114 .platform_data = &mcp251x_info,
115 .controller_data = &mcp251x_chip_info4, 115 .controller_data = &mcp251x_chip_info4,
116 .irq = gpio_to_irq(ICONTROL_MCP251x_nIRQ4) 116 .irq = PXA_GPIO_TO_IRQ(ICONTROL_MCP251x_nIRQ4)
117 } 117 }
118}; 118};
119 119
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index fbabd84e110c..8af1840e12cc 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -75,8 +75,8 @@ static struct resource smc91x_resources[] = {
75 .flags = IORESOURCE_MEM, 75 .flags = IORESOURCE_MEM,
76 }, 76 },
77 [1] = { 77 [1] = {
78 .start = IRQ_GPIO(4), 78 .start = PXA_GPIO_TO_IRQ(4),
79 .end = IRQ_GPIO(4), 79 .end = PXA_GPIO_TO_IRQ(4),
80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 80 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
81 } 81 }
82}; 82};
diff --git a/arch/arm/mach-pxa/include/mach/balloon3.h b/arch/arm/mach-pxa/include/mach/balloon3.h
index 6d7eab3d0867..f02fa1e6ba86 100644
--- a/arch/arm/mach-pxa/include/mach/balloon3.h
+++ b/arch/arm/mach-pxa/include/mach/balloon3.h
@@ -172,9 +172,9 @@ enum balloon3_features {
172/* Balloon3 Interrupts */ 172/* Balloon3 Interrupts */
173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x)) 173#define BALLOON3_IRQ(x) (IRQ_BOARD_START + (x))
174 174
175#define BALLOON3_AUX_NIRQ IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ) 175#define BALLOON3_AUX_NIRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_AUX_NIRQ)
176#define BALLOON3_CODEC_IRQ IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ) 176#define BALLOON3_CODEC_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_CODEC_IRQ)
177#define BALLOON3_S0_CD_IRQ IRQ_GPIO(BALLOON3_GPIO_S0_CD) 177#define BALLOON3_S0_CD_IRQ PXA_GPIO_TO_IRQ(BALLOON3_GPIO_S0_CD)
178 178
179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16) 179#define BALLOON3_NR_IRQS (IRQ_BOARD_START + 16)
180 180
diff --git a/arch/arm/mach-pxa/include/mach/corgi.h b/arch/arm/mach-pxa/include/mach/corgi.h
index 5dfd1195a5a7..f3c3493b468d 100644
--- a/arch/arm/mach-pxa/include/mach/corgi.h
+++ b/arch/arm/mach-pxa/include/mach/corgi.h
@@ -66,18 +66,18 @@
66/* 66/*
67 * Corgi Interrupts 67 * Corgi Interrupts
68 */ 68 */
69#define CORGI_IRQ_GPIO_KEY_INT IRQ_GPIO(0) 69#define CORGI_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(0)
70#define CORGI_IRQ_GPIO_AC_IN IRQ_GPIO(1) 70#define CORGI_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
71#define CORGI_IRQ_GPIO_WAKEUP IRQ_GPIO(3) 71#define CORGI_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(3)
72#define CORGI_IRQ_GPIO_AK_INT IRQ_GPIO(4) 72#define CORGI_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(4)
73#define CORGI_IRQ_GPIO_TP_INT IRQ_GPIO(5) 73#define CORGI_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
74#define CORGI_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 74#define CORGI_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
75#define CORGI_IRQ_GPIO_nSD_INT IRQ_GPIO(10) 75#define CORGI_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(10)
76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(11) 76#define CORGI_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(11)
77#define CORGI_IRQ_GPIO_CF_CD IRQ_GPIO(14) 77#define CORGI_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
78#define CORGI_IRQ_GPIO_CHRG_FULL IRQ_GPIO(16) /* Battery fully charged */ 78#define CORGI_IRQ_GPIO_CHRG_FULL PXA_GPIO_TO_IRQ(16) /* Battery fully charged */
79#define CORGI_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 79#define CORGI_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
80#define CORGI_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(58+(a)) /* Keyboard Sense lines */ 80#define CORGI_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(58+(a)) /* Keyboard Sense lines */
81 81
82 82
83/* 83/*
@@ -98,7 +98,7 @@
98 CORGI_SCP_MIC_BIAS ) 98 CORGI_SCP_MIC_BIAS )
99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R ) 99#define CORGI_SCOOP_IO_OUT ( CORGI_SCP_MUTE_L | CORGI_SCP_MUTE_R )
100 100
101#define CORGI_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 101#define CORGI_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0) 102#define CORGI_GPIO_LED_GREEN (CORGI_SCOOP_GPIO_BASE + 0)
103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */ 103#define CORGI_GPIO_SWA (CORGI_SCOOP_GPIO_BASE + 1) /* Hinge Switch A */
104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */ 104#define CORGI_GPIO_SWB (CORGI_SCOOP_GPIO_BASE + 2) /* Hinge Switch B */
diff --git a/arch/arm/mach-pxa/include/mach/csb726.h b/arch/arm/mach-pxa/include/mach/csb726.h
index 747ab1a71f2f..2628e7b72116 100644
--- a/arch/arm/mach-pxa/include/mach/csb726.h
+++ b/arch/arm/mach-pxa/include/mach/csb726.h
@@ -19,8 +19,8 @@
19#define CSB726_FLASH_SIZE (64 * 1024 * 1024) 19#define CSB726_FLASH_SIZE (64 * 1024 * 1024)
20#define CSB726_FLASH_uMON (8 * 1024 * 1024) 20#define CSB726_FLASH_uMON (8 * 1024 * 1024)
21 21
22#define CSB726_IRQ_LAN gpio_to_irq(CSB726_GPIO_IRQ_LAN) 22#define CSB726_IRQ_LAN PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_LAN)
23#define CSB726_IRQ_SM501 gpio_to_irq(CSB726_GPIO_IRQ_SM501) 23#define CSB726_IRQ_SM501 PXA_GPIO_TO_IRQ(CSB726_GPIO_IRQ_SM501)
24 24
25#endif 25#endif
26 26
diff --git a/arch/arm/mach-pxa/include/mach/gpio-pxa.h b/arch/arm/mach-pxa/include/mach/gpio-pxa.h
deleted file mode 100644
index 41b4c93a96c2..000000000000
--- a/arch/arm/mach-pxa/include/mach/gpio-pxa.h
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Written by Philipp Zabel <philipp.zabel@gmail.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 *
18 */
19#ifndef __MACH_PXA_GPIO_PXA_H
20#define __MACH_PXA_GPIO_PXA_H
21
22#include <mach/irqs.h>
23#include <mach/hardware.h>
24
25#define GPIO_REGS_VIRT io_p2v(0x40E00000)
26
27#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
28#define GPIO_REG(x) (*(volatile u32 *)(GPIO_REGS_VIRT + (x)))
29
30/* GPIO Pin Level Registers */
31#define GPLR0 GPIO_REG(BANK_OFF(0) + 0x00)
32#define GPLR1 GPIO_REG(BANK_OFF(1) + 0x00)
33#define GPLR2 GPIO_REG(BANK_OFF(2) + 0x00)
34#define GPLR3 GPIO_REG(BANK_OFF(3) + 0x00)
35
36/* GPIO Pin Direction Registers */
37#define GPDR0 GPIO_REG(BANK_OFF(0) + 0x0c)
38#define GPDR1 GPIO_REG(BANK_OFF(1) + 0x0c)
39#define GPDR2 GPIO_REG(BANK_OFF(2) + 0x0c)
40#define GPDR3 GPIO_REG(BANK_OFF(3) + 0x0c)
41
42/* GPIO Pin Output Set Registers */
43#define GPSR0 GPIO_REG(BANK_OFF(0) + 0x18)
44#define GPSR1 GPIO_REG(BANK_OFF(1) + 0x18)
45#define GPSR2 GPIO_REG(BANK_OFF(2) + 0x18)
46#define GPSR3 GPIO_REG(BANK_OFF(3) + 0x18)
47
48/* GPIO Pin Output Clear Registers */
49#define GPCR0 GPIO_REG(BANK_OFF(0) + 0x24)
50#define GPCR1 GPIO_REG(BANK_OFF(1) + 0x24)
51#define GPCR2 GPIO_REG(BANK_OFF(2) + 0x24)
52#define GPCR3 GPIO_REG(BANK_OFF(3) + 0x24)
53
54/* GPIO Rising Edge Detect Registers */
55#define GRER0 GPIO_REG(BANK_OFF(0) + 0x30)
56#define GRER1 GPIO_REG(BANK_OFF(1) + 0x30)
57#define GRER2 GPIO_REG(BANK_OFF(2) + 0x30)
58#define GRER3 GPIO_REG(BANK_OFF(3) + 0x30)
59
60/* GPIO Falling Edge Detect Registers */
61#define GFER0 GPIO_REG(BANK_OFF(0) + 0x3c)
62#define GFER1 GPIO_REG(BANK_OFF(1) + 0x3c)
63#define GFER2 GPIO_REG(BANK_OFF(2) + 0x3c)
64#define GFER3 GPIO_REG(BANK_OFF(3) + 0x3c)
65
66/* GPIO Edge Detect Status Registers */
67#define GEDR0 GPIO_REG(BANK_OFF(0) + 0x48)
68#define GEDR1 GPIO_REG(BANK_OFF(1) + 0x48)
69#define GEDR2 GPIO_REG(BANK_OFF(2) + 0x48)
70#define GEDR3 GPIO_REG(BANK_OFF(3) + 0x48)
71
72/* GPIO Alternate Function Select Registers */
73#define GAFR0_L GPIO_REG(0x0054)
74#define GAFR0_U GPIO_REG(0x0058)
75#define GAFR1_L GPIO_REG(0x005C)
76#define GAFR1_U GPIO_REG(0x0060)
77#define GAFR2_L GPIO_REG(0x0064)
78#define GAFR2_U GPIO_REG(0x0068)
79#define GAFR3_L GPIO_REG(0x006C)
80#define GAFR3_U GPIO_REG(0x0070)
81
82/* More handy macros. The argument is a literal GPIO number. */
83
84#define GPIO_bit(x) (1 << ((x) & 0x1f))
85
86#define GPLR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x00)
87#define GPDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x0c)
88#define GPSR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x18)
89#define GPCR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x24)
90#define GRER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x30)
91#define GFER(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x3c)
92#define GEDR(x) GPIO_REG(BANK_OFF((x) >> 5) + 0x48)
93#define GAFR(x) GPIO_REG(0x54 + (((x) & 0x70) >> 2))
94
95
96#define NR_BUILTIN_GPIO PXA_GPIO_IRQ_NUM
97
98#define gpio_to_bank(gpio) ((gpio) >> 5)
99
100#ifdef CONFIG_CPU_PXA26x
101/* GPIO86/87/88/89 on PXA26x have their direction bits in GPDR2 inverted,
102 * as well as their Alternate Function value being '1' for GPIO in GAFRx.
103 */
104static inline int __gpio_is_inverted(unsigned gpio)
105{
106 return cpu_is_pxa25x() && gpio > 85;
107}
108#else
109static inline int __gpio_is_inverted(unsigned gpio) { return 0; }
110#endif
111
112/*
113 * On PXA25x and PXA27x, GAFRx and GPDRx together decide the alternate
114 * function of a GPIO, and GPDRx cannot be altered once configured. It
115 * is attributed as "occupied" here (I know this terminology isn't
116 * accurate, you are welcome to propose a better one :-)
117 */
118static inline int __gpio_is_occupied(unsigned gpio)
119{
120 if (cpu_is_pxa27x() || cpu_is_pxa25x()) {
121 int af = (GAFR(gpio) >> ((gpio & 0xf) * 2)) & 0x3;
122 int dir = GPDR(gpio) & GPIO_bit(gpio);
123
124 if (__gpio_is_inverted(gpio))
125 return af != 1 || dir == 0;
126 else
127 return af != 0 || dir != 0;
128 } else
129 return GPDR(gpio) & GPIO_bit(gpio);
130}
131
132#include <plat/gpio-pxa.h>
133#endif /* __MACH_PXA_GPIO_PXA_H */
diff --git a/arch/arm/mach-pxa/include/mach/gpio.h b/arch/arm/mach-pxa/include/mach/gpio.h
index 004cade7bb13..0248e433bc98 100644
--- a/arch/arm/mach-pxa/include/mach/gpio.h
+++ b/arch/arm/mach-pxa/include/mach/gpio.h
@@ -25,24 +25,8 @@
25#define __ASM_ARCH_PXA_GPIO_H 25#define __ASM_ARCH_PXA_GPIO_H
26 26
27#include <asm-generic/gpio.h> 27#include <asm-generic/gpio.h>
28/* The defines for the driver are needed for the accelerated accessors */
29#include "gpio-pxa.h"
30 28
31#define gpio_to_irq(gpio) IRQ_GPIO(gpio) 29#include <mach/irqs.h>
30#include <mach/hardware.h>
32 31
33static inline int irq_to_gpio(unsigned int irq)
34{
35 int gpio;
36
37 if (irq == IRQ_GPIO0 || irq == IRQ_GPIO1)
38 return irq - IRQ_GPIO0;
39
40 gpio = irq - PXA_GPIO_IRQ_BASE;
41 if (gpio >= 2 && gpio < NR_BUILTIN_GPIO)
42 return gpio;
43
44 return -1;
45}
46
47#include <plat/gpio.h>
48#endif 32#endif
diff --git a/arch/arm/mach-pxa/include/mach/gumstix.h b/arch/arm/mach-pxa/include/mach/gumstix.h
index 9b898680b206..dba14b6503ad 100644
--- a/arch/arm/mach-pxa/include/mach/gumstix.h
+++ b/arch/arm/mach-pxa/include/mach/gumstix.h
@@ -24,7 +24,7 @@ has detected a cable insertion; driven low otherwise. */
24#define GPIO_GUMSTIX_USB_GPIOx 41 24#define GPIO_GUMSTIX_USB_GPIOx 41
25 25
26/* usb state change */ 26/* usb state change */
27#define GUMSTIX_USB_INTR_IRQ IRQ_GPIO(GPIO_GUMSTIX_USB_GPIOn) 27#define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn)
28 28
29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) 29#define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN)
30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) 30#define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT)
@@ -35,7 +35,7 @@ has detected a cable insertion; driven low otherwise. */
35 */ 35 */
36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ 36#define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */
37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ 37#define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */
38#define GUMSTIX_IRQ_GPIO_nSD_DETECT IRQ_GPIO(GUMSTIX_GPIO_nSD_DETECT) 38#define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT)
39 39
40/* 40/*
41 * SMC Ethernet definitions 41 * SMC Ethernet definitions
@@ -49,10 +49,10 @@ has detected a cable insertion; driven low otherwise. */
49 49
50#define GPIO_GUMSTIX_ETH0 36 50#define GPIO_GUMSTIX_ETH0 36
51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) 51#define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN)
52#define GUMSTIX_ETH0_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH0) 52#define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0)
53#define GPIO_GUMSTIX_ETH1 27 53#define GPIO_GUMSTIX_ETH1 27
54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) 54#define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN)
55#define GUMSTIX_ETH1_IRQ IRQ_GPIO(GPIO_GUMSTIX_ETH1) 55#define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1)
56 56
57 57
58/* CF reset line */ 58/* CF reset line */
@@ -63,18 +63,18 @@ has detected a cable insertion; driven low otherwise. */
63#define GPIO4_nSTSCHG GPIO4_nBVD1 63#define GPIO4_nSTSCHG GPIO4_nBVD1
64#define GPIO11_nCD 11 64#define GPIO11_nCD 11
65#define GPIO26_PRDY_nBSY 26 65#define GPIO26_PRDY_nBSY 26
66#define GUMSTIX_S0_nSTSCHG_IRQ IRQ_GPIO(GPIO4_nSTSCHG) 66#define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG)
67#define GUMSTIX_S0_nCD_IRQ IRQ_GPIO(GPIO11_nCD) 67#define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD)
68#define GUMSTIX_S0_PRDY_nBSY_IRQ IRQ_GPIO(GPIO26_PRDY_nBSY) 68#define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY)
69 69
70/* CF slot 1 */ 70/* CF slot 1 */
71#define GPIO18_nBVD1 18 71#define GPIO18_nBVD1 18
72#define GPIO18_nSTSCHG GPIO18_nBVD1 72#define GPIO18_nSTSCHG GPIO18_nBVD1
73#define GPIO36_nCD 36 73#define GPIO36_nCD 36
74#define GPIO27_PRDY_nBSY 27 74#define GPIO27_PRDY_nBSY 27
75#define GUMSTIX_S1_nSTSCHG_IRQ IRQ_GPIO(GPIO18_nSTSCHG) 75#define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG)
76#define GUMSTIX_S1_nCD_IRQ IRQ_GPIO(GPIO36_nCD) 76#define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD)
77#define GUMSTIX_S1_PRDY_nBSY_IRQ IRQ_GPIO(GPIO27_PRDY_nBSY) 77#define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY)
78 78
79/* CF GPIO line modes */ 79/* CF GPIO line modes */
80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) 80#define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN)
diff --git a/arch/arm/mach-pxa/include/mach/hx4700.h b/arch/arm/mach-pxa/include/mach/hx4700.h
index 37408449ec25..8bc02913517c 100644
--- a/arch/arm/mach-pxa/include/mach/hx4700.h
+++ b/arch/arm/mach-pxa/include/mach/hx4700.h
@@ -15,7 +15,7 @@
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/mfd/asic3.h> 16#include <linux/mfd/asic3.h>
17 17
18#define HX4700_ASIC3_GPIO_BASE NR_BUILTIN_GPIO 18#define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO
19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS) 19#define HX4700_EGPIO_BASE (HX4700_ASIC3_GPIO_BASE + ASIC3_NUM_GPIOS)
20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70) 20#define HX4700_NR_IRQS (IRQ_BOARD_START + 70)
21 21
diff --git a/arch/arm/mach-pxa/include/mach/idp.h b/arch/arm/mach-pxa/include/mach/idp.h
index 5eff96fcc944..22a96f87232b 100644
--- a/arch/arm/mach-pxa/include/mach/idp.h
+++ b/arch/arm/mach-pxa/include/mach/idp.h
@@ -131,28 +131,26 @@
131#define PCC_VS2 (1 << 1) 131#define PCC_VS2 (1 << 1)
132#define PCC_VS1 (1 << 0) 132#define PCC_VS1 (1 << 0)
133 133
134#define PCC_DETECT(x) (GPLR(7 + (x)) & GPIO_bit(7 + (x)))
135
136/* A listing of interrupts used by external hardware devices */ 134/* A listing of interrupts used by external hardware devices */
137 135
138#define TOUCH_PANEL_IRQ IRQ_GPIO(5) 136#define TOUCH_PANEL_IRQ PXA_GPIO_TO_IRQ(5)
139#define IDE_IRQ IRQ_GPIO(21) 137#define IDE_IRQ PXA_GPIO_TO_IRQ(21)
140 138
141#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 139#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
142 140
143#define ETHERNET_IRQ IRQ_GPIO(4) 141#define ETHERNET_IRQ PXA_GPIO_TO_IRQ(4)
144#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING 142#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
145 143
146#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 144#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
147 145
148#define PCMCIA_S0_CD_VALID IRQ_GPIO(7) 146#define PCMCIA_S0_CD_VALID PXA_GPIO_TO_IRQ(7)
149#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 147#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
150 148
151#define PCMCIA_S1_CD_VALID IRQ_GPIO(8) 149#define PCMCIA_S1_CD_VALID PXA_GPIO_TO_IRQ(8)
152#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH 150#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
153 151
154#define PCMCIA_S0_RDYINT IRQ_GPIO(19) 152#define PCMCIA_S0_RDYINT PXA_GPIO_TO_IRQ(19)
155#define PCMCIA_S1_RDYINT IRQ_GPIO(22) 153#define PCMCIA_S1_RDYINT PXA_GPIO_TO_IRQ(22)
156 154
157 155
158/* 156/*
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 7cc5a781e99e..32975adf3ca4 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -88,10 +88,8 @@
88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */ 88#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
89 89
90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96) 90#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
91#define PXA_GPIO_IRQ_NUM (192) 91#define PXA_NR_BUILTIN_GPIO (192)
92 92#define PXA_GPIO_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
93#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
94#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
95 93
96/* 94/*
97 * The following interrupts are for board specific purposes. Since 95 * The following interrupts are for board specific purposes. Since
@@ -100,7 +98,7 @@
100 * By default, no board IRQ is reserved. It should be finished in 98 * By default, no board IRQ is reserved. It should be finished in
101 * custom board since sparse IRQ is already enabled. 99 * custom board since sparse IRQ is already enabled.
102 */ 100 */
103#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) 101#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_NR_BUILTIN_GPIO)
104 102
105#define NR_IRQS (IRQ_BOARD_START) 103#define NR_IRQS (IRQ_BOARD_START)
106 104
diff --git a/arch/arm/mach-pxa/include/mach/littleton.h b/arch/arm/mach-pxa/include/mach/littleton.h
index b6238cbd8aea..8066be54e9f5 100644
--- a/arch/arm/mach-pxa/include/mach/littleton.h
+++ b/arch/arm/mach-pxa/include/mach/littleton.h
@@ -1,13 +1,11 @@
1#ifndef __ASM_ARCH_LITTLETON_H 1#ifndef __ASM_ARCH_LITTLETON_H
2#define __ASM_ARCH_LITTLETON_H 2#define __ASM_ARCH_LITTLETON_H
3 3
4#include <mach/gpio-pxa.h>
5
6#define LITTLETON_ETH_PHYS 0x30000000 4#define LITTLETON_ETH_PHYS 0x30000000
7 5
8#define LITTLETON_GPIO_LCD_CS (17) 6#define LITTLETON_GPIO_LCD_CS (17)
9 7
10#define EXT0_GPIO_BASE (NR_BUILTIN_GPIO) 8#define EXT0_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
11#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x)) 9#define EXT0_GPIO(x) (EXT0_GPIO_BASE + (x))
12 10
13#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8) 11#define LITTLETON_NR_IRQS (IRQ_BOARD_START + 8)
diff --git a/arch/arm/mach-pxa/include/mach/magician.h b/arch/arm/mach-pxa/include/mach/magician.h
index 7cbfc5d3f9df..ba6a6e1d29e9 100644
--- a/arch/arm/mach-pxa/include/mach/magician.h
+++ b/arch/arm/mach-pxa/include/mach/magician.h
@@ -78,7 +78,7 @@
78 * CPLD EGPIOs 78 * CPLD EGPIOs
79 */ 79 */
80 80
81#define MAGICIAN_EGPIO_BASE NR_BUILTIN_GPIO 81#define MAGICIAN_EGPIO_BASE PXA_NR_BUILTIN_GPIO
82#define MAGICIAN_EGPIO(reg,bit) \ 82#define MAGICIAN_EGPIO(reg,bit) \
83 (MAGICIAN_EGPIO_BASE + 8*reg + bit) 83 (MAGICIAN_EGPIO_BASE + 8*reg + bit)
84 84
diff --git a/arch/arm/mach-pxa/include/mach/palmld.h b/arch/arm/mach-pxa/include/mach/palmld.h
index ae536e86d8e8..2c4471336570 100644
--- a/arch/arm/mach-pxa/include/mach/palmld.h
+++ b/arch/arm/mach-pxa/include/mach/palmld.h
@@ -68,10 +68,10 @@
68/* 20, 53 and 86 are usb related too */ 68/* 20, 53 and 86 are usb related too */
69 69
70/* INTERRUPTS */ 70/* INTERRUPTS */
71#define IRQ_GPIO_PALMLD_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMLD_GPIO_RESET) 71#define IRQ_GPIO_PALMLD_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_GPIO_RESET)
72#define IRQ_GPIO_PALMLD_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMLD_SD_DETECT_N) 72#define IRQ_GPIO_PALMLD_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_SD_DETECT_N)
73#define IRQ_GPIO_PALMLD_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMLD_WM9712_IRQ) 73#define IRQ_GPIO_PALMLD_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_WM9712_IRQ)
74#define IRQ_GPIO_PALMLD_IDE_IRQ IRQ_GPIO(GPIO_NR_PALMLD_IDE_IRQ) 74#define IRQ_GPIO_PALMLD_IDE_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMLD_IDE_IRQ)
75 75
76 76
77/** HERE ARE INIT VALUES **/ 77/** HERE ARE INIT VALUES **/
diff --git a/arch/arm/mach-pxa/include/mach/palmt5.h b/arch/arm/mach-pxa/include/mach/palmt5.h
index 6baf7469d4ec..0bd4f036c72f 100644
--- a/arch/arm/mach-pxa/include/mach/palmt5.h
+++ b/arch/arm/mach-pxa/include/mach/palmt5.h
@@ -48,10 +48,10 @@
48#define GPIO_NR_PALMT5_BT_RESET 83 48#define GPIO_NR_PALMT5_BT_RESET 83
49 49
50/* INTERRUPTS */ 50/* INTERRUPTS */
51#define IRQ_GPIO_PALMT5_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMT5_SD_DETECT_N) 51#define IRQ_GPIO_PALMT5_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_SD_DETECT_N)
52#define IRQ_GPIO_PALMT5_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMT5_WM9712_IRQ) 52#define IRQ_GPIO_PALMT5_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_WM9712_IRQ)
53#define IRQ_GPIO_PALMT5_USB_DETECT IRQ_GPIO(GPIO_NR_PALMT5_USB_DETECT) 53#define IRQ_GPIO_PALMT5_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_USB_DETECT)
54#define IRQ_GPIO_PALMT5_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMT5_GPIO_RESET) 54#define IRQ_GPIO_PALMT5_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMT5_GPIO_RESET)
55 55
56/** HERE ARE INIT VALUES **/ 56/** HERE ARE INIT VALUES **/
57 57
diff --git a/arch/arm/mach-pxa/include/mach/palmtc.h b/arch/arm/mach-pxa/include/mach/palmtc.h
index 3f9dd3fd4638..c383a21680b6 100644
--- a/arch/arm/mach-pxa/include/mach/palmtc.h
+++ b/arch/arm/mach-pxa/include/mach/palmtc.h
@@ -52,8 +52,8 @@
52#define GPIO_NR_PALMTC_IR_DISABLE 45 52#define GPIO_NR_PALMTC_IR_DISABLE 45
53 53
54/* IRQs */ 54/* IRQs */
55#define IRQ_GPIO_PALMTC_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTC_SD_DETECT_N) 55#define IRQ_GPIO_PALMTC_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_SD_DETECT_N)
56#define IRQ_GPIO_PALMTC_WLAN_READY IRQ_GPIO(GPIO_NR_PALMTC_WLAN_READY) 56#define IRQ_GPIO_PALMTC_WLAN_READY PXA_GPIO_TO_IRQ(GPIO_NR_PALMTC_WLAN_READY)
57 57
58/* UCB1400 GPIOs */ 58/* UCB1400 GPIOs */
59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00) 59#define GPIO_NR_PALMTC_POWER_DETECT (0x80 | 0x00)
diff --git a/arch/arm/mach-pxa/include/mach/palmtx.h b/arch/arm/mach-pxa/include/mach/palmtx.h
index 7074a6ed46c6..f2e530380253 100644
--- a/arch/arm/mach-pxa/include/mach/palmtx.h
+++ b/arch/arm/mach-pxa/include/mach/palmtx.h
@@ -62,10 +62,10 @@
62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 62#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79
63 63
64/* INTERRUPTS */ 64/* INTERRUPTS */
65#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) 65#define IRQ_GPIO_PALMTX_SD_DETECT_N PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_SD_DETECT_N)
66#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) 66#define IRQ_GPIO_PALMTX_WM9712_IRQ PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_WM9712_IRQ)
67#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) 67#define IRQ_GPIO_PALMTX_USB_DETECT PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_USB_DETECT)
68#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) 68#define IRQ_GPIO_PALMTX_GPIO_RESET PXA_GPIO_TO_IRQ(GPIO_NR_PALMTX_GPIO_RESET)
69 69
70/** HERE ARE INIT VALUES **/ 70/** HERE ARE INIT VALUES **/
71 71
diff --git a/arch/arm/mach-pxa/include/mach/pcm027.h b/arch/arm/mach-pxa/include/mach/pcm027.h
index 4bac588478a8..6bf28de228bd 100644
--- a/arch/arm/mach-pxa/include/mach/pcm027.h
+++ b/arch/arm/mach-pxa/include/mach/pcm027.h
@@ -34,7 +34,7 @@
34 34
35/* I2C RTC */ 35/* I2C RTC */
36#define PCM027_RTC_IRQ_GPIO 0 36#define PCM027_RTC_IRQ_GPIO 0
37#define PCM027_RTC_IRQ IRQ_GPIO(PCM027_RTC_IRQ_GPIO) 37#define PCM027_RTC_IRQ PXA_GPIO_TO_IRQ(PCM027_RTC_IRQ_GPIO)
38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 38#define PCM027_RTC_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
39#define ADR_PCM027_RTC 0x51 /* I2C address */ 39#define ADR_PCM027_RTC 0x51 /* I2C address */
40 40
@@ -43,21 +43,21 @@
43 43
44/* Ethernet chip (SMSC91C111) */ 44/* Ethernet chip (SMSC91C111) */
45#define PCM027_ETH_IRQ_GPIO 52 45#define PCM027_ETH_IRQ_GPIO 52
46#define PCM027_ETH_IRQ IRQ_GPIO(PCM027_ETH_IRQ_GPIO) 46#define PCM027_ETH_IRQ PXA_GPIO_TO_IRQ(PCM027_ETH_IRQ_GPIO)
47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING 47#define PCM027_ETH_IRQ_EDGE IRQ_TYPE_EDGE_RISING
48#define PCM027_ETH_PHYS PXA_CS5_PHYS 48#define PCM027_ETH_PHYS PXA_CS5_PHYS
49#define PCM027_ETH_SIZE (1*1024*1024) 49#define PCM027_ETH_SIZE (1*1024*1024)
50 50
51/* CAN controller SJA1000 (unsupported yet) */ 51/* CAN controller SJA1000 (unsupported yet) */
52#define PCM027_CAN_IRQ_GPIO 114 52#define PCM027_CAN_IRQ_GPIO 114
53#define PCM027_CAN_IRQ IRQ_GPIO(PCM027_CAN_IRQ_GPIO) 53#define PCM027_CAN_IRQ PXA_GPIO_TO_IRQ(PCM027_CAN_IRQ_GPIO)
54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 54#define PCM027_CAN_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
55#define PCM027_CAN_PHYS 0x22000000 55#define PCM027_CAN_PHYS 0x22000000
56#define PCM027_CAN_SIZE 0x100 56#define PCM027_CAN_SIZE 0x100
57 57
58/* SPI GPIO expander (unsupported yet) */ 58/* SPI GPIO expander (unsupported yet) */
59#define PCM027_EGPIO_IRQ_GPIO 27 59#define PCM027_EGPIO_IRQ_GPIO 27
60#define PCM027_EGPIO_IRQ IRQ_GPIO(PCM027_EGPIO_IRQ_GPIO) 60#define PCM027_EGPIO_IRQ PXA_GPIO_TO_IRQ(PCM027_EGPIO_IRQ_GPIO)
61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 61#define PCM027_EGPIO_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
62#define PCM027_EGPIO_CS 24 62#define PCM027_EGPIO_CS 24
63/* 63/*
diff --git a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
index 8a4383b776d7..d72791695b26 100644
--- a/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
+++ b/arch/arm/mach-pxa/include/mach/pcm990_baseboard.h
@@ -28,14 +28,14 @@
28 28
29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */ 29/* CPLD's interrupt controller is connected to PCM-027 GPIO 9 */
30#define PCM990_CTRL_INT_IRQ_GPIO 9 30#define PCM990_CTRL_INT_IRQ_GPIO 9
31#define PCM990_CTRL_INT_IRQ IRQ_GPIO(PCM990_CTRL_INT_IRQ_GPIO) 31#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING 32#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */ 33#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
34#define PCM990_CTRL_BASE 0xea000000 34#define PCM990_CTRL_BASE 0xea000000
35#define PCM990_CTRL_SIZE (1*1024*1024) 35#define PCM990_CTRL_SIZE (1*1024*1024)
36 36
37#define PCM990_CTRL_PWR_IRQ_GPIO 14 37#define PCM990_CTRL_PWR_IRQ_GPIO 14
38#define PCM990_CTRL_PWR_IRQ IRQ_GPIO(PCM990_CTRL_PWR_IRQ_GPIO) 38#define PCM990_CTRL_PWR_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_PWR_IRQ_GPIO)
39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING 39#define PCM990_CTRL_PWR_IRQ_EDGE IRQ_TYPE_EDGE_RISING
40 40
41/* visible CPLD (U7) registers */ 41/* visible CPLD (U7) registers */
@@ -132,7 +132,7 @@
132 * IDE 132 * IDE
133 */ 133 */
134#define PCM990_IDE_IRQ_GPIO 13 134#define PCM990_IDE_IRQ_GPIO 13
135#define PCM990_IDE_IRQ IRQ_GPIO(PCM990_IDE_IRQ_GPIO) 135#define PCM990_IDE_IRQ PXA_GPIO_TO_IRQ(PCM990_IDE_IRQ_GPIO)
136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING 136#define PCM990_IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */ 137#define PCM990_IDE_PLD_PHYS 0x20000000 /* 16 bit wide */
138#define PCM990_IDE_PLD_BASE 0xee000000 138#define PCM990_IDE_PLD_BASE 0xee000000
@@ -188,11 +188,11 @@
188 * Compact Flash 188 * Compact Flash
189 */ 189 */
190#define PCM990_CF_IRQ_GPIO 11 190#define PCM990_CF_IRQ_GPIO 11
191#define PCM990_CF_IRQ IRQ_GPIO(PCM990_CF_IRQ_GPIO) 191#define PCM990_CF_IRQ PXA_GPIO_TO_IRQ(PCM990_CF_IRQ_GPIO)
192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING 192#define PCM990_CF_IRQ_EDGE IRQ_TYPE_EDGE_RISING
193 193
194#define PCM990_CF_CD_GPIO 12 194#define PCM990_CF_CD_GPIO 12
195#define PCM990_CF_CD IRQ_GPIO(PCM990_CF_CD_GPIO) 195#define PCM990_CF_CD PXA_GPIO_TO_IRQ(PCM990_CF_CD_GPIO)
196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING 196#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
197 197
198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */ 198#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
@@ -258,14 +258,14 @@
258 * Wolfson AC97 Touch 258 * Wolfson AC97 Touch
259 */ 259 */
260#define PCM990_AC97_IRQ_GPIO 10 260#define PCM990_AC97_IRQ_GPIO 10
261#define PCM990_AC97_IRQ IRQ_GPIO(PCM990_AC97_IRQ_GPIO) 261#define PCM990_AC97_IRQ PXA_GPIO_TO_IRQ(PCM990_AC97_IRQ_GPIO)
262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING 262#define PCM990_AC97_IRQ_EDGE IRQ_TYPE_EDGE_RISING
263 263
264/* 264/*
265 * MMC phyCORE 265 * MMC phyCORE
266 */ 266 */
267#define PCM990_MMC0_IRQ_GPIO 9 267#define PCM990_MMC0_IRQ_GPIO 9
268#define PCM990_MMC0_IRQ IRQ_GPIO(PCM990_MMC0_IRQ_GPIO) 268#define PCM990_MMC0_IRQ PXA_GPIO_TO_IRQ(PCM990_MMC0_IRQ_GPIO)
269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING 269#define PCM990_MMC0_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
270 270
271/* 271/*
diff --git a/arch/arm/mach-pxa/include/mach/poodle.h b/arch/arm/mach-pxa/include/mach/poodle.h
index 83d1cfd00fc9..f32ff75dcca8 100644
--- a/arch/arm/mach-pxa/include/mach/poodle.h
+++ b/arch/arm/mach-pxa/include/mach/poodle.h
@@ -47,18 +47,18 @@
47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */ 47#define POODLE_GPIO_DISCHARGE_ON (42) /* Enable battery discharge */
48 48
49/* PXA GPIOs */ 49/* PXA GPIOs */
50#define POODLE_IRQ_GPIO_ON_KEY IRQ_GPIO(0) 50#define POODLE_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(0)
51#define POODLE_IRQ_GPIO_AC_IN IRQ_GPIO(1) 51#define POODLE_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(1)
52#define POODLE_IRQ_GPIO_HP_IN IRQ_GPIO(4) 52#define POODLE_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(4)
53#define POODLE_IRQ_GPIO_CO IRQ_GPIO(16) 53#define POODLE_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(16)
54#define POODLE_IRQ_GPIO_TP_INT IRQ_GPIO(5) 54#define POODLE_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(5)
55#define POODLE_IRQ_GPIO_WAKEUP IRQ_GPIO(11) 55#define POODLE_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(11)
56#define POODLE_IRQ_GPIO_GA_INT IRQ_GPIO(10) 56#define POODLE_IRQ_GPIO_GA_INT PXA_GPIO_TO_IRQ(10)
57#define POODLE_IRQ_GPIO_CF_IRQ IRQ_GPIO(17) 57#define POODLE_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(17)
58#define POODLE_IRQ_GPIO_CF_CD IRQ_GPIO(14) 58#define POODLE_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(14)
59#define POODLE_IRQ_GPIO_nSD_INT IRQ_GPIO(8) 59#define POODLE_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(8)
60#define POODLE_IRQ_GPIO_nSD_DETECT IRQ_GPIO(9) 60#define POODLE_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(9)
61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(13) 61#define POODLE_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(13)
62 62
63/* SCOOP GPIOs */ 63/* SCOOP GPIOs */
64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11 64#define POODLE_SCOOP_CHARGE_ON SCOOP_GPCR_PA11
@@ -71,7 +71,7 @@
71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT ) 71#define POODLE_SCOOP_IO_DIR ( POODLE_SCOOP_VPEN | POODLE_SCOOP_HS_OUT )
72#define POODLE_SCOOP_IO_OUT ( 0 ) 72#define POODLE_SCOOP_IO_OUT ( 0 )
73 73
74#define POODLE_SCOOP_GPIO_BASE (NR_BUILTIN_GPIO) 74#define POODLE_SCOOP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0) 75#define POODLE_GPIO_CHARGE_ON (POODLE_SCOOP_GPIO_BASE + 0)
76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2) 76#define POODLE_GPIO_CP401 (POODLE_SCOOP_GPIO_BASE + 2)
77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7) 77#define POODLE_GPIO_VPEN (POODLE_SCOOP_GPIO_BASE + 7)
diff --git a/arch/arm/mach-pxa/include/mach/spitz.h b/arch/arm/mach-pxa/include/mach/spitz.h
index 685749a51c42..0bfe6507c95d 100644
--- a/arch/arm/mach-pxa/include/mach/spitz.h
+++ b/arch/arm/mach-pxa/include/mach/spitz.h
@@ -108,7 +108,7 @@
108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON) 108#define SPITZ_SCP_SUS_CLR (SPITZ_SCP_MUTE_L | SPITZ_SCP_MUTE_R | SPITZ_SCP_JK_A | SPITZ_SCP_ADC_TEMP_ON)
109#define SPITZ_SCP_SUS_SET 0 109#define SPITZ_SCP_SUS_SET 0
110 110
111#define SPITZ_SCP_GPIO_BASE (NR_BUILTIN_GPIO) 111#define SPITZ_SCP_GPIO_BASE (PXA_NR_BUILTIN_GPIO)
112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0) 112#define SPITZ_GPIO_LED_GREEN (SPITZ_SCP_GPIO_BASE + 0)
113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1) 113#define SPITZ_GPIO_JK_B (SPITZ_SCP_GPIO_BASE + 1)
114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2) 114#define SPITZ_GPIO_CHRG_ON (SPITZ_SCP_GPIO_BASE + 2)
@@ -140,7 +140,7 @@
140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS) 140 SPITZ_SCP2_BACKLIGHT_CONT | SPITZ_SCP2_BACKLIGHT_ON | SPITZ_SCP2_MIC_BIAS)
141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1) 141#define SPITZ_SCP2_SUS_SET (SPITZ_SCP2_IR_ON | SPITZ_SCP2_RESERVED_1)
142 142
143#define SPITZ_SCP2_GPIO_BASE (NR_BUILTIN_GPIO + 12) 143#define SPITZ_SCP2_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0) 144#define SPITZ_GPIO_IR_ON (SPITZ_SCP2_GPIO_BASE + 0)
145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1) 145#define SPITZ_GPIO_AKIN_PULLUP (SPITZ_SCP2_GPIO_BASE + 1)
146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2) 146#define SPITZ_GPIO_RESERVED_1 (SPITZ_SCP2_GPIO_BASE + 2)
@@ -152,7 +152,7 @@
152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8) 152#define SPITZ_GPIO_MIC_BIAS (SPITZ_SCP2_GPIO_BASE + 8)
153 153
154/* Akita IO Expander GPIOs */ 154/* Akita IO Expander GPIOs */
155#define AKITA_IOEXP_GPIO_BASE (NR_BUILTIN_GPIO + 12) 155#define AKITA_IOEXP_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0) 156#define AKITA_GPIO_RESERVED_0 (AKITA_IOEXP_GPIO_BASE + 0)
157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1) 157#define AKITA_GPIO_RESERVED_1 (AKITA_IOEXP_GPIO_BASE + 1)
158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2) 158#define AKITA_GPIO_MIC_BIAS (AKITA_IOEXP_GPIO_BASE + 2)
@@ -164,23 +164,23 @@
164 164
165/* Spitz IRQ Definitions */ 165/* Spitz IRQ Definitions */
166 166
167#define SPITZ_IRQ_GPIO_KEY_INT IRQ_GPIO(SPITZ_GPIO_KEY_INT) 167#define SPITZ_IRQ_GPIO_KEY_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_KEY_INT)
168#define SPITZ_IRQ_GPIO_AC_IN IRQ_GPIO(SPITZ_GPIO_AC_IN) 168#define SPITZ_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_AC_IN)
169#define SPITZ_IRQ_GPIO_AK_INT IRQ_GPIO(SPITZ_GPIO_AK_INT) 169#define SPITZ_IRQ_GPIO_AK_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_AK_INT)
170#define SPITZ_IRQ_GPIO_HP_IN IRQ_GPIO(SPITZ_GPIO_HP_IN) 170#define SPITZ_IRQ_GPIO_HP_IN PXA_GPIO_TO_IRQ(SPITZ_GPIO_HP_IN)
171#define SPITZ_IRQ_GPIO_TP_INT IRQ_GPIO(SPITZ_GPIO_TP_INT) 171#define SPITZ_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT)
172#define SPITZ_IRQ_GPIO_SYNC IRQ_GPIO(SPITZ_GPIO_SYNC) 172#define SPITZ_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(SPITZ_GPIO_SYNC)
173#define SPITZ_IRQ_GPIO_ON_KEY IRQ_GPIO(SPITZ_GPIO_ON_KEY) 173#define SPITZ_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(SPITZ_GPIO_ON_KEY)
174#define SPITZ_IRQ_GPIO_SWA IRQ_GPIO(SPITZ_GPIO_SWA) 174#define SPITZ_IRQ_GPIO_SWA PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWA)
175#define SPITZ_IRQ_GPIO_SWB IRQ_GPIO(SPITZ_GPIO_SWB) 175#define SPITZ_IRQ_GPIO_SWB PXA_GPIO_TO_IRQ(SPITZ_GPIO_SWB)
176#define SPITZ_IRQ_GPIO_BAT_COVER IRQ_GPIO(SPITZ_GPIO_BAT_COVER) 176#define SPITZ_IRQ_GPIO_BAT_COVER PXA_GPIO_TO_IRQ(SPITZ_GPIO_BAT_COVER)
177#define SPITZ_IRQ_GPIO_FATAL_BAT IRQ_GPIO(SPITZ_GPIO_FATAL_BAT) 177#define SPITZ_IRQ_GPIO_FATAL_BAT PXA_GPIO_TO_IRQ(SPITZ_GPIO_FATAL_BAT)
178#define SPITZ_IRQ_GPIO_CO IRQ_GPIO(SPITZ_GPIO_CO) 178#define SPITZ_IRQ_GPIO_CO PXA_GPIO_TO_IRQ(SPITZ_GPIO_CO)
179#define SPITZ_IRQ_GPIO_CF_IRQ IRQ_GPIO(SPITZ_GPIO_CF_IRQ) 179#define SPITZ_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_IRQ)
180#define SPITZ_IRQ_GPIO_CF_CD IRQ_GPIO(SPITZ_GPIO_CF_CD) 180#define SPITZ_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF_CD)
181#define SPITZ_IRQ_GPIO_CF2_IRQ IRQ_GPIO(SPITZ_GPIO_CF2_IRQ) 181#define SPITZ_IRQ_GPIO_CF2_IRQ PXA_GPIO_TO_IRQ(SPITZ_GPIO_CF2_IRQ)
182#define SPITZ_IRQ_GPIO_nSD_INT IRQ_GPIO(SPITZ_GPIO_nSD_INT) 182#define SPITZ_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_INT)
183#define SPITZ_IRQ_GPIO_nSD_DETECT IRQ_GPIO(SPITZ_GPIO_nSD_DETECT) 183#define SPITZ_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(SPITZ_GPIO_nSD_DETECT)
184 184
185/* 185/*
186 * Shared data structures 186 * Shared data structures
diff --git a/arch/arm/mach-pxa/include/mach/tosa.h b/arch/arm/mach-pxa/include/mach/tosa.h
index 1272c4b56ceb..2bb0e862598c 100644
--- a/arch/arm/mach-pxa/include/mach/tosa.h
+++ b/arch/arm/mach-pxa/include/mach/tosa.h
@@ -24,7 +24,7 @@
24/* 24/*
25 * SCOOP2 internal GPIOs 25 * SCOOP2 internal GPIOs
26 */ 26 */
27#define TOSA_SCOOP_GPIO_BASE NR_BUILTIN_GPIO 27#define TOSA_SCOOP_GPIO_BASE PXA_NR_BUILTIN_GPIO
28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11 28#define TOSA_SCOOP_PXA_VCORE1 SCOOP_GPCR_PA11
29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1) 29#define TOSA_GPIO_TC6393XB_REST_IN (TOSA_SCOOP_GPIO_BASE + 1)
30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2) 30#define TOSA_GPIO_IR_POWERDWN (TOSA_SCOOP_GPIO_BASE + 2)
@@ -42,7 +42,7 @@
42/* 42/*
43 * SCOOP2 jacket GPIOs 43 * SCOOP2 jacket GPIOs
44 */ 44 */
45#define TOSA_SCOOP_JC_GPIO_BASE (NR_BUILTIN_GPIO + 12) 45#define TOSA_SCOOP_JC_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 12)
46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0) 46#define TOSA_GPIO_BT_LED (TOSA_SCOOP_JC_GPIO_BASE + 0)
47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1) 47#define TOSA_GPIO_NOTE_LED (TOSA_SCOOP_JC_GPIO_BASE + 1)
48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2) 48#define TOSA_GPIO_CHRG_ERR_LED (TOSA_SCOOP_JC_GPIO_BASE + 2)
@@ -59,7 +59,7 @@
59/* 59/*
60 * TC6393XB GPIOs 60 * TC6393XB GPIOs
61 */ 61 */
62#define TOSA_TC6393XB_GPIO_BASE (NR_BUILTIN_GPIO + 2 * 12) 62#define TOSA_TC6393XB_GPIO_BASE (PXA_NR_BUILTIN_GPIO + 2 * 12)
63 63
64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0) 64#define TOSA_GPIO_TG_ON (TOSA_TC6393XB_GPIO_BASE + 0)
65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1) 65#define TOSA_GPIO_L_MUTE (TOSA_TC6393XB_GPIO_BASE + 1)
@@ -141,30 +141,30 @@
141/* 141/*
142 * Interrupts 142 * Interrupts
143 */ 143 */
144#define TOSA_IRQ_GPIO_WAKEUP IRQ_GPIO(TOSA_GPIO_WAKEUP) 144#define TOSA_IRQ_GPIO_WAKEUP PXA_GPIO_TO_IRQ(TOSA_GPIO_WAKEUP)
145#define TOSA_IRQ_GPIO_AC_IN IRQ_GPIO(TOSA_GPIO_AC_IN) 145#define TOSA_IRQ_GPIO_AC_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN)
146#define TOSA_IRQ_GPIO_RECORD_BTN IRQ_GPIO(TOSA_GPIO_RECORD_BTN) 146#define TOSA_IRQ_GPIO_RECORD_BTN PXA_GPIO_TO_IRQ(TOSA_GPIO_RECORD_BTN)
147#define TOSA_IRQ_GPIO_SYNC IRQ_GPIO(TOSA_GPIO_SYNC) 147#define TOSA_IRQ_GPIO_SYNC PXA_GPIO_TO_IRQ(TOSA_GPIO_SYNC)
148#define TOSA_IRQ_GPIO_USB_IN IRQ_GPIO(TOSA_GPIO_USB_IN) 148#define TOSA_IRQ_GPIO_USB_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_USB_IN)
149#define TOSA_IRQ_GPIO_JACKET_DETECT IRQ_GPIO(TOSA_GPIO_JACKET_DETECT) 149#define TOSA_IRQ_GPIO_JACKET_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_JACKET_DETECT)
150#define TOSA_IRQ_GPIO_nSD_INT IRQ_GPIO(TOSA_GPIO_nSD_INT) 150#define TOSA_IRQ_GPIO_nSD_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_INT)
151#define TOSA_IRQ_GPIO_nSD_DETECT IRQ_GPIO(TOSA_GPIO_nSD_DETECT) 151#define TOSA_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(TOSA_GPIO_nSD_DETECT)
152#define TOSA_IRQ_GPIO_BAT1_CRG IRQ_GPIO(TOSA_GPIO_BAT1_CRG) 152#define TOSA_IRQ_GPIO_BAT1_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_CRG)
153#define TOSA_IRQ_GPIO_CF_CD IRQ_GPIO(TOSA_GPIO_CF_CD) 153#define TOSA_IRQ_GPIO_CF_CD PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_CD)
154#define TOSA_IRQ_GPIO_BAT0_CRG IRQ_GPIO(TOSA_GPIO_BAT0_CRG) 154#define TOSA_IRQ_GPIO_BAT0_CRG PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_CRG)
155#define TOSA_IRQ_GPIO_TC6393XB_INT IRQ_GPIO(TOSA_GPIO_TC6393XB_INT) 155#define TOSA_IRQ_GPIO_TC6393XB_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TC6393XB_INT)
156#define TOSA_IRQ_GPIO_BAT0_LOW IRQ_GPIO(TOSA_GPIO_BAT0_LOW) 156#define TOSA_IRQ_GPIO_BAT0_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT0_LOW)
157#define TOSA_IRQ_GPIO_EAR_IN IRQ_GPIO(TOSA_GPIO_EAR_IN) 157#define TOSA_IRQ_GPIO_EAR_IN PXA_GPIO_TO_IRQ(TOSA_GPIO_EAR_IN)
158#define TOSA_IRQ_GPIO_CF_IRQ IRQ_GPIO(TOSA_GPIO_CF_IRQ) 158#define TOSA_IRQ_GPIO_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_CF_IRQ)
159#define TOSA_IRQ_GPIO_ON_KEY IRQ_GPIO(TOSA_GPIO_ON_KEY) 159#define TOSA_IRQ_GPIO_ON_KEY PXA_GPIO_TO_IRQ(TOSA_GPIO_ON_KEY)
160#define TOSA_IRQ_GPIO_VGA_LINE IRQ_GPIO(TOSA_GPIO_VGA_LINE) 160#define TOSA_IRQ_GPIO_VGA_LINE PXA_GPIO_TO_IRQ(TOSA_GPIO_VGA_LINE)
161#define TOSA_IRQ_GPIO_TP_INT IRQ_GPIO(TOSA_GPIO_TP_INT) 161#define TOSA_IRQ_GPIO_TP_INT PXA_GPIO_TO_IRQ(TOSA_GPIO_TP_INT)
162#define TOSA_IRQ_GPIO_JC_CF_IRQ IRQ_GPIO(TOSA_GPIO_JC_CF_IRQ) 162#define TOSA_IRQ_GPIO_JC_CF_IRQ PXA_GPIO_TO_IRQ(TOSA_GPIO_JC_CF_IRQ)
163#define TOSA_IRQ_GPIO_BAT_LOCKED IRQ_GPIO(TOSA_GPIO_BAT_LOCKED) 163#define TOSA_IRQ_GPIO_BAT_LOCKED PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT_LOCKED)
164#define TOSA_IRQ_GPIO_BAT1_LOW IRQ_GPIO(TOSA_GPIO_BAT1_LOW) 164#define TOSA_IRQ_GPIO_BAT1_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_BAT1_LOW)
165#define TOSA_IRQ_GPIO_KEY_SENSE(a) IRQ_GPIO(69+(a)) 165#define TOSA_IRQ_GPIO_KEY_SENSE(a) PXA_GPIO_TO_IRQ(69+(a))
166 166
167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW IRQ_GPIO(TOSA_GPIO_MAIN_BAT_LOW) 167#define TOSA_IRQ_GPIO_MAIN_BAT_LOW PXA_GPIO_TO_IRQ(TOSA_GPIO_MAIN_BAT_LOW)
168 168
169#define TOSA_KEY_SYNC KEY_102ND /* ??? */ 169#define TOSA_KEY_SYNC KEY_102ND /* ??? */
170 170
diff --git a/arch/arm/mach-pxa/include/mach/trizeps4.h b/arch/arm/mach-pxa/include/mach/trizeps4.h
index 903e1a2e6641..d2ca01053f69 100644
--- a/arch/arm/mach-pxa/include/mach/trizeps4.h
+++ b/arch/arm/mach-pxa/include/mach/trizeps4.h
@@ -43,30 +43,30 @@
43 43
44/* Ethernet Controller Davicom DM9000 */ 44/* Ethernet Controller Davicom DM9000 */
45#define GPIO_DM9000 101 45#define GPIO_DM9000 101
46#define TRIZEPS4_ETH_IRQ IRQ_GPIO(GPIO_DM9000) 46#define TRIZEPS4_ETH_IRQ PXA_GPIO_TO_IRQ(GPIO_DM9000)
47 47
48/* UCB1400 audio / TS-controller */ 48/* UCB1400 audio / TS-controller */
49#define GPIO_UCB1400 1 49#define GPIO_UCB1400 1
50#define TRIZEPS4_UCB1400_IRQ IRQ_GPIO(GPIO_UCB1400) 50#define TRIZEPS4_UCB1400_IRQ PXA_GPIO_TO_IRQ(GPIO_UCB1400)
51 51
52/* PCMCIA socket Compact Flash */ 52/* PCMCIA socket Compact Flash */
53#define GPIO_PCD 11 /* PCMCIA Card Detect */ 53#define GPIO_PCD 11 /* PCMCIA Card Detect */
54#define TRIZEPS4_CD_IRQ IRQ_GPIO(GPIO_PCD) 54#define TRIZEPS4_CD_IRQ PXA_GPIO_TO_IRQ(GPIO_PCD)
55#define GPIO_PRDY 13 /* READY / nINT */ 55#define GPIO_PRDY 13 /* READY / nINT */
56#define TRIZEPS4_READY_NINT IRQ_GPIO(GPIO_PRDY) 56#define TRIZEPS4_READY_NINT PXA_GPIO_TO_IRQ(GPIO_PRDY)
57 57
58/* MMC socket */ 58/* MMC socket */
59#define GPIO_MMC_DET 12 59#define GPIO_MMC_DET 12
60#define TRIZEPS4_MMC_IRQ IRQ_GPIO(GPIO_MMC_DET) 60#define TRIZEPS4_MMC_IRQ PXA_GPIO_TO_IRQ(GPIO_MMC_DET)
61 61
62/* DOC NAND chip */ 62/* DOC NAND chip */
63#define GPIO_DOC_LOCK 94 63#define GPIO_DOC_LOCK 94
64#define GPIO_DOC_IRQ 93 64#define GPIO_DOC_IRQ 93
65#define TRIZEPS4_DOC_IRQ IRQ_GPIO(GPIO_DOC_IRQ) 65#define TRIZEPS4_DOC_IRQ PXA_GPIO_TO_IRQ(GPIO_DOC_IRQ)
66 66
67/* SPI interface */ 67/* SPI interface */
68#define GPIO_SPI 53 68#define GPIO_SPI 53
69#define TRIZEPS4_SPI_IRQ IRQ_GPIO(GPIO_SPI) 69#define TRIZEPS4_SPI_IRQ PXA_GPIO_TO_IRQ(GPIO_SPI)
70 70
71/* LEDS using tx2 / rx2 */ 71/* LEDS using tx2 / rx2 */
72#define GPIO_SYS_BUSY_LED 46 72#define GPIO_SYS_BUSY_LED 46
@@ -74,7 +74,7 @@
74 74
75/* Off-module PIC on ConXS board */ 75/* Off-module PIC on ConXS board */
76#define GPIO_PIC 0 76#define GPIO_PIC 0
77#define TRIZEPS4_PIC_IRQ IRQ_GPIO(GPIO_PIC) 77#define TRIZEPS4_PIC_IRQ PXA_GPIO_TO_IRQ(GPIO_PIC)
78 78
79#ifdef CONFIG_MACH_TRIZEPS_CONXS 79#ifdef CONFIG_MACH_TRIZEPS_CONXS
80/* for CONXS base board define these registers */ 80/* for CONXS base board define these registers */
diff --git a/arch/arm/mach-pxa/irq.c b/arch/arm/mach-pxa/irq.c
index 532c5d3a97d2..5dae15ea6718 100644
--- a/arch/arm/mach-pxa/irq.c
+++ b/arch/arm/mach-pxa/irq.c
@@ -22,7 +22,6 @@
22 22
23#include <mach/hardware.h> 23#include <mach/hardware.h>
24#include <mach/irqs.h> 24#include <mach/irqs.h>
25#include <mach/gpio-pxa.h>
26 25
27#include "generic.h" 26#include "generic.h"
28 27
@@ -92,44 +91,6 @@ static struct irq_chip pxa_internal_irq_chip = {
92 .irq_unmask = pxa_unmask_irq, 91 .irq_unmask = pxa_unmask_irq,
93}; 92};
94 93
95/*
96 * GPIO IRQs for GPIO 0 and 1
97 */
98static int pxa_set_low_gpio_type(struct irq_data *d, unsigned int type)
99{
100 int gpio = d->irq - IRQ_GPIO0;
101
102 if (__gpio_is_occupied(gpio)) {
103 pr_err("%s failed: GPIO is configured\n", __func__);
104 return -EINVAL;
105 }
106
107 if (type & IRQ_TYPE_EDGE_RISING)
108 GRER0 |= GPIO_bit(gpio);
109 else
110 GRER0 &= ~GPIO_bit(gpio);
111
112 if (type & IRQ_TYPE_EDGE_FALLING)
113 GFER0 |= GPIO_bit(gpio);
114 else
115 GFER0 &= ~GPIO_bit(gpio);
116
117 return 0;
118}
119
120static void pxa_ack_low_gpio(struct irq_data *d)
121{
122 GEDR0 = (1 << (d->irq - IRQ_GPIO0));
123}
124
125static struct irq_chip pxa_low_gpio_chip = {
126 .name = "GPIO-l",
127 .irq_ack = pxa_ack_low_gpio,
128 .irq_mask = pxa_mask_irq,
129 .irq_unmask = pxa_unmask_irq,
130 .irq_set_type = pxa_set_low_gpio_type,
131};
132
133asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs) 94asmlinkage void __exception_irq_entry icip_handle_irq(struct pt_regs *regs)
134{ 95{
135 uint32_t icip, icmr, mask; 96 uint32_t icip, icmr, mask;
@@ -160,26 +121,7 @@ asmlinkage void __exception_irq_entry ichp_handle_irq(struct pt_regs *regs)
160 } while (1); 121 } while (1);
161} 122}
162 123
163static void __init pxa_init_low_gpio_irq(set_wake_t fn) 124void __init pxa_init_irq(int irq_nr, int (*fn)(struct irq_data *, unsigned int))
164{
165 int irq;
166
167 /* clear edge detection on GPIO 0 and 1 */
168 GFER0 &= ~0x3;
169 GRER0 &= ~0x3;
170 GEDR0 = 0x3;
171
172 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) {
173 irq_set_chip_and_handler(irq, &pxa_low_gpio_chip,
174 handle_edge_irq);
175 irq_set_chip_data(irq, irq_base(0));
176 set_irq_flags(irq, IRQF_VALID);
177 }
178
179 pxa_low_gpio_chip.irq_set_wake = fn;
180}
181
182void __init pxa_init_irq(int irq_nr, set_wake_t fn)
183{ 125{
184 int irq, i, n; 126 int irq, i, n;
185 127
@@ -209,7 +151,6 @@ void __init pxa_init_irq(int irq_nr, set_wake_t fn)
209 __raw_writel(1, irq_base(0) + ICCR); 151 __raw_writel(1, irq_base(0) + ICCR);
210 152
211 pxa_internal_irq_chip.irq_set_wake = fn; 153 pxa_internal_irq_chip.irq_set_wake = fn;
212 pxa_init_low_gpio_irq(fn);
213} 154}
214 155
215#ifdef CONFIG_PM 156#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/littleton.c b/arch/arm/mach-pxa/littleton.c
index c337c7eed514..1fb86edb857c 100644
--- a/arch/arm/mach-pxa/littleton.c
+++ b/arch/arm/mach-pxa/littleton.c
@@ -124,8 +124,8 @@ static struct resource smc91x_resources[] = {
124 .flags = IORESOURCE_MEM, 124 .flags = IORESOURCE_MEM,
125 }, 125 },
126 [1] = { 126 [1] = {
127 .start = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 127 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
128 .end = IRQ_GPIO(mfp_to_gpio(MFP_PIN_GPIO90)), 128 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO90)),
129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 129 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
130 } 130 }
131}; 131};
@@ -396,7 +396,7 @@ static struct i2c_board_info littleton_i2c_info[] = {
396 .type = "da9034", 396 .type = "da9034",
397 .addr = 0x34, 397 .addr = 0x34,
398 .platform_data = &littleton_da9034_info, 398 .platform_data = &littleton_da9034_info,
399 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO18)), 399 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO18)),
400 }, 400 },
401 [1] = { 401 [1] = {
402 .type = "max7320", 402 .type = "max7320",
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index 6119c015f393..cee9ce2fc0b5 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -152,8 +152,8 @@ static void __init lpd270_init_irq(void)
152 handle_level_irq); 152 handle_level_irq);
153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 153 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
154 } 154 }
155 irq_set_chained_handler(IRQ_GPIO(0), lpd270_irq_handler); 155 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lpd270_irq_handler);
156 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 156 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
157} 157}
158 158
159 159
diff --git a/arch/arm/mach-pxa/lubbock.c b/arch/arm/mach-pxa/lubbock.c
index 4b7a52871652..6ebd276aebeb 100644
--- a/arch/arm/mach-pxa/lubbock.c
+++ b/arch/arm/mach-pxa/lubbock.c
@@ -170,8 +170,8 @@ static void __init lubbock_init_irq(void)
170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 170 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
171 } 171 }
172 172
173 irq_set_chained_handler(IRQ_GPIO(0), lubbock_irq_handler); 173 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), lubbock_irq_handler);
174 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 174 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
175} 175}
176 176
177#ifdef CONFIG_PM 177#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/magician.c b/arch/arm/mach-pxa/magician.c
index 4e6774fff422..3d6baf91396c 100644
--- a/arch/arm/mach-pxa/magician.c
+++ b/arch/arm/mach-pxa/magician.c
@@ -184,8 +184,8 @@ static struct resource egpio_resources[] = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 }, 185 },
186 [1] = { 186 [1] = {
187 .start = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 187 .start = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
188 .end = gpio_to_irq(GPIO13_MAGICIAN_CPLD_IRQ), 188 .end = PXA_GPIO_TO_IRQ(GPIO13_MAGICIAN_CPLD_IRQ),
189 .flags = IORESOURCE_IRQ, 189 .flags = IORESOURCE_IRQ,
190 }, 190 },
191}; 191};
@@ -468,8 +468,8 @@ static struct resource pasic3_resources[] = {
468 }, 468 },
469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */ 469 /* No IRQ handler in the PASIC3, DS1WM needs an external IRQ */
470 [1] = { 470 [1] = {
471 .start = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 471 .start = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
472 .end = gpio_to_irq(GPIO107_MAGICIAN_DS1WM_IRQ), 472 .end = PXA_GPIO_TO_IRQ(GPIO107_MAGICIAN_DS1WM_IRQ),
473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 473 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
474 } 474 }
475}; 475};
diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c
index ca14555d5e15..1aebaf719462 100644
--- a/arch/arm/mach-pxa/mainstone.c
+++ b/arch/arm/mach-pxa/mainstone.c
@@ -178,8 +178,8 @@ static void __init mainstone_init_irq(void)
178 MST_INTMSKENA = 0; 178 MST_INTMSKENA = 0;
179 MST_INTSETCLR = 0; 179 MST_INTSETCLR = 0;
180 180
181 irq_set_chained_handler(IRQ_GPIO(0), mainstone_irq_handler); 181 irq_set_chained_handler(PXA_GPIO_TO_IRQ(0), mainstone_irq_handler);
182 irq_set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING); 182 irq_set_irq_type(PXA_GPIO_TO_IRQ(0), IRQ_TYPE_EDGE_FALLING);
183} 183}
184 184
185#ifdef CONFIG_PM 185#ifdef CONFIG_PM
diff --git a/arch/arm/mach-pxa/mfp-pxa2xx.c b/arch/arm/mach-pxa/mfp-pxa2xx.c
index 43a5f6861ca3..f14775536b83 100644
--- a/arch/arm/mach-pxa/mfp-pxa2xx.c
+++ b/arch/arm/mach-pxa/mfp-pxa2xx.c
@@ -13,6 +13,7 @@
13 * published by the Free Software Foundation. 13 * published by the Free Software Foundation.
14 */ 14 */
15#include <linux/gpio.h> 15#include <linux/gpio.h>
16#include <linux/gpio-pxa.h>
16#include <linux/module.h> 17#include <linux/module.h>
17#include <linux/kernel.h> 18#include <linux/kernel.h>
18#include <linux/init.h> 19#include <linux/init.h>
@@ -20,7 +21,6 @@
20 21
21#include <mach/pxa2xx-regs.h> 22#include <mach/pxa2xx-regs.h>
22#include <mach/mfp-pxa2xx.h> 23#include <mach/mfp-pxa2xx.h>
23#include <mach/gpio-pxa.h>
24 24
25#include "generic.h" 25#include "generic.h"
26 26
@@ -29,6 +29,10 @@
29#define GAFR_L(x) __GAFR(0, x) 29#define GAFR_L(x) __GAFR(0, x)
30#define GAFR_U(x) __GAFR(1, x) 30#define GAFR_U(x) __GAFR(1, x)
31 31
32#define BANK_OFF(n) (((n) < 3) ? (n) << 2 : 0x100 + (((n) - 3) << 2))
33#define GPLR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5))
34#define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c)
35
32#define PWER_WE35 (1 << 24) 36#define PWER_WE35 (1 << 24)
33 37
34struct gpio_desc { 38struct gpio_desc {
diff --git a/arch/arm/mach-pxa/mioa701.c b/arch/arm/mach-pxa/mioa701.c
index dce71b4a3a55..e80a3db735c2 100644
--- a/arch/arm/mach-pxa/mioa701.c
+++ b/arch/arm/mach-pxa/mioa701.c
@@ -537,15 +537,15 @@ static struct pda_power_pdata power_pdata = {
537static struct resource power_resources[] = { 537static struct resource power_resources[] = {
538 [0] = { 538 [0] = {
539 .name = "ac", 539 .name = "ac",
540 .start = gpio_to_irq(GPIO96_AC_DETECT), 540 .start = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
541 .end = gpio_to_irq(GPIO96_AC_DETECT), 541 .end = PXA_GPIO_TO_IRQ(GPIO96_AC_DETECT),
542 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 542 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
543 IORESOURCE_IRQ_LOWEDGE, 543 IORESOURCE_IRQ_LOWEDGE,
544 }, 544 },
545 [1] = { 545 [1] = {
546 .name = "usb", 546 .name = "usb",
547 .start = gpio_to_irq(GPIO13_nUSB_DETECT), 547 .start = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
548 .end = gpio_to_irq(GPIO13_nUSB_DETECT), 548 .end = PXA_GPIO_TO_IRQ(GPIO13_nUSB_DETECT),
549 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | 549 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE |
550 IORESOURCE_IRQ_LOWEDGE, 550 IORESOURCE_IRQ_LOWEDGE,
551 }, 551 },
diff --git a/arch/arm/mach-pxa/mxm8x10.c b/arch/arm/mach-pxa/mxm8x10.c
index 90928d6e1a5b..83570a79e7d2 100644
--- a/arch/arm/mach-pxa/mxm8x10.c
+++ b/arch/arm/mach-pxa/mxm8x10.c
@@ -417,8 +417,8 @@ static struct resource dm9k_resources[] = {
417 .flags = IORESOURCE_MEM 417 .flags = IORESOURCE_MEM
418 }, 418 },
419 [2] = { 419 [2] = {
420 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 420 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
421 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO9)), 421 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO9)),
422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE 422 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE
423 } 423 }
424}; 424};
diff --git a/arch/arm/mach-pxa/pcm990-baseboard.c b/arch/arm/mach-pxa/pcm990-baseboard.c
index 6d38c6548b3d..abab4e2b122c 100644
--- a/arch/arm/mach-pxa/pcm990-baseboard.c
+++ b/arch/arm/mach-pxa/pcm990-baseboard.c
@@ -378,7 +378,7 @@ struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
378#include <linux/i2c/pca953x.h> 378#include <linux/i2c/pca953x.h>
379 379
380static struct pca953x_platform_data pca9536_data = { 380static struct pca953x_platform_data pca9536_data = {
381 .gpio_base = NR_BUILTIN_GPIO, 381 .gpio_base = PXA_NR_BUILTIN_GPIO,
382}; 382};
383 383
384static int gpio_bus_switch = -EINVAL; 384static int gpio_bus_switch = -EINVAL;
@@ -406,9 +406,9 @@ static unsigned long pcm990_camera_query_bus_param(struct soc_camera_link *link)
406 int ret; 406 int ret;
407 407
408 if (gpio_bus_switch < 0) { 408 if (gpio_bus_switch < 0) {
409 ret = gpio_request(NR_BUILTIN_GPIO, "camera"); 409 ret = gpio_request(PXA_NR_BUILTIN_GPIO, "camera");
410 if (!ret) { 410 if (!ret) {
411 gpio_bus_switch = NR_BUILTIN_GPIO; 411 gpio_bus_switch = PXA_NR_BUILTIN_GPIO;
412 gpio_direction_output(gpio_bus_switch, 0); 412 gpio_direction_output(gpio_bus_switch, 0);
413 } 413 }
414 } 414 }
diff --git a/arch/arm/mach-pxa/poodle.c b/arch/arm/mach-pxa/poodle.c
index b260ce872d2d..69036e42ca31 100644
--- a/arch/arm/mach-pxa/poodle.c
+++ b/arch/arm/mach-pxa/poodle.c
@@ -166,8 +166,8 @@ static struct resource locomo_resources[] = {
166 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
167 }, 167 },
168 [1] = { 168 [1] = {
169 .start = IRQ_GPIO(10), 169 .start = PXA_GPIO_TO_IRQ(10),
170 .end = IRQ_GPIO(10), 170 .end = PXA_GPIO_TO_IRQ(10),
171 .flags = IORESOURCE_IRQ, 171 .flags = IORESOURCE_IRQ,
172 }, 172 },
173}; 173};
@@ -212,7 +212,7 @@ static struct spi_board_info poodle_spi_devices[] = {
212 .bus_num = 1, 212 .bus_num = 1,
213 .platform_data = &poodle_ads7846_info, 213 .platform_data = &poodle_ads7846_info,
214 .controller_data= &poodle_ads7846_chip, 214 .controller_data= &poodle_ads7846_chip,
215 .irq = gpio_to_irq(POODLE_GPIO_TP_INT), 215 .irq = PXA_GPIO_TO_IRQ(POODLE_GPIO_TP_INT),
216 }, 216 },
217}; 217};
218 218
diff --git a/arch/arm/mach-pxa/pxa25x.c b/arch/arm/mach-pxa/pxa25x.c
index f05f9486b0cb..adf058fa97ee 100644
--- a/arch/arm/mach-pxa/pxa25x.c
+++ b/arch/arm/mach-pxa/pxa25x.c
@@ -17,6 +17,7 @@
17 * need be. 17 * need be.
18 */ 18 */
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/gpio-pxa.h>
20#include <linux/module.h> 21#include <linux/module.h>
21#include <linux/kernel.h> 22#include <linux/kernel.h>
22#include <linux/init.h> 23#include <linux/init.h>
@@ -208,6 +209,8 @@ static struct clk_lookup pxa25x_clkregs[] = {
208 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"), 209 INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
209 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"), 210 INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
210 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL), 211 INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
212 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
213 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
211}; 214};
212 215
213static struct clk_lookup pxa25x_hwuart_clkreg = 216static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -287,7 +290,7 @@ static inline void pxa25x_init_pm(void) {}
287 290
288static int pxa25x_set_wake(struct irq_data *d, unsigned int on) 291static int pxa25x_set_wake(struct irq_data *d, unsigned int on)
289{ 292{
290 int gpio = irq_to_gpio(d->irq); 293 int gpio = pxa_irq_to_gpio(d->irq);
291 uint32_t mask = 0; 294 uint32_t mask = 0;
292 295
293 if (gpio >= 0 && gpio < 85) 296 if (gpio >= 0 && gpio < 85)
@@ -312,14 +315,12 @@ set_pwer:
312void __init pxa25x_init_irq(void) 315void __init pxa25x_init_irq(void)
313{ 316{
314 pxa_init_irq(32, pxa25x_set_wake); 317 pxa_init_irq(32, pxa25x_set_wake);
315 pxa_init_gpio(IRQ_GPIO_2_x, 2, 84, pxa25x_set_wake);
316} 318}
317 319
318#ifdef CONFIG_CPU_PXA26x 320#ifdef CONFIG_CPU_PXA26x
319void __init pxa26x_init_irq(void) 321void __init pxa26x_init_irq(void)
320{ 322{
321 pxa_init_irq(32, pxa25x_set_wake); 323 pxa_init_irq(32, pxa25x_set_wake);
322 pxa_init_gpio(IRQ_GPIO_2_x, 2, 89, pxa25x_set_wake);
323} 324}
324#endif 325#endif
325 326
diff --git a/arch/arm/mach-pxa/pxa27x.c b/arch/arm/mach-pxa/pxa27x.c
index bc5a98ebaa72..180bd8675d4b 100644
--- a/arch/arm/mach-pxa/pxa27x.c
+++ b/arch/arm/mach-pxa/pxa27x.c
@@ -12,6 +12,7 @@
12 * published by the Free Software Foundation. 12 * published by the Free Software Foundation.
13 */ 13 */
14#include <linux/gpio.h> 14#include <linux/gpio.h>
15#include <linux/gpio-pxa.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/init.h> 18#include <linux/init.h>
@@ -229,6 +230,8 @@ static struct clk_lookup pxa27x_clkregs[] = {
229 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"), 230 INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
230 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"), 231 INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
231 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL), 232 INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
233 INIT_CLKREG(&clk_dummy, "pxa-gpio", NULL),
234 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
232}; 235};
233 236
234#ifdef CONFIG_PM 237#ifdef CONFIG_PM
@@ -355,7 +358,7 @@ static inline void pxa27x_init_pm(void) {}
355 */ 358 */
356static int pxa27x_set_wake(struct irq_data *d, unsigned int on) 359static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
357{ 360{
358 int gpio = irq_to_gpio(d->irq); 361 int gpio = pxa_irq_to_gpio(d->irq);
359 uint32_t mask; 362 uint32_t mask;
360 363
361 if (gpio >= 0 && gpio < 128) 364 if (gpio >= 0 && gpio < 128)
@@ -386,7 +389,6 @@ static int pxa27x_set_wake(struct irq_data *d, unsigned int on)
386void __init pxa27x_init_irq(void) 389void __init pxa27x_init_irq(void)
387{ 390{
388 pxa_init_irq(34, pxa27x_set_wake); 391 pxa_init_irq(34, pxa27x_set_wake);
389 pxa_init_gpio(IRQ_GPIO_2_x, 2, 120, pxa27x_set_wake);
390} 392}
391 393
392static struct map_desc pxa27x_io_desc[] __initdata = { 394static struct map_desc pxa27x_io_desc[] __initdata = {
@@ -422,6 +424,7 @@ void __init pxa27x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
422} 424}
423 425
424static struct platform_device *devices[] __initdata = { 426static struct platform_device *devices[] __initdata = {
427 &pxa_device_gpio,
425 &pxa27x_device_udc, 428 &pxa27x_device_udc,
426 &pxa_device_pmu, 429 &pxa_device_pmu,
427 &pxa_device_i2s, 430 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa300.c b/arch/arm/mach-pxa/pxa300.c
index 40bb16501d86..0388eda7878a 100644
--- a/arch/arm/mach-pxa/pxa300.c
+++ b/arch/arm/mach-pxa/pxa300.c
@@ -89,6 +89,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA300_GCU, 0, 0);
89static struct clk_lookup common_clkregs[] = { 89static struct clk_lookup common_clkregs[] = {
90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL), 90 INIT_CLKREG(&clk_common_nand, "pxa3xx-nand", NULL),
91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 91 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
92 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
92}; 93};
93 94
94static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0); 95static DEFINE_PXA3_CKEN(pxa310_mmc3, MMC3, 19500000, 0);
diff --git a/arch/arm/mach-pxa/pxa320.c b/arch/arm/mach-pxa/pxa320.c
index 8d614ecd8e99..d487e1ff4c9a 100644
--- a/arch/arm/mach-pxa/pxa320.c
+++ b/arch/arm/mach-pxa/pxa320.c
@@ -83,6 +83,7 @@ static DEFINE_PXA3_CKEN(gcu, PXA320_GCU, 0, 0);
83static struct clk_lookup pxa320_clkregs[] = { 83static struct clk_lookup pxa320_clkregs[] = {
84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL), 84 INIT_CLKREG(&clk_pxa320_nand, "pxa3xx-nand", NULL),
85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL), 85 INIT_CLKREG(&clk_gcu, "pxa3xx-gcu", NULL),
86 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
86}; 87};
87 88
88static int __init pxa320_init(void) 89static int __init pxa320_init(void)
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c
index 0737c59b88ae..f107c71c7589 100644
--- a/arch/arm/mach-pxa/pxa3xx.c
+++ b/arch/arm/mach-pxa/pxa3xx.c
@@ -25,7 +25,6 @@
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/suspend.h> 26#include <asm/suspend.h>
27#include <mach/hardware.h> 27#include <mach/hardware.h>
28#include <mach/gpio-pxa.h>
29#include <mach/pxa3xx-regs.h> 28#include <mach/pxa3xx-regs.h>
30#include <mach/reset.h> 29#include <mach/reset.h>
31#include <mach/ohci.h> 30#include <mach/ohci.h>
@@ -56,6 +55,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_pwm0, PWM0, 13000000, 0);
56static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0); 55static DEFINE_PXA3_CKEN(pxa3xx_pwm1, PWM1, 13000000, 0);
57static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0); 56static DEFINE_PXA3_CKEN(pxa3xx_mmc1, MMC1, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0); 57static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
58static DEFINE_PXA3_CKEN(pxa3xx_gpio, GPIO, 13000000, 0);
59 59
60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops); 60static DEFINE_CK(pxa3xx_lcd, LCD, &clk_pxa3xx_hsio_ops);
61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops); 61static DEFINE_CK(pxa3xx_smemc, SMC, &clk_pxa3xx_smemc_ops);
@@ -67,6 +67,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"), 67 INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
68 /* Power I2C clock is always on */ 68 /* Power I2C clock is always on */
69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 69 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
70 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
70 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL), 71 INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
71 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"), 72 INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
72 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"), 73 INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),
@@ -88,6 +89,7 @@ static struct clk_lookup pxa3xx_clkregs[] = {
88 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL), 89 INIT_CLKREG(&clk_pxa3xx_mmc1, "pxa2xx-mci.0", NULL),
89 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL), 90 INIT_CLKREG(&clk_pxa3xx_mmc2, "pxa2xx-mci.1", NULL),
90 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL), 91 INIT_CLKREG(&clk_pxa3xx_smemc, "pxa2xx-pcmcia", NULL),
92 INIT_CLKREG(&clk_pxa3xx_gpio, "pxa-gpio", NULL),
91}; 93};
92 94
93#ifdef CONFIG_PM 95#ifdef CONFIG_PM
@@ -365,7 +367,8 @@ static struct irq_chip pxa_ext_wakeup_chip = {
365 .irq_set_type = pxa_set_ext_wakeup_type, 367 .irq_set_type = pxa_set_ext_wakeup_type,
366}; 368};
367 369
368static void __init pxa_init_ext_wakeup_irq(set_wake_t fn) 370static void __init pxa_init_ext_wakeup_irq(int (*fn)(struct irq_data *,
371 unsigned int))
369{ 372{
370 int irq; 373 int irq;
371 374
@@ -388,7 +391,6 @@ void __init pxa3xx_init_irq(void)
388 391
389 pxa_init_irq(56, pxa3xx_set_wake); 392 pxa_init_irq(56, pxa3xx_set_wake);
390 pxa_init_ext_wakeup_irq(pxa3xx_set_wake); 393 pxa_init_ext_wakeup_irq(pxa3xx_set_wake);
391 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
392} 394}
393 395
394static struct map_desc pxa3xx_io_desc[] __initdata = { 396static struct map_desc pxa3xx_io_desc[] __initdata = {
@@ -417,6 +419,7 @@ void __init pxa3xx_set_i2c_power_info(struct i2c_pxa_platform_data *info)
417} 419}
418 420
419static struct platform_device *devices[] __initdata = { 421static struct platform_device *devices[] __initdata = {
422 &pxa_device_gpio,
420 &pxa27x_device_udc, 423 &pxa27x_device_udc,
421 &pxa_device_pmu, 424 &pxa_device_pmu,
422 &pxa_device_i2s, 425 &pxa_device_i2s,
diff --git a/arch/arm/mach-pxa/pxa95x.c b/arch/arm/mach-pxa/pxa95x.c
index 51371b39d2a3..fccc644702e6 100644
--- a/arch/arm/mach-pxa/pxa95x.c
+++ b/arch/arm/mach-pxa/pxa95x.c
@@ -20,7 +20,6 @@
20#include <linux/syscore_ops.h> 20#include <linux/syscore_ops.h>
21 21
22#include <mach/hardware.h> 22#include <mach/hardware.h>
23#include <mach/gpio-pxa.h>
24#include <mach/pxa3xx-regs.h> 23#include <mach/pxa3xx-regs.h>
25#include <mach/pxa930.h> 24#include <mach/pxa930.h>
26#include <mach/reset.h> 25#include <mach/reset.h>
@@ -212,11 +211,13 @@ static DEFINE_PXA3_CKEN(pxa95x_ssp3, SSP3, 13000000, 0);
212static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0); 211static DEFINE_PXA3_CKEN(pxa95x_ssp4, SSP4, 13000000, 0);
213static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0); 212static DEFINE_PXA3_CKEN(pxa95x_pwm0, PWM0, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0); 213static DEFINE_PXA3_CKEN(pxa95x_pwm1, PWM1, 13000000, 0);
214static DEFINE_PXA3_CKEN(pxa95x_gpio, GPIO, 13000000, 0);
215 215
216static struct clk_lookup pxa95x_clkregs[] = { 216static struct clk_lookup pxa95x_clkregs[] = {
217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"), 217 INIT_CLKREG(&clk_pxa95x_pout, NULL, "CLK_POUT"),
218 /* Power I2C clock is always on */ 218 /* Power I2C clock is always on */
219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL), 219 INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
220 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
220 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL), 221 INIT_CLKREG(&clk_pxa95x_lcd, "pxa2xx-fb", NULL),
221 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL), 222 INIT_CLKREG(&clk_pxa95x_ffuart, "pxa2xx-uart.0", NULL),
222 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL), 223 INIT_CLKREG(&clk_pxa95x_btuart, "pxa2xx-uart.1", NULL),
@@ -230,12 +231,12 @@ static struct clk_lookup pxa95x_clkregs[] = {
230 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL), 231 INIT_CLKREG(&clk_pxa95x_ssp4, "pxa27x-ssp.3", NULL),
231 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL), 232 INIT_CLKREG(&clk_pxa95x_pwm0, "pxa27x-pwm.0", NULL),
232 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL), 233 INIT_CLKREG(&clk_pxa95x_pwm1, "pxa27x-pwm.1", NULL),
234 INIT_CLKREG(&clk_pxa95x_gpio, "pxa-gpio", NULL),
233}; 235};
234 236
235void __init pxa95x_init_irq(void) 237void __init pxa95x_init_irq(void)
236{ 238{
237 pxa_init_irq(96, NULL); 239 pxa_init_irq(96, NULL);
238 pxa_init_gpio(IRQ_GPIO_2_x, 2, 127, NULL);
239} 240}
240 241
241/* 242/*
@@ -248,6 +249,7 @@ void __init pxa95x_set_i2c_power_info(struct i2c_pxa_platform_data *info)
248} 249}
249 250
250static struct platform_device *devices[] __initdata = { 251static struct platform_device *devices[] __initdata = {
252 &pxa_device_gpio,
251 &sa1100_device_rtc, 253 &sa1100_device_rtc,
252 &pxa_device_rtc, 254 &pxa_device_rtc,
253 &pxa27x_device_ssp1, 255 &pxa27x_device_ssp1,
diff --git a/arch/arm/mach-pxa/raumfeld.c b/arch/arm/mach-pxa/raumfeld.c
index 4962b1676629..22818c7694a8 100644
--- a/arch/arm/mach-pxa/raumfeld.c
+++ b/arch/arm/mach-pxa/raumfeld.c
@@ -292,8 +292,8 @@ static struct resource smc91x_resources[] = {
292 .flags = IORESOURCE_MEM, 292 .flags = IORESOURCE_MEM,
293 }, 293 },
294 { 294 {
295 .start = gpio_to_irq(GPIO_ETH_IRQ), 295 .start = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
296 .end = gpio_to_irq(GPIO_ETH_IRQ), 296 .end = PXA_GPIO_TO_IRQ(GPIO_ETH_IRQ),
297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING, 297 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_FALLING,
298 } 298 }
299}; 299};
@@ -672,7 +672,7 @@ static struct lis3lv02d_platform_data lis3_pdata = {
672 .chip_select = 1, \ 672 .chip_select = 1, \
673 .controller_data = (void *) GPIO_ACCEL_CS, \ 673 .controller_data = (void *) GPIO_ACCEL_CS, \
674 .platform_data = &lis3_pdata, \ 674 .platform_data = &lis3_pdata, \
675 .irq = gpio_to_irq(GPIO_ACCEL_IRQ), \ 675 .irq = PXA_GPIO_TO_IRQ(GPIO_ACCEL_IRQ), \
676} 676}
677 677
678#define SPI_DAC7512 \ 678#define SPI_DAC7512 \
@@ -956,7 +956,7 @@ static struct eeti_ts_platform_data eeti_ts_pdata = {
956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = { 956static struct i2c_board_info raumfeld_controller_i2c_board_info __initdata = {
957 .type = "eeti_ts", 957 .type = "eeti_ts",
958 .addr = 0x0a, 958 .addr = 0x0a,
959 .irq = gpio_to_irq(GPIO_TOUCH_IRQ), 959 .irq = PXA_GPIO_TO_IRQ(GPIO_TOUCH_IRQ),
960 .platform_data = &eeti_ts_pdata, 960 .platform_data = &eeti_ts_pdata,
961}; 961};
962 962
diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c
index 878707056e65..0fe354efb931 100644
--- a/arch/arm/mach-pxa/saar.c
+++ b/arch/arm/mach-pxa/saar.c
@@ -96,8 +96,8 @@ static struct resource smc91x_resources[] = {
96 .flags = IORESOURCE_MEM, 96 .flags = IORESOURCE_MEM,
97 }, 97 },
98 [1] = { 98 [1] = {
99 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 99 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
100 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO97)), 100 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO97)),
101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 101 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
102 } 102 }
103}; 103};
@@ -502,7 +502,7 @@ static struct i2c_board_info saar_i2c_info[] = {
502 .type = "da9034", 502 .type = "da9034",
503 .addr = 0x34, 503 .addr = 0x34,
504 .platform_data = &saar_da9034_info, 504 .platform_data = &saar_da9034_info,
505 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 505 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
506 }, 506 },
507}; 507};
508 508
diff --git a/arch/arm/mach-pxa/saarb.c b/arch/arm/mach-pxa/saarb.c
index b6dbaca460c7..febc809ed5a6 100644
--- a/arch/arm/mach-pxa/saarb.c
+++ b/arch/arm/mach-pxa/saarb.c
@@ -92,7 +92,7 @@ static struct i2c_board_info saarb_i2c_info[] = {
92 .type = "88PM860x", 92 .type = "88PM860x",
93 .addr = 0x34, 93 .addr = 0x34,
94 .platform_data = &saarb_pm8607_info, 94 .platform_data = &saarb_pm8607_info,
95 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 95 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
96 }, 96 },
97}; 97};
98 98
diff --git a/arch/arm/mach-pxa/sharpsl_pm.c b/arch/arm/mach-pxa/sharpsl_pm.c
index 785880f67b60..8d5168d253a9 100644
--- a/arch/arm/mach-pxa/sharpsl_pm.c
+++ b/arch/arm/mach-pxa/sharpsl_pm.c
@@ -907,24 +907,24 @@ static int __devinit sharpsl_pm_probe(struct platform_device *pdev)
907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock); 907 gpio_direction_input(sharpsl_pm.machinfo->gpio_batlock);
908 908
909 /* Register interrupt handlers */ 909 /* Register interrupt handlers */
910 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) { 910 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, "AC Input Detect", sharpsl_ac_isr)) {
911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin)); 911 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin));
912 } 912 }
913 913
914 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) { 914 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Battery Cover", sharpsl_fatal_isr)) {
915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock)); 915 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock));
916 } 916 }
917 917
918 if (sharpsl_pm.machinfo->gpio_fatal) { 918 if (sharpsl_pm.machinfo->gpio_fatal) {
919 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) { 919 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr, IRQF_DISABLED | IRQF_TRIGGER_FALLING, "Fatal Battery", sharpsl_fatal_isr)) {
920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal)); 920 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal));
921 } 921 }
922 } 922 }
923 923
924 if (sharpsl_pm.machinfo->batfull_irq) { 924 if (sharpsl_pm.machinfo->batfull_irq) {
925 /* Register interrupt handler. */ 925 /* Register interrupt handler. */
926 if (request_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) { 926 if (request_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr, IRQF_DISABLED | IRQF_TRIGGER_RISING, "CO", sharpsl_chrg_full_isr)) {
927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull)); 927 dev_err(sharpsl_pm.dev, "Could not get irq %d.\n", PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull));
928 } 928 }
929 } 929 }
930 930
@@ -953,14 +953,14 @@ static int sharpsl_pm_remove(struct platform_device *pdev)
953 953
954 led_trigger_unregister_simple(sharpsl_charge_led_trigger); 954 led_trigger_unregister_simple(sharpsl_charge_led_trigger);
955 955
956 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr); 956 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_acin), sharpsl_ac_isr);
957 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr); 957 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batlock), sharpsl_fatal_isr);
958 958
959 if (sharpsl_pm.machinfo->gpio_fatal) 959 if (sharpsl_pm.machinfo->gpio_fatal)
960 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr); 960 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_fatal), sharpsl_fatal_isr);
961 961
962 if (sharpsl_pm.machinfo->batfull_irq) 962 if (sharpsl_pm.machinfo->batfull_irq)
963 free_irq(IRQ_GPIO(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr); 963 free_irq(PXA_GPIO_TO_IRQ(sharpsl_pm.machinfo->gpio_batfull), sharpsl_chrg_full_isr);
964 964
965 gpio_free(sharpsl_pm.machinfo->gpio_batlock); 965 gpio_free(sharpsl_pm.machinfo->gpio_batlock);
966 gpio_free(sharpsl_pm.machinfo->gpio_batfull); 966 gpio_free(sharpsl_pm.machinfo->gpio_batfull);
diff --git a/arch/arm/mach-pxa/spitz.c b/arch/arm/mach-pxa/spitz.c
index a7f81a3fd132..abf355d0c92f 100644
--- a/arch/arm/mach-pxa/spitz.c
+++ b/arch/arm/mach-pxa/spitz.c
@@ -552,7 +552,7 @@ static struct spi_board_info spitz_spi_devices[] = {
552 .chip_select = 0, 552 .chip_select = 0,
553 .platform_data = &spitz_ads7846_info, 553 .platform_data = &spitz_ads7846_info,
554 .controller_data = &spitz_ads7846_chip, 554 .controller_data = &spitz_ads7846_chip,
555 .irq = gpio_to_irq(SPITZ_GPIO_TP_INT), 555 .irq = PXA_GPIO_TO_IRQ(SPITZ_GPIO_TP_INT),
556 }, { 556 }, {
557 .modalias = "corgi-lcd", 557 .modalias = "corgi-lcd",
558 .max_speed_hz = 50000, 558 .max_speed_hz = 50000,
diff --git a/arch/arm/mach-pxa/spitz_pm.c b/arch/arm/mach-pxa/spitz_pm.c
index 094279aefe9c..34cbdac51525 100644
--- a/arch/arm/mach-pxa/spitz_pm.c
+++ b/arch/arm/mach-pxa/spitz_pm.c
@@ -15,6 +15,7 @@
15#include <linux/kernel.h> 15#include <linux/kernel.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/gpio-pxa.h>
18#include <linux/interrupt.h> 19#include <linux/interrupt.h>
19#include <linux/platform_device.h> 20#include <linux/platform_device.h>
20#include <linux/apm-emulation.h> 21#include <linux/apm-emulation.h>
@@ -41,6 +42,7 @@ static int spitz_last_ac_status;
41static struct gpio spitz_charger_gpios[] = { 42static struct gpio spitz_charger_gpios[] = {
42 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" }, 43 { SPITZ_GPIO_KEY_INT, GPIOF_IN, "Keyboard Interrupt" },
43 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" }, 44 { SPITZ_GPIO_SYNC, GPIOF_IN, "Sync" },
45 { SPITZ_GPIO_AC_IN, GPIOF_IN, "Charger Detection" },
44 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" }, 46 { SPITZ_GPIO_ADC_TEMP_ON, GPIOF_OUT_INIT_LOW, "ADC Temp On" },
45 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" }, 47 { SPITZ_GPIO_JK_B, GPIOF_OUT_INIT_LOW, "JK B" },
46 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" }, 48 { SPITZ_GPIO_CHRG_ON, GPIOF_OUT_INIT_LOW, "Charger On" },
@@ -169,14 +171,19 @@ static int spitz_should_wakeup(unsigned int resume_on_alarm)
169 171
170static unsigned long spitz_charger_wakeup(void) 172static unsigned long spitz_charger_wakeup(void)
171{ 173{
172 return (~GPLR0 & GPIO_bit(SPITZ_GPIO_KEY_INT)) | (GPLR0 & GPIO_bit(SPITZ_GPIO_SYNC)); 174 unsigned long ret;
175 ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
176 << GPIO_bit(SPITZ_GPIO_KEY_INT))
177 | (!gpio_get_value(SPITZ_GPIO_SYNC)
178 << GPIO_bit(SPITZ_GPIO_SYNC));
179 return ret;
173} 180}
174 181
175unsigned long spitzpm_read_devdata(int type) 182unsigned long spitzpm_read_devdata(int type)
176{ 183{
177 switch (type) { 184 switch (type) {
178 case SHARPSL_STATUS_ACIN: 185 case SHARPSL_STATUS_ACIN:
179 return (((~GPLR(SPITZ_GPIO_AC_IN)) & GPIO_bit(SPITZ_GPIO_AC_IN)) != 0); 186 return !gpio_get_value(SPITZ_GPIO_AC_IN);
180 case SHARPSL_STATUS_LOCK: 187 case SHARPSL_STATUS_LOCK:
181 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock); 188 return gpio_get_value(sharpsl_pm.machinfo->gpio_batlock);
182 case SHARPSL_STATUS_CHRGFULL: 189 case SHARPSL_STATUS_CHRGFULL:
diff --git a/arch/arm/mach-pxa/stargate2.c b/arch/arm/mach-pxa/stargate2.c
index 80d7f23ad0fd..d8a2467de92e 100644
--- a/arch/arm/mach-pxa/stargate2.c
+++ b/arch/arm/mach-pxa/stargate2.c
@@ -376,7 +376,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
376 .bus_num = 1, 376 .bus_num = 1,
377 .chip_select = 0, 377 .chip_select = 0,
378 .controller_data = &staccel_chip_info, 378 .controller_data = &staccel_chip_info,
379 .irq = IRQ_GPIO(96), 379 .irq = PXA_GPIO_TO_IRQ(96),
380 }, { 380 }, {
381 .modalias = "cc2420", 381 .modalias = "cc2420",
382 .max_speed_hz = 6500000, 382 .max_speed_hz = 6500000,
@@ -546,7 +546,7 @@ static struct i2c_board_info __initdata imote2_pwr_i2c_board_info[] = {
546 .type = "da9030", 546 .type = "da9030",
547 .addr = 0x49, 547 .addr = 0x49,
548 .platform_data = &imote2_da9030_pdata, 548 .platform_data = &imote2_da9030_pdata,
549 .irq = gpio_to_irq(1), 549 .irq = PXA_GPIO_TO_IRQ(1),
550 }, 550 },
551}; 551};
552 552
@@ -560,18 +560,18 @@ static struct i2c_board_info __initdata imote2_i2c_board_info[] = {
560 /* Through a nand gate - Also beware, on V2 sensor board the 560 /* Through a nand gate - Also beware, on V2 sensor board the
561 * pull up resistors are missing. 561 * pull up resistors are missing.
562 */ 562 */
563 .irq = IRQ_GPIO(99), 563 .irq = PXA_GPIO_TO_IRQ(99),
564 }, { /* ITS400 Sensor board only */ 564 }, { /* ITS400 Sensor board only */
565 .type = "tsl2561", 565 .type = "tsl2561",
566 .addr = 0x49, 566 .addr = 0x49,
567 /* Through a nand gate - Also beware, on V2 sensor board the 567 /* Through a nand gate - Also beware, on V2 sensor board the
568 * pull up resistors are missing. 568 * pull up resistors are missing.
569 */ 569 */
570 .irq = IRQ_GPIO(99), 570 .irq = PXA_GPIO_TO_IRQ(99),
571 }, { /* ITS400 Sensor board only */ 571 }, { /* ITS400 Sensor board only */
572 .type = "tmp175", 572 .type = "tmp175",
573 .addr = 0x4A, 573 .addr = 0x4A,
574 .irq = IRQ_GPIO(96), 574 .irq = PXA_GPIO_TO_IRQ(96),
575 }, { /* IMB400 Multimedia board */ 575 }, { /* IMB400 Multimedia board */
576 .type = "wm8940", 576 .type = "wm8940",
577 .addr = 0x1A, 577 .addr = 0x1A,
@@ -661,8 +661,8 @@ static struct resource smc91x_resources[] = {
661 .flags = IORESOURCE_MEM, 661 .flags = IORESOURCE_MEM,
662 }, 662 },
663 [1] = { 663 [1] = {
664 .start = IRQ_GPIO(40), 664 .start = PXA_GPIO_TO_IRQ(40),
665 .end = IRQ_GPIO(40), 665 .end = PXA_GPIO_TO_IRQ(40),
666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 666 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
667 } 667 }
668}; 668};
@@ -707,7 +707,7 @@ static int stargate2_mci_init(struct device *dev,
707 } 707 }
708 gpio_direction_input(SG2_GPIO_nSD_DETECT); 708 gpio_direction_input(SG2_GPIO_nSD_DETECT);
709 709
710 err = request_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), 710 err = request_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT),
711 stargate2_detect_int, 711 stargate2_detect_int,
712 IRQ_TYPE_EDGE_BOTH, 712 IRQ_TYPE_EDGE_BOTH,
713 "MMC card detect", 713 "MMC card detect",
@@ -738,7 +738,7 @@ static void stargate2_mci_setpower(struct device *dev, unsigned int vdd)
738 738
739static void stargate2_mci_exit(struct device *dev, void *data) 739static void stargate2_mci_exit(struct device *dev, void *data)
740{ 740{
741 free_irq(IRQ_GPIO(SG2_GPIO_nSD_DETECT), data); 741 free_irq(PXA_GPIO_TO_IRQ(SG2_GPIO_nSD_DETECT), data);
742 gpio_free(SG2_SD_POWER_ENABLE); 742 gpio_free(SG2_SD_POWER_ENABLE);
743 gpio_free(SG2_GPIO_nSD_DETECT); 743 gpio_free(SG2_GPIO_nSD_DETECT);
744} 744}
@@ -913,7 +913,7 @@ static struct i2c_board_info __initdata stargate2_pwr_i2c_board_info[] = {
913 .type = "da9030", 913 .type = "da9030",
914 .addr = 0x49, 914 .addr = 0x49,
915 .platform_data = &stargate2_da9030_pdata, 915 .platform_data = &stargate2_da9030_pdata,
916 .irq = gpio_to_irq(1), 916 .irq = PXA_GPIO_TO_IRQ(1),
917 }, 917 },
918}; 918};
919 919
@@ -938,18 +938,18 @@ static struct i2c_board_info __initdata stargate2_i2c_board_info[] = {
938 /* Through a nand gate - Also beware, on V2 sensor board the 938 /* Through a nand gate - Also beware, on V2 sensor board the
939 * pull up resistors are missing. 939 * pull up resistors are missing.
940 */ 940 */
941 .irq = IRQ_GPIO(99), 941 .irq = PXA_GPIO_TO_IRQ(99),
942 }, { /* ITS400 Sensor board only */ 942 }, { /* ITS400 Sensor board only */
943 .type = "tsl2561", 943 .type = "tsl2561",
944 .addr = 0x49, 944 .addr = 0x49,
945 /* Through a nand gate - Also beware, on V2 sensor board the 945 /* Through a nand gate - Also beware, on V2 sensor board the
946 * pull up resistors are missing. 946 * pull up resistors are missing.
947 */ 947 */
948 .irq = IRQ_GPIO(99), 948 .irq = PXA_GPIO_TO_IRQ(99),
949 }, { /* ITS400 Sensor board only */ 949 }, { /* ITS400 Sensor board only */
950 .type = "tmp175", 950 .type = "tmp175",
951 .addr = 0x4A, 951 .addr = 0x4A,
952 .irq = IRQ_GPIO(96), 952 .irq = PXA_GPIO_TO_IRQ(96),
953 }, 953 },
954}; 954};
955 955
diff --git a/arch/arm/mach-pxa/tavorevb.c b/arch/arm/mach-pxa/tavorevb.c
index 4fa36a3e383c..9fb38e80e076 100644
--- a/arch/arm/mach-pxa/tavorevb.c
+++ b/arch/arm/mach-pxa/tavorevb.c
@@ -85,8 +85,8 @@ static struct resource smc91x_resources[] = {
85 .flags = IORESOURCE_MEM, 85 .flags = IORESOURCE_MEM,
86 }, 86 },
87 [1] = { 87 [1] = {
88 .start = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 88 .start = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
89 .end = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO47)), 89 .end = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO47)),
90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 90 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
91 } 91 }
92}; 92};
diff --git a/arch/arm/mach-pxa/tavorevb3.c b/arch/arm/mach-pxa/tavorevb3.c
index 8a22879f0bb0..f7d9305cfd77 100644
--- a/arch/arm/mach-pxa/tavorevb3.c
+++ b/arch/arm/mach-pxa/tavorevb3.c
@@ -101,7 +101,7 @@ static struct i2c_board_info evb3_i2c_info[] = {
101 .type = "88PM860x", 101 .type = "88PM860x",
102 .addr = 0x34, 102 .addr = 0x34,
103 .platform_data = &evb3_pm8607_info, 103 .platform_data = &evb3_pm8607_info,
104 .irq = gpio_to_irq(mfp_to_gpio(MFP_PIN_GPIO83)), 104 .irq = PXA_GPIO_TO_IRQ(mfp_to_gpio(MFP_PIN_GPIO83)),
105 }, 105 },
106}; 106};
107 107
diff --git a/arch/arm/mach-pxa/tosa.c b/arch/arm/mach-pxa/tosa.c
index dfe40f8705aa..7ce5c436cc4e 100644
--- a/arch/arm/mach-pxa/tosa.c
+++ b/arch/arm/mach-pxa/tosa.c
@@ -404,8 +404,8 @@ static struct pda_power_pdata tosa_power_data = {
404static struct resource tosa_power_resource[] = { 404static struct resource tosa_power_resource[] = {
405 { 405 {
406 .name = "ac", 406 .name = "ac",
407 .start = gpio_to_irq(TOSA_GPIO_AC_IN), 407 .start = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
408 .end = gpio_to_irq(TOSA_GPIO_AC_IN), 408 .end = PXA_GPIO_TO_IRQ(TOSA_GPIO_AC_IN),
409 .flags = IORESOURCE_IRQ | 409 .flags = IORESOURCE_IRQ |
410 IORESOURCE_IRQ_HIGHEDGE | 410 IORESOURCE_IRQ_HIGHEDGE |
411 IORESOURCE_IRQ_LOWEDGE, 411 IORESOURCE_IRQ_LOWEDGE,
diff --git a/arch/arm/mach-pxa/viper.c b/arch/arm/mach-pxa/viper.c
index afe2b7495523..023d6ca789de 100644
--- a/arch/arm/mach-pxa/viper.c
+++ b/arch/arm/mach-pxa/viper.c
@@ -422,8 +422,8 @@ static struct resource smc91x_resources[] = {
422 .flags = IORESOURCE_MEM, 422 .flags = IORESOURCE_MEM,
423 }, 423 },
424 [1] = { 424 [1] = {
425 .start = gpio_to_irq(VIPER_ETH_GPIO), 425 .start = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
426 .end = gpio_to_irq(VIPER_ETH_GPIO), 426 .end = PXA_GPIO_TO_IRQ(VIPER_ETH_GPIO),
427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 427 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
428 }, 428 },
429 [2] = { 429 [2] = {
@@ -546,7 +546,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
546 /* External UARTs */ 546 /* External UARTs */
547 { 547 {
548 .mapbase = VIPER_UARTA_PHYS, 548 .mapbase = VIPER_UARTA_PHYS,
549 .irq = gpio_to_irq(VIPER_UARTA_GPIO), 549 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTA_GPIO),
550 .irqflags = IRQF_TRIGGER_RISING, 550 .irqflags = IRQF_TRIGGER_RISING,
551 .uartclk = 1843200, 551 .uartclk = 1843200,
552 .regshift = 1, 552 .regshift = 1,
@@ -556,7 +556,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
556 }, 556 },
557 { 557 {
558 .mapbase = VIPER_UARTB_PHYS, 558 .mapbase = VIPER_UARTB_PHYS,
559 .irq = gpio_to_irq(VIPER_UARTB_GPIO), 559 .irq = PXA_GPIO_TO_IRQ(VIPER_UARTB_GPIO),
560 .irqflags = IRQF_TRIGGER_RISING, 560 .irqflags = IRQF_TRIGGER_RISING,
561 .uartclk = 1843200, 561 .uartclk = 1843200,
562 .regshift = 1, 562 .regshift = 1,
@@ -596,8 +596,8 @@ static struct resource isp116x_resources[] = {
596 .flags = IORESOURCE_MEM, 596 .flags = IORESOURCE_MEM,
597 }, 597 },
598 [2] = { 598 [2] = {
599 .start = gpio_to_irq(VIPER_USB_GPIO), 599 .start = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
600 .end = gpio_to_irq(VIPER_USB_GPIO), 600 .end = PXA_GPIO_TO_IRQ(VIPER_USB_GPIO),
601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 601 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
602 }, 602 },
603}; 603};
diff --git a/arch/arm/mach-pxa/vpac270.c b/arch/arm/mach-pxa/vpac270.c
index fed5fb088714..1f5cfa96f6d6 100644
--- a/arch/arm/mach-pxa/vpac270.c
+++ b/arch/arm/mach-pxa/vpac270.c
@@ -395,8 +395,8 @@ static struct resource vpac270_dm9000_resources[] = {
395 .flags = IORESOURCE_MEM, 395 .flags = IORESOURCE_MEM,
396 }, 396 },
397 [2] = { 397 [2] = {
398 .start = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 398 .start = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
399 .end = IRQ_GPIO(GPIO114_VPAC270_ETH_IRQ), 399 .end = PXA_GPIO_TO_IRQ(GPIO114_VPAC270_ETH_IRQ),
400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 400 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
401 }, 401 },
402}; 402};
@@ -433,7 +433,7 @@ static pxa2xx_audio_ops_t vpac270_ac97_pdata = {
433}; 433};
434 434
435static struct ucb1400_pdata vpac270_ucb1400_pdata = { 435static struct ucb1400_pdata vpac270_ucb1400_pdata = {
436 .irq = IRQ_GPIO(GPIO113_VPAC270_TS_IRQ), 436 .irq = PXA_GPIO_TO_IRQ(GPIO113_VPAC270_TS_IRQ),
437}; 437};
438 438
439static struct platform_device vpac270_ucb1400_device = { 439static struct platform_device vpac270_ucb1400_device = {
@@ -610,8 +610,8 @@ static struct resource vpac270_ide_resources[] = {
610 .flags = IORESOURCE_DMA 610 .flags = IORESOURCE_DMA
611 }, 611 },
612 [3] = { /* IDE IRQ pin */ 612 [3] = { /* IDE IRQ pin */
613 .start = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 613 .start = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
614 .end = gpio_to_irq(GPIO36_VPAC270_IDE_IRQ), 614 .end = PXA_GPIO_TO_IRQ(GPIO36_VPAC270_IDE_IRQ),
615 .flags = IORESOURCE_IRQ 615 .flags = IORESOURCE_IRQ
616 } 616 }
617}; 617};
diff --git a/arch/arm/mach-pxa/z2.c b/arch/arm/mach-pxa/z2.c
index d75f66ab8c34..b6476848b561 100644
--- a/arch/arm/mach-pxa/z2.c
+++ b/arch/arm/mach-pxa/z2.c
@@ -573,7 +573,7 @@ static struct spi_board_info spi_board_info[] __initdata = {
573 .modalias = "libertas_spi", 573 .modalias = "libertas_spi",
574 .platform_data = &z2_lbs_pdata, 574 .platform_data = &z2_lbs_pdata,
575 .controller_data = &z2_lbs_chip_info, 575 .controller_data = &z2_lbs_chip_info,
576 .irq = gpio_to_irq(GPIO36_ZIPITZ2_WIFI_IRQ), 576 .irq = PXA_GPIO_TO_IRQ(GPIO36_ZIPITZ2_WIFI_IRQ),
577 .max_speed_hz = 13000000, 577 .max_speed_hz = 13000000,
578 .bus_num = 1, 578 .bus_num = 1,
579 .chip_select = 0, 579 .chip_select = 0,
diff --git a/arch/arm/mach-pxa/zeus.c b/arch/arm/mach-pxa/zeus.c
index 9db35a7fcfc0..a4dd1c347050 100644
--- a/arch/arm/mach-pxa/zeus.c
+++ b/arch/arm/mach-pxa/zeus.c
@@ -233,7 +233,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */ 233 /* FIXME: Shared IRQs on COM1-COM4 will not work properly on v1i1 hardware. */
234 { /* COM1 */ 234 { /* COM1 */
235 .mapbase = 0x10000000, 235 .mapbase = 0x10000000,
236 .irq = gpio_to_irq(ZEUS_UARTA_GPIO), 236 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTA_GPIO),
237 .irqflags = IRQF_TRIGGER_RISING, 237 .irqflags = IRQF_TRIGGER_RISING,
238 .uartclk = 14745600, 238 .uartclk = 14745600,
239 .regshift = 1, 239 .regshift = 1,
@@ -242,7 +242,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
242 }, 242 },
243 { /* COM2 */ 243 { /* COM2 */
244 .mapbase = 0x10800000, 244 .mapbase = 0x10800000,
245 .irq = gpio_to_irq(ZEUS_UARTB_GPIO), 245 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTB_GPIO),
246 .irqflags = IRQF_TRIGGER_RISING, 246 .irqflags = IRQF_TRIGGER_RISING,
247 .uartclk = 14745600, 247 .uartclk = 14745600,
248 .regshift = 1, 248 .regshift = 1,
@@ -251,7 +251,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
251 }, 251 },
252 { /* COM3 */ 252 { /* COM3 */
253 .mapbase = 0x11000000, 253 .mapbase = 0x11000000,
254 .irq = gpio_to_irq(ZEUS_UARTC_GPIO), 254 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTC_GPIO),
255 .irqflags = IRQF_TRIGGER_RISING, 255 .irqflags = IRQF_TRIGGER_RISING,
256 .uartclk = 14745600, 256 .uartclk = 14745600,
257 .regshift = 1, 257 .regshift = 1,
@@ -260,7 +260,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
260 }, 260 },
261 { /* COM4 */ 261 { /* COM4 */
262 .mapbase = 0x11800000, 262 .mapbase = 0x11800000,
263 .irq = gpio_to_irq(ZEUS_UARTD_GPIO), 263 .irq = PXA_GPIO_TO_IRQ(ZEUS_UARTD_GPIO),
264 .irqflags = IRQF_TRIGGER_RISING, 264 .irqflags = IRQF_TRIGGER_RISING,
265 .uartclk = 14745600, 265 .uartclk = 14745600,
266 .regshift = 1, 266 .regshift = 1,
@@ -321,8 +321,8 @@ static struct resource zeus_dm9k0_resource[] = {
321 .flags = IORESOURCE_MEM 321 .flags = IORESOURCE_MEM
322 }, 322 },
323 [2] = { 323 [2] = {
324 .start = gpio_to_irq(ZEUS_ETH0_GPIO), 324 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
325 .end = gpio_to_irq(ZEUS_ETH0_GPIO), 325 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH0_GPIO),
326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 326 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
327 }, 327 },
328}; 328};
@@ -339,8 +339,8 @@ static struct resource zeus_dm9k1_resource[] = {
339 .flags = IORESOURCE_MEM, 339 .flags = IORESOURCE_MEM,
340 }, 340 },
341 [2] = { 341 [2] = {
342 .start = gpio_to_irq(ZEUS_ETH1_GPIO), 342 .start = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
343 .end = gpio_to_irq(ZEUS_ETH1_GPIO), 343 .end = PXA_GPIO_TO_IRQ(ZEUS_ETH1_GPIO),
344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 344 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
345 }, 345 },
346}; 346};
@@ -423,7 +423,7 @@ static struct spi_board_info zeus_spi_board_info[] = {
423 [0] = { 423 [0] = {
424 .modalias = "mcp2515", 424 .modalias = "mcp2515",
425 .platform_data = &zeus_mcp2515_pdata, 425 .platform_data = &zeus_mcp2515_pdata,
426 .irq = gpio_to_irq(ZEUS_CAN_GPIO), 426 .irq = PXA_GPIO_TO_IRQ(ZEUS_CAN_GPIO),
427 .max_speed_hz = 1*1000*1000, 427 .max_speed_hz = 1*1000*1000,
428 .bus_num = 3, 428 .bus_num = 3,
429 .mode = SPI_MODE_0, 429 .mode = SPI_MODE_0,
@@ -753,7 +753,7 @@ static struct i2c_board_info __initdata zeus_i2c_devices[] = {
753 { 753 {
754 I2C_BOARD_INFO("pca9535", 0x20), 754 I2C_BOARD_INFO("pca9535", 0x20),
755 .platform_data = &zeus_pca953x_pdata[2], 755 .platform_data = &zeus_pca953x_pdata[2],
756 .irq = gpio_to_irq(ZEUS_EXTGPIO_GPIO), 756 .irq = PXA_GPIO_TO_IRQ(ZEUS_EXTGPIO_GPIO),
757 }, 757 },
758 { I2C_BOARD_INFO("lm75a", 0x48) }, 758 { I2C_BOARD_INFO("lm75a", 0x48) },
759 { I2C_BOARD_INFO("24c01", 0x50) }, 759 { I2C_BOARD_INFO("24c01", 0x50) },
diff --git a/arch/arm/mach-pxa/zylonite.c b/arch/arm/mach-pxa/zylonite.c
index 7678b1bf7903..98eec80623e3 100644
--- a/arch/arm/mach-pxa/zylonite.c
+++ b/arch/arm/mach-pxa/zylonite.c
@@ -408,8 +408,8 @@ static void __init zylonite_init(void)
408 * Note: We depend that the bootloader set 408 * Note: We depend that the bootloader set
409 * the correct value to MSC register for SMC91x. 409 * the correct value to MSC register for SMC91x.
410 */ 410 */
411 smc91x_resources[1].start = gpio_to_irq(gpio_eth_irq); 411 smc91x_resources[1].start = PXA_GPIO_TO_IRQ(gpio_eth_irq);
412 smc91x_resources[1].end = gpio_to_irq(gpio_eth_irq); 412 smc91x_resources[1].end = PXA_GPIO_TO_IRQ(gpio_eth_irq);
413 platform_device_register(&smc91x_device); 413 platform_device_register(&smc91x_device);
414 414
415 pxa_set_ac97_info(NULL); 415 pxa_set_ac97_info(NULL);
diff --git a/arch/arm/mach-pxa/zylonite_pxa300.c b/arch/arm/mach-pxa/zylonite_pxa300.c
index 93c64d8d7de9..86e59c043de2 100644
--- a/arch/arm/mach-pxa/zylonite_pxa300.c
+++ b/arch/arm/mach-pxa/zylonite_pxa300.c
@@ -231,12 +231,12 @@ static struct i2c_board_info zylonite_i2c_board_info[] = {
231 .type = "pca9539", 231 .type = "pca9539",
232 .addr = 0x74, 232 .addr = 0x74,
233 .platform_data = &gpio_exp[0], 233 .platform_data = &gpio_exp[0],
234 .irq = IRQ_GPIO(18), 234 .irq = PXA_GPIO_TO_IRQ(18),
235 }, { 235 }, {
236 .type = "pca9539", 236 .type = "pca9539",
237 .addr = 0x75, 237 .addr = 0x75,
238 .platform_data = &gpio_exp[1], 238 .platform_data = &gpio_exp[1],
239 .irq = IRQ_GPIO(19), 239 .irq = PXA_GPIO_TO_IRQ(19),
240 }, 240 },
241}; 241};
242 242
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
index dd8c85ef6dab..c87f6108eeb1 100644
--- a/arch/arm/mach-s5p64x0/Kconfig
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -41,6 +41,11 @@ config S5P64X0_SETUP_SPI
41 help 41 help
42 Common setup code for SPI GPIO configurations 42 Common setup code for SPI GPIO configurations
43 43
44config S5P64X0_SETUP_SDHCI_GPIO
45 bool
46 help
47 Common setup code for SDHCI gpio.
48
44# machine support 49# machine support
45 50
46config MACH_SMDK6440 51config MACH_SMDK6440
@@ -50,12 +55,16 @@ config MACH_SMDK6440
50 select S3C_DEV_I2C1 55 select S3C_DEV_I2C1
51 select S3C_DEV_RTC 56 select S3C_DEV_RTC
52 select S3C_DEV_WDT 57 select S3C_DEV_WDT
58 select S3C_DEV_HSMMC
59 select S3C_DEV_HSMMC1
60 select S3C_DEV_HSMMC2
53 select SAMSUNG_DEV_ADC 61 select SAMSUNG_DEV_ADC
54 select SAMSUNG_DEV_BACKLIGHT 62 select SAMSUNG_DEV_BACKLIGHT
55 select SAMSUNG_DEV_PWM 63 select SAMSUNG_DEV_PWM
56 select SAMSUNG_DEV_TS 64 select SAMSUNG_DEV_TS
57 select S5P64X0_SETUP_FB_24BPP 65 select S5P64X0_SETUP_FB_24BPP
58 select S5P64X0_SETUP_I2C1 66 select S5P64X0_SETUP_I2C1
67 select S5P64X0_SETUP_SDHCI_GPIO
59 help 68 help
60 Machine support for the Samsung SMDK6440 69 Machine support for the Samsung SMDK6440
61 70
@@ -66,13 +75,28 @@ config MACH_SMDK6450
66 select S3C_DEV_I2C1 75 select S3C_DEV_I2C1
67 select S3C_DEV_RTC 76 select S3C_DEV_RTC
68 select S3C_DEV_WDT 77 select S3C_DEV_WDT
78 select S3C_DEV_HSMMC
79 select S3C_DEV_HSMMC1
80 select S3C_DEV_HSMMC2
69 select SAMSUNG_DEV_ADC 81 select SAMSUNG_DEV_ADC
70 select SAMSUNG_DEV_BACKLIGHT 82 select SAMSUNG_DEV_BACKLIGHT
71 select SAMSUNG_DEV_PWM 83 select SAMSUNG_DEV_PWM
72 select SAMSUNG_DEV_TS 84 select SAMSUNG_DEV_TS
73 select S5P64X0_SETUP_FB_24BPP 85 select S5P64X0_SETUP_FB_24BPP
74 select S5P64X0_SETUP_I2C1 86 select S5P64X0_SETUP_I2C1
87 select S5P64X0_SETUP_SDHCI_GPIO
75 help 88 help
76 Machine support for the Samsung SMDK6450 89 Machine support for the Samsung SMDK6450
77 90
91menu "Use 8-bit SDHCI bus width"
92
93config S5P64X0_SD_CH1_8BIT
94 bool "SDHCI Channel 1 (Slot 1)"
95 depends on MACH_SMDK6450 || MACH_SMDK6440
96 help
97 Support SDHCI Channel 1 8-bit bus.
98 If selected, Channel 2 is disabled.
99
100endmenu
101
78endif 102endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
index e167ca136f5d..12bb951187a4 100644
--- a/arch/arm/mach-s5p64x0/Makefile
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -33,3 +33,4 @@ obj-y += setup-i2c0.o
33obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o 33obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
34obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o 34obj-$(CONFIG_S5P64X0_SETUP_FB_24BPP) += setup-fb-24bpp.o
35obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o 35obj-$(CONFIG_S5P64X0_SETUP_SPI) += setup-spi.o
36obj-$(CONFIG_S5P64X0_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 925d2daa60c7..ee1e8e7f5631 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -380,36 +380,6 @@ static struct clksrc_sources clkset_audio = {
380static struct clksrc_clk clksrcs[] = { 380static struct clksrc_clk clksrcs[] = {
381 { 381 {
382 .clk = { 382 .clk = {
383 .name = "sclk_mmc",
384 .devname = "s3c-sdhci.0",
385 .ctrlbit = (1 << 24),
386 .enable = s5p64x0_sclk_ctrl,
387 },
388 .sources = &clkset_group1,
389 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
390 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
391 }, {
392 .clk = {
393 .name = "sclk_mmc",
394 .devname = "s3c-sdhci.1",
395 .ctrlbit = (1 << 25),
396 .enable = s5p64x0_sclk_ctrl,
397 },
398 .sources = &clkset_group1,
399 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
400 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
401 }, {
402 .clk = {
403 .name = "sclk_mmc",
404 .devname = "s3c-sdhci.2",
405 .ctrlbit = (1 << 26),
406 .enable = s5p64x0_sclk_ctrl,
407 },
408 .sources = &clkset_group1,
409 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
410 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
411 }, {
412 .clk = {
413 .name = "sclk_post", 383 .name = "sclk_post",
414 .ctrlbit = (1 << 10), 384 .ctrlbit = (1 << 10),
415 .enable = s5p64x0_sclk_ctrl, 385 .enable = s5p64x0_sclk_ctrl,
@@ -447,6 +417,42 @@ static struct clksrc_clk clksrcs[] = {
447 }, 417 },
448}; 418};
449 419
420static struct clksrc_clk clk_sclk_mmc0 = {
421 .clk = {
422 .name = "sclk_mmc",
423 .devname = "s3c-sdhci.0",
424 .ctrlbit = (1 << 24),
425 .enable = s5p64x0_sclk_ctrl,
426 },
427 .sources = &clkset_group1,
428 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
429 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
430};
431
432static struct clksrc_clk clk_sclk_mmc1 = {
433 .clk = {
434 .name = "sclk_mmc",
435 .devname = "s3c-sdhci.1",
436 .ctrlbit = (1 << 25),
437 .enable = s5p64x0_sclk_ctrl,
438 },
439 .sources = &clkset_group1,
440 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
441 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
442};
443
444static struct clksrc_clk clk_sclk_mmc2 = {
445 .clk = {
446 .name = "sclk_mmc",
447 .devname = "s3c-sdhci.2",
448 .ctrlbit = (1 << 26),
449 .enable = s5p64x0_sclk_ctrl,
450 },
451 .sources = &clkset_group1,
452 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
453 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
454};
455
450static struct clksrc_clk clk_sclk_uclk = { 456static struct clksrc_clk clk_sclk_uclk = {
451 .clk = { 457 .clk = {
452 .name = "uclk1", 458 .name = "uclk1",
@@ -504,6 +510,9 @@ static struct clksrc_clk *clksrc_cdev[] = {
504 &clk_sclk_uclk, 510 &clk_sclk_uclk,
505 &clk_sclk_spi0, 511 &clk_sclk_spi0,
506 &clk_sclk_spi1, 512 &clk_sclk_spi1,
513 &clk_sclk_mmc0,
514 &clk_sclk_mmc1,
515 &clk_sclk_mmc2
507}; 516};
508 517
509static struct clk_lookup s5p6440_clk_lookup[] = { 518static struct clk_lookup s5p6440_clk_lookup[] = {
@@ -512,6 +521,9 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
512 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), 521 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
513 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), 522 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
514 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 523 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
524 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
525 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
526 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
515}; 527};
516 528
517void __init_or_cpufreq s5p6440_setup_clocks(void) 529void __init_or_cpufreq s5p6440_setup_clocks(void)
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index c390a59f68ac..dae6a13f43bb 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -414,36 +414,6 @@ static struct clksrc_clk clk_sclk_audio0 = {
414static struct clksrc_clk clksrcs[] = { 414static struct clksrc_clk clksrcs[] = {
415 { 415 {
416 .clk = { 416 .clk = {
417 .name = "sclk_mmc",
418 .devname = "s3c-sdhci.0",
419 .ctrlbit = (1 << 24),
420 .enable = s5p64x0_sclk_ctrl,
421 },
422 .sources = &clkset_group2,
423 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
424 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
425 }, {
426 .clk = {
427 .name = "sclk_mmc",
428 .devname = "s3c-sdhci.1",
429 .ctrlbit = (1 << 25),
430 .enable = s5p64x0_sclk_ctrl,
431 },
432 .sources = &clkset_group2,
433 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
434 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
435 }, {
436 .clk = {
437 .name = "sclk_mmc",
438 .devname = "s3c-sdhci.2",
439 .ctrlbit = (1 << 26),
440 .enable = s5p64x0_sclk_ctrl,
441 },
442 .sources = &clkset_group2,
443 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
444 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
445 }, {
446 .clk = {
447 .name = "sclk_fimc", 417 .name = "sclk_fimc",
448 .ctrlbit = (1 << 10), 418 .ctrlbit = (1 << 10),
449 .enable = s5p64x0_sclk_ctrl, 419 .enable = s5p64x0_sclk_ctrl,
@@ -508,6 +478,42 @@ static struct clksrc_clk clksrcs[] = {
508 }, 478 },
509}; 479};
510 480
481static struct clksrc_clk clk_sclk_mmc0 = {
482 .clk = {
483 .name = "sclk_mmc",
484 .devname = "s3c-sdhci.0",
485 .ctrlbit = (1 << 24),
486 .enable = s5p64x0_sclk_ctrl,
487 },
488 .sources = &clkset_group2,
489 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
490 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
491};
492
493static struct clksrc_clk clk_sclk_mmc1 = {
494 .clk = {
495 .name = "sclk_mmc",
496 .devname = "s3c-sdhci.1",
497 .ctrlbit = (1 << 25),
498 .enable = s5p64x0_sclk_ctrl,
499 },
500 .sources = &clkset_group2,
501 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
502 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
503};
504
505static struct clksrc_clk clk_sclk_mmc2 = {
506 .clk = {
507 .name = "sclk_mmc",
508 .devname = "s3c-sdhci.2",
509 .ctrlbit = (1 << 26),
510 .enable = s5p64x0_sclk_ctrl,
511 },
512 .sources = &clkset_group2,
513 .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
514 .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
515};
516
511static struct clksrc_clk clk_sclk_uclk = { 517static struct clksrc_clk clk_sclk_uclk = {
512 .clk = { 518 .clk = {
513 .name = "uclk1", 519 .name = "uclk1",
@@ -547,6 +553,9 @@ static struct clksrc_clk *clksrc_cdev[] = {
547 &clk_sclk_uclk, 553 &clk_sclk_uclk,
548 &clk_sclk_spi0, 554 &clk_sclk_spi0,
549 &clk_sclk_spi1, 555 &clk_sclk_spi1,
556 &clk_sclk_mmc0,
557 &clk_sclk_mmc1,
558 &clk_sclk_mmc2,
550}; 559};
551 560
552static struct clk_lookup s5p6450_clk_lookup[] = { 561static struct clk_lookup s5p6450_clk_lookup[] = {
@@ -555,6 +564,9 @@ static struct clk_lookup s5p6450_clk_lookup[] = {
555 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p), 564 CLKDEV_INIT(NULL, "spi_busclk0", &clk_p),
556 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk), 565 CLKDEV_INIT("s3c64xx-spi.0", "spi_busclk1", &clk_sclk_spi0.clk),
557 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 566 CLKDEV_INIT("s3c64xx-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
567 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
568 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
569 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
558}; 570};
559 571
560/* Clock initialization code */ 572/* Clock initialization code */
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c
index 0d50e79fb9fc..52b89a376447 100644
--- a/arch/arm/mach-s5p64x0/common.c
+++ b/arch/arm/mach-s5p64x0/common.c
@@ -40,6 +40,7 @@
40#include <plat/clock.h> 40#include <plat/clock.h>
41#include <plat/devs.h> 41#include <plat/devs.h>
42#include <plat/pm.h> 42#include <plat/pm.h>
43#include <plat/sdhci.h>
43#include <plat/adc-core.h> 44#include <plat/adc-core.h>
44#include <plat/fb-core.h> 45#include <plat/fb-core.h>
45#include <plat/gpio-cfg.h> 46#include <plat/gpio-cfg.h>
@@ -181,6 +182,10 @@ void __init s5p6440_map_io(void)
181 s3c_adc_setname("s3c64xx-adc"); 182 s3c_adc_setname("s3c64xx-adc");
182 s3c_fb_setname("s5p64x0-fb"); 183 s3c_fb_setname("s5p64x0-fb");
183 184
185 s5p64x0_default_sdhci0();
186 s5p64x0_default_sdhci1();
187 s5p6440_default_sdhci2();
188
184 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc)); 189 iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
185 init_consistent_dma_size(SZ_8M); 190 init_consistent_dma_size(SZ_8M);
186} 191}
@@ -191,6 +196,10 @@ void __init s5p6450_map_io(void)
191 s3c_adc_setname("s3c64xx-adc"); 196 s3c_adc_setname("s3c64xx-adc");
192 s3c_fb_setname("s5p64x0-fb"); 197 s3c_fb_setname("s5p64x0-fb");
193 198
199 s5p64x0_default_sdhci0();
200 s5p64x0_default_sdhci1();
201 s5p6450_default_sdhci2();
202
194 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc)); 203 iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6450_iodesc));
195 init_consistent_dma_size(SZ_8M); 204 init_consistent_dma_size(SZ_8M);
196} 205}
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
index 34d98a1dae57..a40e325d62c8 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/pwm_backlight.h> 25#include <linux/pwm_backlight.h>
26#include <linux/fb.h> 26#include <linux/fb.h>
27#include <linux/mmc/host.h>
27 28
28#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
29 30
@@ -52,6 +53,7 @@
52#include <plat/backlight.h> 53#include <plat/backlight.h>
53#include <plat/fb.h> 54#include <plat/fb.h>
54#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h>
55 57
56#include "common.h" 58#include "common.h"
57 59
@@ -163,6 +165,25 @@ static struct platform_device *smdk6440_devices[] __initdata = {
163 &s5p6440_device_iis, 165 &s5p6440_device_iis,
164 &s3c_device_fb, 166 &s3c_device_fb,
165 &smdk6440_lcd_lte480wv, 167 &smdk6440_lcd_lte480wv,
168 &s3c_device_hsmmc0,
169 &s3c_device_hsmmc1,
170 &s3c_device_hsmmc2,
171};
172
173static struct s3c_sdhci_platdata smdk6440_hsmmc0_pdata __initdata = {
174 .cd_type = S3C_SDHCI_CD_NONE,
175};
176
177static struct s3c_sdhci_platdata smdk6440_hsmmc1_pdata __initdata = {
178 .cd_type = S3C_SDHCI_CD_INTERNAL,
179#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
180 .max_width = 8,
181 .host_caps = MMC_CAP_8_BIT_DATA,
182#endif
183};
184
185static struct s3c_sdhci_platdata smdk6440_hsmmc2_pdata __initdata = {
186 .cd_type = S3C_SDHCI_CD_NONE,
166}; 187};
167 188
168static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = { 189static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
@@ -236,6 +257,10 @@ static void __init smdk6440_machine_init(void)
236 s5p6440_set_lcd_interface(); 257 s5p6440_set_lcd_interface();
237 s3c_fb_set_platdata(&smdk6440_lcd_pdata); 258 s3c_fb_set_platdata(&smdk6440_lcd_pdata);
238 259
260 s3c_sdhci0_set_platdata(&smdk6440_hsmmc0_pdata);
261 s3c_sdhci1_set_platdata(&smdk6440_hsmmc1_pdata);
262 s3c_sdhci2_set_platdata(&smdk6440_hsmmc2_pdata);
263
239 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices)); 264 platform_add_devices(smdk6440_devices, ARRAY_SIZE(smdk6440_devices));
240} 265}
241 266
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
index 135cf5d84737..efb69e2f2afe 100644
--- a/arch/arm/mach-s5p64x0/mach-smdk6450.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -24,6 +24,7 @@
24#include <linux/gpio.h> 24#include <linux/gpio.h>
25#include <linux/pwm_backlight.h> 25#include <linux/pwm_backlight.h>
26#include <linux/fb.h> 26#include <linux/fb.h>
27#include <linux/mmc/host.h>
27 28
28#include <video/platform_lcd.h> 29#include <video/platform_lcd.h>
29 30
@@ -52,6 +53,7 @@
52#include <plat/backlight.h> 53#include <plat/backlight.h>
53#include <plat/fb.h> 54#include <plat/fb.h>
54#include <plat/regs-fb.h> 55#include <plat/regs-fb.h>
56#include <plat/sdhci.h>
55 57
56#include "common.h" 58#include "common.h"
57 59
@@ -181,10 +183,28 @@ static struct platform_device *smdk6450_devices[] __initdata = {
181 &s5p6450_device_iis0, 183 &s5p6450_device_iis0,
182 &s3c_device_fb, 184 &s3c_device_fb,
183 &smdk6450_lcd_lte480wv, 185 &smdk6450_lcd_lte480wv,
184 186 &s3c_device_hsmmc0,
187 &s3c_device_hsmmc1,
188 &s3c_device_hsmmc2,
185 /* s5p6450_device_spi0 will be added */ 189 /* s5p6450_device_spi0 will be added */
186}; 190};
187 191
192static struct s3c_sdhci_platdata smdk6450_hsmmc0_pdata __initdata = {
193 .cd_type = S3C_SDHCI_CD_NONE,
194};
195
196static struct s3c_sdhci_platdata smdk6450_hsmmc1_pdata __initdata = {
197 .cd_type = S3C_SDHCI_CD_NONE,
198#if defined(CONFIG_S5P64X0_SD_CH1_8BIT)
199 .max_width = 8,
200 .host_caps = MMC_CAP_8_BIT_DATA,
201#endif
202};
203
204static struct s3c_sdhci_platdata smdk6450_hsmmc2_pdata __initdata = {
205 .cd_type = S3C_SDHCI_CD_NONE,
206};
207
188static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = { 208static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
189 .flags = 0, 209 .flags = 0,
190 .slave_addr = 0x10, 210 .slave_addr = 0x10,
@@ -256,6 +276,10 @@ static void __init smdk6450_machine_init(void)
256 s5p6450_set_lcd_interface(); 276 s5p6450_set_lcd_interface();
257 s3c_fb_set_platdata(&smdk6450_lcd_pdata); 277 s3c_fb_set_platdata(&smdk6450_lcd_pdata);
258 278
279 s3c_sdhci0_set_platdata(&smdk6450_hsmmc0_pdata);
280 s3c_sdhci1_set_platdata(&smdk6450_hsmmc1_pdata);
281 s3c_sdhci2_set_platdata(&smdk6450_hsmmc2_pdata);
282
259 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices)); 283 platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
260} 284}
261 285
diff --git a/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
new file mode 100644
index 000000000000..8410af0d12bf
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
@@ -0,0 +1,104 @@
1/* linux/arch/arm/mach-s5p64x0/setup-sdhci-gpio.c
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P64X0 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/platform_device.h>
14#include <linux/io.h>
15#include <linux/gpio.h>
16
17#include <mach/regs-gpio.h>
18#include <mach/regs-clock.h>
19
20#include <plat/gpio-cfg.h>
21#include <plat/sdhci.h>
22#include <plat/cpu.h>
23
24void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
25{
26 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
27
28 /* Set all the necessary GPG pins to special-function 2 */
29 if (soc_is_s5p6450())
30 s3c_gpio_cfgrange_nopull(S5P6450_GPG(0), 2 + width,
31 S3C_GPIO_SFN(2));
32 else
33 s3c_gpio_cfgrange_nopull(S5P6440_GPG(0), 2 + width,
34 S3C_GPIO_SFN(2));
35
36 /* Set GPG[6] pin to special-function 2 - MMC0 CDn */
37 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
38 if (soc_is_s5p6450()) {
39 s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
40 s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(2));
41 } else {
42 s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
43 s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(2));
44 }
45 }
46}
47
48void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
49{
50 struct s3c_sdhci_platdata *pdata = dev->dev.platform_data;
51
52 /* Set GPH[0:1] pins to special-function 2 - CLK and CMD */
53 if (soc_is_s5p6450())
54 s3c_gpio_cfgrange_nopull(S5P6450_GPH(0), 2, S3C_GPIO_SFN(2));
55 else
56 s3c_gpio_cfgrange_nopull(S5P6440_GPH(0), 2 , S3C_GPIO_SFN(2));
57
58 switch (width) {
59 case 8:
60 /* Set data pins GPH[6:9] special-function 2 */
61 if (soc_is_s5p6450())
62 s3c_gpio_cfgrange_nopull(S5P6450_GPH(6), 4,
63 S3C_GPIO_SFN(2));
64 else
65 s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4,
66 S3C_GPIO_SFN(2));
67 case 4:
68 /* set data pins GPH[2:5] special-function 2 */
69 if (soc_is_s5p6450())
70 s3c_gpio_cfgrange_nopull(S5P6450_GPH(2), 4,
71 S3C_GPIO_SFN(2));
72 else
73 s3c_gpio_cfgrange_nopull(S5P6440_GPH(2), 4,
74 S3C_GPIO_SFN(2));
75 default:
76 break;
77 }
78
79 /* Set GPG[6] pin to special-funtion 3 : MMC1 CDn */
80 if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
81 if (soc_is_s5p6450()) {
82 s3c_gpio_setpull(S5P6450_GPG(6), S3C_GPIO_PULL_UP);
83 s3c_gpio_cfgpin(S5P6450_GPG(6), S3C_GPIO_SFN(3));
84 } else {
85 s3c_gpio_setpull(S5P6440_GPG(6), S3C_GPIO_PULL_UP);
86 s3c_gpio_cfgpin(S5P6440_GPG(6), S3C_GPIO_SFN(3));
87 }
88 }
89}
90
91void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
92{
93 /* Set GPC[4:5] pins to special-function 3 - CLK and CMD */
94 s3c_gpio_cfgrange_nopull(S5P6440_GPC(4), 2, S3C_GPIO_SFN(3));
95
96 /* Set data pins GPH[6:9] pins to special-function 3 */
97 s3c_gpio_cfgrange_nopull(S5P6440_GPH(6), 4, S3C_GPIO_SFN(3));
98}
99
100void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *dev, int width)
101{
102 /* Set all the necessary GPG pins to special-function 3 */
103 s3c_gpio_cfgrange_nopull(S5P6450_GPG(7), 2 + width, S3C_GPIO_SFN(3));
104}
diff --git a/arch/arm/mach-sa1100/clock.c b/arch/arm/mach-sa1100/clock.c
index dab3c6347a8f..d6df9f6c9f7e 100644
--- a/arch/arm/mach-sa1100/clock.c
+++ b/arch/arm/mach-sa1100/clock.c
@@ -11,17 +11,39 @@
11#include <linux/clk.h> 11#include <linux/clk.h>
12#include <linux/spinlock.h> 12#include <linux/spinlock.h>
13#include <linux/mutex.h> 13#include <linux/mutex.h>
14#include <linux/io.h>
15#include <linux/clkdev.h>
14 16
15#include <mach/hardware.h> 17#include <mach/hardware.h>
16 18
17/* 19struct clkops {
18 * Very simple clock implementation - we only have one clock to deal with. 20 void (*enable)(struct clk *);
19 */ 21 void (*disable)(struct clk *);
22 unsigned long (*getrate)(struct clk *);
23};
24
20struct clk { 25struct clk {
26 const struct clkops *ops;
27 unsigned long rate;
21 unsigned int enabled; 28 unsigned int enabled;
22}; 29};
23 30
24static void clk_gpio27_enable(void) 31#define INIT_CLKREG(_clk, _devname, _conname) \
32 { \
33 .clk = _clk, \
34 .dev_id = _devname, \
35 .con_id = _conname, \
36 }
37
38#define DEFINE_CLK(_name, _ops, _rate) \
39struct clk clk_##_name = { \
40 .ops = _ops, \
41 .rate = _rate, \
42 }
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46static void clk_gpio27_enable(struct clk *clk)
25{ 47{
26 /* 48 /*
27 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111: 49 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
@@ -32,38 +54,22 @@ static void clk_gpio27_enable(void)
32 TUCR = TUCR_3_6864MHz; 54 TUCR = TUCR_3_6864MHz;
33} 55}
34 56
35static void clk_gpio27_disable(void) 57static void clk_gpio27_disable(struct clk *clk)
36{ 58{
37 TUCR = 0; 59 TUCR = 0;
38 GPDR &= ~GPIO_32_768kHz; 60 GPDR &= ~GPIO_32_768kHz;
39 GAFR &= ~GPIO_32_768kHz; 61 GAFR &= ~GPIO_32_768kHz;
40} 62}
41 63
42static struct clk clk_gpio27;
43
44static DEFINE_SPINLOCK(clocks_lock);
45
46struct clk *clk_get(struct device *dev, const char *id)
47{
48 const char *devname = dev_name(dev);
49
50 return strcmp(devname, "sa1111.0") ? ERR_PTR(-ENOENT) : &clk_gpio27;
51}
52EXPORT_SYMBOL(clk_get);
53
54void clk_put(struct clk *clk)
55{
56}
57EXPORT_SYMBOL(clk_put);
58
59int clk_enable(struct clk *clk) 64int clk_enable(struct clk *clk)
60{ 65{
61 unsigned long flags; 66 unsigned long flags;
62 67
63 spin_lock_irqsave(&clocks_lock, flags); 68 spin_lock_irqsave(&clocks_lock, flags);
64 if (clk->enabled++ == 0) 69 if (clk->enabled++ == 0)
65 clk_gpio27_enable(); 70 clk->ops->enable(clk);
66 spin_unlock_irqrestore(&clocks_lock, flags); 71 spin_unlock_irqrestore(&clocks_lock, flags);
72
67 return 0; 73 return 0;
68} 74}
69EXPORT_SYMBOL(clk_enable); 75EXPORT_SYMBOL(clk_enable);
@@ -76,13 +82,48 @@ void clk_disable(struct clk *clk)
76 82
77 spin_lock_irqsave(&clocks_lock, flags); 83 spin_lock_irqsave(&clocks_lock, flags);
78 if (--clk->enabled == 0) 84 if (--clk->enabled == 0)
79 clk_gpio27_disable(); 85 clk->ops->disable(clk);
80 spin_unlock_irqrestore(&clocks_lock, flags); 86 spin_unlock_irqrestore(&clocks_lock, flags);
81} 87}
82EXPORT_SYMBOL(clk_disable); 88EXPORT_SYMBOL(clk_disable);
83 89
84unsigned long clk_get_rate(struct clk *clk) 90unsigned long clk_get_rate(struct clk *clk)
85{ 91{
86 return 3686400; 92 unsigned long rate;
93
94 rate = clk->rate;
95 if (clk->ops->getrate)
96 rate = clk->ops->getrate(clk);
97
98 return rate;
87} 99}
88EXPORT_SYMBOL(clk_get_rate); 100EXPORT_SYMBOL(clk_get_rate);
101
102const struct clkops clk_gpio27_ops = {
103 .enable = clk_gpio27_enable,
104 .disable = clk_gpio27_disable,
105};
106
107static void clk_dummy_enable(struct clk *clk) { }
108static void clk_dummy_disable(struct clk *clk) { }
109
110const struct clkops clk_dummy_ops = {
111 .enable = clk_dummy_enable,
112 .disable = clk_dummy_disable,
113};
114
115static DEFINE_CLK(gpio27, &clk_gpio27_ops, 3686400);
116static DEFINE_CLK(dummy, &clk_dummy_ops, 0);
117
118static struct clk_lookup sa11xx_clkregs[] = {
119 INIT_CLKREG(&clk_gpio27, "sa1111.0", NULL),
120 INIT_CLKREG(&clk_dummy, "sa1100-rtc", NULL),
121};
122
123static int __init sa11xx_clk_init(void)
124{
125 clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
126 return 0;
127}
128
129postcore_initcall(sa11xx_clk_init);
diff --git a/arch/arm/mach-sa1100/generic.c b/arch/arm/mach-sa1100/generic.c
index bb10ee2cb89f..480d2ea46b00 100644
--- a/arch/arm/mach-sa1100/generic.c
+++ b/arch/arm/mach-sa1100/generic.c
@@ -345,9 +345,29 @@ void sa11x0_register_irda(struct irda_platform_data *irda)
345 sa11x0_register_device(&sa11x0ir_device, irda); 345 sa11x0_register_device(&sa11x0ir_device, irda);
346} 346}
347 347
348static struct resource sa11x0rtc_resources[] = {
349 [0] = {
350 .start = 0x90010000,
351 .end = 0x900100ff,
352 .flags = IORESOURCE_MEM,
353 },
354 [1] = {
355 .start = IRQ_RTC1Hz,
356 .end = IRQ_RTC1Hz,
357 .flags = IORESOURCE_IRQ,
358 },
359 [2] = {
360 .start = IRQ_RTCAlrm,
361 .end = IRQ_RTCAlrm,
362 .flags = IORESOURCE_IRQ,
363 },
364};
365
348static struct platform_device sa11x0rtc_device = { 366static struct platform_device sa11x0rtc_device = {
349 .name = "sa1100-rtc", 367 .name = "sa1100-rtc",
350 .id = -1, 368 .id = -1,
369 .resource = sa11x0rtc_resources,
370 .num_resources = ARRAY_SIZE(sa11x0rtc_resources),
351}; 371};
352 372
353static struct platform_device *sa11x0_devices[] __initdata = { 373static struct platform_device *sa11x0_devices[] __initdata = {
diff --git a/arch/arm/plat-omap/include/plat/mmc.h b/arch/arm/plat-omap/include/plat/mmc.h
index 94cf70afb236..f75946c3293d 100644
--- a/arch/arm/plat-omap/include/plat/mmc.h
+++ b/arch/arm/plat-omap/include/plat/mmc.h
@@ -96,6 +96,7 @@ struct omap_mmc_platform_data {
96 */ 96 */
97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */ 97 u8 wires; /* Used for the MMC driver on omap1 and 2420 */
98 u32 caps; /* Used for the MMC driver on 2430 and later */ 98 u32 caps; /* Used for the MMC driver on 2430 and later */
99 u32 pm_caps; /* PM capabilities of the mmc */
99 100
100 /* 101 /*
101 * nomux means "standard" muxing is wrong on this board, and 102 * nomux means "standard" muxing is wrong on this board, and
diff --git a/arch/arm/plat-omap/include/plat/usb.h b/arch/arm/plat-omap/include/plat/usb.h
index c616385f27bd..dc864b580da0 100644
--- a/arch/arm/plat-omap/include/plat/usb.h
+++ b/arch/arm/plat-omap/include/plat/usb.h
@@ -100,9 +100,6 @@ extern void usb_musb_init(struct omap_musb_board_data *board_data);
100 100
101extern void usbhs_init(const struct usbhs_omap_board_data *pdata); 101extern void usbhs_init(const struct usbhs_omap_board_data *pdata);
102 102
103extern int omap_usbhs_enable(struct device *dev);
104extern void omap_usbhs_disable(struct device *dev);
105
106extern int omap4430_phy_power(struct device *dev, int ID, int on); 103extern int omap4430_phy_power(struct device *dev, int ID, int on);
107extern int omap4430_phy_set_clk(struct device *dev, int on); 104extern int omap4430_phy_set_clk(struct device *dev, int on);
108extern int omap4430_phy_init(struct device *dev); 105extern int omap4430_phy_init(struct device *dev);
diff --git a/arch/arm/plat-pxa/include/plat/gpio-pxa.h b/arch/arm/plat-pxa/include/plat/gpio-pxa.h
deleted file mode 100644
index b6390beff323..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio-pxa.h
+++ /dev/null
@@ -1,44 +0,0 @@
1#ifndef __PLAT_PXA_GPIO_H
2#define __PLAT_PXA_GPIO_H
3
4struct irq_data;
5
6/*
7 * We handle the GPIOs by banks, each bank covers up to 32 GPIOs with
8 * one set of registers. The register offsets are organized below:
9 *
10 * GPLR GPDR GPSR GPCR GRER GFER GEDR
11 * BANK 0 - 0x0000 0x000C 0x0018 0x0024 0x0030 0x003C 0x0048
12 * BANK 1 - 0x0004 0x0010 0x001C 0x0028 0x0034 0x0040 0x004C
13 * BANK 2 - 0x0008 0x0014 0x0020 0x002C 0x0038 0x0044 0x0050
14 *
15 * BANK 3 - 0x0100 0x010C 0x0118 0x0124 0x0130 0x013C 0x0148
16 * BANK 4 - 0x0104 0x0110 0x011C 0x0128 0x0134 0x0140 0x014C
17 * BANK 5 - 0x0108 0x0114 0x0120 0x012C 0x0138 0x0144 0x0150
18 *
19 * NOTE:
20 * BANK 3 is only available on PXA27x and later processors.
21 * BANK 4 and 5 are only available on PXA935
22 */
23
24#define GPIO_BANK(n) (GPIO_REGS_VIRT + BANK_OFF(n))
25
26#define GPLR_OFFSET 0x00
27#define GPDR_OFFSET 0x0C
28#define GPSR_OFFSET 0x18
29#define GPCR_OFFSET 0x24
30#define GRER_OFFSET 0x30
31#define GFER_OFFSET 0x3C
32#define GEDR_OFFSET 0x48
33
34/* NOTE: some PXAs have fewer on-chip GPIOs (like PXA255, with 85).
35 * Those cases currently cause holes in the GPIO number space, the
36 * actual number of the last GPIO is recorded by 'pxa_last_gpio'.
37 */
38extern int pxa_last_gpio;
39
40typedef int (*set_wake_t)(struct irq_data *d, unsigned int on);
41
42extern void pxa_init_gpio(int mux_irq, int start, int end, set_wake_t fn);
43
44#endif /* __PLAT_PXA_GPIO_H */
diff --git a/arch/arm/plat-pxa/include/plat/gpio.h b/arch/arm/plat-pxa/include/plat/gpio.h
deleted file mode 100644
index 258f77210b02..000000000000
--- a/arch/arm/plat-pxa/include/plat/gpio.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __PLAT_GPIO_H
2#define __PLAT_GPIO_H
3
4#define __ARM_GPIOLIB_COMPLEX
5
6/* The individual machine provides register offsets and NR_BUILTIN_GPIO */
7#include <mach/gpio-pxa.h>
8
9static inline int gpio_get_value(unsigned gpio)
10{
11 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO))
12 return GPLR(gpio) & GPIO_bit(gpio);
13 else
14 return __gpio_get_value(gpio);
15}
16
17static inline void gpio_set_value(unsigned gpio, int value)
18{
19 if (__builtin_constant_p(gpio) && (gpio < NR_BUILTIN_GPIO)) {
20 if (value)
21 GPSR(gpio) = GPIO_bit(gpio);
22 else
23 GPCR(gpio) = GPIO_bit(gpio);
24 } else
25 __gpio_set_value(gpio, value);
26}
27
28#define gpio_cansleep __gpio_cansleep
29
30#endif /* __PLAT_GPIO_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 83b1e31696d9..4214ea0ff8fe 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -123,6 +123,7 @@ extern struct platform_device exynos4_device_dwmci;
123extern struct platform_device exynos4_device_i2s0; 123extern struct platform_device exynos4_device_i2s0;
124extern struct platform_device exynos4_device_i2s1; 124extern struct platform_device exynos4_device_i2s1;
125extern struct platform_device exynos4_device_i2s2; 125extern struct platform_device exynos4_device_i2s2;
126extern struct platform_device exynos4_device_ohci;
126extern struct platform_device exynos4_device_pcm0; 127extern struct platform_device exynos4_device_pcm0;
127extern struct platform_device exynos4_device_pcm1; 128extern struct platform_device exynos4_device_pcm1;
128extern struct platform_device exynos4_device_pcm2; 129extern struct platform_device exynos4_device_pcm2;
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index dcff7dd1ae8a..656dc00d30ed 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -123,6 +123,10 @@ extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
123extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 123extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
124extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 124extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
125extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w); 125extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
126extern void s5p64x0_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
127extern void s5p64x0_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
128extern void s5p6440_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
129extern void s5p6450_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
126 130
127/* S3C2416 SDHCI setup */ 131/* S3C2416 SDHCI setup */
128 132
@@ -146,6 +150,7 @@ static inline void s3c2416_default_sdhci0(void) { }
146static inline void s3c2416_default_sdhci1(void) { } 150static inline void s3c2416_default_sdhci1(void) { }
147 151
148#endif /* CONFIG_S3C2416_SETUP_SDHCI */ 152#endif /* CONFIG_S3C2416_SETUP_SDHCI */
153
149/* S3C64XX SDHCI setup */ 154/* S3C64XX SDHCI setup */
150 155
151#ifdef CONFIG_S3C64XX_SETUP_SDHCI 156#ifdef CONFIG_S3C64XX_SETUP_SDHCI
@@ -201,6 +206,45 @@ static inline void s3c6400_default_sdhci2(void) { }
201 206
202#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ 207#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
203 208
209/* S5P64X0 SDHCI setup */
210
211#ifdef CONFIG_S5P64X0_SETUP_SDHCI
212static inline void s5p64x0_default_sdhci0(void)
213{
214#ifdef CONFIG_S3C_DEV_HSMMC
215 s3c_hsmmc0_def_platdata.cfg_gpio = s5p64x0_setup_sdhci0_cfg_gpio;
216#endif
217}
218
219static inline void s5p64x0_default_sdhci1(void)
220{
221#ifdef CONFIG_S3C_DEV_HSMMC1
222 s3c_hsmmc1_def_platdata.cfg_gpio = s5p64x0_setup_sdhci1_cfg_gpio;
223#endif
224}
225
226static inline void s5p6440_default_sdhci2(void)
227{
228#ifdef CONFIG_S3C_DEV_HSMMC2
229 s3c_hsmmc2_def_platdata.cfg_gpio = s5p6440_setup_sdhci2_cfg_gpio;
230#endif
231}
232
233static inline void s5p6450_default_sdhci2(void)
234{
235#ifdef CONFIG_S3C_DEV_HSMMC2
236 s3c_hsmmc2_def_platdata.cfg_gpio = s5p6450_setup_sdhci2_cfg_gpio;
237#endif
238}
239
240#else
241static inline void s5p64x0_default_sdhci0(void) { }
242static inline void s5p64x0_default_sdhci1(void) { }
243static inline void s5p6440_default_sdhci2(void) { }
244static inline void s5p6450_default_sdhci2(void) { }
245
246#endif /* CONFIG_S5P64X0_SETUP_SDHCI */
247
204/* S5PC100 SDHCI setup */ 248/* S5PC100 SDHCI setup */
205 249
206#ifdef CONFIG_S5PC100_SETUP_SDHCI 250#ifdef CONFIG_S5PC100_SETUP_SDHCI