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authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>2009-12-09 05:57:21 -0500
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>2010-01-05 04:10:07 -0500
commitf568dd7f5805bfa9e99f6df866300498b55eb8f4 (patch)
tree4efe659551b4acfa76663fb02240ffde7ec1c1d5 /arch/arm
parent3f35d1f5e4507ea4eb7ff5feaf624737c1b47631 (diff)
imx/mach-mx3: use constants namespaced by the corresponding SOC (easy part)
This just leaves cpu.c, devices.c and mm.c to clean up. As these files are used on more than one SOC they need some more work. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: Russell King <linux@arm.linux.org.uk> Cc: Alberto Panizzo <maramaopercheseimorto@gmail.com> Cc: Valentin Longchamp <valentin.longchamp@epfl.ch> Cc: Daniel Mack <daniel@caiaq.de> Cc: Guennadi Liakhovetski <lg@denx.de> Cc: Yoichi Yuasa <yuasa@linux-mips.org> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Magnus Lilja <lilja.magnus@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Harro Haan <hrhaan@yahoo.com> Cc: Jean Delvare <khali@linux-fr.org> Cc: Luotao Fu <l.fu@pengutronix.de> Cc: Ilya Yanok <yanok@emcraft.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-mx3/armadillo5x0.c12
-rw-r--r--arch/arm/mach-mx3/clock-imx35.c4
-rw-r--r--arch/arm/mach-mx3/clock.c4
-rw-r--r--arch/arm/mach-mx3/crm_regs.h2
-rw-r--r--arch/arm/mach-mx3/iomux.c2
-rw-r--r--arch/arm/mach-mx3/kzmarm11.c20
-rw-r--r--arch/arm/mach-mx3/mx31ads.c14
-rw-r--r--arch/arm/mach-mx3/mx31lilly.c8
-rw-r--r--arch/arm/mach-mx3/mx31lite.c14
-rw-r--r--arch/arm/mach-mx3/mx31moboard.c4
-rw-r--r--arch/arm/mach-mx3/mx31pdk.c10
-rw-r--r--arch/arm/mach-mx3/mx35pdk.c4
-rw-r--r--arch/arm/mach-mx3/pcm037.c16
-rw-r--r--arch/arm/mach-mx3/pcm043.c4
-rw-r--r--arch/arm/mach-mx3/qong.c14
-rw-r--r--arch/arm/plat-mxc/include/mach/board-kzmarm11.h18
16 files changed, 75 insertions, 75 deletions
diff --git a/arch/arm/mach-mx3/armadillo5x0.c b/arch/arm/mach-mx3/armadillo5x0.c
index 54aab401dbdf..aac5f81c2420 100644
--- a/arch/arm/mach-mx3/armadillo5x0.c
+++ b/arch/arm/mach-mx3/armadillo5x0.c
@@ -182,8 +182,8 @@ static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
182 182
183static struct resource armadillo5x0_nor_flash_resource = { 183static struct resource armadillo5x0_nor_flash_resource = {
184 .flags = IORESOURCE_MEM, 184 .flags = IORESOURCE_MEM,
185 .start = CS0_BASE_ADDR, 185 .start = MX31_CS0_BASE_ADDR,
186 .end = CS0_BASE_ADDR + SZ_64M - 1, 186 .end = MX31_CS0_BASE_ADDR + SZ_64M - 1,
187}; 187};
188 188
189static struct platform_device armadillo5x0_nor_flash = { 189static struct platform_device armadillo5x0_nor_flash = {
@@ -311,8 +311,8 @@ static struct imxmmc_platform_data sdhc_pdata = {
311 */ 311 */
312static struct resource armadillo5x0_smc911x_resources[] = { 312static struct resource armadillo5x0_smc911x_resources[] = {
313 { 313 {
314 .start = CS3_BASE_ADDR, 314 .start = MX31_CS3_BASE_ADDR,
315 .end = CS3_BASE_ADDR + SZ_32M - 1, 315 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
316 .flags = IORESOURCE_MEM, 316 .flags = IORESOURCE_MEM,
317 }, { 317 }, {
318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0), 318 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO1_0),
@@ -406,8 +406,8 @@ static struct sys_timer armadillo5x0_timer = {
406 406
407MACHINE_START(ARMADILLO5X0, "Armadillo-500") 407MACHINE_START(ARMADILLO5X0, "Armadillo-500")
408 /* Maintainer: Alberto Panizzo */ 408 /* Maintainer: Alberto Panizzo */
409 .phys_io = AIPS1_BASE_ADDR, 409 .phys_io = MX31_AIPS1_BASE_ADDR,
410 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 410 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
411 .boot_params = PHYS_OFFSET + 0x00000100, 411 .boot_params = PHYS_OFFSET + 0x00000100,
412 .map_io = mx31_map_io, 412 .map_io = mx31_map_io,
413 .init_irq = mx31_init_irq, 413 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/clock-imx35.c b/arch/arm/mach-mx3/clock-imx35.c
index 7584b4c6c556..e65e862774ef 100644
--- a/arch/arm/mach-mx3/clock-imx35.c
+++ b/arch/arm/mach-mx3/clock-imx35.c
@@ -28,7 +28,7 @@
28#include <mach/hardware.h> 28#include <mach/hardware.h>
29#include <mach/common.h> 29#include <mach/common.h>
30 30
31#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 31#define CCM_BASE IO_ADDRESS(MX35_CCM_BASE_ADDR)
32 32
33#define CCM_CCMR 0x00 33#define CCM_CCMR 0x00
34#define CCM_PDR0 0x04 34#define CCM_PDR0 0x04
@@ -504,7 +504,7 @@ int __init mx35_clocks_init()
504 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); 504 __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2);
505 __raw_writel(0, CCM_BASE + CCM_CGR3); 505 __raw_writel(0, CCM_BASE + CCM_CGR3);
506 506
507 mxc_timer_init(&gpt_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 507 mxc_timer_init(&gpt_clk, IO_ADDRESS(MX35_GPT1_BASE_ADDR), MX35_INT_GPT);
508 508
509 return 0; 509 return 0;
510} 510}
diff --git a/arch/arm/mach-mx3/clock.c b/arch/arm/mach-mx3/clock.c
index 27a318af0d20..cc03a61116e2 100644
--- a/arch/arm/mach-mx3/clock.c
+++ b/arch/arm/mach-mx3/clock.c
@@ -618,14 +618,14 @@ int __init mx31_clocks_init(unsigned long fref)
618 618
619 mx31_read_cpu_rev(); 619 mx31_read_cpu_rev();
620 620
621 if (mx31_revision() >= CHIP_REV_2_0) { 621 if (mx31_revision() >= MX31_CHIP_REV_2_0) {
622 reg = __raw_readl(MXC_CCM_PMCR1); 622 reg = __raw_readl(MXC_CCM_PMCR1);
623 /* No PLL restart on DVFS switch; enable auto EMI handshake */ 623 /* No PLL restart on DVFS switch; enable auto EMI handshake */
624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN; 624 reg |= MXC_CCM_PMCR1_PLLRDIS | MXC_CCM_PMCR1_EMIRQ_EN;
625 __raw_writel(reg, MXC_CCM_PMCR1); 625 __raw_writel(reg, MXC_CCM_PMCR1);
626 } 626 }
627 627
628 mxc_timer_init(&ipg_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT); 628 mxc_timer_init(&ipg_clk, IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
629 629
630 return 0; 630 return 0;
631} 631}
diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index adfa3627ad84..e25cd92dd427 100644
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
24#define CKIH_CLK_FREQ_27MHZ 27000000 24#define CKIH_CLK_FREQ_27MHZ 27000000
25#define CKIL_CLK_FREQ 32768 25#define CKIL_CLK_FREQ 32768
26 26
27#define MXC_CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) 27#define MXC_CCM_BASE IO_ADDRESS(MX31_CCM_BASE_ADDR)
28 28
29/* Register addresses */ 29/* Register addresses */
30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00) 30#define MXC_CCM_CCMR (MXC_CCM_BASE + 0x00)
diff --git a/arch/arm/mach-mx3/iomux.c b/arch/arm/mach-mx3/iomux.c
index c66ccbcdc11b..6381e561961c 100644
--- a/arch/arm/mach-mx3/iomux.c
+++ b/arch/arm/mach-mx3/iomux.c
@@ -29,7 +29,7 @@
29/* 29/*
30 * IOMUX register (base) addresses 30 * IOMUX register (base) addresses
31 */ 31 */
32#define IOMUX_BASE IO_ADDRESS(IOMUXC_BASE_ADDR) 32#define IOMUX_BASE IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000) 33#define IOMUXINT_OBS1 (IOMUX_BASE + 0x000)
34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004) 34#define IOMUXINT_OBS2 (IOMUX_BASE + 0x004)
35#define IOMUXGPR (IOMUX_BASE + 0x008) 35#define IOMUXGPR (IOMUX_BASE + 0x008)
diff --git a/arch/arm/mach-mx3/kzmarm11.c b/arch/arm/mach-mx3/kzmarm11.c
index 6fa99ce3008a..849631ecfe4b 100644
--- a/arch/arm/mach-mx3/kzmarm11.c
+++ b/arch/arm/mach-mx3/kzmarm11.c
@@ -128,8 +128,8 @@ static struct smsc911x_platform_config kzm_smsc9118_config = {
128 128
129static struct resource kzm_smsc9118_resources[] = { 129static struct resource kzm_smsc9118_resources[] = {
130 { 130 {
131 .start = CS5_BASE_ADDR, 131 .start = MX31_CS5_BASE_ADDR,
132 .end = CS5_BASE_ADDR + SZ_128K - 1, 132 .end = MX31_CS5_BASE_ADDR + SZ_128K - 1,
133 .flags = IORESOURCE_MEM, 133 .flags = IORESOURCE_MEM,
134 }, 134 },
135 { 135 {
@@ -222,15 +222,15 @@ static void __init kzm_board_init(void)
222 */ 222 */
223static struct map_desc kzm_io_desc[] __initdata = { 223static struct map_desc kzm_io_desc[] __initdata = {
224 { 224 {
225 .virtual = CS4_BASE_ADDR_VIRT, 225 .virtual = MX31_CS4_BASE_ADDR_VIRT,
226 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 226 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
227 .length = CS4_SIZE, 227 .length = MX31_CS4_SIZE,
228 .type = MT_DEVICE 228 .type = MT_DEVICE
229 }, 229 },
230 { 230 {
231 .virtual = CS5_BASE_ADDR_VIRT, 231 .virtual = MX31_CS5_BASE_ADDR_VIRT,
232 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 232 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
233 .length = CS5_SIZE, 233 .length = MX31_CS5_SIZE,
234 .type = MT_DEVICE 234 .type = MT_DEVICE
235 }, 235 },
236}; 236};
@@ -258,8 +258,8 @@ static struct sys_timer kzm_timer = {
258 * initialize __mach_desc_KZM_ARM11_01 data structure. 258 * initialize __mach_desc_KZM_ARM11_01 data structure.
259 */ 259 */
260MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") 260MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01")
261 .phys_io = AIPS1_BASE_ADDR, 261 .phys_io = MX31_AIPS1_BASE_ADDR,
262 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 262 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
263 .boot_params = PHYS_OFFSET + 0x100, 263 .boot_params = PHYS_OFFSET + 0x100,
264 .map_io = kzm_map_io, 264 .map_io = kzm_map_io,
265 .init_irq = mx31_init_irq, 265 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31ads.c b/arch/arm/mach-mx3/mx31ads.c
index 3e7bafa2ddbb..66991165127c 100644
--- a/arch/arm/mach-mx3/mx31ads.c
+++ b/arch/arm/mach-mx3/mx31ads.c
@@ -60,7 +60,7 @@
60static struct plat_serial8250_port serial_platform_data[] = { 60static struct plat_serial8250_port serial_platform_data[] = {
61 { 61 {
62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA), 62 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
63 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA), 63 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTA),
64 .irq = EXPIO_INT_XUART_INTA, 64 .irq = EXPIO_INT_XUART_INTA,
65 .uartclk = 14745600, 65 .uartclk = 14745600,
66 .regshift = 0, 66 .regshift = 0,
@@ -68,7 +68,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ, 68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
69 }, { 69 }, {
70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB), 70 .membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
71 .mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB), 71 .mapbase = (unsigned long)(MX31_CS4_BASE_ADDR + PBC_SC16C652_UARTB),
72 .irq = EXPIO_INT_XUART_INTB, 72 .irq = EXPIO_INT_XUART_INTB,
73 .uartclk = 14745600, 73 .uartclk = 14745600,
74 .regshift = 0, 74 .regshift = 0,
@@ -494,9 +494,9 @@ static void mxc_init_i2c(void)
494 */ 494 */
495static struct map_desc mx31ads_io_desc[] __initdata = { 495static struct map_desc mx31ads_io_desc[] __initdata = {
496 { 496 {
497 .virtual = CS4_BASE_ADDR_VIRT, 497 .virtual = MX31_CS4_BASE_ADDR_VIRT,
498 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 498 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
499 .length = CS4_SIZE / 2, 499 .length = MX31_CS4_SIZE / 2,
500 .type = MT_DEVICE 500 .type = MT_DEVICE
501 }, 501 },
502}; 502};
@@ -541,8 +541,8 @@ static struct sys_timer mx31ads_timer = {
541 */ 541 */
542MACHINE_START(MX31ADS, "Freescale MX31ADS") 542MACHINE_START(MX31ADS, "Freescale MX31ADS")
543 /* Maintainer: Freescale Semiconductor, Inc. */ 543 /* Maintainer: Freescale Semiconductor, Inc. */
544 .phys_io = AIPS1_BASE_ADDR, 544 .phys_io = MX31_AIPS1_BASE_ADDR,
545 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 545 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
546 .boot_params = PHYS_OFFSET + 0x100, 546 .boot_params = PHYS_OFFSET + 0x100,
547 .map_io = mx31ads_map_io, 547 .map_io = mx31ads_map_io,
548 .init_irq = mx31ads_init_irq, 548 .init_irq = mx31ads_init_irq,
diff --git a/arch/arm/mach-mx3/mx31lilly.c b/arch/arm/mach-mx3/mx31lilly.c
index 9ce029f554b9..ffccea98531b 100644
--- a/arch/arm/mach-mx3/mx31lilly.c
+++ b/arch/arm/mach-mx3/mx31lilly.c
@@ -57,8 +57,8 @@
57 57
58static struct resource smsc91x_resources[] = { 58static struct resource smsc91x_resources[] = {
59 { 59 {
60 .start = CS4_BASE_ADDR, 60 .start = MX31_CS4_BASE_ADDR,
61 .end = CS4_BASE_ADDR + 0xffff, 61 .end = MX31_CS4_BASE_ADDR + 0xffff,
62 .flags = IORESOURCE_MEM, 62 .flags = IORESOURCE_MEM,
63 }, 63 },
64 { 64 {
@@ -195,8 +195,8 @@ static struct sys_timer mx31lilly_timer = {
195}; 195};
196 196
197MACHINE_START(LILLY1131, "INCO startec LILLY-1131") 197MACHINE_START(LILLY1131, "INCO startec LILLY-1131")
198 .phys_io = AIPS1_BASE_ADDR, 198 .phys_io = MX31_AIPS1_BASE_ADDR,
199 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 199 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
200 .boot_params = PHYS_OFFSET + 0x100, 200 .boot_params = PHYS_OFFSET + 0x100,
201 .map_io = mx31_map_io, 201 .map_io = mx31_map_io,
202 .init_irq = mx31_init_irq, 202 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31lite.c b/arch/arm/mach-mx3/mx31lite.c
index 789b20d1730f..1e263978b1d8 100644
--- a/arch/arm/mach-mx3/mx31lite.c
+++ b/arch/arm/mach-mx3/mx31lite.c
@@ -82,8 +82,8 @@ static struct smsc911x_platform_config smsc911x_config = {
82 82
83static struct resource smsc911x_resources[] = { 83static struct resource smsc911x_resources[] = {
84 { 84 {
85 .start = CS4_BASE_ADDR, 85 .start = MX31_CS4_BASE_ADDR,
86 .end = CS4_BASE_ADDR + 0x100, 86 .end = MX31_CS4_BASE_ADDR + 0x100,
87 .flags = IORESOURCE_MEM, 87 .flags = IORESOURCE_MEM,
88 }, { 88 }, {
89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6), 89 .start = IOMUX_TO_IRQ(MX31_PIN_SFS6),
@@ -214,9 +214,9 @@ static struct platform_device physmap_flash_device = {
214 */ 214 */
215static struct map_desc mx31lite_io_desc[] __initdata = { 215static struct map_desc mx31lite_io_desc[] __initdata = {
216 { 216 {
217 .virtual = CS4_BASE_ADDR_VIRT, 217 .virtual = MX31_CS4_BASE_ADDR_VIRT,
218 .pfn = __phys_to_pfn(CS4_BASE_ADDR), 218 .pfn = __phys_to_pfn(MX31_CS4_BASE_ADDR),
219 .length = CS4_SIZE, 219 .length = MX31_CS4_SIZE,
220 .type = MT_DEVICE 220 .type = MT_DEVICE
221 } 221 }
222}; 222};
@@ -287,8 +287,8 @@ struct sys_timer mx31lite_timer = {
287 287
288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") 288MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
289 /* Maintainer: Freescale Semiconductor, Inc. */ 289 /* Maintainer: Freescale Semiconductor, Inc. */
290 .phys_io = AIPS1_BASE_ADDR, 290 .phys_io = MX31_AIPS1_BASE_ADDR,
291 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 291 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
292 .boot_params = PHYS_OFFSET + 0x100, 292 .boot_params = PHYS_OFFSET + 0x100,
293 .map_io = mx31lite_map_io, 293 .map_io = mx31lite_map_io,
294 .init_irq = mx31_init_irq, 294 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31moboard.c b/arch/arm/mach-mx3/mx31moboard.c
index cfd605d078ec..9428827f8944 100644
--- a/arch/arm/mach-mx3/mx31moboard.c
+++ b/arch/arm/mach-mx3/mx31moboard.c
@@ -569,8 +569,8 @@ struct sys_timer mx31moboard_timer = {
569 569
570MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") 570MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard")
571 /* Maintainer: Valentin Longchamp, EPFL Mobots group */ 571 /* Maintainer: Valentin Longchamp, EPFL Mobots group */
572 .phys_io = AIPS1_BASE_ADDR, 572 .phys_io = MX31_AIPS1_BASE_ADDR,
573 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 573 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
574 .boot_params = PHYS_OFFSET + 0x100, 574 .boot_params = PHYS_OFFSET + 0x100,
575 .map_io = mx31_map_io, 575 .map_io = mx31_map_io,
576 .init_irq = mx31_init_irq, 576 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx31pdk.c b/arch/arm/mach-mx3/mx31pdk.c
index 18715f1aa7eb..e71e3b401628 100644
--- a/arch/arm/mach-mx3/mx31pdk.c
+++ b/arch/arm/mach-mx3/mx31pdk.c
@@ -211,9 +211,9 @@ static int __init mx31pdk_init_expio(void)
211 */ 211 */
212static struct map_desc mx31pdk_io_desc[] __initdata = { 212static struct map_desc mx31pdk_io_desc[] __initdata = {
213 { 213 {
214 .virtual = CS5_BASE_ADDR_VIRT, 214 .virtual = MX31_CS5_BASE_ADDR_VIRT,
215 .pfn = __phys_to_pfn(CS5_BASE_ADDR), 215 .pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
216 .length = CS5_SIZE, 216 .length = MX31_CS5_SIZE,
217 .type = MT_DEVICE, 217 .type = MT_DEVICE,
218 }, 218 },
219}; 219};
@@ -256,8 +256,8 @@ static struct sys_timer mx31pdk_timer = {
256 */ 256 */
257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") 257MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
258 /* Maintainer: Freescale Semiconductor, Inc. */ 258 /* Maintainer: Freescale Semiconductor, Inc. */
259 .phys_io = AIPS1_BASE_ADDR, 259 .phys_io = MX31_AIPS1_BASE_ADDR,
260 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 260 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
261 .boot_params = PHYS_OFFSET + 0x100, 261 .boot_params = PHYS_OFFSET + 0x100,
262 .map_io = mx31pdk_map_io, 262 .map_io = mx31pdk_map_io,
263 .init_irq = mx31_init_irq, 263 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/mx35pdk.c b/arch/arm/mach-mx3/mx35pdk.c
index 0bbc65ea23c8..2d11bf053c78 100644
--- a/arch/arm/mach-mx3/mx35pdk.c
+++ b/arch/arm/mach-mx3/mx35pdk.c
@@ -106,8 +106,8 @@ struct sys_timer mx35pdk_timer = {
106 106
107MACHINE_START(MX35_3DS, "Freescale MX35PDK") 107MACHINE_START(MX35_3DS, "Freescale MX35PDK")
108 /* Maintainer: Freescale Semiconductor, Inc */ 108 /* Maintainer: Freescale Semiconductor, Inc */
109 .phys_io = AIPS1_BASE_ADDR, 109 .phys_io = MX35_AIPS1_BASE_ADDR,
110 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 110 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
111 .boot_params = PHYS_OFFSET + 0x100, 111 .boot_params = PHYS_OFFSET + 0x100,
112 .map_io = mx35_map_io, 112 .map_io = mx35_map_io,
113 .init_irq = mx35_init_irq, 113 .init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/pcm037.c b/arch/arm/mach-mx3/pcm037.c
index 5be396917c99..701fac989432 100644
--- a/arch/arm/mach-mx3/pcm037.c
+++ b/arch/arm/mach-mx3/pcm037.c
@@ -248,8 +248,8 @@ static struct imxuart_platform_data uart_pdata = {
248 248
249static struct resource smsc911x_resources[] = { 249static struct resource smsc911x_resources[] = {
250 { 250 {
251 .start = CS1_BASE_ADDR + 0x300, 251 .start = MX31_CS1_BASE_ADDR + 0x300,
252 .end = CS1_BASE_ADDR + 0x300 + SZ_64K - 1, 252 .end = MX31_CS1_BASE_ADDR + 0x300 + SZ_64K - 1,
253 .flags = IORESOURCE_MEM, 253 .flags = IORESOURCE_MEM,
254 }, { 254 }, {
255 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), 255 .start = IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
@@ -281,8 +281,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
281}; 281};
282 282
283static struct resource pcm038_sram_resource = { 283static struct resource pcm038_sram_resource = {
284 .start = CS4_BASE_ADDR, 284 .start = MX31_CS4_BASE_ADDR,
285 .end = CS4_BASE_ADDR + 512 * 1024 - 1, 285 .end = MX31_CS4_BASE_ADDR + 512 * 1024 - 1,
286 .flags = IORESOURCE_MEM, 286 .flags = IORESOURCE_MEM,
287}; 287};
288 288
@@ -536,8 +536,8 @@ static struct mx3fb_platform_data mx3fb_pdata = {
536 536
537static struct resource pcm970_sja1000_resources[] = { 537static struct resource pcm970_sja1000_resources[] = {
538 { 538 {
539 .start = CS5_BASE_ADDR, 539 .start = MX31_CS5_BASE_ADDR,
540 .end = CS5_BASE_ADDR + 0x100 - 1, 540 .end = MX31_CS5_BASE_ADDR + 0x100 - 1,
541 .flags = IORESOURCE_MEM, 541 .flags = IORESOURCE_MEM,
542 }, { 542 }, {
543 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)), 543 .start = IOMUX_TO_IRQ(IOMUX_PIN(48, 105)),
@@ -636,8 +636,8 @@ struct sys_timer pcm037_timer = {
636 636
637MACHINE_START(PCM037, "Phytec Phycore pcm037") 637MACHINE_START(PCM037, "Phytec Phycore pcm037")
638 /* Maintainer: Pengutronix */ 638 /* Maintainer: Pengutronix */
639 .phys_io = AIPS1_BASE_ADDR, 639 .phys_io = MX31_AIPS1_BASE_ADDR,
640 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 640 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
641 .boot_params = PHYS_OFFSET + 0x100, 641 .boot_params = PHYS_OFFSET + 0x100,
642 .map_io = mx31_map_io, 642 .map_io = mx31_map_io,
643 .init_irq = mx31_init_irq, 643 .init_irq = mx31_init_irq,
diff --git a/arch/arm/mach-mx3/pcm043.c b/arch/arm/mach-mx3/pcm043.c
index e3aa829be586..1212194fb9c2 100644
--- a/arch/arm/mach-mx3/pcm043.c
+++ b/arch/arm/mach-mx3/pcm043.c
@@ -248,8 +248,8 @@ struct sys_timer pcm043_timer = {
248 248
249MACHINE_START(PCM043, "Phytec Phycore pcm043") 249MACHINE_START(PCM043, "Phytec Phycore pcm043")
250 /* Maintainer: Pengutronix */ 250 /* Maintainer: Pengutronix */
251 .phys_io = AIPS1_BASE_ADDR, 251 .phys_io = MX35_AIPS1_BASE_ADDR,
252 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 252 .io_pg_offst = ((MX35_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
253 .boot_params = PHYS_OFFSET + 0x100, 253 .boot_params = PHYS_OFFSET + 0x100,
254 .map_io = mx35_map_io, 254 .map_io = mx35_map_io,
255 .init_irq = mx35_init_irq, 255 .init_irq = mx35_init_irq,
diff --git a/arch/arm/mach-mx3/qong.c b/arch/arm/mach-mx3/qong.c
index 044511f1b9a9..3c1e7364f74a 100644
--- a/arch/arm/mach-mx3/qong.c
+++ b/arch/arm/mach-mx3/qong.c
@@ -43,7 +43,7 @@
43#define QONG_FPGA_VERSION(major, minor, rev) \ 43#define QONG_FPGA_VERSION(major, minor, rev) \
44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) 44 (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF))
45 45
46#define QONG_FPGA_BASEADDR CS1_BASE_ADDR 46#define QONG_FPGA_BASEADDR MX31_CS1_BASE_ADDR
47#define QONG_FPGA_PERIPH_SIZE (1 << 24) 47#define QONG_FPGA_PERIPH_SIZE (1 << 24)
48 48
49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR 49#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR
@@ -115,8 +115,8 @@ static struct physmap_flash_data qong_flash_data = {
115}; 115};
116 116
117static struct resource qong_flash_resource = { 117static struct resource qong_flash_resource = {
118 .start = CS0_BASE_ADDR, 118 .start = MX31_CS0_BASE_ADDR,
119 .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1, 119 .end = MX31_CS0_BASE_ADDR + QONG_NOR_SIZE - 1,
120 .flags = IORESOURCE_MEM, 120 .flags = IORESOURCE_MEM,
121}; 121};
122 122
@@ -180,8 +180,8 @@ static struct platform_nand_data qong_nand_data = {
180}; 180};
181 181
182static struct resource qong_nand_resource = { 182static struct resource qong_nand_resource = {
183 .start = CS3_BASE_ADDR, 183 .start = MX31_CS3_BASE_ADDR,
184 .end = CS3_BASE_ADDR + SZ_32M - 1, 184 .end = MX31_CS3_BASE_ADDR + SZ_32M - 1,
185 .flags = IORESOURCE_MEM, 185 .flags = IORESOURCE_MEM,
186}; 186};
187 187
@@ -275,8 +275,8 @@ static struct sys_timer qong_timer = {
275 275
276MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") 276MACHINE_START(QONG, "Dave/DENX QongEVB-LITE")
277 /* Maintainer: DENX Software Engineering GmbH */ 277 /* Maintainer: DENX Software Engineering GmbH */
278 .phys_io = AIPS1_BASE_ADDR, 278 .phys_io = MX31_AIPS1_BASE_ADDR,
279 .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, 279 .io_pg_offst = ((MX31_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
280 .boot_params = PHYS_OFFSET + 0x100, 280 .boot_params = PHYS_OFFSET + 0x100,
281 .map_io = mx31_map_io, 281 .map_io = mx31_map_io,
282 .init_irq = mx31_init_irq, 282 .init_irq = mx31_init_irq,
diff --git a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
index 05ff2f31ef1f..93cc66f104c7 100644
--- a/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
+++ b/arch/arm/plat-mxc/include/mach/board-kzmarm11.h
@@ -21,19 +21,19 @@
21/* 21/*
22 * KZM-ARM11-01 Board Control Registers on FPGA 22 * KZM-ARM11-01 Board Control Registers on FPGA
23 */ 23 */
24#define KZM_ARM11_CTL1 (CS4_BASE_ADDR + 0x1000) 24#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
25#define KZM_ARM11_CTL2 (CS4_BASE_ADDR + 0x1001) 25#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
26#define KZM_ARM11_RSW1 (CS4_BASE_ADDR + 0x1002) 26#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
27#define KZM_ARM11_BACK_LIGHT (CS4_BASE_ADDR + 0x1004) 27#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
28#define KZM_ARM11_FPGA_REV (CS4_BASE_ADDR + 0x1008) 28#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
29#define KZM_ARM11_7SEG_LED (CS4_BASE_ADDR + 0x1010) 29#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
30#define KZM_ARM11_LEDS (CS4_BASE_ADDR + 0x1020) 30#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
31#define KZM_ARM11_DIPSW2 (CS4_BASE_ADDR + 0x1003) 31#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
32 32
33/* 33/*
34 * External UART for touch panel on FPGA 34 * External UART for touch panel on FPGA
35 */ 35 */
36#define KZM_ARM11_16550 (CS4_BASE_ADDR + 0x1050) 36#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
37 37
38#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */ 38#endif /* __ARM_ARCH_BOARD_KZM_ARM11_H */
39 39
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-30 23:38:58 -0400