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authorMagnus Damm <damm@opensource.se>2011-12-13 11:36:12 -0500
committerPaul Mundt <lethal@linux-sh.org>2012-01-08 20:13:59 -0500
commitf411fade0085a0d2c080bd64e72e0aff55bcbd09 (patch)
tree25bc6a2f5cb3eb1aff7bf4a5888bd1a6c211787c /arch/arm
parente0a23ce20eb98c17c5f7bf4b7f34cb31d0b102f9 (diff)
ARM: mach-shmobile: r8a7779 and Marzen base support V2
Initial support for the r8a7779 SoC and the Marzen board (V2). Only SCIF ports and the TMU are supported at this point. To keep things simple only entity-mapped virt-to-phys mappings are supported. This forces drivers and other SoC glue code to make use of ioremap(). We cannot support early serial console due to virtual address space collisions with the ARM kernel. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-shmobile/Kconfig10
-rw-r--r--arch/arm/mach-shmobile/Makefile2
-rw-r--r--arch/arm/mach-shmobile/board-marzen.c110
-rw-r--r--arch/arm/mach-shmobile/clock-r8a7779.c105
-rw-r--r--arch/arm/mach-shmobile/include/mach/common.h5
-rw-r--r--arch/arm/mach-shmobile/include/mach/r8a7779.h6
-rw-r--r--arch/arm/mach-shmobile/intc-r8a7779.c58
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7779.c231
8 files changed, 527 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index aa63c968f420..23e59b41d500 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -34,6 +34,12 @@ config ARCH_R8A7740
34 select SH_CLK_CPG 34 select SH_CLK_CPG
35 select ARCH_WANT_OPTIONAL_GPIOLIB 35 select ARCH_WANT_OPTIONAL_GPIOLIB
36 36
37config ARCH_R8A7779
38 bool "R-Car H1 (R8A77790)"
39 select CPU_V7
40 select SH_CLK_CPG
41 select ARM_GIC
42
37comment "SH-Mobile Board Type" 43comment "SH-Mobile Board Type"
38 44
39config MACH_G3EVM 45config MACH_G3EVM
@@ -81,6 +87,10 @@ config MACH_KOTA2
81 select ARCH_REQUIRE_GPIOLIB 87 select ARCH_REQUIRE_GPIOLIB
82 depends on ARCH_SH73A0 88 depends on ARCH_SH73A0
83 89
90config MACH_MARZEN
91 bool "MARZEN board"
92 depends on ARCH_R8A7779
93
84comment "SH-Mobile System Configuration" 94comment "SH-Mobile System Configuration"
85 95
86menu "Memory configuration" 96menu "Memory configuration"
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 83e35f254bff..04c97455e640 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -11,6 +11,7 @@ obj-$(CONFIG_ARCH_SH7377) += setup-sh7377.o clock-sh7377.o intc-sh7377.o
11obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o 11obj-$(CONFIG_ARCH_SH7372) += setup-sh7372.o clock-sh7372.o intc-sh7372.o
12obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o 12obj-$(CONFIG_ARCH_SH73A0) += setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o
13obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o 13obj-$(CONFIG_ARCH_R8A7740) += setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o
14obj-$(CONFIG_ARCH_R8A7779) += setup-r8a7779.o clock-r8a7779.o intc-r8a7779.o
14 15
15# SMP objects 16# SMP objects
16smp-y := platsmp.o headsmp.o 17smp-y := platsmp.o headsmp.o
@@ -44,6 +45,7 @@ obj-$(CONFIG_MACH_AP4EVB) += board-ap4evb.o
44obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o 45obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
45obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o 46obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
46obj-$(CONFIG_MACH_KOTA2) += board-kota2.o 47obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
48obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
47 49
48# Framework support 50# Framework support
49obj-$(CONFIG_SMP) += $(smp-y) 51obj-$(CONFIG_SMP) += $(smp-y)
diff --git a/arch/arm/mach-shmobile/board-marzen.c b/arch/arm/mach-shmobile/board-marzen.c
new file mode 100644
index 000000000000..d958cd49917f
--- /dev/null
+++ b/arch/arm/mach-shmobile/board-marzen.c
@@ -0,0 +1,110 @@
1/*
2 * marzen board support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
25#include <linux/platform_device.h>
26#include <linux/delay.h>
27#include <linux/io.h>
28#include <linux/dma-mapping.h>
29#include <mach/hardware.h>
30#include <mach/r8a7779.h>
31#include <mach/common.h>
32#include <asm/mach-types.h>
33#include <asm/mach/arch.h>
34#include <asm/mach/map.h>
35#include <asm/mach/time.h>
36#include <asm/hardware/gic.h>
37#include <asm/traps.h>
38
39static struct platform_device *marzen_devices[] __initdata = {
40};
41
42static struct map_desc marzen_io_desc[] __initdata = {
43 /* 2M entity map for 0xf0000000 (MPCORE) */
44 {
45 .virtual = 0xf0000000,
46 .pfn = __phys_to_pfn(0xf0000000),
47 .length = SZ_2M,
48 .type = MT_DEVICE_NONSHARED
49 },
50 /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
51 {
52 .virtual = 0xfe000000,
53 .pfn = __phys_to_pfn(0xfe000000),
54 .length = SZ_16M,
55 .type = MT_DEVICE_NONSHARED
56 },
57};
58
59static void __init marzen_map_io(void)
60{
61 iotable_init(marzen_io_desc, ARRAY_SIZE(marzen_io_desc));
62}
63
64static void __init marzen_init_early(void)
65{
66 r8a7779_add_early_devices();
67
68 /* Early serial console setup is not included here due to
69 * memory map collisions. The SCIF serial ports in r8a7779
70 * are difficult to entity map 1:1 due to collision with the
71 * virtual memory range used by the coherent DMA code on ARM.
72 *
73 * Anyone wanting to debug early can remove UPF_IOREMAP from
74 * the sh-sci serial console platform data, adjust mapbase
75 * to a static M:N virt:phys mapping that needs to be added to
76 * the mappings passed with iotable_init() above.
77 *
78 * Then add a call to shmobile_setup_console() from this function.
79 *
80 * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
81 * command line.
82 */
83}
84
85static void __init marzen_init(void)
86{
87 r8a7779_add_standard_devices();
88 platform_add_devices(marzen_devices, ARRAY_SIZE(marzen_devices));
89}
90
91static void __init marzen_timer_init(void)
92{
93 r8a7779_clock_init();
94 shmobile_timer.init();
95 return;
96}
97
98struct sys_timer marzen_timer = {
99 .init = marzen_timer_init,
100};
101
102MACHINE_START(MARZEN, "marzen")
103 .map_io = marzen_map_io,
104 .init_early = marzen_init_early,
105 .nr_irqs = NR_IRQS_LEGACY,
106 .init_irq = r8a7779_init_irq,
107 .handle_irq = shmobile_handle_irq_gic,
108 .init_machine = marzen_init,
109 .timer = &marzen_timer,
110MACHINE_END
diff --git a/arch/arm/mach-shmobile/clock-r8a7779.c b/arch/arm/mach-shmobile/clock-r8a7779.c
new file mode 100644
index 000000000000..8a901068a53c
--- /dev/null
+++ b/arch/arm/mach-shmobile/clock-r8a7779.c
@@ -0,0 +1,105 @@
1/*
2 * r8a7779 clock framework support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <linux/io.h>
23#include <linux/sh_clk.h>
24#include <linux/clkdev.h>
25#include <mach/common.h>
26
27#define FRQMR 0xffc80014
28#define MSTPCR0 0xffc80030
29#define MSTPCR1 0xffc80034
30#define MSTPCR3 0xffc8003c
31#define MSTPSR1 0xffc80044
32#define MSTPSR4 0xffc80048
33#define MSTPSR6 0xffc8004c
34#define MSTPCR4 0xffc80050
35#define MSTPCR5 0xffc80054
36#define MSTPCR6 0xffc80058
37#define MSTPCR7 0xffc80040
38
39/* ioremap() through clock mapping mandatory to avoid
40 * collision with ARM coherent DMA virtual memory range.
41 */
42
43static struct clk_mapping cpg_mapping = {
44 .phys = 0xffc80000,
45 .len = 0x80,
46};
47
48static struct clk clkp = {
49 .rate = 62500000, /* FIXME: shortcut */
50 .flags = CLK_ENABLE_ON_INIT,
51 .mapping = &cpg_mapping,
52};
53
54static struct clk *main_clks[] = {
55 &clkp,
56};
57
58enum { MSTP026, MSTP025, MSTP024, MSTP023, MSTP022, MSTP021,
59 MSTP016, MSTP015, MSTP014,
60 MSTP_NR };
61
62#define MSTP(_parent, _reg, _bit, _flags) \
63 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
64
65static struct clk mstp_clks[MSTP_NR] = {
66 [MSTP026] = MSTP(&clkp, MSTPCR0, 26, 0), /* SCIF0 */
67 [MSTP025] = MSTP(&clkp, MSTPCR0, 25, 0), /* SCIF1 */
68 [MSTP024] = MSTP(&clkp, MSTPCR0, 24, 0), /* SCIF2 */
69 [MSTP023] = MSTP(&clkp, MSTPCR0, 23, 0), /* SCIF3 */
70 [MSTP022] = MSTP(&clkp, MSTPCR0, 22, 0), /* SCIF4 */
71 [MSTP021] = MSTP(&clkp, MSTPCR0, 21, 0), /* SCIF5 */
72 [MSTP016] = MSTP(&clkp, MSTPCR0, 16, 0), /* TMU0 */
73 [MSTP015] = MSTP(&clkp, MSTPCR0, 15, 0), /* TMU1 */
74 [MSTP014] = MSTP(&clkp, MSTPCR0, 14, 0), /* TMU2 */
75};
76
77static struct clk_lookup lookups[] = {
78 /* MSTP32 clocks */
79 CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP016]), /* TMU00 */
80 CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP016]), /* TMU01 */
81 CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP026]), /* SCIF0 */
82 CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[MSTP025]), /* SCIF1 */
83 CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[MSTP024]), /* SCIF2 */
84 CLKDEV_DEV_ID("sh-sci.3", &mstp_clks[MSTP023]), /* SCIF3 */
85 CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP022]), /* SCIF4 */
86 CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP021]), /* SCIF6 */
87};
88
89void __init r8a7779_clock_init(void)
90{
91 int k, ret = 0;
92
93 for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
94 ret = clk_register(main_clks[k]);
95
96 if (!ret)
97 ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
98
99 clkdev_add_table(lookups, ARRAY_SIZE(lookups));
100
101 if (!ret)
102 clk_init();
103 else
104 panic("failed to setup r8a7779 clocks\n");
105}
diff --git a/arch/arm/mach-shmobile/include/mach/common.h b/arch/arm/mach-shmobile/include/mach/common.h
index c2ed19b43560..ba889edf644a 100644
--- a/arch/arm/mach-shmobile/include/mach/common.h
+++ b/arch/arm/mach-shmobile/include/mach/common.h
@@ -60,4 +60,9 @@ extern void r8a7740_add_standard_devices(void);
60extern void r8a7740_clock_init(u8 md_ck); 60extern void r8a7740_clock_init(u8 md_ck);
61extern void r8a7740_pinmux_init(void); 61extern void r8a7740_pinmux_init(void);
62 62
63extern void r8a7779_init_irq(void);
64extern void r8a7779_add_early_devices(void);
65extern void r8a7779_add_standard_devices(void);
66extern void r8a7779_clock_init(void);
67
63#endif /* __ARCH_MACH_COMMON_H */ 68#endif /* __ARCH_MACH_COMMON_H */
diff --git a/arch/arm/mach-shmobile/include/mach/r8a7779.h b/arch/arm/mach-shmobile/include/mach/r8a7779.h
new file mode 100644
index 000000000000..17d944845982
--- /dev/null
+++ b/arch/arm/mach-shmobile/include/mach/r8a7779.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_R8A7779_H__
2#define __ASM_R8A7779_H__
3
4/* Nothing at this point */
5
6#endif /* __ASM_R8A7779_H__ */
diff --git a/arch/arm/mach-shmobile/intc-r8a7779.c b/arch/arm/mach-shmobile/intc-r8a7779.c
new file mode 100644
index 000000000000..5d92fcde2bc3
--- /dev/null
+++ b/arch/arm/mach-shmobile/intc-r8a7779.c
@@ -0,0 +1,58 @@
1/*
2 * r8a7779 processor support - INTC hardware block
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/io.h>
25#include <mach/common.h>
26#include <mach/intc.h>
27#include <mach/r8a7779.h>
28#include <asm/hardware/gic.h>
29#include <asm/mach-types.h>
30#include <asm/mach/arch.h>
31
32#define INT2SMSKCR0 0xfe7822a0
33#define INT2SMSKCR1 0xfe7822a4
34#define INT2SMSKCR2 0xfe7822a8
35#define INT2SMSKCR3 0xfe7822ac
36#define INT2SMSKCR4 0xfe7822b0
37
38static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
39{
40 return 0; /* always allow wakeup */
41}
42
43void __init r8a7779_init_irq(void)
44{
45 void __iomem *gic_dist_base = __io(0xf0001000);
46 void __iomem *gic_cpu_base = __io(0xf0000100);
47
48 /* use GIC to handle interrupts */
49 gic_init(0, 29, gic_dist_base, gic_cpu_base);
50 gic_arch_extn.irq_set_wake = r8a7779_set_wake;
51
52 /* unmask all known interrupts in INTCS2 */
53 __raw_writel(0xfffffff0, INT2SMSKCR0);
54 __raw_writel(0xfff7ffff, INT2SMSKCR1);
55 __raw_writel(0xfffbffdf, INT2SMSKCR2);
56 __raw_writel(0xbffffffc, INT2SMSKCR3);
57 __raw_writel(0x003fee3f, INT2SMSKCR4);
58}
diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c
new file mode 100644
index 000000000000..b48a4b049c32
--- /dev/null
+++ b/arch/arm/mach-shmobile/setup-r8a7779.c
@@ -0,0 +1,231 @@
1/*
2 * r8a7779 processor support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Magnus Damm
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/interrupt.h>
23#include <linux/irq.h>
24#include <linux/platform_device.h>
25#include <linux/delay.h>
26#include <linux/input.h>
27#include <linux/io.h>
28#include <linux/serial_sci.h>
29#include <linux/sh_intc.h>
30#include <linux/sh_timer.h>
31#include <mach/hardware.h>
32#include <mach/r8a7779.h>
33#include <asm/mach-types.h>
34#include <asm/mach/arch.h>
35
36static struct plat_sci_port scif0_platform_data = {
37 .mapbase = 0xffe40000,
38 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
39 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
40 .scbrr_algo_id = SCBRR_ALGO_2,
41 .type = PORT_SCIF,
42 .irqs = { gic_spi(88), gic_spi(88),
43 gic_spi(88), gic_spi(88) },
44};
45
46static struct platform_device scif0_device = {
47 .name = "sh-sci",
48 .id = 0,
49 .dev = {
50 .platform_data = &scif0_platform_data,
51 },
52};
53
54static struct plat_sci_port scif1_platform_data = {
55 .mapbase = 0xffe41000,
56 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
57 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
58 .scbrr_algo_id = SCBRR_ALGO_2,
59 .type = PORT_SCIF,
60 .irqs = { gic_spi(89), gic_spi(89),
61 gic_spi(89), gic_spi(89) },
62};
63
64static struct platform_device scif1_device = {
65 .name = "sh-sci",
66 .id = 1,
67 .dev = {
68 .platform_data = &scif1_platform_data,
69 },
70};
71
72static struct plat_sci_port scif2_platform_data = {
73 .mapbase = 0xffe42000,
74 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
75 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
76 .scbrr_algo_id = SCBRR_ALGO_2,
77 .type = PORT_SCIF,
78 .irqs = { gic_spi(90), gic_spi(90),
79 gic_spi(90), gic_spi(90) },
80};
81
82static struct platform_device scif2_device = {
83 .name = "sh-sci",
84 .id = 2,
85 .dev = {
86 .platform_data = &scif2_platform_data,
87 },
88};
89
90static struct plat_sci_port scif3_platform_data = {
91 .mapbase = 0xffe43000,
92 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
93 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
94 .scbrr_algo_id = SCBRR_ALGO_2,
95 .type = PORT_SCIF,
96 .irqs = { gic_spi(91), gic_spi(91),
97 gic_spi(91), gic_spi(91) },
98};
99
100static struct platform_device scif3_device = {
101 .name = "sh-sci",
102 .id = 3,
103 .dev = {
104 .platform_data = &scif3_platform_data,
105 },
106};
107
108static struct plat_sci_port scif4_platform_data = {
109 .mapbase = 0xffe44000,
110 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
111 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
112 .scbrr_algo_id = SCBRR_ALGO_2,
113 .type = PORT_SCIF,
114 .irqs = { gic_spi(92), gic_spi(92),
115 gic_spi(92), gic_spi(92) },
116};
117
118static struct platform_device scif4_device = {
119 .name = "sh-sci",
120 .id = 4,
121 .dev = {
122 .platform_data = &scif4_platform_data,
123 },
124};
125
126static struct plat_sci_port scif5_platform_data = {
127 .mapbase = 0xffe45000,
128 .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
129 .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
130 .scbrr_algo_id = SCBRR_ALGO_2,
131 .type = PORT_SCIF,
132 .irqs = { gic_spi(93), gic_spi(93),
133 gic_spi(93), gic_spi(93) },
134};
135
136static struct platform_device scif5_device = {
137 .name = "sh-sci",
138 .id = 5,
139 .dev = {
140 .platform_data = &scif5_platform_data,
141 },
142};
143
144/* TMU */
145static struct sh_timer_config tmu00_platform_data = {
146 .name = "TMU00",
147 .channel_offset = 0x4,
148 .timer_bit = 0,
149 .clockevent_rating = 200,
150};
151
152static struct resource tmu00_resources[] = {
153 [0] = {
154 .name = "TMU00",
155 .start = 0xffd80008,
156 .end = 0xffd80013,
157 .flags = IORESOURCE_MEM,
158 },
159 [1] = {
160 .start = gic_spi(32),
161 .flags = IORESOURCE_IRQ,
162 },
163};
164
165static struct platform_device tmu00_device = {
166 .name = "sh_tmu",
167 .id = 0,
168 .dev = {
169 .platform_data = &tmu00_platform_data,
170 },
171 .resource = tmu00_resources,
172 .num_resources = ARRAY_SIZE(tmu00_resources),
173};
174
175static struct sh_timer_config tmu01_platform_data = {
176 .name = "TMU01",
177 .channel_offset = 0x10,
178 .timer_bit = 1,
179 .clocksource_rating = 200,
180};
181
182static struct resource tmu01_resources[] = {
183 [0] = {
184 .name = "TMU01",
185 .start = 0xffd80014,
186 .end = 0xffd8001f,
187 .flags = IORESOURCE_MEM,
188 },
189 [1] = {
190 .start = gic_spi(33),
191 .flags = IORESOURCE_IRQ,
192 },
193};
194
195static struct platform_device tmu01_device = {
196 .name = "sh_tmu",
197 .id = 1,
198 .dev = {
199 .platform_data = &tmu01_platform_data,
200 },
201 .resource = tmu01_resources,
202 .num_resources = ARRAY_SIZE(tmu01_resources),
203};
204
205static struct platform_device *r8a7779_early_devices[] __initdata = {
206 &scif0_device,
207 &scif1_device,
208 &scif2_device,
209 &scif3_device,
210 &scif4_device,
211 &scif5_device,
212 &tmu00_device,
213 &tmu01_device,
214};
215
216static struct platform_device *r8a7779_late_devices[] __initdata = {
217};
218
219void __init r8a7779_add_standard_devices(void)
220{
221 platform_add_devices(r8a7779_early_devices,
222 ARRAY_SIZE(r8a7779_early_devices));
223 platform_add_devices(r8a7779_late_devices,
224 ARRAY_SIZE(r8a7779_late_devices));
225}
226
227void __init r8a7779_add_early_devices(void)
228{
229 early_platform_add_devices(r8a7779_early_devices,
230 ARRAY_SIZE(r8a7779_early_devices));
231}