aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-20 20:55:34 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-20 20:55:34 -0500
commitf3dc1294c8a40d7eedd676b65f42f0b828fd3d8c (patch)
tree1d6c12f0513930728ef0be116f2ba24e5889cffc /arch/arm
parentaf487e4209ef5e82b1932b8b15fd59efbd56a955 (diff)
parent2727da8595d6a134502ce576b812f0bb0e3c14ed (diff)
Merge tag 'fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes part 2 from Olof Johansson: "Here are a few more fixes for 3.8. Two branches of fixes for Samsung platforms, including fixes for the audio build errors on all non-DT platforms. There's also a fixup to the sunxi device-tree file renames due to a bad patch application by me, and a fix for OMAP due to function renames merged through the powerpc tree." * tag 'fixes2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: OMAP2+: Fix compillation error in mach-omap2/timer.c ARM: sunxi: rename device tree source files ARM: EXYNOS: Avoid passing the clks through platform data ARM: S5PV210: Avoid passing the clks through platform data ARM: S5P64X0: Add I2S clkdev support ARM: S5PC100: Add I2S clkdev support ARM: S3C64XX: Add I2S clkdev support ARM: EXYNOS: Fix MSHC clocks instance names ARM: EXYNOS: Fix NULL pointer dereference bug in SMDKV310 ARM: EXYNOS: Fix NULL pointer dereference bug in SMDK4X12 ARM: EXYNOS: Fix NULL pointer dereference bug in Origen ARM: SAMSUNG: Add missing include guard to gpio-core.h pinctrl: exynos5440/samsung: Staticize pcfgs pinctrl: samsung: Fix a typo in pinctrl-samsung.h ARM: EXYNOS: fix skip scu_enable() for EXYNOS5440 ARM: EXYNOS: fix GIC using for EXYNOS5440 ARM: EXYNOS: fix build error when MFC is not selected
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/boot/dts/sun4i-a10-cubieboard.dts (renamed from arch/arm/boot/dts/sun4i-cubieboard.dts)0
-rw-r--r--arch/arm/boot/dts/sun4i-a10.dtsi (renamed from arch/arm/boot/dts/sun4i.dtsi)0
-rw-r--r--arch/arm/boot/dts/sun5i-a13-olinuxino.dts (renamed from arch/arm/boot/dts/sun5i-olinuxino.dts)0
-rw-r--r--arch/arm/boot/dts/sun5i-a13.dtsi (renamed from arch/arm/boot/dts/sun5i.dtsi)0
-rw-r--r--arch/arm/mach-exynos/clock-exynos4.c4
-rw-r--r--arch/arm/mach-exynos/common.c3
-rw-r--r--arch/arm/mach-exynos/dev-audio.c12
-rw-r--r--arch/arm/mach-exynos/mach-exynos5-dt.c2
-rw-r--r--arch/arm/mach-exynos/mach-origen.c4
-rw-r--r--arch/arm/mach-exynos/mach-smdk4x12.c4
-rw-r--r--arch/arm/mach-exynos/mach-smdkv310.c4
-rw-r--r--arch/arm/mach-exynos/platsmp.c2
-rw-r--r--arch/arm/mach-omap2/timer.c2
-rw-r--r--arch/arm/mach-s3c64xx/clock.c126
-rw-r--r--arch/arm/mach-s3c64xx/dev-audio.c11
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6440.c49
-rw-r--r--arch/arm/mach-s5p64x0/clock-s5p6450.c61
-rw-r--r--arch/arm/mach-s5p64x0/dev-audio.c12
-rw-r--r--arch/arm/mach-s5pc100/clock.c48
-rw-r--r--arch/arm/mach-s5pc100/dev-audio.c16
-rw-r--r--arch/arm/mach-s5pv210/dev-audio.c16
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h5
22 files changed, 201 insertions, 180 deletions
diff --git a/arch/arm/boot/dts/sun4i-cubieboard.dts b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
index 5cab82540437..5cab82540437 100644
--- a/arch/arm/boot/dts/sun4i-cubieboard.dts
+++ b/arch/arm/boot/dts/sun4i-a10-cubieboard.dts
diff --git a/arch/arm/boot/dts/sun4i.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index e61fdd47bd01..e61fdd47bd01 100644
--- a/arch/arm/boot/dts/sun4i.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
diff --git a/arch/arm/boot/dts/sun5i-olinuxino.dts b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
index 498a091a4ea2..498a091a4ea2 100644
--- a/arch/arm/boot/dts/sun5i-olinuxino.dts
+++ b/arch/arm/boot/dts/sun5i-a13-olinuxino.dts
diff --git a/arch/arm/boot/dts/sun5i.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 59a2d265a98e..59a2d265a98e 100644
--- a/arch/arm/boot/dts/sun5i.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
diff --git a/arch/arm/mach-exynos/clock-exynos4.c b/arch/arm/mach-exynos/clock-exynos4.c
index efead60b9436..bbcb3dea0d40 100644
--- a/arch/arm/mach-exynos/clock-exynos4.c
+++ b/arch/arm/mach-exynos/clock-exynos4.c
@@ -529,7 +529,7 @@ static struct clk exynos4_init_clocks_off[] = {
529 .enable = exynos4_clk_ip_fsys_ctrl, 529 .enable = exynos4_clk_ip_fsys_ctrl,
530 .ctrlbit = (1 << 8), 530 .ctrlbit = (1 << 8),
531 }, { 531 }, {
532 .name = "dwmmc", 532 .name = "biu",
533 .parent = &exynos4_clk_aclk_133.clk, 533 .parent = &exynos4_clk_aclk_133.clk,
534 .enable = exynos4_clk_ip_fsys_ctrl, 534 .enable = exynos4_clk_ip_fsys_ctrl,
535 .ctrlbit = (1 << 9), 535 .ctrlbit = (1 << 9),
@@ -1134,7 +1134,7 @@ static struct clksrc_clk exynos4_clksrcs[] = {
1134 .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 }, 1134 .reg_div = { .reg = EXYNOS4_CLKDIV_MFC, .shift = 0, .size = 4 },
1135 }, { 1135 }, {
1136 .clk = { 1136 .clk = {
1137 .name = "sclk_dwmmc", 1137 .name = "ciu",
1138 .parent = &exynos4_clk_dout_mmc4.clk, 1138 .parent = &exynos4_clk_dout_mmc4.clk,
1139 .enable = exynos4_clksrc_mask_fsys_ctrl, 1139 .enable = exynos4_clksrc_mask_fsys_ctrl,
1140 .ctrlbit = (1 << 16), 1140 .ctrlbit = (1 << 16),
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index ddd4b72c6f9a..d6d0dc651089 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -679,7 +679,8 @@ void __init exynos5_init_irq(void)
679 * Theses parameters should be NULL and 0 because EXYNOS4 679 * Theses parameters should be NULL and 0 because EXYNOS4
680 * uses GIC instead of VIC. 680 * uses GIC instead of VIC.
681 */ 681 */
682 s5p_init_irq(NULL, 0); 682 if (!of_machine_is_compatible("samsung,exynos5440"))
683 s5p_init_irq(NULL, 0);
683 684
684 gic_arch_extn.irq_set_wake = s3c_irq_wake; 685 gic_arch_extn.irq_set_wake = s3c_irq_wake;
685} 686}
diff --git a/arch/arm/mach-exynos/dev-audio.c b/arch/arm/mach-exynos/dev-audio.c
index a1cb42c39590..9d1a60951d7b 100644
--- a/arch/arm/mach-exynos/dev-audio.c
+++ b/arch/arm/mach-exynos/dev-audio.c
@@ -23,11 +23,6 @@
23#include <mach/irqs.h> 23#include <mach/irqs.h>
24#include <mach/regs-audss.h> 24#include <mach/regs-audss.h>
25 25
26static const char *rclksrc[] = {
27 [0] = "busclk",
28 [1] = "i2sclk",
29};
30
31static int exynos4_cfg_i2s(struct platform_device *pdev) 26static int exynos4_cfg_i2s(struct platform_device *pdev)
32{ 27{
33 /* configure GPIO for i2s port */ 28 /* configure GPIO for i2s port */
@@ -55,7 +50,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
55 .i2s = { 50 .i2s = {
56 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI 51 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
57 | QUIRK_NEED_RSTCLR, 52 | QUIRK_NEED_RSTCLR,
58 .src_clk = rclksrc,
59 .idma_addr = EXYNOS4_AUDSS_INT_MEM, 53 .idma_addr = EXYNOS4_AUDSS_INT_MEM,
60 }, 54 },
61 }, 55 },
@@ -78,17 +72,11 @@ struct platform_device exynos4_device_i2s0 = {
78 }, 72 },
79}; 73};
80 74
81static const char *rclksrc_v3[] = {
82 [0] = "sclk_i2s",
83 [1] = "no_such_clock",
84};
85
86static struct s3c_audio_pdata i2sv3_pdata = { 75static struct s3c_audio_pdata i2sv3_pdata = {
87 .cfg_gpio = exynos4_cfg_i2s, 76 .cfg_gpio = exynos4_cfg_i2s,
88 .type = { 77 .type = {
89 .i2s = { 78 .i2s = {
90 .quirks = QUIRK_NO_MUXPSR, 79 .quirks = QUIRK_NO_MUXPSR,
91 .src_clk = rclksrc_v3,
92 }, 80 },
93 }, 81 },
94}; 82};
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index f038c8cadca4..e99d3d8f2bcf 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -163,6 +163,7 @@ static char const *exynos5_dt_compat[] __initdata = {
163 163
164static void __init exynos5_reserve(void) 164static void __init exynos5_reserve(void)
165{ 165{
166#ifdef CONFIG_S5P_DEV_MFC
166 struct s5p_mfc_dt_meminfo mfc_mem; 167 struct s5p_mfc_dt_meminfo mfc_mem;
167 168
168 /* Reserve memory for MFC only if it's available */ 169 /* Reserve memory for MFC only if it's available */
@@ -170,6 +171,7 @@ static void __init exynos5_reserve(void)
170 if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem)) 171 if (of_scan_flat_dt(s5p_fdt_find_mfc_mem, &mfc_mem))
171 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff, 172 s5p_mfc_reserve_mem(mfc_mem.roff, mfc_mem.rsize, mfc_mem.loff,
172 mfc_mem.lsize); 173 mfc_mem.lsize);
174#endif
173} 175}
174 176
175DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)") 177DT_MACHINE_START(EXYNOS5_DT, "SAMSUNG EXYNOS5 (Flattened Device Tree)")
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index e6f4191cd14c..5e34b9c16196 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -621,7 +621,7 @@ static struct pwm_lookup origen_pwm_lookup[] = {
621 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL), 621 PWM_LOOKUP("s3c24xx-pwm.0", 0, "pwm-backlight.0", NULL),
622}; 622};
623 623
624#ifdef CONFIG_DRM_EXYNOS 624#ifdef CONFIG_DRM_EXYNOS_FIMD
625static struct exynos_drm_fimd_pdata drm_fimd_pdata = { 625static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
626 .panel = { 626 .panel = {
627 .timing = { 627 .timing = {
@@ -793,7 +793,7 @@ static void __init origen_machine_init(void)
793 s5p_i2c_hdmiphy_set_platdata(NULL); 793 s5p_i2c_hdmiphy_set_platdata(NULL);
794 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0); 794 s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
795 795
796#ifdef CONFIG_DRM_EXYNOS 796#ifdef CONFIG_DRM_EXYNOS_FIMD
797 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; 797 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
798 exynos4_fimd0_gpio_setup_24bpp(); 798 exynos4_fimd0_gpio_setup_24bpp();
799#else 799#else
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index a1555a73c7af..ae6da40c2aa9 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -246,7 +246,7 @@ static struct samsung_keypad_platdata smdk4x12_keypad_data __initdata = {
246 .cols = 8, 246 .cols = 8,
247}; 247};
248 248
249#ifdef CONFIG_DRM_EXYNOS 249#ifdef CONFIG_DRM_EXYNOS_FIMD
250static struct exynos_drm_fimd_pdata drm_fimd_pdata = { 250static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
251 .panel = { 251 .panel = {
252 .timing = { 252 .timing = {
@@ -360,7 +360,7 @@ static void __init smdk4x12_machine_init(void)
360 360
361 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata); 361 s3c_hsotg_set_platdata(&smdk4x12_hsotg_pdata);
362 362
363#ifdef CONFIG_DRM_EXYNOS 363#ifdef CONFIG_DRM_EXYNOS_FIMD
364 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; 364 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
365 exynos4_fimd0_gpio_setup_24bpp(); 365 exynos4_fimd0_gpio_setup_24bpp();
366#else 366#else
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index b7384241fb03..35548e3c097d 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -159,7 +159,7 @@ static struct platform_device smdkv310_lcd_lte480wv = {
159 .dev.platform_data = &smdkv310_lcd_lte480wv_data, 159 .dev.platform_data = &smdkv310_lcd_lte480wv_data,
160}; 160};
161 161
162#ifdef CONFIG_DRM_EXYNOS 162#ifdef CONFIG_DRM_EXYNOS_FIMD
163static struct exynos_drm_fimd_pdata drm_fimd_pdata = { 163static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
164 .panel = { 164 .panel = {
165 .timing = { 165 .timing = {
@@ -402,7 +402,7 @@ static void __init smdkv310_machine_init(void)
402 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data); 402 samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
403 pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup)); 403 pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
404 404
405#ifdef CONFIG_DRM_EXYNOS 405#ifdef CONFIG_DRM_EXYNOS_FIMD
406 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata; 406 s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
407 exynos4_fimd0_gpio_setup_24bpp(); 407 exynos4_fimd0_gpio_setup_24bpp();
408#else 408#else
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 4ca8ff14a5bf..c5c840e947b8 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -198,7 +198,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
198{ 198{
199 int i; 199 int i;
200 200
201 if (!soc_is_exynos5250()) 201 if (!(soc_is_exynos5250() || soc_is_exynos5440()))
202 scu_enable(scu_base_addr()); 202 scu_enable(scu_base_addr());
203 203
204 /* 204 /*
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index 06e141543623..691aa674665a 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -175,7 +175,7 @@ static struct device_node * __init omap_get_timer_dt(struct of_device_id *match,
175 continue; 175 continue;
176 } 176 }
177 177
178 prom_add_property(np, &device_disabled); 178 of_add_property(np, &device_disabled);
179 return np; 179 return np;
180 } 180 }
181 181
diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 1a6f85777449..803711e283b2 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -149,25 +149,6 @@ static struct clk init_clocks_off[] = {
149 .enable = s3c64xx_pclk_ctrl, 149 .enable = s3c64xx_pclk_ctrl,
150 .ctrlbit = S3C6410_CLKCON_PCLK_I2C1, 150 .ctrlbit = S3C6410_CLKCON_PCLK_I2C1,
151 }, { 151 }, {
152 .name = "iis",
153 .devname = "samsung-i2s.0",
154 .parent = &clk_p,
155 .enable = s3c64xx_pclk_ctrl,
156 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
157 }, {
158 .name = "iis",
159 .devname = "samsung-i2s.1",
160 .parent = &clk_p,
161 .enable = s3c64xx_pclk_ctrl,
162 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
163 }, {
164#ifdef CONFIG_CPU_S3C6410
165 .name = "iis",
166 .parent = &clk_p,
167 .enable = s3c64xx_pclk_ctrl,
168 .ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
169 }, {
170#endif
171 .name = "keypad", 152 .name = "keypad",
172 .parent = &clk_p, 153 .parent = &clk_p,
173 .enable = s3c64xx_pclk_ctrl, 154 .enable = s3c64xx_pclk_ctrl,
@@ -337,6 +318,32 @@ static struct clk clk_48m_spi1 = {
337 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48, 318 .ctrlbit = S3C_CLKCON_SCLK_SPI1_48,
338}; 319};
339 320
321static struct clk clk_i2s0 = {
322 .name = "iis",
323 .devname = "samsung-i2s.0",
324 .parent = &clk_p,
325 .enable = s3c64xx_pclk_ctrl,
326 .ctrlbit = S3C_CLKCON_PCLK_IIS0,
327};
328
329static struct clk clk_i2s1 = {
330 .name = "iis",
331 .devname = "samsung-i2s.1",
332 .parent = &clk_p,
333 .enable = s3c64xx_pclk_ctrl,
334 .ctrlbit = S3C_CLKCON_PCLK_IIS1,
335};
336
337#ifdef CONFIG_CPU_S3C6410
338static struct clk clk_i2s2 = {
339 .name = "iis",
340 .devname = "samsung-i2s.2",
341 .parent = &clk_p,
342 .enable = s3c64xx_pclk_ctrl,
343 .ctrlbit = S3C6410_CLKCON_PCLK_IIS2,
344};
345#endif
346
340static struct clk init_clocks[] = { 347static struct clk init_clocks[] = {
341 { 348 {
342 .name = "lcd", 349 .name = "lcd",
@@ -660,6 +667,7 @@ static struct clksrc_sources clkset_audio1 = {
660 .nr_sources = ARRAY_SIZE(clkset_audio1_list), 667 .nr_sources = ARRAY_SIZE(clkset_audio1_list),
661}; 668};
662 669
670#ifdef CONFIG_CPU_S3C6410
663static struct clk *clkset_audio2_list[] = { 671static struct clk *clkset_audio2_list[] = {
664 [0] = &clk_mout_epll.clk, 672 [0] = &clk_mout_epll.clk,
665 [1] = &clk_dout_mpll, 673 [1] = &clk_dout_mpll,
@@ -672,6 +680,7 @@ static struct clksrc_sources clkset_audio2 = {
672 .sources = clkset_audio2_list, 680 .sources = clkset_audio2_list,
673 .nr_sources = ARRAY_SIZE(clkset_audio2_list), 681 .nr_sources = ARRAY_SIZE(clkset_audio2_list),
674}; 682};
683#endif
675 684
676static struct clksrc_clk clksrcs[] = { 685static struct clksrc_clk clksrcs[] = {
677 { 686 {
@@ -685,36 +694,6 @@ static struct clksrc_clk clksrcs[] = {
685 .sources = &clkset_uhost, 694 .sources = &clkset_uhost,
686 }, { 695 }, {
687 .clk = { 696 .clk = {
688 .name = "audio-bus",
689 .devname = "samsung-i2s.0",
690 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
691 .enable = s3c64xx_sclk_ctrl,
692 },
693 .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 },
694 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 },
695 .sources = &clkset_audio0,
696 }, {
697 .clk = {
698 .name = "audio-bus",
699 .devname = "samsung-i2s.1",
700 .ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
701 .enable = s3c64xx_sclk_ctrl,
702 },
703 .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
704 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
705 .sources = &clkset_audio1,
706 }, {
707 .clk = {
708 .name = "audio-bus",
709 .devname = "samsung-i2s.2",
710 .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
711 .enable = s3c64xx_sclk_ctrl,
712 },
713 .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
714 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
715 .sources = &clkset_audio2,
716 }, {
717 .clk = {
718 .name = "irda-bus", 697 .name = "irda-bus",
719 .ctrlbit = S3C_CLKCON_SCLK_IRDA, 698 .ctrlbit = S3C_CLKCON_SCLK_IRDA,
720 .enable = s3c64xx_sclk_ctrl, 699 .enable = s3c64xx_sclk_ctrl,
@@ -805,6 +784,43 @@ static struct clksrc_clk clk_sclk_spi1 = {
805 .sources = &clkset_spi_mmc, 784 .sources = &clkset_spi_mmc,
806}; 785};
807 786
787static struct clksrc_clk clk_audio_bus0 = {
788 .clk = {
789 .name = "audio-bus",
790 .devname = "samsung-i2s.0",
791 .ctrlbit = S3C_CLKCON_SCLK_AUDIO0,
792 .enable = s3c64xx_sclk_ctrl,
793 },
794 .reg_src = { .reg = S3C_CLK_SRC, .shift = 7, .size = 3 },
795 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 8, .size = 4 },
796 .sources = &clkset_audio0,
797};
798
799static struct clksrc_clk clk_audio_bus1 = {
800 .clk = {
801 .name = "audio-bus",
802 .devname = "samsung-i2s.1",
803 .ctrlbit = S3C_CLKCON_SCLK_AUDIO1,
804 .enable = s3c64xx_sclk_ctrl,
805 },
806 .reg_src = { .reg = S3C_CLK_SRC, .shift = 10, .size = 3 },
807 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 12, .size = 4 },
808 .sources = &clkset_audio1,
809};
810
811#ifdef CONFIG_CPU_S3C6410
812static struct clksrc_clk clk_audio_bus2 = {
813 .clk = {
814 .name = "audio-bus",
815 .devname = "samsung-i2s.2",
816 .ctrlbit = S3C6410_CLKCON_SCLK_AUDIO2,
817 .enable = s3c64xx_sclk_ctrl,
818 },
819 .reg_src = { .reg = S3C6410_CLK_SRC2, .shift = 0, .size = 3 },
820 .reg_div = { .reg = S3C_CLK_DIV2, .shift = 24, .size = 4 },
821 .sources = &clkset_audio2,
822};
823#endif
808/* Clock initialisation code */ 824/* Clock initialisation code */
809 825
810static struct clksrc_clk *init_parents[] = { 826static struct clksrc_clk *init_parents[] = {
@@ -820,6 +836,8 @@ static struct clksrc_clk *clksrc_cdev[] = {
820 &clk_sclk_mmc2, 836 &clk_sclk_mmc2,
821 &clk_sclk_spi0, 837 &clk_sclk_spi0,
822 &clk_sclk_spi1, 838 &clk_sclk_spi1,
839 &clk_audio_bus0,
840 &clk_audio_bus1,
823}; 841};
824 842
825static struct clk *clk_cdev[] = { 843static struct clk *clk_cdev[] = {
@@ -828,6 +846,8 @@ static struct clk *clk_cdev[] = {
828 &clk_hsmmc2, 846 &clk_hsmmc2,
829 &clk_48m_spi0, 847 &clk_48m_spi0,
830 &clk_48m_spi1, 848 &clk_48m_spi1,
849 &clk_i2s0,
850 &clk_i2s1,
831}; 851};
832 852
833static struct clk_lookup s3c64xx_clk_lookup[] = { 853static struct clk_lookup s3c64xx_clk_lookup[] = {
@@ -844,6 +864,14 @@ static struct clk_lookup s3c64xx_clk_lookup[] = {
844 CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0), 864 CLKDEV_INIT("s3c6410-spi.0", "spi_busclk2", &clk_48m_spi0),
845 CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk), 865 CLKDEV_INIT("s3c6410-spi.1", "spi_busclk1", &clk_sclk_spi1.clk),
846 CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1), 866 CLKDEV_INIT("s3c6410-spi.1", "spi_busclk2", &clk_48m_spi1),
867 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
868 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus0.clk),
869 CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
870 CLKDEV_INIT("samsung-i2s.1", "i2s_opclk1", &clk_audio_bus1.clk),
871#ifdef CONFIG_CPU_S3C6410
872 CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
873 CLKDEV_INIT("samsung-i2s.2", "i2s_opclk1", &clk_audio_bus2.clk),
874#endif
847}; 875};
848 876
849#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1) 877#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
diff --git a/arch/arm/mach-s3c64xx/dev-audio.c b/arch/arm/mach-s3c64xx/dev-audio.c
index 35f3e07eaccc..e367e87bbc29 100644
--- a/arch/arm/mach-s3c64xx/dev-audio.c
+++ b/arch/arm/mach-s3c64xx/dev-audio.c
@@ -23,11 +23,6 @@
23#include <linux/platform_data/asoc-s3c.h> 23#include <linux/platform_data/asoc-s3c.h>
24#include <plat/gpio-cfg.h> 24#include <plat/gpio-cfg.h>
25 25
26static const char *rclksrc[] = {
27 [0] = "iis",
28 [1] = "audio-bus",
29};
30
31static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev) 26static int s3c64xx_i2s_cfg_gpio(struct platform_device *pdev)
32{ 27{
33 unsigned int base; 28 unsigned int base;
@@ -64,11 +59,6 @@ static struct resource s3c64xx_iis0_resource[] = {
64 59
65static struct s3c_audio_pdata i2sv3_pdata = { 60static struct s3c_audio_pdata i2sv3_pdata = {
66 .cfg_gpio = s3c64xx_i2s_cfg_gpio, 61 .cfg_gpio = s3c64xx_i2s_cfg_gpio,
67 .type = {
68 .i2s = {
69 .src_clk = rclksrc,
70 },
71 },
72}; 62};
73 63
74struct platform_device s3c64xx_device_iis0 = { 64struct platform_device s3c64xx_device_iis0 = {
@@ -110,7 +100,6 @@ static struct s3c_audio_pdata i2sv4_pdata = {
110 .type = { 100 .type = {
111 .i2s = { 101 .i2s = {
112 .quirks = QUIRK_PRI_6CHAN, 102 .quirks = QUIRK_PRI_6CHAN,
113 .src_clk = rclksrc,
114 }, 103 },
115 }, 104 },
116}; 105};
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index 000445596ec4..5112371079d0 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -243,12 +243,6 @@ static struct clk init_clocks_off[] = {
243 .enable = s5p64x0_pclk_ctrl, 243 .enable = s5p64x0_pclk_ctrl,
244 .ctrlbit = (1 << 25), 244 .ctrlbit = (1 << 25),
245 }, { 245 }, {
246 .name = "iis",
247 .devname = "samsung-i2s.0",
248 .parent = &clk_pclk_low.clk,
249 .enable = s5p64x0_pclk_ctrl,
250 .ctrlbit = (1 << 26),
251 }, {
252 .name = "dsim", 246 .name = "dsim",
253 .parent = &clk_pclk_low.clk, 247 .parent = &clk_pclk_low.clk,
254 .enable = s5p64x0_pclk_ctrl, 248 .enable = s5p64x0_pclk_ctrl,
@@ -405,15 +399,6 @@ static struct clksrc_clk clksrcs[] = {
405 .sources = &clkset_group1, 399 .sources = &clkset_group1,
406 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 }, 400 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
407 .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 }, 401 .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
408 }, {
409 .clk = {
410 .name = "sclk_audio2",
411 .ctrlbit = (1 << 11),
412 .enable = s5p64x0_sclk_ctrl,
413 },
414 .sources = &clkset_audio,
415 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
416 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
417 }, 402 },
418}; 403};
419 404
@@ -464,6 +449,26 @@ static struct clksrc_clk clk_sclk_uclk = {
464 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 }, 449 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
465}; 450};
466 451
452static struct clk clk_i2s0 = {
453 .name = "iis",
454 .devname = "samsung-i2s.0",
455 .parent = &clk_pclk_low.clk,
456 .enable = s5p64x0_pclk_ctrl,
457 .ctrlbit = (1 << 26),
458};
459
460static struct clksrc_clk clk_audio_bus2 = {
461 .clk = {
462 .name = "sclk_audio2",
463 .devname = "samsung-i2s.0",
464 .ctrlbit = (1 << 11),
465 .enable = s5p64x0_sclk_ctrl,
466 },
467 .sources = &clkset_audio,
468 .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
469 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
470};
471
467static struct clksrc_clk clk_sclk_spi0 = { 472static struct clksrc_clk clk_sclk_spi0 = {
468 .clk = { 473 .clk = {
469 .name = "sclk_spi", 474 .name = "sclk_spi",
@@ -506,13 +511,18 @@ static struct clk dummy_apb_pclk = {
506 .id = -1, 511 .id = -1,
507}; 512};
508 513
514static struct clk *clk_cdev[] = {
515 &clk_i2s0,
516};
517
509static struct clksrc_clk *clksrc_cdev[] = { 518static struct clksrc_clk *clksrc_cdev[] = {
510 &clk_sclk_uclk, 519 &clk_sclk_uclk,
511 &clk_sclk_spi0, 520 &clk_sclk_spi0,
512 &clk_sclk_spi1, 521 &clk_sclk_spi1,
513 &clk_sclk_mmc0, 522 &clk_sclk_mmc0,
514 &clk_sclk_mmc1, 523 &clk_sclk_mmc1,
515 &clk_sclk_mmc2 524 &clk_sclk_mmc2,
525 &clk_audio_bus2,
516}; 526};
517 527
518static struct clk_lookup s5p6440_clk_lookup[] = { 528static struct clk_lookup s5p6440_clk_lookup[] = {
@@ -524,6 +534,8 @@ static struct clk_lookup s5p6440_clk_lookup[] = {
524 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), 534 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
525 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), 535 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
526 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), 536 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
537 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
538 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_audio_bus2.clk),
527}; 539};
528 540
529void __init_or_cpufreq s5p6440_setup_clocks(void) 541void __init_or_cpufreq s5p6440_setup_clocks(void)
@@ -596,12 +608,17 @@ static struct clk *clks[] __initdata = {
596void __init s5p6440_register_clocks(void) 608void __init s5p6440_register_clocks(void)
597{ 609{
598 int ptr; 610 int ptr;
611 unsigned int cnt;
599 612
600 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); 613 s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
601 614
602 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) 615 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
603 s3c_register_clksrc(sysclks[ptr], 1); 616 s3c_register_clksrc(sysclks[ptr], 1);
604 617
618 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
619 for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
620 s3c_disable_clocks(clk_cdev[cnt], 1);
621
605 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 622 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
606 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 623 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
607 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) 624 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index f3e0ef3d27c9..154dea702d70 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -247,24 +247,6 @@ static struct clk init_clocks_off[] = {
247 .enable = s5p64x0_pclk_ctrl, 247 .enable = s5p64x0_pclk_ctrl,
248 .ctrlbit = (1 << 22), 248 .ctrlbit = (1 << 22),
249 }, { 249 }, {
250 .name = "iis",
251 .devname = "samsung-i2s.0",
252 .parent = &clk_pclk_low.clk,
253 .enable = s5p64x0_pclk_ctrl,
254 .ctrlbit = (1 << 26),
255 }, {
256 .name = "iis",
257 .devname = "samsung-i2s.1",
258 .parent = &clk_pclk_low.clk,
259 .enable = s5p64x0_pclk_ctrl,
260 .ctrlbit = (1 << 15),
261 }, {
262 .name = "iis",
263 .devname = "samsung-i2s.2",
264 .parent = &clk_pclk_low.clk,
265 .enable = s5p64x0_pclk_ctrl,
266 .ctrlbit = (1 << 16),
267 }, {
268 .name = "i2c", 250 .name = "i2c",
269 .devname = "s3c2440-i2c.1", 251 .devname = "s3c2440-i2c.1",
270 .parent = &clk_pclk_low.clk, 252 .parent = &clk_pclk_low.clk,
@@ -402,6 +384,7 @@ static struct clksrc_sources clkset_sclk_audio0 = {
402static struct clksrc_clk clk_sclk_audio0 = { 384static struct clksrc_clk clk_sclk_audio0 = {
403 .clk = { 385 .clk = {
404 .name = "audio-bus", 386 .name = "audio-bus",
387 .devname = "samsung-i2s.0",
405 .enable = s5p64x0_sclk_ctrl, 388 .enable = s5p64x0_sclk_ctrl,
406 .ctrlbit = (1 << 8), 389 .ctrlbit = (1 << 8),
407 .parent = &clk_dout_epll.clk, 390 .parent = &clk_dout_epll.clk,
@@ -549,6 +532,36 @@ static struct clksrc_clk clk_sclk_spi1 = {
549 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 }, 532 .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
550}; 533};
551 534
535static struct clk clk_i2s0 = {
536 .name = "iis",
537 .devname = "samsung-i2s.0",
538 .parent = &clk_pclk_low.clk,
539 .enable = s5p64x0_pclk_ctrl,
540 .ctrlbit = (1 << 26),
541};
542
543static struct clk clk_i2s1 = {
544 .name = "iis",
545 .devname = "samsung-i2s.1",
546 .parent = &clk_pclk_low.clk,
547 .enable = s5p64x0_pclk_ctrl,
548 .ctrlbit = (1 << 15),
549};
550
551static struct clk clk_i2s2 = {
552 .name = "iis",
553 .devname = "samsung-i2s.2",
554 .parent = &clk_pclk_low.clk,
555 .enable = s5p64x0_pclk_ctrl,
556 .ctrlbit = (1 << 16),
557};
558
559static struct clk *clk_cdev[] = {
560 &clk_i2s0,
561 &clk_i2s1,
562 &clk_i2s2,
563};
564
552static struct clksrc_clk *clksrc_cdev[] = { 565static struct clksrc_clk *clksrc_cdev[] = {
553 &clk_sclk_uclk, 566 &clk_sclk_uclk,
554 &clk_sclk_spi0, 567 &clk_sclk_spi0,
@@ -556,6 +569,7 @@ static struct clksrc_clk *clksrc_cdev[] = {
556 &clk_sclk_mmc0, 569 &clk_sclk_mmc0,
557 &clk_sclk_mmc1, 570 &clk_sclk_mmc1,
558 &clk_sclk_mmc2, 571 &clk_sclk_mmc2,
572 &clk_sclk_audio0,
559}; 573};
560 574
561static struct clk_lookup s5p6450_clk_lookup[] = { 575static struct clk_lookup s5p6450_clk_lookup[] = {
@@ -567,6 +581,10 @@ static struct clk_lookup s5p6450_clk_lookup[] = {
567 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk), 581 CLKDEV_INIT("s3c-sdhci.0", "mmc_busclk.2", &clk_sclk_mmc0.clk),
568 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk), 582 CLKDEV_INIT("s3c-sdhci.1", "mmc_busclk.2", &clk_sclk_mmc1.clk),
569 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk), 583 CLKDEV_INIT("s3c-sdhci.2", "mmc_busclk.2", &clk_sclk_mmc2.clk),
584 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
585 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk1", &clk_sclk_audio0.clk),
586 CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
587 CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
570}; 588};
571 589
572/* Clock initialization code */ 590/* Clock initialization code */
@@ -584,7 +602,6 @@ static struct clksrc_clk *sysclks[] = {
584 &clk_pclk, 602 &clk_pclk,
585 &clk_hclk_low, 603 &clk_hclk_low,
586 &clk_pclk_low, 604 &clk_pclk_low,
587 &clk_sclk_audio0,
588}; 605};
589 606
590static struct clk dummy_apb_pclk = { 607static struct clk dummy_apb_pclk = {
@@ -661,10 +678,16 @@ void __init_or_cpufreq s5p6450_setup_clocks(void)
661void __init s5p6450_register_clocks(void) 678void __init s5p6450_register_clocks(void)
662{ 679{
663 int ptr; 680 int ptr;
681 unsigned int cnt;
664 682
665 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) 683 for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
666 s3c_register_clksrc(sysclks[ptr], 1); 684 s3c_register_clksrc(sysclks[ptr], 1);
667 685
686
687 s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
688 for (cnt = 0; cnt < ARRAY_SIZE(clk_cdev); cnt++)
689 s3c_disable_clocks(clk_cdev[cnt], 1);
690
668 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); 691 s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
669 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); 692 s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
670 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++) 693 for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
index a0d6edfd23a0..723d4773c323 100644
--- a/arch/arm/mach-s5p64x0/dev-audio.c
+++ b/arch/arm/mach-s5p64x0/dev-audio.c
@@ -19,11 +19,6 @@
19#include <mach/dma.h> 19#include <mach/dma.h>
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21 21
22static const char *rclksrc[] = {
23 [0] = "iis",
24 [1] = "sclk_audio2",
25};
26
27static int s5p6440_cfg_i2s(struct platform_device *pdev) 22static int s5p6440_cfg_i2s(struct platform_device *pdev)
28{ 23{
29 switch (pdev->id) { 24 switch (pdev->id) {
@@ -45,7 +40,6 @@ static struct s3c_audio_pdata s5p6440_i2s_pdata = {
45 .type = { 40 .type = {
46 .i2s = { 41 .i2s = {
47 .quirks = QUIRK_PRI_6CHAN, 42 .quirks = QUIRK_PRI_6CHAN,
48 .src_clk = rclksrc,
49 }, 43 },
50 }, 44 },
51}; 45};
@@ -93,7 +87,6 @@ static struct s3c_audio_pdata s5p6450_i2s0_pdata = {
93 .type = { 87 .type = {
94 .i2s = { 88 .i2s = {
95 .quirks = QUIRK_PRI_6CHAN, 89 .quirks = QUIRK_PRI_6CHAN,
96 .src_clk = rclksrc,
97 }, 90 },
98 }, 91 },
99}; 92};
@@ -110,11 +103,6 @@ struct platform_device s5p6450_device_iis0 = {
110 103
111static struct s3c_audio_pdata s5p6450_i2s_pdata = { 104static struct s3c_audio_pdata s5p6450_i2s_pdata = {
112 .cfg_gpio = s5p6450_cfg_i2s, 105 .cfg_gpio = s5p6450_cfg_i2s,
113 .type = {
114 .i2s = {
115 .src_clk = rclksrc,
116 },
117 },
118}; 106};
119 107
120static struct resource s5p6450_i2s1_resource[] = { 108static struct resource s5p6450_i2s1_resource[] = {
diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 926219791f0d..a206dc35eff1 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -606,24 +606,6 @@ static struct clk init_clocks_off[] = {
606 .enable = s5pc100_d1_4_ctrl, 606 .enable = s5pc100_d1_4_ctrl,
607 .ctrlbit = (1 << 13), 607 .ctrlbit = (1 << 13),
608 }, { 608 }, {
609 .name = "iis",
610 .devname = "samsung-i2s.0",
611 .parent = &clk_div_pclkd1.clk,
612 .enable = s5pc100_d1_5_ctrl,
613 .ctrlbit = (1 << 0),
614 }, {
615 .name = "iis",
616 .devname = "samsung-i2s.1",
617 .parent = &clk_div_pclkd1.clk,
618 .enable = s5pc100_d1_5_ctrl,
619 .ctrlbit = (1 << 1),
620 }, {
621 .name = "iis",
622 .devname = "samsung-i2s.2",
623 .parent = &clk_div_pclkd1.clk,
624 .enable = s5pc100_d1_5_ctrl,
625 .ctrlbit = (1 << 2),
626 }, {
627 .name = "ac97", 609 .name = "ac97",
628 .parent = &clk_div_pclkd1.clk, 610 .parent = &clk_div_pclkd1.clk,
629 .enable = s5pc100_d1_5_ctrl, 611 .enable = s5pc100_d1_5_ctrl,
@@ -724,6 +706,30 @@ static struct clk clk_48m_spi2 = {
724 .ctrlbit = (1 << 9), 706 .ctrlbit = (1 << 9),
725}; 707};
726 708
709static struct clk clk_i2s0 = {
710 .name = "iis",
711 .devname = "samsung-i2s.0",
712 .parent = &clk_div_pclkd1.clk,
713 .enable = s5pc100_d1_5_ctrl,
714 .ctrlbit = (1 << 0),
715};
716
717static struct clk clk_i2s1 = {
718 .name = "iis",
719 .devname = "samsung-i2s.1",
720 .parent = &clk_div_pclkd1.clk,
721 .enable = s5pc100_d1_5_ctrl,
722 .ctrlbit = (1 << 1),
723};
724
725static struct clk clk_i2s2 = {
726 .name = "iis",
727 .devname = "samsung-i2s.2",
728 .parent = &clk_div_pclkd1.clk,
729 .enable = s5pc100_d1_5_ctrl,
730 .ctrlbit = (1 << 2),
731};
732
727static struct clk clk_vclk54m = { 733static struct clk clk_vclk54m = {
728 .name = "vclk_54m", 734 .name = "vclk_54m",
729 .rate = 54000000, 735 .rate = 54000000,
@@ -1154,6 +1160,9 @@ static struct clk *clk_cdev[] = {
1154 &clk_48m_spi0, 1160 &clk_48m_spi0,
1155 &clk_48m_spi1, 1161 &clk_48m_spi1,
1156 &clk_48m_spi2, 1162 &clk_48m_spi2,
1163 &clk_i2s0,
1164 &clk_i2s1,
1165 &clk_i2s2,
1157}; 1166};
1158 1167
1159static struct clksrc_clk *clksrc_cdev[] = { 1168static struct clksrc_clk *clksrc_cdev[] = {
@@ -1321,6 +1330,9 @@ static struct clk_lookup s5pc100_clk_lookup[] = {
1321 CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk), 1330 CLKDEV_INIT("s5pc100-spi.1", "spi_busclk2", &clk_sclk_spi1.clk),
1322 CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2), 1331 CLKDEV_INIT("s5pc100-spi.2", "spi_busclk1", &clk_48m_spi2),
1323 CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk), 1332 CLKDEV_INIT("s5pc100-spi.2", "spi_busclk2", &clk_sclk_spi2.clk),
1333 CLKDEV_INIT("samsung-i2s.0", "i2s_opclk0", &clk_i2s0),
1334 CLKDEV_INIT("samsung-i2s.1", "i2s_opclk0", &clk_i2s1),
1335 CLKDEV_INIT("samsung-i2s.2", "i2s_opclk0", &clk_i2s2),
1324}; 1336};
1325 1337
1326void __init s5pc100_register_clocks(void) 1338void __init s5pc100_register_clocks(void)
diff --git a/arch/arm/mach-s5pc100/dev-audio.c b/arch/arm/mach-s5pc100/dev-audio.c
index 1cc252cef268..46f488b09391 100644
--- a/arch/arm/mach-s5pc100/dev-audio.c
+++ b/arch/arm/mach-s5pc100/dev-audio.c
@@ -39,18 +39,12 @@ static int s5pc100_cfg_i2s(struct platform_device *pdev)
39 return 0; 39 return 0;
40} 40}
41 41
42static const char *rclksrc_v5[] = {
43 [0] = "iis",
44 [1] = "i2sclkd2",
45};
46
47static struct s3c_audio_pdata i2sv5_pdata = { 42static struct s3c_audio_pdata i2sv5_pdata = {
48 .cfg_gpio = s5pc100_cfg_i2s, 43 .cfg_gpio = s5pc100_cfg_i2s,
49 .type = { 44 .type = {
50 .i2s = { 45 .i2s = {
51 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI 46 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
52 | QUIRK_NEED_RSTCLR, 47 | QUIRK_NEED_RSTCLR,
53 .src_clk = rclksrc_v5,
54 }, 48 },
55 }, 49 },
56}; 50};
@@ -72,18 +66,8 @@ struct platform_device s5pc100_device_iis0 = {
72 }, 66 },
73}; 67};
74 68
75static const char *rclksrc_v3[] = {
76 [0] = "iis",
77 [1] = "sclk_audio",
78};
79
80static struct s3c_audio_pdata i2sv3_pdata = { 69static struct s3c_audio_pdata i2sv3_pdata = {
81 .cfg_gpio = s5pc100_cfg_i2s, 70 .cfg_gpio = s5pc100_cfg_i2s,
82 .type = {
83 .i2s = {
84 .src_clk = rclksrc_v3,
85 },
86 },
87}; 71};
88 72
89static struct resource s5pc100_iis1_resource[] = { 73static struct resource s5pc100_iis1_resource[] = {
diff --git a/arch/arm/mach-s5pv210/dev-audio.c b/arch/arm/mach-s5pv210/dev-audio.c
index 0a5480bbcbd5..addfb165c13d 100644
--- a/arch/arm/mach-s5pv210/dev-audio.c
+++ b/arch/arm/mach-s5pv210/dev-audio.c
@@ -20,11 +20,6 @@
20#include <mach/irqs.h> 20#include <mach/irqs.h>
21#include <mach/regs-audss.h> 21#include <mach/regs-audss.h>
22 22
23static const char *rclksrc[] = {
24 [0] = "busclk",
25 [1] = "i2sclk",
26};
27
28static int s5pv210_cfg_i2s(struct platform_device *pdev) 23static int s5pv210_cfg_i2s(struct platform_device *pdev)
29{ 24{
30 /* configure GPIO for i2s port */ 25 /* configure GPIO for i2s port */
@@ -52,7 +47,6 @@ static struct s3c_audio_pdata i2sv5_pdata = {
52 .i2s = { 47 .i2s = {
53 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI 48 .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI
54 | QUIRK_NEED_RSTCLR, 49 | QUIRK_NEED_RSTCLR,
55 .src_clk = rclksrc,
56 .idma_addr = S5PV210_AUDSS_INT_MEM, 50 .idma_addr = S5PV210_AUDSS_INT_MEM,
57 }, 51 },
58 }, 52 },
@@ -75,18 +69,8 @@ struct platform_device s5pv210_device_iis0 = {
75 }, 69 },
76}; 70};
77 71
78static const char *rclksrc_v3[] = {
79 [0] = "iis",
80 [1] = "audio-bus",
81};
82
83static struct s3c_audio_pdata i2sv3_pdata = { 72static struct s3c_audio_pdata i2sv3_pdata = {
84 .cfg_gpio = s5pv210_cfg_i2s, 73 .cfg_gpio = s5pv210_cfg_i2s,
85 .type = {
86 .i2s = {
87 .src_clk = rclksrc_v3,
88 },
89 },
90}; 74};
91 75
92static struct resource s5pv210_iis1_resource[] = { 76static struct resource s5pv210_iis1_resource[] = {
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index dfd8b7af8c7a..f7a3ea2c498a 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -11,6 +11,9 @@
11 * published by the Free Software Foundation. 11 * published by the Free Software Foundation.
12*/ 12*/
13 13
14#ifndef __PLAT_SAMSUNG_GPIO_CORE_H
15#define __PLAT_SAMSUNG_GPIO_CORE_H
16
14#define GPIOCON_OFF (0x00) 17#define GPIOCON_OFF (0x00)
15#define GPIODAT_OFF (0x04) 18#define GPIODAT_OFF (0x04)
16 19
@@ -124,3 +127,5 @@ extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
124/* locking wrappers to deal with multiple access to the same gpio bank */ 127/* locking wrappers to deal with multiple access to the same gpio bank */
125#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) 128#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
126#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) 129#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
130
131#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */