aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm
diff options
context:
space:
mode:
authorThomas Abraham <thomas.abraham@linaro.org>2011-10-24 05:47:51 -0400
committerKukjin Kim <kgene.kim@samsung.com>2011-12-22 20:06:57 -0500
commitafba7f91e64025748a2cfec181e5a910fd0dee0e (patch)
tree37872a38eea179a6adb9eacbd5334b4352043413 /arch/arm
parent5f5a7a5578c5885201cf9c85856f023fe8b81765 (diff)
ARM: SAMSUNG: remove struct 's3c24xx_uart_clksrc' and all uses of it
With clkdev based clock lookup added to samsung serial driver, the use of 'struct s3c24xx_uart_clksrc' to supply clock names in platform data is removed from all the Samsung platform code. Cc: Ben Dooks <ben-linux@fluff.org> Cc: Ramax Lo <ramaxlo@gmail.com> Cc: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-exynos/init.c15
-rw-r--r--arch/arm/mach-s3c2410/mach-bast.c22
-rw-r--r--arch/arm/mach-s3c2410/mach-vr1000.c24
-rw-r--r--arch/arm/mach-s3c2440/mach-anubis.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-at2440evb.c22
-rw-r--r--arch/arm/mach-s3c2440/mach-osiris.c24
-rw-r--r--arch/arm/mach-s3c2440/mach-rx1950.c18
-rw-r--r--arch/arm/mach-s3c2440/mach-rx3715.c19
-rw-r--r--arch/arm/mach-s5p64x0/init.c31
-rw-r--r--arch/arm/mach-s5pv210/init.c19
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-serial.h23
11 files changed, 14 insertions, 225 deletions
diff --git a/arch/arm/mach-exynos/init.c b/arch/arm/mach-exynos/init.c
index a8a83e3881a4..e836c9cdc200 100644
--- a/arch/arm/mach-exynos/init.c
+++ b/arch/arm/mach-exynos/init.c
@@ -14,15 +14,6 @@
14#include <plat/devs.h> 14#include <plat/devs.h>
15#include <plat/regs-serial.h> 15#include <plat/regs-serial.h>
16 16
17static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = {
18 [0] = {
19 .name = "uclk1",
20 .divisor = 1,
21 .min_baud = 0,
22 .max_baud = 0,
23 },
24};
25
26/* uart registration process */ 17/* uart registration process */
27void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) 18void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
28{ 19{
@@ -30,11 +21,7 @@ void __init exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
30 u32 ucnt; 21 u32 ucnt;
31 22
32 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { 23 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
33 if (!tcfg->clocks) { 24 tcfg->has_fracval = 1;
34 tcfg->has_fracval = 1;
35 tcfg->clocks = exynos4_serial_clocks;
36 tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks);
37 }
38 tcfg->flags |= NO_NEED_CHECK_CLKSRC; 25 tcfg->flags |= NO_NEED_CHECK_CLKSRC;
39 } 26 }
40 27
diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c
index a20ae1ad4062..71b955877793 100644
--- a/arch/arm/mach-s3c2410/mach-bast.c
+++ b/arch/arm/mach-s3c2410/mach-bast.c
@@ -164,22 +164,6 @@ static struct map_desc bast_iodesc[] __initdata = {
164#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 164#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
165#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 165#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
166 166
167static struct s3c24xx_uart_clksrc bast_serial_clocks[] = {
168 [0] = {
169 .name = "uclk",
170 .divisor = 1,
171 .min_baud = 0,
172 .max_baud = 0,
173 },
174 [1] = {
175 .name = "pclk",
176 .divisor = 1,
177 .min_baud = 0,
178 .max_baud = 0,
179 }
180};
181
182
183static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = { 167static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
184 [0] = { 168 [0] = {
185 .hwport = 0, 169 .hwport = 0,
@@ -187,8 +171,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
187 .ucon = UCON, 171 .ucon = UCON,
188 .ulcon = ULCON, 172 .ulcon = ULCON,
189 .ufcon = UFCON, 173 .ufcon = UFCON,
190 .clocks = bast_serial_clocks,
191 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
192 }, 174 },
193 [1] = { 175 [1] = {
194 .hwport = 1, 176 .hwport = 1,
@@ -196,8 +178,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
196 .ucon = UCON, 178 .ucon = UCON,
197 .ulcon = ULCON, 179 .ulcon = ULCON,
198 .ufcon = UFCON, 180 .ufcon = UFCON,
199 .clocks = bast_serial_clocks,
200 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
201 }, 181 },
202 /* port 2 is not actually used */ 182 /* port 2 is not actually used */
203 [2] = { 183 [2] = {
@@ -206,8 +186,6 @@ static struct s3c2410_uartcfg bast_uartcfgs[] __initdata = {
206 .ucon = UCON, 186 .ucon = UCON,
207 .ulcon = ULCON, 187 .ulcon = ULCON,
208 .ufcon = UFCON, 188 .ufcon = UFCON,
209 .clocks = bast_serial_clocks,
210 .clocks_size = ARRAY_SIZE(bast_serial_clocks),
211 } 189 }
212}; 190};
213 191
diff --git a/arch/arm/mach-s3c2410/mach-vr1000.c b/arch/arm/mach-s3c2410/mach-vr1000.c
index df47e8e90065..0f0a9a1795e9 100644
--- a/arch/arm/mach-s3c2410/mach-vr1000.c
+++ b/arch/arm/mach-s3c2410/mach-vr1000.c
@@ -109,23 +109,6 @@ static struct map_desc vr1000_iodesc[] __initdata = {
109#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 109#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
110#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 110#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
111 111
112/* uart clock source(s) */
113
114static struct s3c24xx_uart_clksrc vr1000_serial_clocks[] = {
115 [0] = {
116 .name = "uclk",
117 .divisor = 1,
118 .min_baud = 0,
119 .max_baud = 0,
120 },
121 [1] = {
122 .name = "pclk",
123 .divisor = 1,
124 .min_baud = 0,
125 .max_baud = 0.
126 }
127};
128
129static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = { 112static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
130 [0] = { 113 [0] = {
131 .hwport = 0, 114 .hwport = 0,
@@ -133,8 +116,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
133 .ucon = UCON, 116 .ucon = UCON,
134 .ulcon = ULCON, 117 .ulcon = ULCON,
135 .ufcon = UFCON, 118 .ufcon = UFCON,
136 .clocks = vr1000_serial_clocks,
137 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
138 }, 119 },
139 [1] = { 120 [1] = {
140 .hwport = 1, 121 .hwport = 1,
@@ -142,8 +123,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
142 .ucon = UCON, 123 .ucon = UCON,
143 .ulcon = ULCON, 124 .ulcon = ULCON,
144 .ufcon = UFCON, 125 .ufcon = UFCON,
145 .clocks = vr1000_serial_clocks,
146 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
147 }, 126 },
148 /* port 2 is not actually used */ 127 /* port 2 is not actually used */
149 [2] = { 128 [2] = {
@@ -152,9 +131,6 @@ static struct s3c2410_uartcfg vr1000_uartcfgs[] __initdata = {
152 .ucon = UCON, 131 .ucon = UCON,
153 .ulcon = ULCON, 132 .ulcon = ULCON,
154 .ufcon = UFCON, 133 .ufcon = UFCON,
155 .clocks = vr1000_serial_clocks,
156 .clocks_size = ARRAY_SIZE(vr1000_serial_clocks),
157
158 } 134 }
159}; 135};
160 136
diff --git a/arch/arm/mach-s3c2440/mach-anubis.c b/arch/arm/mach-s3c2440/mach-anubis.c
index 74f92fc3fd04..d8f36c0a16ad 100644
--- a/arch/arm/mach-s3c2440/mach-anubis.c
+++ b/arch/arm/mach-s3c2440/mach-anubis.c
@@ -96,22 +96,6 @@ static struct map_desc anubis_iodesc[] __initdata = {
96#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 96#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
97#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 97#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
98 98
99static struct s3c24xx_uart_clksrc anubis_serial_clocks[] = {
100 [0] = {
101 .name = "uclk",
102 .divisor = 1,
103 .min_baud = 0,
104 .max_baud = 0,
105 },
106 [1] = {
107 .name = "pclk",
108 .divisor = 1,
109 .min_baud = 0,
110 .max_baud = 0,
111 }
112};
113
114
115static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = { 99static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
116 [0] = { 100 [0] = {
117 .hwport = 0, 101 .hwport = 0,
@@ -119,8 +103,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
119 .ucon = UCON, 103 .ucon = UCON,
120 .ulcon = ULCON, 104 .ulcon = ULCON,
121 .ufcon = UFCON, 105 .ufcon = UFCON,
122 .clocks = anubis_serial_clocks, 106 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
123 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
124 }, 107 },
125 [1] = { 108 [1] = {
126 .hwport = 2, 109 .hwport = 2,
@@ -128,8 +111,7 @@ static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
128 .ucon = UCON, 111 .ucon = UCON,
129 .ulcon = ULCON, 112 .ulcon = ULCON,
130 .ufcon = UFCON, 113 .ufcon = UFCON,
131 .clocks = anubis_serial_clocks, 114 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
132 .clocks_size = ARRAY_SIZE(anubis_serial_clocks),
133 }, 115 },
134}; 116};
135 117
diff --git a/arch/arm/mach-s3c2440/mach-at2440evb.c b/arch/arm/mach-s3c2440/mach-at2440evb.c
index 38887ee0c784..aa86ca8fa1e9 100644
--- a/arch/arm/mach-s3c2440/mach-at2440evb.c
+++ b/arch/arm/mach-s3c2440/mach-at2440evb.c
@@ -57,22 +57,6 @@ static struct map_desc at2440evb_iodesc[] __initdata = {
57#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE) 57#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE)
58#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) 58#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
59 59
60static struct s3c24xx_uart_clksrc at2440evb_serial_clocks[] = {
61 [0] = {
62 .name = "uclk",
63 .divisor = 1,
64 .min_baud = 0,
65 .max_baud = 0,
66 },
67 [1] = {
68 .name = "pclk",
69 .divisor = 1,
70 .min_baud = 0,
71 .max_baud = 0,
72 }
73};
74
75
76static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = { 60static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
77 [0] = { 61 [0] = {
78 .hwport = 0, 62 .hwport = 0,
@@ -80,8 +64,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
80 .ucon = UCON, 64 .ucon = UCON,
81 .ulcon = ULCON, 65 .ulcon = ULCON,
82 .ufcon = UFCON, 66 .ufcon = UFCON,
83 .clocks = at2440evb_serial_clocks, 67 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
84 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
85 }, 68 },
86 [1] = { 69 [1] = {
87 .hwport = 1, 70 .hwport = 1,
@@ -89,8 +72,7 @@ static struct s3c2410_uartcfg at2440evb_uartcfgs[] __initdata = {
89 .ucon = UCON, 72 .ucon = UCON,
90 .ulcon = ULCON, 73 .ulcon = ULCON,
91 .ufcon = UFCON, 74 .ufcon = UFCON,
92 .clocks = at2440evb_serial_clocks, 75 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
93 .clocks_size = ARRAY_SIZE(at2440evb_serial_clocks),
94 }, 76 },
95}; 77};
96 78
diff --git a/arch/arm/mach-s3c2440/mach-osiris.c b/arch/arm/mach-s3c2440/mach-osiris.c
index dc142ebf8cba..d7e47b2b6ec9 100644
--- a/arch/arm/mach-s3c2440/mach-osiris.c
+++ b/arch/arm/mach-s3c2440/mach-osiris.c
@@ -100,21 +100,6 @@ static struct map_desc osiris_iodesc[] __initdata = {
100#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB 100#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
101#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE 101#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
102 102
103static struct s3c24xx_uart_clksrc osiris_serial_clocks[] = {
104 [0] = {
105 .name = "uclk",
106 .divisor = 1,
107 .min_baud = 0,
108 .max_baud = 0,
109 },
110 [1] = {
111 .name = "pclk",
112 .divisor = 1,
113 .min_baud = 0,
114 .max_baud = 0,
115 }
116};
117
118static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = { 103static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
119 [0] = { 104 [0] = {
120 .hwport = 0, 105 .hwport = 0,
@@ -122,8 +107,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
122 .ucon = UCON, 107 .ucon = UCON,
123 .ulcon = ULCON, 108 .ulcon = ULCON,
124 .ufcon = UFCON, 109 .ufcon = UFCON,
125 .clocks = osiris_serial_clocks, 110 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
126 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
127 }, 111 },
128 [1] = { 112 [1] = {
129 .hwport = 1, 113 .hwport = 1,
@@ -131,8 +115,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
131 .ucon = UCON, 115 .ucon = UCON,
132 .ulcon = ULCON, 116 .ulcon = ULCON,
133 .ufcon = UFCON, 117 .ufcon = UFCON,
134 .clocks = osiris_serial_clocks, 118 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
135 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
136 }, 119 },
137 [2] = { 120 [2] = {
138 .hwport = 2, 121 .hwport = 2,
@@ -140,8 +123,7 @@ static struct s3c2410_uartcfg osiris_uartcfgs[] __initdata = {
140 .ucon = UCON, 123 .ucon = UCON,
141 .ulcon = ULCON, 124 .ulcon = ULCON,
142 .ufcon = UFCON, 125 .ufcon = UFCON,
143 .clocks = osiris_serial_clocks, 126 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
144 .clocks_size = ARRAY_SIZE(osiris_serial_clocks),
145 } 127 }
146}; 128};
147 129
diff --git a/arch/arm/mach-s3c2440/mach-rx1950.c b/arch/arm/mach-s3c2440/mach-rx1950.c
index 094c4bff7fe4..4267cd56bfe7 100644
--- a/arch/arm/mach-s3c2440/mach-rx1950.c
+++ b/arch/arm/mach-s3c2440/mach-rx1950.c
@@ -68,15 +68,6 @@
68static struct map_desc rx1950_iodesc[] __initdata = { 68static struct map_desc rx1950_iodesc[] __initdata = {
69}; 69};
70 70
71static struct s3c24xx_uart_clksrc rx1950_serial_clocks[] = {
72 [0] = {
73 .name = "fclk_n",
74 .divisor = 1,
75 .min_baud = 0,
76 .max_baud = 0,
77 },
78};
79
80static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = { 71static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
81 [0] = { 72 [0] = {
82 .hwport = 0, 73 .hwport = 0,
@@ -84,8 +75,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
84 .ucon = 0x3c5, 75 .ucon = 0x3c5,
85 .ulcon = 0x03, 76 .ulcon = 0x03,
86 .ufcon = 0x51, 77 .ufcon = 0x51,
87 .clocks = rx1950_serial_clocks, 78 .clk_sel = S3C2410_UCON_CLKSEL3,
88 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
89 }, 79 },
90 [1] = { 80 [1] = {
91 .hwport = 1, 81 .hwport = 1,
@@ -93,8 +83,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
93 .ucon = 0x3c5, 83 .ucon = 0x3c5,
94 .ulcon = 0x03, 84 .ulcon = 0x03,
95 .ufcon = 0x51, 85 .ufcon = 0x51,
96 .clocks = rx1950_serial_clocks, 86 .clk_sel = S3C2410_UCON_CLKSEL3,
97 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
98 }, 87 },
99 /* IR port */ 88 /* IR port */
100 [2] = { 89 [2] = {
@@ -103,8 +92,7 @@ static struct s3c2410_uartcfg rx1950_uartcfgs[] __initdata = {
103 .ucon = 0x3c5, 92 .ucon = 0x3c5,
104 .ulcon = 0x43, 93 .ulcon = 0x43,
105 .ufcon = 0xf1, 94 .ufcon = 0xf1,
106 .clocks = rx1950_serial_clocks, 95 .clk_sel = S3C2410_UCON_CLKSEL3,
107 .clocks_size = ARRAY_SIZE(rx1950_serial_clocks),
108 }, 96 },
109}; 97};
110 98
diff --git a/arch/arm/mach-s3c2440/mach-rx3715.c b/arch/arm/mach-s3c2440/mach-rx3715.c
index f934f5b88a4a..3d5e2e67971e 100644
--- a/arch/arm/mach-s3c2440/mach-rx3715.c
+++ b/arch/arm/mach-s3c2440/mach-rx3715.c
@@ -67,16 +67,6 @@ static struct map_desc rx3715_iodesc[] __initdata = {
67 }, 67 },
68}; 68};
69 69
70
71static struct s3c24xx_uart_clksrc rx3715_serial_clocks[] = {
72 [0] = {
73 .name = "fclk_n",
74 .divisor = 1,
75 .min_baud = 0,
76 .max_baud = 0,
77 }
78};
79
80static struct s3c2410_uartcfg rx3715_uartcfgs[] = { 70static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
81 [0] = { 71 [0] = {
82 .hwport = 0, 72 .hwport = 0,
@@ -84,8 +74,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
84 .ucon = 0x3c5, 74 .ucon = 0x3c5,
85 .ulcon = 0x03, 75 .ulcon = 0x03,
86 .ufcon = 0x51, 76 .ufcon = 0x51,
87 .clocks = rx3715_serial_clocks, 77 .clk_sel = S3C2410_UCON_CLKSEL3,
88 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
89 }, 78 },
90 [1] = { 79 [1] = {
91 .hwport = 1, 80 .hwport = 1,
@@ -93,8 +82,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
93 .ucon = 0x3c5, 82 .ucon = 0x3c5,
94 .ulcon = 0x03, 83 .ulcon = 0x03,
95 .ufcon = 0x00, 84 .ufcon = 0x00,
96 .clocks = rx3715_serial_clocks, 85 .clk_sel = S3C2410_UCON_CLKSEL3,
97 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
98 }, 86 },
99 /* IR port */ 87 /* IR port */
100 [2] = { 88 [2] = {
@@ -103,8 +91,7 @@ static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
103 .ucon = 0x3c5, 91 .ucon = 0x3c5,
104 .ulcon = 0x43, 92 .ulcon = 0x43,
105 .ufcon = 0x51, 93 .ufcon = 0x51,
106 .clocks = rx3715_serial_clocks, 94 .clk_sel = S3C2410_UCON_CLKSEL3,
107 .clocks_size = ARRAY_SIZE(rx3715_serial_clocks),
108 } 95 }
109}; 96};
110 97
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
index 79833caf8165..659a66c131a1 100644
--- a/arch/arm/mach-s5p64x0/init.c
+++ b/arch/arm/mach-s5p64x0/init.c
@@ -23,36 +23,7 @@
23#include <plat/s5p6450.h> 23#include <plat/s5p6450.h>
24#include <plat/regs-serial.h> 24#include <plat/regs-serial.h>
25 25
26static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
27 [0] = {
28 .name = "pclk_low",
29 .divisor = 1,
30 .min_baud = 0,
31 .max_baud = 0,
32 },
33 [1] = {
34 .name = "uclk1",
35 .divisor = 1,
36 .min_baud = 0,
37 .max_baud = 0,
38 },
39};
40
41/* uart registration process */ 26/* uart registration process */
42
43void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
44{
45 struct s3c2410_uartcfg *tcfg = cfg;
46 u32 ucnt;
47
48 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
49 if (!tcfg->clocks) {
50 tcfg->clocks = s5p64x0_serial_clocks;
51 tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
52 }
53 }
54}
55
56void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no) 27void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
57{ 28{
58 int uart; 29 int uart;
@@ -62,12 +33,10 @@ void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
62 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART; 33 s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
63 } 34 }
64 35
65 s5p64x0_common_init_uarts(cfg, no);
66 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); 36 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
67} 37}
68 38
69void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no) 39void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
70{ 40{
71 s5p64x0_common_init_uarts(cfg, no);
72 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no); 41 s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
73} 42}
diff --git a/arch/arm/mach-s5pv210/init.c b/arch/arm/mach-s5pv210/init.c
index 4865ae2c475a..468a5f886193 100644
--- a/arch/arm/mach-s5pv210/init.c
+++ b/arch/arm/mach-s5pv210/init.c
@@ -18,27 +18,8 @@
18#include <plat/s5pv210.h> 18#include <plat/s5pv210.h>
19#include <plat/regs-serial.h> 19#include <plat/regs-serial.h>
20 20
21static struct s3c24xx_uart_clksrc s5pv210_serial_clocks[] = {
22 [0] = {
23 .name = "pclk",
24 .divisor = 1,
25 .min_baud = 0,
26 .max_baud = 0,
27 },
28};
29
30/* uart registration process */ 21/* uart registration process */
31void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no) 22void __init s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
32{ 23{
33 struct s3c2410_uartcfg *tcfg = cfg;
34 u32 ucnt;
35
36 for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
37 if (!tcfg->clocks) {
38 tcfg->clocks = s5pv210_serial_clocks;
39 tcfg->clocks_size = ARRAY_SIZE(s5pv210_serial_clocks);
40 }
41 }
42
43 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); 24 s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no);
44} 25}
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h
index b493d8d0cc0c..25f0c364f61a 100644
--- a/arch/arm/plat-samsung/include/plat/regs-serial.h
+++ b/arch/arm/plat-samsung/include/plat/regs-serial.h
@@ -229,26 +229,6 @@
229 229
230#ifndef __ASSEMBLY__ 230#ifndef __ASSEMBLY__
231 231
232/* struct s3c24xx_uart_clksrc
233 *
234 * this structure defines a named clock source that can be used for the
235 * uart, so that the best clock can be selected for the requested baud
236 * rate.
237 *
238 * min_baud and max_baud define the range of baud-rates this clock is
239 * acceptable for, if they are both zero, it is assumed any baud rate that
240 * can be generated from this clock will be used.
241 *
242 * divisor gives the divisor from the clock to the one seen by the uart
243*/
244
245struct s3c24xx_uart_clksrc {
246 const char *name;
247 unsigned int divisor;
248 unsigned int min_baud;
249 unsigned int max_baud;
250};
251
252/* configuration structure for per-machine configurations for the 232/* configuration structure for per-machine configurations for the
253 * serial port 233 * serial port
254 * 234 *
@@ -268,9 +248,6 @@ struct s3c2410_uartcfg {
268 unsigned long ucon; /* value of ucon for port */ 248 unsigned long ucon; /* value of ucon for port */
269 unsigned long ulcon; /* value of ulcon for port */ 249 unsigned long ulcon; /* value of ulcon for port */
270 unsigned long ufcon; /* value of ufcon for port */ 250 unsigned long ufcon; /* value of ufcon for port */
271
272 struct s3c24xx_uart_clksrc *clocks;
273 unsigned int clocks_size;
274}; 251};
275 252
276/* s3c24xx_uart_devs 253/* s3c24xx_uart_devs
generated by cgit v1.2.2 (git 2.25.0) at 2024-09-23 01:16:51 -0400