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authorHaojian Zhuang <haojian.zhuang@marvell.com>2009-08-31 05:23:44 -0400
committerEric Miao <eric.y.miao@gmail.com>2009-09-10 06:49:25 -0400
commit9db95cb6c430b3d9b8abbd5870e0d1e69b884ba0 (patch)
tree615284df52111305931a39dff00faaa982c6f182 /arch/arm
parent063936df925f54a32649490f828af9af66ef8c8e (diff)
[ARM] pxa: expand irq support for PXA93x and PXA950
PXA93x/950 has additional 64 GPIOs, each is a secondary interrupt source for IRQ_GPIO_2_x, extend PXA_GPIO_IRQ_{BASE,NUM}. PXA93x/950 specific IRQ definitions are added as well. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-pxa/include/mach/irqs.h28
1 files changed, 26 insertions, 2 deletions
diff --git a/arch/arm/mach-pxa/include/mach/irqs.h b/arch/arm/mach-pxa/include/mach/irqs.h
index 6a1d95993342..abd2c2cf213c 100644
--- a/arch/arm/mach-pxa/include/mach/irqs.h
+++ b/arch/arm/mach-pxa/include/mach/irqs.h
@@ -68,6 +68,7 @@
68#ifdef CONFIG_PXA3xx 68#ifdef CONFIG_PXA3xx
69#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */ 69#define IRQ_SSP4 PXA_IRQ(13) /* SSP4 service request */
70#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */ 70#define IRQ_CIR PXA_IRQ(34) /* Consumer IR */
71#define IRQ_COMM_WDT PXA_IRQ(35) /* Comm WDT interrupt */
71#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */ 72#define IRQ_TSI PXA_IRQ(36) /* Touch Screen Interface (PXA320) */
72#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */ 73#define IRQ_USIM2 PXA_IRQ(38) /* USIM2 Controller */
73#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */ 74#define IRQ_GRPHICS PXA_IRQ(39) /* Graphics Controller */
@@ -81,8 +82,31 @@
81#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */ 82#define IRQ_MMC3 PXA_IRQ(55) /* MMC3 Controller (PXA310) */
82#endif 83#endif
83 84
84#define PXA_GPIO_IRQ_BASE PXA_IRQ(64) 85#ifdef CONFIG_CPU_PXA935
85#define PXA_GPIO_IRQ_NUM (128) 86#define IRQ_U2O PXA_IRQ(64) /* USB OTG 2.0 Controller (PXA935) */
87#define IRQ_U2H PXA_IRQ(65) /* USB Host 2.0 Controller (PXA935) */
88
89#define IRQ_MMC3_PXA935 PXA_IRQ(72) /* MMC3 Controller (PXA935) */
90#define IRQ_MMC4_PXA935 PXA_IRQ(73) /* MMC4 Controller (PXA935) */
91#define IRQ_MMC5_PXA935 PXA_IRQ(74) /* MMC5 Controller (PXA935) */
92
93#define IRQ_U2P PXA_IRQ(93) /* USB PHY D+/D- Lines (PXA935) */
94#endif
95
96#ifdef CONFIG_CPU_PXA930
97#define IRQ_ENHROT PXA_IRQ(37) /* Enhanced Rotary (PXA930) */
98#define IRQ_ACIPC0 PXA_IRQ(5)
99#define IRQ_ACIPC1 PXA_IRQ(40)
100#define IRQ_ACIPC2 PXA_IRQ(19)
101#define IRQ_TRKBALL PXA_IRQ(43) /* Track Ball */
102#endif
103
104#ifdef CONFIG_CPU_PXA950
105#define IRQ_GC500 PXA_IRQ(70) /* Graphics Controller (PXA950) */
106#endif
107
108#define PXA_GPIO_IRQ_BASE PXA_IRQ(96)
109#define PXA_GPIO_IRQ_NUM (192)
86 110
87#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) 111#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x))
88#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) 112#define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))