diff options
author | Abhilash Kesavan <a.kesavan@samsung.com> | 2010-12-21 23:31:49 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-29 19:37:28 -0500 |
commit | 9af7d94f2966895b37b8ef1e0d88bd4d9e317e74 (patch) | |
tree | 566ad29154808a9819fd86e084e2a5bb3eb35d2b /arch/arm | |
parent | f85cbea94c81cda931642c5db34b780de417981d (diff) |
ARM: S5P6440: Change the name for MMC Special Clock
Change the name of mmc spcial clock from mmc_bus to sclk_mmc to be
in line with the naming across the S5P SoCs
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: minor edit of title]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index e4883dc1c8d7..d27ff1a9f488 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c | |||
@@ -419,7 +419,7 @@ static struct clksrc_sources clkset_audio = { | |||
419 | static struct clksrc_clk clksrcs[] = { | 419 | static struct clksrc_clk clksrcs[] = { |
420 | { | 420 | { |
421 | .clk = { | 421 | .clk = { |
422 | .name = "mmc_bus", | 422 | .name = "sclk_mmc", |
423 | .id = 0, | 423 | .id = 0, |
424 | .ctrlbit = (1 << 24), | 424 | .ctrlbit = (1 << 24), |
425 | .enable = s5p64x0_sclk_ctrl, | 425 | .enable = s5p64x0_sclk_ctrl, |
@@ -429,7 +429,7 @@ static struct clksrc_clk clksrcs[] = { | |||
429 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, | 429 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 }, |
430 | }, { | 430 | }, { |
431 | .clk = { | 431 | .clk = { |
432 | .name = "mmc_bus", | 432 | .name = "sclk_mmc", |
433 | .id = 1, | 433 | .id = 1, |
434 | .ctrlbit = (1 << 25), | 434 | .ctrlbit = (1 << 25), |
435 | .enable = s5p64x0_sclk_ctrl, | 435 | .enable = s5p64x0_sclk_ctrl, |
@@ -439,7 +439,7 @@ static struct clksrc_clk clksrcs[] = { | |||
439 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, | 439 | .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 }, |
440 | }, { | 440 | }, { |
441 | .clk = { | 441 | .clk = { |
442 | .name = "mmc_bus", | 442 | .name = "sclk_mmc", |
443 | .id = 2, | 443 | .id = 2, |
444 | .ctrlbit = (1 << 26), | 444 | .ctrlbit = (1 << 26), |
445 | .enable = s5p64x0_sclk_ctrl, | 445 | .enable = s5p64x0_sclk_ctrl, |