arm: msm: Use proper irq accessor functions

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

5 files changed, 10 insertions, 10 deletions

diff --git a/arch/arm/mach-msm/gpio-v2.c b/arch/arm/mach-msm/gpio-v2.c
index 394689a92198..e00e4dee4274 100644
--- a/arch/arm/mach-msm/gpio-v2.c
+++ b/arch/arm/mach-msm/gpio-v2.c
@@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
 
         if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                 bits |= BIT(INTR_DECT_CTL);
-                irq_desc[irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
                 if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH)
                         __set_bit(gpio, msm_gpio.dual_edge_irqs);
                 else
                         __clear_bit(gpio, msm_gpio.dual_edge_irqs);
         } else {
                 bits &= ~BIT(INTR_DECT_CTL);
-                irq_desc[irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
                 __clear_bit(gpio, msm_gpio.dual_edge_irqs);
         }
 
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 176af9dcb8ee..448f2677051b 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type)
         val = readl(msm_chip->regs.int_edge);
         if (flow_type & IRQ_TYPE_EDGE_BOTH) {
                 writel(val | mask, msm_chip->regs.int_edge);
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
         } else {
                 writel(val & ~mask, msm_chip->regs.int_edge);
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
         }
         if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
                 msm_chip->both_edge_detect |= mask;
diff --git a/arch/arm/mach-msm/irq-vic.c b/arch/arm/mach-msm/irq-vic.c
index 68c28bbdc969..84b8103b4686 100644
--- a/arch/arm/mach-msm/irq-vic.c
+++ b/arch/arm/mach-msm/irq-vic.c
@@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
         type = msm_irq_shadow_reg[index].int_type;
         if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                 type |= b;
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
         }
         if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                 type &= ~b;
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
         }
         writel(type, treg);
         msm_irq_shadow_reg[index].int_type = type;
diff --git a/arch/arm/mach-msm/irq.c b/arch/arm/mach-msm/irq.c
index 0b27d899f40e..8033c6aab974 100644
--- a/arch/arm/mach-msm/irq.c
+++ b/arch/arm/mach-msm/irq.c
@@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type)
 
         if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                 writel(readl(treg) | b, treg);
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
         }
         if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) {
                 writel(readl(treg) & (~b), treg);
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
         }
         return 0;
 }
diff --git a/arch/arm/mach-msm/sirc.c b/arch/arm/mach-msm/sirc.c
index 11b54c7aeb09..cfab1c472fbc 100644
--- a/arch/arm/mach-msm/sirc.c
+++ b/arch/arm/mach-msm/sirc.c
@@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type)
         val = readl(sirc_regs.int_type);
         if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
                 val |= mask;
-                irq_desc[d->irq].handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
         } else {
                 val &= ~mask;
-                irq_desc[d->irq].handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
         }
 
         writel(val, sirc_regs.int_type);