Merge branches 'stericsson/timer' and 'omap/dmtimer' into next/timer

65 files changed, 2616 insertions, 2425 deletions

diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile
index 5b114d1558c8..11c85cd2731a 100644
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -4,7 +4,7 @@
 
 # Common support
 obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
-obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o
+obj-y += clock.o clock_data.o opp_data.o reset.o pm_bus.o timer.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
diff --git a/arch/arm/mach-omap1/timer.c b/arch/arm/mach-omap1/timer.c
new file mode 100644
index 000000000000..6e90665a7c47
--- /dev/null
+++ b/arch/arm/mach-omap1/timer.c
@@ -0,0 +1,173 @@
+/**
+ * OMAP1 Dual-Mode Timers - platform device registration
+ *
+ * Contains first level initialization routines which internally
+ * generates timer device information and registers with linux
+ * device model. It also has low level function to chnage the timer
+ * input clock source.
+ *
+ * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma <tarun.kanti@ti.com>
+ * Thara Gopinath <thara@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+
+#include <mach/irqs.h>
+
+#include <plat/dmtimer.h>
+
+#define OMAP1610_GPTIMER1_BASE          0xfffb1400
+#define OMAP1610_GPTIMER2_BASE          0xfffb1c00
+#define OMAP1610_GPTIMER3_BASE          0xfffb2400
+#define OMAP1610_GPTIMER4_BASE          0xfffb2c00
+#define OMAP1610_GPTIMER5_BASE          0xfffb3400
+#define OMAP1610_GPTIMER6_BASE          0xfffb3c00
+#define OMAP1610_GPTIMER7_BASE          0xfffb7400
+#define OMAP1610_GPTIMER8_BASE          0xfffbd400
+
+#define OMAP1_DM_TIMER_COUNT            8
+
+static int omap1_dm_timer_set_src(struct platform_device *pdev,
+                                int source)
+{
+        int n = (pdev->id - 1) << 1;
+        u32 l;
+
+        l = __raw_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
+        l |= source << n;
+        __raw_writel(l, MOD_CONF_CTRL_1);
+
+        return 0;
+}
+
+
+int __init omap1_dm_timer_init(void)
+{
+        int i;
+        int ret;
+        struct dmtimer_platform_data *pdata;
+        struct platform_device *pdev;
+
+        if (!cpu_is_omap16xx())
+                return 0;
+
+        for (i = 1; i <= OMAP1_DM_TIMER_COUNT; i++) {
+                struct resource res[2];
+                u32 base, irq;
+
+                switch (i) {
+                case 1:
+                        base = OMAP1610_GPTIMER1_BASE;
+                        irq = INT_1610_GPTIMER1;
+                        break;
+                case 2:
+                        base = OMAP1610_GPTIMER2_BASE;
+                        irq = INT_1610_GPTIMER2;
+                        break;
+                case 3:
+                        base = OMAP1610_GPTIMER3_BASE;
+                        irq = INT_1610_GPTIMER3;
+                        break;
+                case 4:
+                        base = OMAP1610_GPTIMER4_BASE;
+                        irq = INT_1610_GPTIMER4;
+                        break;
+                case 5:
+                        base = OMAP1610_GPTIMER5_BASE;
+                        irq = INT_1610_GPTIMER5;
+                        break;
+                case 6:
+                        base = OMAP1610_GPTIMER6_BASE;
+                        irq = INT_1610_GPTIMER6;
+                        break;
+                case 7:
+                        base = OMAP1610_GPTIMER7_BASE;
+                        irq = INT_1610_GPTIMER7;
+                        break;
+                case 8:
+                        base = OMAP1610_GPTIMER8_BASE;
+                        irq = INT_1610_GPTIMER8;
+                        break;
+                default:
+                        /*
+                         * not supposed to reach here.
+                         * this is to remove warning.
+                         */
+                        return -EINVAL;
+                }
+
+                pdev = platform_device_alloc("omap_timer", i);
+                if (!pdev) {
+                        pr_err("%s: Failed to device alloc for dmtimer%d\n",
+                                __func__, i);
+                        return -ENOMEM;
+                }
+
+                memset(res, 0, 2 * sizeof(struct resource));
+                res[0].start = base;
+                res[0].end = base + 0x46;
+                res[0].flags = IORESOURCE_MEM;
+                res[1].start = irq;
+                res[1].end = irq;
+                res[1].flags = IORESOURCE_IRQ;
+                ret = platform_device_add_resources(pdev, res,
+                                ARRAY_SIZE(res));
+                if (ret) {
+                        dev_err(&pdev->dev, "%s: Failed to add resources.\n",
+                                __func__);
+                        goto err_free_pdev;
+                }
+
+                pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+                if (!pdata) {
+                        dev_err(&pdev->dev, "%s: Failed to allocate pdata.\n",
+                                __func__);
+                        ret = -ENOMEM;
+                        goto err_free_pdata;
+                }
+
+                pdata->set_timer_src = omap1_dm_timer_set_src;
+                pdata->needs_manual_reset = 1;
+
+                ret = platform_device_add_data(pdev, pdata, sizeof(*pdata));
+                if (ret) {
+                        dev_err(&pdev->dev, "%s: Failed to add platform data.\n",
+                                __func__);
+                        goto err_free_pdata;
+                }
+
+                ret = platform_device_add(pdev);
+                if (ret) {
+                        dev_err(&pdev->dev, "%s: Failed to add platform device.\n",
+                                __func__);
+                        goto err_free_pdata;
+                }
+
+                dev_dbg(&pdev->dev, " Registered.\n");
+        }
+
+        return 0;
+
+err_free_pdata:
+        kfree(pdata);
+
+err_free_pdev:
+        platform_device_unregister(pdev);
+
+        return ret;
+}
+arch_initcall(omap1_dm_timer_init);
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index f34336560437..cd45c045ab8c 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -116,9 +116,12 @@ obj-$(CONFIG_ARCH_OMAP4)		+= $(powerdomain-common) \
 obj-$(CONFIG_ARCH_OMAP2)                += clockdomain.o \
                                            clockdomain2xxx_3xxx.o \
                                            clockdomains2xxx_3xxx_data.o
+obj-$(CONFIG_SOC_OMAP2420)              += clockdomains2420_data.o
+obj-$(CONFIG_SOC_OMAP2430)              += clockdomains2430_data.o
 obj-$(CONFIG_ARCH_OMAP3)                += clockdomain.o \
                                            clockdomain2xxx_3xxx.o \
-                                           clockdomains2xxx_3xxx_data.o
+                                           clockdomains2xxx_3xxx_data.o \
+                                           clockdomains3xxx_data.o
 obj-$(CONFIG_ARCH_OMAP4)                += clockdomain.o \
                                            clockdomain44xx.o \
                                            clockdomains44xx_data.o
@@ -185,78 +188,66 @@ endif
 # Specific board support
 obj-$(CONFIG_MACH_OMAP_GENERIC)         += board-generic.o
 obj-$(CONFIG_MACH_OMAP_H4)              += board-h4.o
-obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o \
-                                           hsmmc.o
+obj-$(CONFIG_MACH_OMAP_2430SDP)         += board-2430sdp.o
 obj-$(CONFIG_MACH_OMAP_APOLLON)         += board-apollon.o
-obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o \
-                                           board-flash.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OVERO)                += board-overo.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP3EVM)             += board-omap3evm.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP3_PANDORA)        += board-omap3pandora.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP_3430SDP)         += board-3430sdp.o \
-                                           hsmmc.o \
-                                           board-flash.o
+obj-$(CONFIG_MACH_OMAP3_BEAGLE)         += board-omap3beagle.o
+obj-$(CONFIG_MACH_DEVKIT8000)           += board-devkit8000.o
+obj-$(CONFIG_MACH_OMAP_LDP)             += board-ldp.o
+obj-$(CONFIG_MACH_OMAP3530_LV_SOM)      += board-omap3logic.o
+obj-$(CONFIG_MACH_OMAP3_TORPEDO)        += board-omap3logic.o
+obj-$(CONFIG_MACH_ENCORE)               += board-omap3encore.o
+obj-$(CONFIG_MACH_OVERO)                += board-overo.o
+obj-$(CONFIG_MACH_OMAP3EVM)             += board-omap3evm.o
+obj-$(CONFIG_MACH_OMAP3_PANDORA)        += board-omap3pandora.o
+obj-$(CONFIG_MACH_OMAP_3430SDP)         += board-3430sdp.o
 obj-$(CONFIG_MACH_NOKIA_N8X0)           += board-n8x0.o
 obj-$(CONFIG_MACH_NOKIA_RM680)          += board-rm680.o \
-                                           sdram-nokia.o \
-                                           hsmmc.o
+                                           sdram-nokia.o
 obj-$(CONFIG_MACH_NOKIA_RX51)           += board-rx51.o \
                                            sdram-nokia.o \
                                            board-rx51-peripherals.o \
-                                           board-rx51-video.o \
-                                           hsmmc.o
+                                           board-rx51-video.o
 obj-$(CONFIG_MACH_OMAP_ZOOM2)           += board-zoom.o \
                                            board-zoom-peripherals.o \
                                            board-zoom-display.o \
-                                           board-flash.o \
-                                           hsmmc.o \
                                            board-zoom-debugboard.o
 obj-$(CONFIG_MACH_OMAP_ZOOM3)           += board-zoom.o \
                                            board-zoom-peripherals.o \
                                            board-zoom-display.o \
-                                           board-flash.o \
-                                           hsmmc.o \
                                            board-zoom-debugboard.o
 obj-$(CONFIG_MACH_OMAP_3630SDP)         += board-3630sdp.o \
                                            board-zoom-peripherals.o \
-                                           board-zoom-display.o \
-                                           board-flash.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_CM_T35)               += board-cm-t35.o \
-                                           hsmmc.o
+                                           board-zoom-display.o
+obj-$(CONFIG_MACH_CM_T35)               += board-cm-t35.o
 obj-$(CONFIG_MACH_CM_T3517)             += board-cm-t3517.o
-obj-$(CONFIG_MACH_IGEP0020)             += board-igep0020.o \
-                                           hsmmc.o
-obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)      += board-omap3touchbook.o \
-                                           hsmmc.o
+obj-$(CONFIG_MACH_IGEP0020)             += board-igep0020.o
+obj-$(CONFIG_MACH_OMAP3_TOUCHBOOK)      += board-omap3touchbook.o
 obj-$(CONFIG_MACH_OMAP_4430SDP)         += board-4430sdp.o \
-                                           hsmmc.o \
                                            omap_phy_internal.o
 obj-$(CONFIG_MACH_OMAP4_PANDA)          += board-omap4panda.o \
-                                           hsmmc.o \
+                                           omap_phy_internal.o
+
+obj-$(CONFIG_MACH_PCM049)               += board-omap4pcm049.o \
                                            omap_phy_internal.o
 
 obj-$(CONFIG_MACH_OMAP3517EVM)          += board-am3517evm.o \
-                                           omap_phy_internal.o \
+                                           omap_phy_internal.o
 
 obj-$(CONFIG_MACH_CRANEBOARD)           += board-am3517crane.o
 
-obj-$(CONFIG_MACH_SBC3530)              += board-omap3stalker.o \
-                                           hsmmc.o
+obj-$(CONFIG_MACH_SBC3530)              += board-omap3stalker.o
 obj-$(CONFIG_MACH_TI8168EVM)            += board-ti8168evm.o
+
 # Platform specific device init code
+
+omap-flash-$(CONFIG_MTD_NAND_OMAP2)     := board-flash.o
+omap-flash-$(CONFIG_MTD_ONENAND_OMAP2)  := board-flash.o
+obj-y                                   += $(omap-flash-y) $(omap-flash-m)
+
+omap-hsmmc-$(CONFIG_MMC_OMAP_HS)        := hsmmc.o
+obj-y                                   += $(omap-hsmmc-m) $(omap-hsmmc-y)
+
+
 usbfs-$(CONFIG_ARCH_OMAP_OTG)           := usb-fs.o
 obj-y                                   += $(usbfs-m) $(usbfs-y)
 obj-y                                   += usb-musb.o
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 2028464cf5b9..618216c8f742 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -141,12 +141,6 @@ static struct omap_board_config_kernel sdp2430_config[] __initdata = {
         {OMAP_TAG_LCD, &sdp2430_lcd_config},
 };
 
-static void __init omap_2430sdp_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static struct regulator_consumer_supply sdp2430_vmmc1_supplies[] = {
         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 };
@@ -235,6 +229,7 @@ static void __init omap_2430sdp_init(void)
 
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap2_hsmmc_init(mmc);
         omap2_usbfs_init(&sdp2430_usb_config);
 
@@ -259,7 +254,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap_2430sdp_map_io,
-        .init_early     = omap_2430sdp_init_early,
+        .init_early     = omap2430_init_early,
         .init_irq       = omap2_init_irq,
         .init_machine   = omap_2430sdp_init,
         .timer          = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index bd600cfb7f80..9bb48eaa4381 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -225,12 +225,6 @@ static struct omap_dss_board_info sdp3430_dss_data = {
 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
 };
 
-static void __init omap_3430sdp_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
-}
-
 static struct omap2_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -719,6 +713,7 @@ static void __init omap_3430sdp_init(void)
                 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
         omap_ads7846_init(1, gpio_pendown, 310, NULL);
         board_serial_init();
+        omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
         usb_musb_init(NULL);
         board_smc91x_init();
         board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
@@ -732,7 +727,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap_3430sdp_init_early,
+        .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap_3430sdp_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c
index e4f37b57a0c4..94febc85d805 100644
--- a/arch/arm/mach-omap2/board-3630sdp.c
+++ b/arch/arm/mach-omap2/board-3630sdp.c
@@ -70,13 +70,6 @@ static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
 static struct omap_board_config_kernel sdp_config[] __initdata = {
 };
 
-static void __init omap_sdp_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
-                                  h8mbx00u0mer0em_sdrc_params);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -207,6 +200,8 @@ static void __init omap_sdp_init(void)
         omap_board_config = sdp_config;
         omap_board_config_size = ARRAY_SIZE(sdp_config);
         zoom_peripherals_init();
+        omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
+                                  h8mbx00u0mer0em_sdrc_params);
         zoom_display_init();
         board_smc91x_init();
         board_flash_init(sdp_flash_partitions, chip_sel_sdp, NAND_BUSWIDTH_16);
@@ -218,7 +213,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap_sdp_init_early,
+        .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap_sdp_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index c7cef44c75d4..ab19d305f61e 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -389,12 +389,6 @@ static struct omap_board_config_kernel sdp4430_config[] __initdata = {
         { OMAP_TAG_LCD,         &sdp4430_lcd_config },
 };
 
-static void __init omap_4430sdp_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static struct omap_musb_board_data musb_board_data = {
         .interface_type         = MUSB_INTERFACE_UTMI,
         .mode                   = MUSB_OTG,
@@ -809,6 +803,7 @@ static void __init omap_4430sdp_init(void)
         omap_sfh7741prox_init();
         platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices));
         board_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap4_sdp4430_wifi_init();
         omap4_twl6030_hsmmc_init(mmc);
 
@@ -841,7 +836,7 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap_4430sdp_map_io,
-        .init_early     = omap_4430sdp_init_early,
+        .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
         .init_machine   = omap_4430sdp_init,
         .timer          = &omap4_timer,
diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c
index 933e9353cb37..9e1b2c248328 100644
--- a/arch/arm/mach-omap2/board-am3517crane.c
+++ b/arch/arm/mach-omap2/board-am3517crane.c
@@ -47,12 +47,6 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
-static void __init am3517_crane_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -70,6 +64,7 @@ static void __init am3517_crane_init(void)
 
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
 
         omap_board_config = am3517_crane_config;
         omap_board_config_size = ARRAY_SIZE(am3517_crane_config);
@@ -101,7 +96,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = am3517_crane_init_early,
+        .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = am3517_crane_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c
index f3006c304150..7d842940c252 100644
--- a/arch/arm/mach-omap2/board-am3517evm.c
+++ b/arch/arm/mach-omap2/board-am3517evm.c
@@ -362,11 +362,6 @@ static struct omap_dss_board_info am3517_evm_dss_data = {
 /*
  * Board initialization
  */
-static void __init am3517_evm_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
 
 static struct omap_musb_board_data musb_board_data = {
         .interface_type         = MUSB_INTERFACE_ULPI,
@@ -469,6 +464,7 @@ static void __init am3517_evm_init(void)
         am3517_evm_i2c_init();
         omap_display_init(&am3517_evm_dss_data);
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
 
         /* Configure GPIO for EHCI port */
         omap_mux_init_gpio(57, OMAP_PIN_OUTPUT);
@@ -493,7 +489,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = am3517_evm_init_early,
+        .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = am3517_evm_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index 70211703ff9f..cf546f86014e 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -273,12 +273,6 @@ static struct omap_board_config_kernel apollon_config[] __initdata = {
         { OMAP_TAG_LCD,         &apollon_lcd_config },
 };
 
-static void __init omap_apollon_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static struct gpio apollon_gpio_leds[] __initdata = {
         { LED0_GPIO13, GPIOF_OUT_INIT_LOW, "LED0" }, /* LED0 - AA10 */
         { LED1_GPIO14, GPIOF_OUT_INIT_LOW, "LED1" }, /* LED1 - AA6  */
@@ -340,6 +334,7 @@ static void __init omap_apollon_init(void)
          */
         platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
 }
 
 static void __init omap_apollon_map_io(void)
@@ -353,7 +348,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap_apollon_map_io,
-        .init_early     = omap_apollon_init_early,
+        .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
         .init_machine   = omap_apollon_init,
         .timer          = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c
index 3af8aab435b5..e15d39bffe79 100644
--- a/arch/arm/mach-omap2/board-cm-t35.c
+++ b/arch/arm/mach-omap2/board-cm-t35.c
@@ -471,13 +471,6 @@ static void __init cm_t35_init_i2c(void)
         omap3_pmic_init("tps65930", &cm_t35_twldata);
 }
 
-static void __init cm_t35_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         /* nCS and IRQ for CM-T35 ethernet */
@@ -610,6 +603,8 @@ static void __init cm_t3x_common_init(void)
         omap_board_config_size = ARRAY_SIZE(cm_t35_config);
         omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
         cm_t35_init_i2c();
         omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
         cm_t35_init_ethernet();
@@ -637,7 +632,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = cm_t35_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = cm_t35_init,
         .timer          = &omap3_timer,
@@ -647,7 +642,7 @@ MACHINE_START(CM_T3730, "Compulab CM-T3730")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = cm_t35_init_early,
+        .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = cm_t3730_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c
index 05c72f4c1b57..867bf671719c 100644
--- a/arch/arm/mach-omap2/board-cm-t3517.c
+++ b/arch/arm/mach-omap2/board-cm-t3517.c
@@ -251,12 +251,6 @@ static inline void cm_t3517_init_nand(void) {}
 static struct omap_board_config_kernel cm_t3517_config[] __initdata = {
 };
 
-static void __init cm_t3517_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         /* GPIO186 - Green LED */
@@ -289,6 +283,7 @@ static void __init cm_t3517_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap_board_config = cm_t3517_config;
         omap_board_config_size = ARRAY_SIZE(cm_t3517_config);
         cm_t3517_init_leds();
@@ -302,7 +297,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = cm_t3517_init_early,
+        .init_early     = am35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = cm_t3517_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c
index b6002ec31c6a..4b1f6c68c358 100644
--- a/arch/arm/mach-omap2/board-devkit8000.c
+++ b/arch/arm/mach-omap2/board-devkit8000.c
@@ -397,14 +397,6 @@ static struct platform_device keys_gpio = {
         },
 };
 
-
-static void __init devkit8000_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                  mt46h32m32lf6_sdrc_params);
-}
-
 static void __init devkit8000_init_irq(void)
 {
         omap3_init_irq();
@@ -645,6 +637,8 @@ static void __init devkit8000_init(void)
 {
         omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                  mt46h32m32lf6_sdrc_params);
 
         omap_dm9000_init();
 
@@ -670,7 +664,7 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = devkit8000_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = devkit8000_init_irq,
         .init_machine   = devkit8000_init,
         .timer          = &omap3_secure_timer,
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index 54db41a84a9b..5223898f50e4 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -36,12 +36,12 @@ static struct omap_board_config_kernel generic_config[] = {
 static void __init omap_generic_init_early(void)
 {
         omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
 }
 
 static void __init omap_generic_init(void)
 {
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap_board_config = generic_config;
         omap_board_config_size = ARRAY_SIZE(generic_config);
 }
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 45de2b319ec9..948fde010c69 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -290,12 +290,6 @@ static struct omap_board_config_kernel h4_config[] __initdata = {
         { OMAP_TAG_LCD,         &h4_lcd_config },
 };
 
-static void __init omap_h4_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static void __init omap_h4_init_irq(void)
 {
         omap2_init_irq();
@@ -371,6 +365,7 @@ static void __init omap_h4_init(void)
         platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
         omap2_usbfs_init(&h4_usb_config);
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         h4_init_flash();
 }
 
@@ -385,7 +380,7 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap_h4_map_io,
-        .init_early     = omap_h4_init_early,
+        .init_early     = omap2420_init_early,
         .init_irq       = omap_h4_init_irq,
         .init_machine   = omap_h4_init,
         .timer          = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c
index 35be778caf1b..7b66338e451b 100644
--- a/arch/arm/mach-omap2/board-igep0020.c
+++ b/arch/arm/mach-omap2/board-igep0020.c
@@ -491,13 +491,6 @@ static struct platform_device *igep_devices[] __initdata = {
         &igep_vwlan_device,
 };
 
-static void __init igep_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(m65kxxxxam_sdrc_params,
-                                  m65kxxxxam_sdrc_params);
-}
-
 static int igep2_keymap[] = {
         KEY(0, 0, KEY_LEFT),
         KEY(0, 1, KEY_RIGHT),
@@ -650,6 +643,8 @@ static void __init igep_init(void)
         igep_i2c_init();
         platform_add_devices(igep_devices, ARRAY_SIZE(igep_devices));
         omap_serial_init();
+        omap_sdrc_init(m65kxxxxam_sdrc_params,
+                                  m65kxxxxam_sdrc_params);
         usb_musb_init(NULL);
 
         igep_flash_init();
@@ -675,7 +670,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = igep_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
@@ -685,7 +680,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = igep_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = igep_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index 218764c9377e..401b9449f722 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -193,12 +193,6 @@ static struct omap_board_config_kernel ldp_config[] __initdata = {
         { OMAP_TAG_LCD,         &ldp_lcd_config },
 };
 
-static void __init omap_ldp_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static struct twl4030_gpio_platform_data ldp_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
@@ -325,6 +319,7 @@ static void __init omap_ldp_init(void)
         platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
         omap_ads7846_init(1, 54, 310, NULL);
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         usb_musb_init(NULL);
         board_nand_init(ldp_nand_partitions,
                 ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
@@ -336,7 +331,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap_ldp_init_early,
+        .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap_ldp_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
index e11f0c5d608a..77a4e19222e2 100644
--- a/arch/arm/mach-omap2/board-n8x0.c
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -622,12 +622,6 @@ static void __init n8x0_map_io(void)
         omap242x_map_common_io();
 }
 
-static void __init n8x0_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         /* I2S codec port pins for McBSP block */
@@ -689,6 +683,7 @@ static void __init n8x0_init_machine(void)
                 i2c_register_board_info(2, n810_i2c_board_info_2,
                                         ARRAY_SIZE(n810_i2c_board_info_2));
         board_serial_init();
+        omap_sdrc_init(NULL, NULL);
         gpmc_onenand_init(board_onenand_data);
         n8x0_mmc_init();
         n8x0_usb_init();
@@ -698,7 +693,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
-        .init_early     = n8x0_init_early,
+        .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
@@ -708,7 +703,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
-        .init_early     = n8x0_init_early,
+        .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
@@ -718,7 +713,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = n8x0_map_io,
-        .init_early     = n8x0_init_early,
+        .init_early     = omap2420_init_early,
         .init_irq       = omap2_init_irq,
         .init_machine   = n8x0_init_machine,
         .timer          = &omap2_timer,
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index 3ae16b4e3f52..ce3234d6a344 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -447,8 +447,6 @@ static struct platform_device keys_gpio = {
 static void __init omap3_beagle_init_early(void)
 {
         omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                  mt46h32m32lf6_sdrc_params);
 }
 
 static void __init omap3_beagle_init_irq(void)
@@ -534,6 +532,8 @@ static void __init omap3_beagle_init(void)
                         ARRAY_SIZE(omap3_beagle_devices));
         omap_display_init(&beagle_dss_data);
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                  mt46h32m32lf6_sdrc_params);
 
         omap_mux_init_gpio(170, OMAP_PIN_INPUT);
         /* REVISIT leave DVI powered down until it's needed ... */
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c452b3f3331a..a1184b347aeb 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -520,12 +520,6 @@ static int __init omap3_evm_i2c_init(void)
 static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
 };
 
-static void __init omap3_evm_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
-}
-
 static struct usbhs_omap_board_data usbhs_bdata __initdata = {
 
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -640,6 +634,7 @@ static void __init omap3_evm_init(void)
         omap_display_init(&omap3_evm_dss_data);
 
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
 
         /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
         usb_nop_xceiv_register();
@@ -684,7 +679,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap3_evm_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap3_evm_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c
index 703aeb5b8fd4..3a1dd84faca0 100644
--- a/arch/arm/mach-omap2/board-omap3logic.c
+++ b/arch/arm/mach-omap2/board-omap3logic.c
@@ -182,12 +182,6 @@ static inline void __init board_smsc911x_init(void)
         gpmc_smsc911x_init(&board_smsc911x_data);
 }
 
-static void __init omap3logic_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -200,6 +194,7 @@ static void __init omap3logic_init(void)
         omap3torpedo_fix_pbias_voltage();
         omap3logic_i2c_init();
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         board_mmc_init();
         board_smsc911x_init();
 
@@ -211,7 +206,7 @@ static void __init omap3logic_init(void)
 MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
         .boot_params    = 0x80000100,
         .map_io         = omap3_map_io,
-        .init_early     = omap3logic_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
@@ -220,7 +215,7 @@ MACHINE_END
 MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
         .boot_params    = 0x80000100,
         .map_io         = omap3_map_io,
-        .init_early     = omap3logic_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap3logic_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 080d7bd6795e..e46bf5249559 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -525,13 +525,6 @@ static struct spi_board_info omap3pandora_spi_board_info[] __initdata = {
         }
 };
 
-static void __init omap3pandora_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                  mt46h32m32lf6_sdrc_params);
-}
-
 static void __init pandora_wl1251_init(void)
 {
         struct wl12xx_platform_data pandora_wl1251_pdata;
@@ -593,6 +586,8 @@ static void __init omap3pandora_init(void)
                         ARRAY_SIZE(omap3pandora_devices));
         omap_display_init(&pandora_dss_data);
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                  mt46h32m32lf6_sdrc_params);
         spi_register_board_info(omap3pandora_spi_board_info,
                         ARRAY_SIZE(omap3pandora_spi_board_info));
         omap_ads7846_init(1, OMAP3_PANDORA_TS_GPIO, 0, NULL);
@@ -609,7 +604,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap3pandora_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap3pandora_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c
index 8e104980ea26..807c27406792 100644
--- a/arch/arm/mach-omap2/board-omap3stalker.c
+++ b/arch/arm/mach-omap2/board-omap3stalker.c
@@ -428,12 +428,6 @@ static int __init omap3_stalker_i2c_init(void)
 static struct omap_board_config_kernel omap3_stalker_config[] __initdata = {
 };
 
-static void __init omap3_stalker_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params, NULL);
-}
-
 static void __init omap3_stalker_init_irq(void)
 {
         omap3_init_irq();
@@ -478,6 +472,7 @@ static void __init omap3_stalker_init(void)
         omap_display_init(&omap3_stalker_dss_data);
 
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params, NULL);
         usb_musb_init(NULL);
         usbhs_init(&usbhs_bdata);
         omap_ads7846_init(1, OMAP3_STALKER_TS_GPIO, 310, NULL);
@@ -496,7 +491,7 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
         /* Maintainer: Jason Lam -lzg@ema-tech.com */
         .boot_params            = 0x80000100,
         .map_io                 = omap3_map_io,
-        .init_early             = omap3_stalker_init_early,
+        .init_early             = omap35xx_init_early,
         .init_irq               = omap3_stalker_init_irq,
         .init_machine           = omap3_stalker_init,
         .timer                  = &omap3_secure_timer,
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c
index 852ea0464057..f7f18092f36d 100644
--- a/arch/arm/mach-omap2/board-omap3touchbook.c
+++ b/arch/arm/mach-omap2/board-omap3touchbook.c
@@ -326,13 +326,6 @@ static struct omap_board_mux board_mux[] __initdata = {
 };
 #endif
 
-static void __init omap3_touchbook_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                  mt46h32m32lf6_sdrc_params);
-}
-
 static void __init omap3_touchbook_init_irq(void)
 {
         omap3_init_irq();
@@ -385,6 +378,8 @@ static void __init omap3_touchbook_init(void)
         platform_add_devices(omap3_touchbook_devices,
                         ARRAY_SIZE(omap3_touchbook_devices));
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                  mt46h32m32lf6_sdrc_params);
 
         omap_mux_init_gpio(170, OMAP_PIN_INPUT);
         /* REVISIT leave DVI powered down until it's needed ... */
@@ -407,7 +402,7 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap3_touchbook_init_early,
+        .init_early     = omap3430_init_early,
         .init_irq       = omap3_touchbook_init_irq,
         .init_machine   = omap3_touchbook_init,
         .timer          = &omap3_secure_timer,
diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c
index 9aaa96057666..1bce76589784 100644
--- a/arch/arm/mach-omap2/board-omap4panda.c
+++ b/arch/arm/mach-omap2/board-omap4panda.c
@@ -95,12 +95,6 @@ static struct platform_device *panda_devices[] __initdata = {
         &wl1271_device,
 };
 
-static void __init omap4_panda_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
         .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
@@ -569,6 +563,7 @@ static void __init omap4_panda_init(void)
         platform_add_devices(panda_devices, ARRAY_SIZE(panda_devices));
         platform_device_register(&omap_vwlan_device);
         board_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap4_twl6030_hsmmc_init(mmc);
         omap4_ehci_init();
         usb_musb_init(&musb_board_data);
@@ -586,7 +581,7 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap4_panda_map_io,
-        .init_early     = omap4_panda_init_early,
+        .init_early     = omap4430_init_early,
         .init_irq       = gic_init_irq,
         .init_machine   = omap4_panda_init,
         .timer          = &omap4_timer,
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index f949a9954d76..7228ae50802d 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -478,13 +478,6 @@ static int __init overo_spi_init(void)
         return 0;
 }
 
-static void __init overo_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                  mt46h32m32lf6_sdrc_params);
-}
-
 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
         .port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
@@ -514,6 +507,8 @@ static void __init overo_init(void)
         overo_i2c_init();
         omap_display_init(&overo_dss_data);
         omap_serial_init();
+        omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                  mt46h32m32lf6_sdrc_params);
         omap_nand_flash_init(0, overo_nand_partitions,
                              ARRAY_SIZE(overo_nand_partitions));
         usb_musb_init(NULL);
@@ -564,7 +559,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = overo_init_early,
+        .init_early     = omap35xx_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = overo_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c
index 7dfed24ee12e..a3182e846b14 100644
--- a/arch/arm/mach-omap2/board-rm680.c
+++ b/arch/arm/mach-omap2/board-rm680.c
@@ -123,15 +123,6 @@ static void __init rm680_peripherals_init(void)
         omap2_hsmmc_init(mmc);
 }
 
-static void __init rm680_init_early(void)
-{
-        struct omap_sdrc_params *sdrc_params;
-
-        omap2_init_common_infrastructure();
-        sdrc_params = nokia_get_sdram_timings();
-        omap2_init_common_devices(sdrc_params, sdrc_params);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         { .reg_offset = OMAP_MUX_TERMINATOR },
@@ -140,8 +131,14 @@ static struct omap_board_mux board_mux[] __initdata = {
 
 static void __init rm680_init(void)
 {
+        struct omap_sdrc_params *sdrc_params;
+
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_serial_init();
+
+        sdrc_params = nokia_get_sdram_timings();
+        omap_sdrc_init(sdrc_params, sdrc_params);
+
         usb_musb_init(NULL);
         rm680_peripherals_init();
 }
@@ -156,7 +153,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = rm680_map_io,
-        .init_early     = rm680_init_early,
+        .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = rm680_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 5ea142f9bc97..32a79e28379c 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -102,15 +102,6 @@ static struct omap_board_config_kernel rx51_config[] = {
         { OMAP_TAG_LCD,         &rx51_lcd_config },
 };
 
-static void __init rx51_init_early(void)
-{
-        struct omap_sdrc_params *sdrc_params;
-
-        omap2_init_common_infrastructure();
-        sdrc_params = nokia_get_sdram_timings();
-        omap2_init_common_devices(sdrc_params, sdrc_params);
-}
-
 extern void __init rx51_peripherals_init(void);
 
 #ifdef CONFIG_OMAP_MUX
@@ -127,11 +118,17 @@ static struct omap_musb_board_data musb_board_data = {
 
 static void __init rx51_init(void)
 {
+        struct omap_sdrc_params *sdrc_params;
+
         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
         omap_board_config = rx51_config;
         omap_board_config_size = ARRAY_SIZE(rx51_config);
         omap3_pm_init_cpuidle(rx51_cpuidle_params);
         omap_serial_init();
+
+        sdrc_params = nokia_get_sdram_timings();
+        omap_sdrc_init(sdrc_params, sdrc_params);
+
         usb_musb_init(&musb_board_data);
         rx51_peripherals_init();
 
@@ -159,7 +156,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
         .boot_params    = 0x80000100,
         .reserve        = rx51_reserve,
         .map_io         = rx51_map_io,
-        .init_early     = rx51_init_early,
+        .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = rx51_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c
index a85d5b0b11da..981ca00d6e29 100644
--- a/arch/arm/mach-omap2/board-ti8168evm.c
+++ b/arch/arm/mach-omap2/board-ti8168evm.c
@@ -27,15 +27,10 @@
 static struct omap_board_config_kernel ti8168_evm_config[] __initdata = {
 };
 
-static void __init ti8168_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        omap2_init_common_devices(NULL, NULL);
-}
-
 static void __init ti8168_evm_init(void)
 {
         omap_serial_init();
+        omap_sdrc_init(NULL, NULL);
         omap_board_config = ti8168_evm_config;
         omap_board_config_size = ARRAY_SIZE(ti8168_evm_config);
 }
@@ -50,7 +45,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
         /* Maintainer: Texas Instruments */
         .boot_params    = 0x80000100,
         .map_io         = ti8168_evm_map_io,
-        .init_early     = ti8168_init_early,
+        .init_early     = ti816x_init_early,
         .init_irq       = ti816x_init_irq,
         .timer          = &omap3_timer,
         .init_machine   = ti8168_evm_init,
diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c
index 8a98c3c303fc..d56c79661038 100644
--- a/arch/arm/mach-omap2/board-zoom.c
+++ b/arch/arm/mach-omap2/board-zoom.c
@@ -34,17 +34,6 @@
 
 #define ZOOM3_EHCI_RESET_GPIO           64
 
-static void __init omap_zoom_init_early(void)
-{
-        omap2_init_common_infrastructure();
-        if (machine_is_omap_zoom2())
-                omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
-                                          mt46h32m32lf6_sdrc_params);
-        else if (machine_is_omap_zoom3())
-                omap2_init_common_devices(h8mbx00u0mer0em_sdrc_params,
-                                          h8mbx00u0mer0em_sdrc_params);
-}
-
 #ifdef CONFIG_OMAP_MUX
 static struct omap_board_mux board_mux[] __initdata = {
         /* WLAN IRQ - GPIO 162 */
@@ -129,6 +118,14 @@ static void __init omap_zoom_init(void)
                                                 ZOOM_NAND_CS, NAND_BUSWIDTH_16);
         zoom_debugboard_init();
         zoom_peripherals_init();
+
+        if (machine_is_omap_zoom2())
+                omap_sdrc_init(mt46h32m32lf6_sdrc_params,
+                                          mt46h32m32lf6_sdrc_params);
+        else if (machine_is_omap_zoom3())
+                omap_sdrc_init(h8mbx00u0mer0em_sdrc_params,
+                                          h8mbx00u0mer0em_sdrc_params);
+
         zoom_display_init();
 }
 
@@ -136,7 +133,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap_zoom_init_early,
+        .init_early     = omap3430_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
@@ -146,7 +143,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
         .boot_params    = 0x80000100,
         .reserve        = omap_reserve,
         .map_io         = omap3_map_io,
-        .init_early     = omap_zoom_init_early,
+        .init_early     = omap3630_init_early,
         .init_irq       = omap3_init_irq,
         .init_machine   = omap_zoom_init,
         .timer          = &omap3_timer,
diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c
index debc040872f1..14a6277dd184 100644
--- a/arch/arm/mach-omap2/clock2420_data.c
+++ b/arch/arm/mach-omap2/clock2420_data.c
@@ -1898,6 +1898,54 @@ static struct omap_clk omap2420_clks[] = {
         CLK(NULL,       "pka_ick",      &pka_ick,       CK_242X),
         CLK(NULL,       "usb_fck",      &usb_fck,       CK_242X),
         CLK("musb-hdrc",        "fck",  &osc_ck,        CK_242X),
+        CLK("omap_timer.1",     "fck",  &gpt1_fck,      CK_242X),
+        CLK("omap_timer.2",     "fck",  &gpt2_fck,      CK_242X),
+        CLK("omap_timer.3",     "fck",  &gpt3_fck,      CK_242X),
+        CLK("omap_timer.4",     "fck",  &gpt4_fck,      CK_242X),
+        CLK("omap_timer.5",     "fck",  &gpt5_fck,      CK_242X),
+        CLK("omap_timer.6",     "fck",  &gpt6_fck,      CK_242X),
+        CLK("omap_timer.7",     "fck",  &gpt7_fck,      CK_242X),
+        CLK("omap_timer.8",     "fck",  &gpt8_fck,      CK_242X),
+        CLK("omap_timer.9",     "fck",  &gpt9_fck,      CK_242X),
+        CLK("omap_timer.10",    "fck",  &gpt10_fck,     CK_242X),
+        CLK("omap_timer.11",    "fck",  &gpt11_fck,     CK_242X),
+        CLK("omap_timer.12",    "fck",  &gpt12_fck,     CK_242X),
+        CLK("omap_timer.1",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.2",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.3",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.4",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.5",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.6",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.7",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.8",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.9",     "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.10",    "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.11",    "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.12",    "32k_ck",       &func_32k_ck,   CK_243X),
+        CLK("omap_timer.1",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.2",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.3",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.4",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.5",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.6",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.7",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.8",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.9",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.10",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.11",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.12",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.1",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.2",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.3",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.4",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.5",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.6",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.7",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.8",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.9",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.10",    "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.11",    "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.12",    "alt_ck",       &alt_ck,        CK_243X),
 };
 
 /*
diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c
index 96a942e42db1..ea6717cfa3c8 100644
--- a/arch/arm/mach-omap2/clock2430_data.c
+++ b/arch/arm/mach-omap2/clock2430_data.c
@@ -1998,6 +1998,54 @@ static struct omap_clk omap2430_clks[] = {
         CLK(NULL,       "mdm_intc_ick", &mdm_intc_ick,  CK_243X),
         CLK("omap_hsmmc.0", "mmchsdb_fck",      &mmchsdb1_fck,  CK_243X),
         CLK("omap_hsmmc.1", "mmchsdb_fck",      &mmchsdb2_fck,  CK_243X),
+        CLK("omap_timer.1",     "fck",  &gpt1_fck,      CK_243X),
+        CLK("omap_timer.2",     "fck",  &gpt2_fck,      CK_243X),
+        CLK("omap_timer.3",     "fck",  &gpt3_fck,      CK_243X),
+        CLK("omap_timer.4",     "fck",  &gpt4_fck,      CK_243X),
+        CLK("omap_timer.5",     "fck",  &gpt5_fck,      CK_243X),
+        CLK("omap_timer.6",     "fck",  &gpt6_fck,      CK_243X),
+        CLK("omap_timer.7",     "fck",  &gpt7_fck,      CK_243X),
+        CLK("omap_timer.8",     "fck",  &gpt8_fck,      CK_243X),
+        CLK("omap_timer.9",     "fck",  &gpt9_fck,      CK_243X),
+        CLK("omap_timer.10",    "fck",  &gpt10_fck,     CK_243X),
+        CLK("omap_timer.11",    "fck",  &gpt11_fck,     CK_243X),
+        CLK("omap_timer.12",    "fck",  &gpt12_fck,     CK_243X),
+        CLK("omap_timer.1",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.2",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.3",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.4",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.5",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.6",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.7",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.8",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.9",     "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.10",    "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.11",    "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.12",    "32k_ck",  &func_32k_ck,   CK_243X),
+        CLK("omap_timer.1",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.2",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.3",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.4",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.5",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.6",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.7",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.8",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.9",     "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.10",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.11",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.12",    "sys_ck",       &sys_ck,        CK_243X),
+        CLK("omap_timer.1",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.2",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.3",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.4",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.5",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.6",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.7",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.8",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.9",     "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.10",    "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.11",    "alt_ck",       &alt_ck,        CK_243X),
+        CLK("omap_timer.12",    "alt_ck",       &alt_ck,        CK_243X),
 };
 
 /*
diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c
index b9b844683147..65dd363163bc 100644
--- a/arch/arm/mach-omap2/clock3xxx_data.c
+++ b/arch/arm/mach-omap2/clock3xxx_data.c
@@ -3464,6 +3464,42 @@ static struct omap_clk omap3xxx_clks[] = {
         CLK("musb-am35x",       "fck",          &hsotgusb_fck_am35xx,   CK_AM35XX),
         CLK(NULL,       "hecc_ck",      &hecc_ck,       CK_AM35XX),
         CLK(NULL,       "uart4_ick",    &uart4_ick_am35xx,      CK_AM35XX),
+        CLK("omap_timer.1",     "fck",  &gpt1_fck,      CK_3XXX),
+        CLK("omap_timer.2",     "fck",  &gpt2_fck,      CK_3XXX),
+        CLK("omap_timer.3",     "fck",  &gpt3_fck,      CK_3XXX),
+        CLK("omap_timer.4",     "fck",  &gpt4_fck,      CK_3XXX),
+        CLK("omap_timer.5",     "fck",  &gpt5_fck,      CK_3XXX),
+        CLK("omap_timer.6",     "fck",  &gpt6_fck,      CK_3XXX),
+        CLK("omap_timer.7",     "fck",  &gpt7_fck,      CK_3XXX),
+        CLK("omap_timer.8",     "fck",  &gpt8_fck,      CK_3XXX),
+        CLK("omap_timer.9",     "fck",  &gpt9_fck,      CK_3XXX),
+        CLK("omap_timer.10",    "fck",  &gpt10_fck,     CK_3XXX),
+        CLK("omap_timer.11",    "fck",  &gpt11_fck,     CK_3XXX),
+        CLK("omap_timer.12",    "fck",  &gpt12_fck,     CK_3XXX),
+        CLK("omap_timer.1",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.2",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.3",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.4",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.5",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.6",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.7",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.8",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.9",     "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.10",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.11",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.12",    "32k_ck",       &omap_32k_fck,  CK_3XXX),
+        CLK("omap_timer.1",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.2",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.3",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.4",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.5",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.6",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.7",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.8",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.9",     "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.10",    "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.11",    "sys_ck",       &sys_ck,        CK_3XXX),
+        CLK("omap_timer.12",    "sys_ck",       &sys_ck,        CK_3XXX),
 };
 
 
@@ -3472,7 +3508,16 @@ int __init omap3xxx_clk_init(void)
         struct omap_clk *c;
         u32 cpu_clkflg = 0;
 
-        if (cpu_is_omap3517()) {
+        /*
+         * 3505 must be tested before 3517, since 3517 returns true
+         * for both AM3517 chips and AM3517 family chips, which
+         * includes 3505.  Unfortunately there's no obvious family
+         * test for 3517/3505 :-(
+         */
+        if (cpu_is_omap3505()) {
+                cpu_mask = RATE_IN_34XX;
+                cpu_clkflg = CK_3505;
+        } else if (cpu_is_omap3517()) {
                 cpu_mask = RATE_IN_34XX;
                 cpu_clkflg = CK_3517;
         } else if (cpu_is_omap3505()) {
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index c0b6fbda3408..946bf04a956d 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3363,6 +3363,39 @@ static struct omap_clk omap44xx_clks[] = {
         CLK("usbhs-omap.0",     "usbhost_ick",          &dummy_ck,              CK_443X),
         CLK("usbhs-omap.0",     "usbtll_fck",           &dummy_ck,      CK_443X),
         CLK("omap_wdt", "ick",                          &dummy_ck,      CK_443X),
+        CLK("omap_timer.1",     "fck",                  &timer1_fck,    CK_443X),
+        CLK("omap_timer.2",     "fck",                  &timer2_fck,    CK_443X),
+        CLK("omap_timer.3",     "fck",                  &timer3_fck,    CK_443X),
+        CLK("omap_timer.4",     "fck",                  &timer4_fck,    CK_443X),
+        CLK("omap_timer.5",     "fck",                  &timer5_fck,    CK_443X),
+        CLK("omap_timer.6",     "fck",                  &timer6_fck,    CK_443X),
+        CLK("omap_timer.7",     "fck",                  &timer7_fck,    CK_443X),
+        CLK("omap_timer.8",     "fck",                  &timer8_fck,    CK_443X),
+        CLK("omap_timer.9",     "fck",                  &timer9_fck,    CK_443X),
+        CLK("omap_timer.10",    "fck",                  &timer10_fck,   CK_443X),
+        CLK("omap_timer.11",    "fck",                  &timer11_fck,   CK_443X),
+        CLK("omap_timer.1",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.2",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.3",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.4",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.5",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.6",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.7",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.8",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.9",     "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.10",    "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.11",    "32k_ck",       &sys_32k_ck,    CK_443X),
+        CLK("omap_timer.1",     "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.2",     "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.3",     "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.4",     "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.9",     "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.10",    "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.11",    "sys_ck",       &sys_clkin_ck,  CK_443X),
+        CLK("omap_timer.5",     "sys_ck",       &syc_clk_div_ck,        CK_443X),
+        CLK("omap_timer.6",     "sys_ck",       &syc_clk_div_ck,        CK_443X),
+        CLK("omap_timer.7",     "sys_ck",       &syc_clk_div_ck,        CK_443X),
+        CLK("omap_timer.8",     "sys_ck",       &syc_clk_div_ck,        CK_443X),
 };
 
 int __init omap4xxx_clk_init(void)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 8f0890685d7b..8480ee4344ea 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -73,9 +73,6 @@ static int _clkdm_register(struct clockdomain *clkdm)
         if (!clkdm || !clkdm->name)
                 return -EINVAL;
 
-        if (!omap_chip_is(clkdm->omap_chip))
-                return -EINVAL;
-
         pwrdm = pwrdm_lookup(clkdm->pwrdm.name);
         if (!pwrdm) {
                 pr_err("clockdomain: %s: powerdomain %s does not exist\n",
@@ -105,13 +102,10 @@ static struct clkdm_dep *_clkdm_deps_lookup(struct clockdomain *clkdm,
 {
         struct clkdm_dep *cd;
 
-        if (!clkdm || !deps || !omap_chip_is(clkdm->omap_chip))
+        if (!clkdm || !deps)
                 return ERR_PTR(-EINVAL);
 
         for (cd = deps; cd->clkdm_name; cd++) {
-                if (!omap_chip_is(cd->omap_chip))
-                        continue;
-
                 if (!cd->clkdm && cd->clkdm_name)
                         cd->clkdm = _clkdm_lookup(cd->clkdm_name);
 
@@ -148,9 +142,6 @@ static void _autodep_lookup(struct clkdm_autodep *autodep)
         if (!autodep)
                 return;
 
-        if (!omap_chip_is(autodep->omap_chip))
-                return;
-
         clkdm = clkdm_lookup(autodep->clkdm.name);
         if (!clkdm) {
                 pr_err("clockdomain: autodeps: clockdomain %s does not exist\n",
@@ -182,9 +173,6 @@ void _clkdm_add_autodeps(struct clockdomain *clkdm)
                 if (IS_ERR(autodep->clkdm.ptr))
                         continue;
 
-                if (!omap_chip_is(autodep->omap_chip))
-                        continue;
-
                 pr_debug("clockdomain: adding %s sleepdep/wkdep for "
                          "clkdm %s\n", autodep->clkdm.ptr->name,
                          clkdm->name);
@@ -216,9 +204,6 @@ void _clkdm_del_autodeps(struct clockdomain *clkdm)
                 if (IS_ERR(autodep->clkdm.ptr))
                         continue;
 
-                if (!omap_chip_is(autodep->omap_chip))
-                        continue;
-
                 pr_debug("clockdomain: removing %s sleepdep/wkdep for "
                          "clkdm %s\n", autodep->clkdm.ptr->name,
                          clkdm->name);
@@ -243,8 +228,6 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
         struct clkdm_dep *cd;
 
         for (cd = clkdm_deps; cd && cd->clkdm_name; cd++) {
-                if (!omap_chip_is(cd->omap_chip))
-                        continue;
                 if (cd->clkdm)
                         continue;
                 cd->clkdm = _clkdm_lookup(cd->clkdm_name);
@@ -257,43 +240,113 @@ static void _resolve_clkdm_deps(struct clockdomain *clkdm,
 /* Public functions */
 
 /**
- * clkdm_init - set up the clockdomain layer
- * @clkdms: optional pointer to an array of clockdomains to register
- * @init_autodeps: optional pointer to an array of autodeps to register
- * @custom_funcs: func pointers for arch specific implementations
- *
- * Set up internal state.  If a pointer to an array of clockdomains
- * @clkdms was supplied, loop through the list of clockdomains,
- * register all that are available on the current platform. Similarly,
- * if a pointer to an array of clockdomain autodependencies
- * @init_autodeps was provided, register those.  No return value.
+ * clkdm_register_platform_funcs - register clockdomain implementation fns
+ * @co: func pointers for arch specific implementations
+ *
+ * Register the list of function pointers used to implement the
+ * clockdomain functions on different OMAP SoCs.  Should be called
+ * before any other clkdm_register*() function.  Returns -EINVAL if
+ * @co is null, -EEXIST if platform functions have already been
+ * registered, or 0 upon success.
+ */
+int clkdm_register_platform_funcs(struct clkdm_ops *co)
+{
+        if (!co)
+                return -EINVAL;
+
+        if (arch_clkdm)
+                return -EEXIST;
+
+        arch_clkdm = co;
+
+        return 0;
+};
+
+/**
+ * clkdm_register_clkdms - register SoC clockdomains
+ * @cs: pointer to an array of struct clockdomain to register
+ *
+ * Register the clockdomains available on a particular OMAP SoC.  Must
+ * be called after clkdm_register_platform_funcs().  May be called
+ * multiple times.  Returns -EACCES if called before
+ * clkdm_register_platform_funcs(); -EINVAL if the argument @cs is
+ * null; or 0 upon success.
  */
-void clkdm_init(struct clockdomain **clkdms,
-                struct clkdm_autodep *init_autodeps,
-                struct clkdm_ops *custom_funcs)
+int clkdm_register_clkdms(struct clockdomain **cs)
 {
         struct clockdomain **c = NULL;
-        struct clockdomain *clkdm;
-        struct clkdm_autodep *autodep = NULL;
 
-        if (!custom_funcs)
-                WARN(1, "No custom clkdm functions registered\n");
-        else
-                arch_clkdm = custom_funcs;
+        if (!arch_clkdm)
+                return -EACCES;
+
+        if (!cs)
+                return -EINVAL;
+
+        for (c = cs; *c; c++)
+                _clkdm_register(*c);
+
+        return 0;
+}
+
+/**
+ * clkdm_register_autodeps - register autodeps (if required)
+ * @ia: pointer to a static array of struct clkdm_autodep to register
+ *
+ * Register clockdomain "automatic dependencies."  These are
+ * clockdomain wakeup and sleep dependencies that are automatically
+ * added whenever the first clock inside a clockdomain is enabled, and
+ * removed whenever the last clock inside a clockdomain is disabled.
+ * These are currently only used on OMAP3 devices, and are deprecated,
+ * since they waste energy.  However, until the OMAP2/3 IP block
+ * enable/disable sequence can be converted to match the OMAP4
+ * sequence, they are needed.
+ *
+ * Must be called only after all of the SoC clockdomains are
+ * registered, since the function will resolve autodep clockdomain
+ * names into clockdomain pointers.
+ *
+ * The struct clkdm_autodep @ia array must be static, as this function
+ * does not copy the array elements.
+ *
+ * Returns -EACCES if called before any clockdomains have been
+ * registered, -EINVAL if called with a null @ia argument, -EEXIST if
+ * autodeps have already been registered, or 0 upon success.
+ */
+int clkdm_register_autodeps(struct clkdm_autodep *ia)
+{
+        struct clkdm_autodep *a = NULL;
 
-        if (clkdms)
-                for (c = clkdms; *c; c++)
-                        _clkdm_register(*c);
+        if (list_empty(&clkdm_list))
+                return -EACCES;
+
+        if (!ia)
+                return -EINVAL;
 
-        autodeps = init_autodeps;
         if (autodeps)
-                for (autodep = autodeps; autodep->clkdm.ptr; autodep++)
-                        _autodep_lookup(autodep);
+                return -EEXIST;
+
+        autodeps = ia;
+        for (a = autodeps; a->clkdm.ptr; a++)
+                _autodep_lookup(a);
+
+        return 0;
+}
+
+/**
+ * clkdm_complete_init - set up the clockdomain layer
+ *
+ * Put all clockdomains into software-supervised mode; PM code should
+ * later enable hardware-supervised mode as appropriate.  Must be
+ * called after clkdm_register_clkdms().  Returns -EACCES if called
+ * before clkdm_register_clkdms(), or 0 upon success.
+ */
+int clkdm_complete_init(void)
+{
+        struct clockdomain *clkdm;
+
+        if (list_empty(&clkdm_list))
+                return -EACCES;
 
-        /*
-         * Put all clockdomains into software-supervised mode; PM code
-         * should later enable hardware-supervised mode as appropriate
-         */
         list_for_each_entry(clkdm, &clkdm_list, node) {
                 if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
                         clkdm_wakeup(clkdm);
@@ -306,6 +359,8 @@ void clkdm_init(struct clockdomain **clkdms,
                 _resolve_clkdm_deps(clkdm, clkdm->sleepdep_srcs);
                 clkdm_clear_all_sleepdeps(clkdm);
         }
+
+        return 0;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h
index 1e50c88b8a07..f7b58609bad8 100644
--- a/arch/arm/mach-omap2/clockdomain.h
+++ b/arch/arm/mach-omap2/clockdomain.h
@@ -45,7 +45,6 @@
 /**
  * struct clkdm_autodep - clkdm deps to add when entering/exiting hwsup mode
  * @clkdm: clockdomain to add wkdep+sleepdep on - set name member only
- * @omap_chip: OMAP chip types that this autodep is valid on
  *
  * A clockdomain that should have wkdeps and sleepdeps added when a
  * clockdomain should stay active in hwsup mode; and conversely,
@@ -60,14 +59,12 @@ struct clkdm_autodep {
                 const char *name;
                 struct clockdomain *ptr;
         } clkdm;
-        const struct omap_chip_id omap_chip;
 };
 
 /**
  * struct clkdm_dep - encode dependencies between clockdomains
  * @clkdm_name: clockdomain name
  * @clkdm: pointer to the struct clockdomain of @clkdm_name
- * @omap_chip: OMAP chip types that this dependency is valid on
  * @wkdep_usecount: Number of wakeup dependencies causing this clkdm to wake
  * @sleepdep_usecount: Number of sleep deps that could prevent clkdm from idle
  *
@@ -81,7 +78,6 @@ struct clkdm_dep {
         struct clockdomain *clkdm;
         atomic_t wkdep_usecount;
         atomic_t sleepdep_usecount;
-        const struct omap_chip_id omap_chip;
 };
 
 /* Possible flags for struct clockdomain._flags */
@@ -101,7 +97,6 @@ struct clkdm_dep {
  * @clkdm_offs: (OMAP4 only) CM clockdomain register offset
  * @wkdep_srcs: Clockdomains that can be told to wake this powerdomain up
  * @sleepdep_srcs: Clockdomains that can be told to keep this clkdm from inact
- * @omap_chip: OMAP chip types that this clockdomain is valid on
  * @usecount: Usecount tracking
  * @node: list_head to link all clockdomains together
  *
@@ -126,7 +121,6 @@ struct clockdomain {
         const u16 clkdm_offs;
         struct clkdm_dep *wkdep_srcs;
         struct clkdm_dep *sleepdep_srcs;
-        const struct omap_chip_id omap_chip;
         atomic_t usecount;
         struct list_head node;
         spinlock_t lock;
@@ -166,8 +160,11 @@ struct clkdm_ops {
         int     (*clkdm_clk_disable)(struct clockdomain *clkdm);
 };
 
-void clkdm_init(struct clockdomain **clkdms, struct clkdm_autodep *autodeps,
-                        struct clkdm_ops *custom_funcs);
+int clkdm_register_platform_funcs(struct clkdm_ops *co);
+int clkdm_register_autodeps(struct clkdm_autodep *ia);
+int clkdm_register_clkdms(struct clockdomain **c);
+int clkdm_complete_init(void);
+
 struct clockdomain *clkdm_lookup(const char *name);
 
 int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
@@ -195,7 +192,8 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk);
 int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh);
 int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh);
 
-extern void __init omap2xxx_clockdomains_init(void);
+extern void __init omap242x_clockdomains_init(void);
+extern void __init omap243x_clockdomains_init(void);
 extern void __init omap3xxx_clockdomains_init(void);
 extern void __init omap44xx_clockdomains_init(void);
 extern void _clkdm_add_autodeps(struct clockdomain *clkdm);
@@ -205,4 +203,10 @@ extern struct clkdm_ops omap2_clkdm_operations;
 extern struct clkdm_ops omap3_clkdm_operations;
 extern struct clkdm_ops omap4_clkdm_operations;
 
+extern struct clkdm_dep gfx_24xx_wkdeps[];
+extern struct clkdm_dep dsp_24xx_wkdeps[];
+extern struct clockdomain wkup_common_clkdm;
+extern struct clockdomain prm_common_clkdm;
+extern struct clockdomain cm_common_clkdm;
+
 #endif
diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
index f740edb111f4..a0d68dbecfa3 100644
--- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
+++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c
@@ -52,8 +52,6 @@ static int omap2_clkdm_clear_all_wkdeps(struct clockdomain *clkdm)
         u32 mask = 0;
 
         for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!omap_chip_is(cd->omap_chip))
-                        continue;
                 if (!cd->clkdm)
                         continue; /* only happens if data is erroneous */
 
@@ -98,8 +96,6 @@ static int omap3_clkdm_clear_all_sleepdeps(struct clockdomain *clkdm)
         u32 mask = 0;
 
         for (cd = clkdm->sleepdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!omap_chip_is(cd->omap_chip))
-                        continue;
                 if (!cd->clkdm)
                         continue; /* only happens if data is erroneous */
 
diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c
index b43706aa08bd..935c7f03dab9 100644
--- a/arch/arm/mach-omap2/clockdomain44xx.c
+++ b/arch/arm/mach-omap2/clockdomain44xx.c
@@ -52,8 +52,6 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
         u32 mask = 0;
 
         for (cd = clkdm->wkdep_srcs; cd && cd->clkdm_name; cd++) {
-                if (!omap_chip_is(cd->omap_chip))
-                        continue;
                 if (!cd->clkdm)
                         continue; /* only happens if data is erroneous */
 
diff --git a/arch/arm/mach-omap2/clockdomains2420_data.c b/arch/arm/mach-omap2/clockdomains2420_data.c
new file mode 100644
index 000000000000..0ab8e46d5b2b
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains2420_data.c
@@ -0,0 +1,154 @@
+/*
+ * OMAP2420 clockdomains
+ *
+ * Copyright (C) 2008-2011 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ *
+ * Paul Walmsley, Jouni Högander
+ *
+ * This file contains clockdomains and clockdomain wakeup dependencies
+ * for OMAP2420 chips.  Some notes:
+ *
+ * A useful validation rule for struct clockdomain: Any clockdomain
+ * referenced by a wkdep_srcs must have a dep_bit assigned.  So
+ * wkdep_srcs are really just software-controllable dependencies.
+ * Non-software-controllable dependencies do exist, but they are not
+ * encoded below (yet).
+ *
+ * 24xx does not support programmable sleep dependencies (SLEEPDEP)
+ *
+ * The overly-specific dep_bit names are due to a bit name collision
+ * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
+ * value are the same for all powerdomains: 2
+ *
+ * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
+ * sanity check?
+ * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
+ */
+
+/*
+ * To-Do List
+ * -> Port the Sleep/Wakeup dependencies for the domains
+ *    from the Power domain framework
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include "clockdomain.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-24xx.h"
+#include "prm-regbits-24xx.h"
+
+/*
+ * Clockdomain dependencies for wkdeps
+ *
+ * XXX Hardware dependencies (e.g., dependencies that cannot be
+ * changed in software) are not included here yet, but should be.
+ */
+
+/* Wakeup dependency source arrays */
+
+/* 2420-specific possible wakeup dependencies */
+
+/* 2420 PM_WKDEP_MPU: CORE, DSP, WKUP */
+static struct clkdm_dep mpu_2420_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "dsp_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/* 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP */
+static struct clkdm_dep core_2420_wkdeps[] = {
+        { .clkdm_name = "dsp_clkdm" },
+        { .clkdm_name = "gfx_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/*
+ * 2420-only clockdomains
+ */
+
+static struct clockdomain mpu_2420_clkdm = {
+        .name           = "mpu_clkdm",
+        .pwrdm          = { .name = "mpu_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .wkdep_srcs     = mpu_2420_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
+};
+
+static struct clockdomain iva1_2420_clkdm = {
+        .name           = "iva1_clkdm",
+        .pwrdm          = { .name = "dsp_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
+        .wkdep_srcs     = dsp_24xx_wkdeps,
+        .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
+};
+
+static struct clockdomain dsp_2420_clkdm = {
+        .name           = "dsp_clkdm",
+        .pwrdm          = { .name = "dsp_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
+};
+
+static struct clockdomain gfx_2420_clkdm = {
+        .name           = "gfx_clkdm",
+        .pwrdm          = { .name = "gfx_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = gfx_24xx_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
+};
+
+static struct clockdomain core_l3_2420_clkdm = {
+        .name           = "core_l3_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .wkdep_srcs     = core_2420_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
+};
+
+static struct clockdomain core_l4_2420_clkdm = {
+        .name           = "core_l4_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .wkdep_srcs     = core_2420_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
+};
+
+static struct clockdomain dss_2420_clkdm = {
+        .name           = "dss_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
+};
+
+static struct clockdomain *clockdomains_omap242x[] __initdata = {
+        &wkup_common_clkdm,
+        &cm_common_clkdm,
+        &prm_common_clkdm,
+        &mpu_2420_clkdm,
+        &iva1_2420_clkdm,
+        &dsp_2420_clkdm,
+        &gfx_2420_clkdm,
+        &core_l3_2420_clkdm,
+        &core_l4_2420_clkdm,
+        &dss_2420_clkdm,
+        NULL,
+};
+
+void __init omap242x_clockdomains_init(void)
+{
+        if (!cpu_is_omap242x())
+                return;
+
+        clkdm_register_platform_funcs(&omap2_clkdm_operations);
+        clkdm_register_clkdms(clockdomains_omap242x);
+        clkdm_complete_init();
+}
diff --git a/arch/arm/mach-omap2/clockdomains2430_data.c b/arch/arm/mach-omap2/clockdomains2430_data.c
new file mode 100644
index 000000000000..3645ed044890
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains2430_data.c
@@ -0,0 +1,181 @@
+/*
+ * OMAP2xxx clockdomains
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ *
+ * Paul Walmsley, Jouni Högander
+ *
+ * This file contains clockdomains and clockdomain wakeup dependencies
+ * for OMAP2xxx chips.  Some notes:
+ *
+ * A useful validation rule for struct clockdomain: Any clockdomain
+ * referenced by a wkdep_srcs must have a dep_bit assigned.  So
+ * wkdep_srcs are really just software-controllable dependencies.
+ * Non-software-controllable dependencies do exist, but they are not
+ * encoded below (yet).
+ *
+ * 24xx does not support programmable sleep dependencies (SLEEPDEP)
+ *
+ * The overly-specific dep_bit names are due to a bit name collision
+ * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
+ * value are the same for all powerdomains: 2
+ *
+ * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
+ * sanity check?
+ * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
+ */
+
+/*
+ * To-Do List
+ * -> Port the Sleep/Wakeup dependencies for the domains
+ *    from the Power domain framework
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include "clockdomain.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-24xx.h"
+#include "prm-regbits-24xx.h"
+
+/*
+ * Clockdomain dependencies for wkdeps
+ *
+ * XXX Hardware dependencies (e.g., dependencies that cannot be
+ * changed in software) are not included here yet, but should be.
+ */
+
+/* Wakeup dependency source arrays */
+
+/* 2430-specific possible wakeup dependencies */
+
+/* 2430 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP, MDM */
+static struct clkdm_dep core_2430_wkdeps[] = {
+        { .clkdm_name = "dsp_clkdm" },
+        { .clkdm_name = "gfx_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { .clkdm_name = "mdm_clkdm" },
+        { NULL },
+};
+
+/* 2430 PM_WKDEP_MPU: CORE, DSP, WKUP, MDM */
+static struct clkdm_dep mpu_2430_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "dsp_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { .clkdm_name = "mdm_clkdm" },
+        { NULL },
+};
+
+/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
+static struct clkdm_dep mdm_2430_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/*
+ * 2430-only clockdomains
+ */
+
+static struct clockdomain mpu_2430_clkdm = {
+        .name           = "mpu_clkdm",
+        .pwrdm          = { .name = "mpu_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = mpu_2430_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
+};
+
+/* Another case of bit name collisions between several registers: EN_MDM */
+static struct clockdomain mdm_clkdm = {
+        .name           = "mdm_clkdm",
+        .pwrdm          = { .name = "mdm_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
+        .wkdep_srcs     = mdm_2430_wkdeps,
+        .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
+};
+
+static struct clockdomain dsp_2430_clkdm = {
+        .name           = "dsp_clkdm",
+        .pwrdm          = { .name = "dsp_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
+        .wkdep_srcs     = dsp_24xx_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
+};
+
+static struct clockdomain gfx_2430_clkdm = {
+        .name           = "gfx_clkdm",
+        .pwrdm          = { .name = "gfx_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = gfx_24xx_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
+};
+
+/*
+ * XXX add usecounting for clkdm dependencies, otherwise the presence
+ * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
+ * could cause trouble
+ */
+static struct clockdomain core_l3_2430_clkdm = {
+        .name           = "core_l3_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
+        .wkdep_srcs     = core_2430_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
+};
+
+/*
+ * XXX add usecounting for clkdm dependencies, otherwise the presence
+ * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
+ * could cause trouble
+ */
+static struct clockdomain core_l4_2430_clkdm = {
+        .name           = "core_l4_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
+        .wkdep_srcs     = core_2430_wkdeps,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
+};
+
+static struct clockdomain dss_2430_clkdm = {
+        .name           = "dss_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
+};
+
+static struct clockdomain *clockdomains_omap243x[] __initdata = {
+        &wkup_common_clkdm,
+        &cm_common_clkdm,
+        &prm_common_clkdm,
+        &mpu_2430_clkdm,
+        &mdm_clkdm,
+        &dsp_2430_clkdm,
+        &gfx_2430_clkdm,
+        &core_l3_2430_clkdm,
+        &core_l4_2430_clkdm,
+        &dss_2430_clkdm,
+        NULL,
+};
+
+void __init omap243x_clockdomains_init(void)
+{
+        if (!cpu_is_omap243x())
+                return;
+
+        clkdm_register_platform_funcs(&omap2_clkdm_operations);
+        clkdm_register_clkdms(clockdomains_omap243x);
+        clkdm_complete_init();
+}
+
diff --git a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
index 13bde95b6790..0a6a04897d89 100644
--- a/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/clockdomains2xxx_3xxx_data.c
@@ -1,7 +1,7 @@
 /*
- * OMAP2/3 clockdomains
+ * OMAP2/3 clockdomain common data
  *
- * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2011 Texas Instruments, Inc.
  * Copyright (C) 2008-2010 Nokia Corporation
  *
  * Paul Walmsley, Jouni Högander
@@ -51,374 +51,28 @@
  * changed in software) are not included here yet, but should be.
  */
 
-/* OMAP2/3-common wakeup dependencies */
-
-/*
- * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP
- * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
- * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
- * These can share data since they will never be present simultaneously
- * on the same device.
- */
-static struct clkdm_dep gfx_sgx_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
-                                            CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
-                                            CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-
-/* 24XX-specific possible dependencies */
-
-#ifdef CONFIG_ARCH_OMAP2
-
 /* Wakeup dependency source arrays */
 
-/* 2420/2430 PM_WKDEP_DSP: CORE, MPU, WKUP */
-static struct clkdm_dep dsp_24xx_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        { NULL },
-};
-
-/*
- * 2420 PM_WKDEP_MPU: CORE, DSP, WKUP
- * 2430 adds MDM
- */
-static struct clkdm_dep mpu_24xx_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "dsp_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "mdm_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
-        },
-        { NULL },
-};
-
-/*
- * 2420 PM_WKDEP_CORE: DSP, GFX, MPU, WKUP
- * 2430 adds MDM
- */
-static struct clkdm_dep core_24xx_wkdeps[] = {
-        {
-                .clkdm_name = "dsp_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "gfx_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "mdm_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
-        },
-        { NULL },
-};
-
-#endif /* CONFIG_ARCH_OMAP2 */
-
-/* 2430-specific possible wakeup dependencies */
+/* 2xxx-specific possible dependencies */
 
-#ifdef CONFIG_SOC_OMAP2430
-
-/* 2430 PM_WKDEP_MDM: CORE, MPU, WKUP */
-static struct clkdm_dep mdm_2430_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX)
-        },
-        { NULL },
-};
-
-#endif /* CONFIG_SOC_OMAP2430 */
-
-
-/* OMAP3-specific possible dependencies */
-
-#ifdef CONFIG_ARCH_OMAP3
-
-/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
-static struct clkdm_dep per_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
-static struct clkdm_dep usbhost_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
+/* 2xxx PM_WKDEP_GFX: CORE, MPU, WKUP */
+struct clkdm_dep gfx_24xx_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
         { NULL },
 };
 
-/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
-static struct clkdm_dep mpu_3xxx_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "dss_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "per_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
+/* 2xxx PM_WKDEP_DSP: CORE, MPU, WKUP */
+struct clkdm_dep dsp_24xx_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
         { NULL },
 };
 
-/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
-static struct clkdm_dep iva2_wkdeps[] = {
-        {
-                .clkdm_name = "core_l3_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "core_l4_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "dss_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "per_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-
-/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
-static struct clkdm_dep cam_wkdeps[] = {
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
-static struct clkdm_dep dss_wkdeps[] = {
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "wkup_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430: PM_WKDEP_NEON: MPU */
-static struct clkdm_dep neon_wkdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-
-/* Sleep dependency source arrays for OMAP3-specific clkdms */
-
-/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
-static struct clkdm_dep dss_sleepdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430: CM_SLEEPDEP_PER: MPU, IVA */
-static struct clkdm_dep per_sleepdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
-static struct clkdm_dep usbhost_sleepdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm_name = "iva2_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/* 3430: CM_SLEEPDEP_CAM: MPU */
-static struct clkdm_dep cam_sleepdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-/*
- * 3430ES1: CM_SLEEPDEP_GFX: MPU
- * 3430ES2: CM_SLEEPDEP_SGX: MPU
- * These can share data since they will never be present simultaneously
- * on the same device.
- */
-static struct clkdm_dep gfx_sgx_sleepdeps[] = {
-        {
-                .clkdm_name = "mpu_clkdm",
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        { NULL },
-};
-
-#endif /* CONFIG_ARCH_OMAP3 */
-
 
 /*
  * OMAP2/3-common clockdomains
@@ -430,439 +84,18 @@ static struct clkdm_dep gfx_sgx_sleepdeps[] = {
  */
 
 /* This is an implicit clockdomain - it is never defined as such in TRM */
-static struct clockdomain wkup_clkdm = {
+struct clockdomain wkup_common_clkdm = {
         .name           = "wkup_clkdm",
         .pwrdm          = { .name = "wkup_pwrdm" },
         .dep_bit        = OMAP_EN_WKUP_SHIFT,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
 
-static struct clockdomain prm_clkdm = {
+struct clockdomain prm_common_clkdm = {
         .name           = "prm_clkdm",
         .pwrdm          = { .name = "wkup_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
 
-static struct clockdomain cm_clkdm = {
+struct clockdomain cm_common_clkdm = {
         .name           = "cm_clkdm",
         .pwrdm          = { .name = "core_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 };
-
-/*
- * 2420-only clockdomains
- */
-
-#if defined(CONFIG_SOC_OMAP2420)
-
-static struct clockdomain mpu_2420_clkdm = {
-        .name           = "mpu_clkdm",
-        .pwrdm          = { .name = "mpu_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .wkdep_srcs     = mpu_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain iva1_2420_clkdm = {
-        .name           = "iva1_clkdm",
-        .pwrdm          = { .name = "dsp_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
-        .wkdep_srcs     = dsp_24xx_wkdeps,
-        .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain dsp_2420_clkdm = {
-        .name           = "dsp_clkdm",
-        .pwrdm          = { .name = "dsp_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain gfx_2420_clkdm = {
-        .name           = "gfx_clkdm",
-        .pwrdm          = { .name = "gfx_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = gfx_sgx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain core_l3_2420_clkdm = {
-        .name           = "core_l3_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .wkdep_srcs     = core_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain core_l4_2420_clkdm = {
-        .name           = "core_l4_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .wkdep_srcs     = core_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-static struct clockdomain dss_2420_clkdm = {
-        .name           = "dss_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
-};
-
-#endif   /* CONFIG_SOC_OMAP2420 */
-
-
-/*
- * 2430-only clockdomains
- */
-
-#if defined(CONFIG_SOC_OMAP2430)
-
-static struct clockdomain mpu_2430_clkdm = {
-        .name           = "mpu_clkdm",
-        .pwrdm          = { .name = "mpu_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = mpu_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-/* Another case of bit name collisions between several registers: EN_MDM */
-static struct clockdomain mdm_clkdm = {
-        .name           = "mdm_clkdm",
-        .pwrdm          = { .name = "mdm_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP2430_PM_WKDEP_MPU_EN_MDM_SHIFT,
-        .wkdep_srcs     = mdm_2430_wkdeps,
-        .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-static struct clockdomain dsp_2430_clkdm = {
-        .name           = "dsp_clkdm",
-        .pwrdm          = { .name = "dsp_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP24XX_PM_WKDEP_MPU_EN_DSP_SHIFT,
-        .wkdep_srcs     = dsp_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-static struct clockdomain gfx_2430_clkdm = {
-        .name           = "gfx_clkdm",
-        .pwrdm          = { .name = "gfx_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = gfx_sgx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-/*
- * XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
- * could cause trouble
- */
-static struct clockdomain core_l3_2430_clkdm = {
-        .name           = "core_l3_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
-        .wkdep_srcs     = core_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-/*
- * XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_24xx_clkdm and core_l4_24xx_clkdm
- * could cause trouble
- */
-static struct clockdomain core_l4_2430_clkdm = {
-        .name           = "core_l4_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .dep_bit        = OMAP24XX_EN_CORE_SHIFT,
-        .wkdep_srcs     = core_24xx_wkdeps,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-static struct clockdomain dss_2430_clkdm = {
-        .name           = "dss_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
-};
-
-#endif    /* CONFIG_SOC_OMAP2430 */
-
-
-/*
- * OMAP3 clockdomains
- */
-
-#if defined(CONFIG_ARCH_OMAP3)
-
-static struct clockdomain mpu_3xxx_clkdm = {
-        .name           = "mpu_clkdm",
-        .pwrdm          = { .name = "mpu_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
-        .dep_bit        = OMAP3430_EN_MPU_SHIFT,
-        .wkdep_srcs     = mpu_3xxx_wkdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain neon_clkdm = {
-        .name           = "neon_clkdm",
-        .pwrdm          = { .name = "neon_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = neon_wkdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain iva2_clkdm = {
-        .name           = "iva2_clkdm",
-        .pwrdm          = { .name = "iva2_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
-        .wkdep_srcs     = iva2_wkdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain gfx_3430es1_clkdm = {
-        .name           = "gfx_clkdm",
-        .pwrdm          = { .name = "gfx_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = gfx_sgx_wkdeps,
-        .sleepdep_srcs  = gfx_sgx_sleepdeps,
-        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
-};
-
-static struct clockdomain sgx_clkdm = {
-        .name           = "sgx_clkdm",
-        .pwrdm          = { .name = "sgx_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = gfx_sgx_wkdeps,
-        .sleepdep_srcs  = gfx_sgx_sleepdeps,
-        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
-};
-
-/*
- * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
- * then that information was removed from the 34xx ES2+ TRM.  It is
- * unclear whether the core is still there, but the clockdomain logic
- * is there, and must be programmed to an appropriate state if the
- * CORE clockdomain is to become inactive.
- */
-static struct clockdomain d2d_clkdm = {
-        .name           = "d2d_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-/*
- * XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
- * could cause trouble
- */
-static struct clockdomain core_l3_3xxx_clkdm = {
-        .name           = "core_l3_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-/*
- * XXX add usecounting for clkdm dependencies, otherwise the presence
- * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
- * could cause trouble
- */
-static struct clockdomain core_l4_3xxx_clkdm = {
-        .name           = "core_l4_clkdm",
-        .pwrdm          = { .name = "core_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP,
-        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-/* Another case of bit name collisions between several registers: EN_DSS */
-static struct clockdomain dss_3xxx_clkdm = {
-        .name           = "dss_clkdm",
-        .pwrdm          = { .name = "dss_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
-        .wkdep_srcs     = dss_wkdeps,
-        .sleepdep_srcs  = dss_sleepdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain cam_clkdm = {
-        .name           = "cam_clkdm",
-        .pwrdm          = { .name = "cam_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = cam_wkdeps,
-        .sleepdep_srcs  = cam_sleepdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain usbhost_clkdm = {
-        .name           = "usbhost_clkdm",
-        .pwrdm          = { .name = "usbhost_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .wkdep_srcs     = usbhost_wkdeps,
-        .sleepdep_srcs  = usbhost_sleepdeps,
-        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
-};
-
-static struct clockdomain per_clkdm = {
-        .name           = "per_clkdm",
-        .pwrdm          = { .name = "per_pwrdm" },
-        .flags          = CLKDM_CAN_HWSUP_SWSUP,
-        .dep_bit        = OMAP3430_EN_PER_SHIFT,
-        .wkdep_srcs     = per_wkdeps,
-        .sleepdep_srcs  = per_sleepdeps,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-/*
- * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is
- * switched of even if sdti is in use
- */
-static struct clockdomain emu_clkdm = {
-        .name           = "emu_clkdm",
-        .pwrdm          = { .name = "emu_pwrdm" },
-        .flags          = /* CLKDM_CAN_ENABLE_AUTO |  */CLKDM_CAN_SWSUP,
-        .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain dpll1_clkdm = {
-        .name           = "dpll1_clkdm",
-        .pwrdm          = { .name = "dpll1_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain dpll2_clkdm = {
-        .name           = "dpll2_clkdm",
-        .pwrdm          = { .name = "dpll2_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain dpll3_clkdm = {
-        .name           = "dpll3_clkdm",
-        .pwrdm          = { .name = "dpll3_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain dpll4_clkdm = {
-        .name           = "dpll4_clkdm",
-        .pwrdm          = { .name = "dpll4_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
-};
-
-static struct clockdomain dpll5_clkdm = {
-        .name           = "dpll5_clkdm",
-        .pwrdm          = { .name = "dpll5_pwrdm" },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
-};
-
-#endif   /* CONFIG_ARCH_OMAP3 */
-
-/*
- * Clockdomain hwsup dependencies (OMAP3 only)
- */
-
-static struct clkdm_autodep clkdm_autodeps[] = {
-        {
-                .clkdm     = { .name = "mpu_clkdm" },
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm     = { .name = "iva2_clkdm" },
-                .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
-        },
-        {
-                .clkdm     = { .name = NULL },
-        }
-};
-
-static struct clockdomain *clockdomains_omap2[] __initdata = {
-        &wkup_clkdm,
-        &cm_clkdm,
-        &prm_clkdm,
-
-#ifdef CONFIG_SOC_OMAP2420
-        &mpu_2420_clkdm,
-        &iva1_2420_clkdm,
-        &dsp_2420_clkdm,
-        &gfx_2420_clkdm,
-        &core_l3_2420_clkdm,
-        &core_l4_2420_clkdm,
-        &dss_2420_clkdm,
-#endif
-
-#ifdef CONFIG_SOC_OMAP2430
-        &mpu_2430_clkdm,
-        &mdm_clkdm,
-        &dsp_2430_clkdm,
-        &gfx_2430_clkdm,
-        &core_l3_2430_clkdm,
-        &core_l4_2430_clkdm,
-        &dss_2430_clkdm,
-#endif
-
-#ifdef CONFIG_ARCH_OMAP3
-        &mpu_3xxx_clkdm,
-        &neon_clkdm,
-        &iva2_clkdm,
-        &gfx_3430es1_clkdm,
-        &sgx_clkdm,
-        &d2d_clkdm,
-        &core_l3_3xxx_clkdm,
-        &core_l4_3xxx_clkdm,
-        &dss_3xxx_clkdm,
-        &cam_clkdm,
-        &usbhost_clkdm,
-        &per_clkdm,
-        &emu_clkdm,
-        &dpll1_clkdm,
-        &dpll2_clkdm,
-        &dpll3_clkdm,
-        &dpll4_clkdm,
-        &dpll5_clkdm,
-#endif
-        NULL,
-};
-
-void __init omap2xxx_clockdomains_init(void)
-{
-        clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap2_clkdm_operations);
-}
-
-void __init omap3xxx_clockdomains_init(void)
-{
-        clkdm_init(clockdomains_omap2, clkdm_autodeps, &omap3_clkdm_operations);
-}
diff --git a/arch/arm/mach-omap2/clockdomains3xxx_data.c b/arch/arm/mach-omap2/clockdomains3xxx_data.c
new file mode 100644
index 000000000000..b84e138d99c8
--- /dev/null
+++ b/arch/arm/mach-omap2/clockdomains3xxx_data.c
@@ -0,0 +1,398 @@
+/*
+ * OMAP3xxx clockdomains
+ *
+ * Copyright (C) 2008-2011 Texas Instruments, Inc.
+ * Copyright (C) 2008-2010 Nokia Corporation
+ *
+ * Paul Walmsley, Jouni Högander
+ *
+ * This file contains clockdomains and clockdomain wakeup/sleep
+ * dependencies for the OMAP3xxx chips.  Some notes:
+ *
+ * A useful validation rule for struct clockdomain: Any clockdomain
+ * referenced by a wkdep_srcs or sleepdep_srcs array must have a
+ * dep_bit assigned.  So wkdep_srcs/sleepdep_srcs are really just
+ * software-controllable dependencies.  Non-software-controllable
+ * dependencies do exist, but they are not encoded below (yet).
+ *
+ * The overly-specific dep_bit names are due to a bit name collision
+ * with CM_FCLKEN_{DSP,IVA2}.  The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift
+ * value are the same for all powerdomains: 2
+ *
+ * XXX should dep_bit be a mask, so we can test to see if it is 0 as a
+ * sanity check?
+ * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE
+ */
+
+/*
+ * To-Do List
+ * -> Port the Sleep/Wakeup dependencies for the domains
+ *    from the Power domain framework
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+
+#include "clockdomain.h"
+#include "prm2xxx_3xxx.h"
+#include "cm2xxx_3xxx.h"
+#include "cm-regbits-34xx.h"
+#include "prm-regbits-34xx.h"
+
+/*
+ * Clockdomain dependencies for wkdeps/sleepdeps
+ *
+ * XXX Hardware dependencies (e.g., dependencies that cannot be
+ * changed in software) are not included here yet, but should be.
+ */
+
+/* OMAP3-specific possible dependencies */
+
+/*
+ * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE
+ * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE
+ */
+static struct clkdm_dep gfx_sgx_3xxx_wkdeps[] = {
+        { .clkdm_name = "iva2_clkdm", },
+        { .clkdm_name = "mpu_clkdm", },
+        { .clkdm_name = "wkup_clkdm", },
+        { NULL },
+};
+
+/* 3430: PM_WKDEP_PER: CORE, IVA2, MPU, WKUP */
+static struct clkdm_dep per_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/* 3430ES2: PM_WKDEP_USBHOST: CORE, IVA2, MPU, WKUP */
+static struct clkdm_dep usbhost_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/* 3430 PM_WKDEP_MPU: CORE, IVA2, DSS, PER */
+static struct clkdm_dep mpu_3xxx_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { .clkdm_name = "dss_clkdm" },
+        { .clkdm_name = "per_clkdm" },
+        { NULL },
+};
+
+/* 3430 PM_WKDEP_IVA2: CORE, MPU, WKUP, DSS, PER */
+static struct clkdm_dep iva2_wkdeps[] = {
+        { .clkdm_name = "core_l3_clkdm" },
+        { .clkdm_name = "core_l4_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { .clkdm_name = "dss_clkdm" },
+        { .clkdm_name = "per_clkdm" },
+        { NULL },
+};
+
+/* 3430 PM_WKDEP_CAM: IVA2, MPU, WKUP */
+static struct clkdm_dep cam_wkdeps[] = {
+        { .clkdm_name = "iva2_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/* 3430 PM_WKDEP_DSS: IVA2, MPU, WKUP */
+static struct clkdm_dep dss_wkdeps[] = {
+        { .clkdm_name = "iva2_clkdm" },
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "wkup_clkdm" },
+        { NULL },
+};
+
+/* 3430: PM_WKDEP_NEON: MPU */
+static struct clkdm_dep neon_wkdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { NULL },
+};
+
+/* Sleep dependency source arrays for OMAP3-specific clkdms */
+
+/* 3430: CM_SLEEPDEP_DSS: MPU, IVA */
+static struct clkdm_dep dss_sleepdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { NULL },
+};
+
+/* 3430: CM_SLEEPDEP_PER: MPU, IVA */
+static struct clkdm_dep per_sleepdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { NULL },
+};
+
+/* 3430ES2: CM_SLEEPDEP_USBHOST: MPU, IVA */
+static struct clkdm_dep usbhost_sleepdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { .clkdm_name = "iva2_clkdm" },
+        { NULL },
+};
+
+/* 3430: CM_SLEEPDEP_CAM: MPU */
+static struct clkdm_dep cam_sleepdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { NULL },
+};
+
+/*
+ * 3430ES1: CM_SLEEPDEP_GFX: MPU
+ * 3430ES2: CM_SLEEPDEP_SGX: MPU
+ * These can share data since they will never be present simultaneously
+ * on the same device.
+ */
+static struct clkdm_dep gfx_sgx_sleepdeps[] = {
+        { .clkdm_name = "mpu_clkdm" },
+        { NULL },
+};
+
+/*
+ * OMAP3 clockdomains
+ */
+
+static struct clockdomain mpu_3xxx_clkdm = {
+        .name           = "mpu_clkdm",
+        .pwrdm          = { .name = "mpu_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP,
+        .dep_bit        = OMAP3430_EN_MPU_SHIFT,
+        .wkdep_srcs     = mpu_3xxx_wkdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK,
+};
+
+static struct clockdomain neon_clkdm = {
+        .name           = "neon_clkdm",
+        .pwrdm          = { .name = "neon_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = neon_wkdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK,
+};
+
+static struct clockdomain iva2_clkdm = {
+        .name           = "iva2_clkdm",
+        .pwrdm          = { .name = "iva2_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_IVA2_SHIFT,
+        .wkdep_srcs     = iva2_wkdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK,
+};
+
+static struct clockdomain gfx_3430es1_clkdm = {
+        .name           = "gfx_clkdm",
+        .pwrdm          = { .name = "gfx_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = gfx_sgx_3xxx_wkdeps,
+        .sleepdep_srcs  = gfx_sgx_sleepdeps,
+        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK,
+};
+
+static struct clockdomain sgx_clkdm = {
+        .name           = "sgx_clkdm",
+        .pwrdm          = { .name = "sgx_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = gfx_sgx_3xxx_wkdeps,
+        .sleepdep_srcs  = gfx_sgx_sleepdeps,
+        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK,
+};
+
+/*
+ * The die-to-die clockdomain was documented in the 34xx ES1 TRM, but
+ * then that information was removed from the 34xx ES2+ TRM.  It is
+ * unclear whether the core is still there, but the clockdomain logic
+ * is there, and must be programmed to an appropriate state if the
+ * CORE clockdomain is to become inactive.
+ */
+static struct clockdomain d2d_clkdm = {
+        .name           = "d2d_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK,
+};
+
+/*
+ * XXX add usecounting for clkdm dependencies, otherwise the presence
+ * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
+ * could cause trouble
+ */
+static struct clockdomain core_l3_3xxx_clkdm = {
+        .name           = "core_l3_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK,
+};
+
+/*
+ * XXX add usecounting for clkdm dependencies, otherwise the presence
+ * of a single dep bit for core_l3_3xxx_clkdm and core_l4_3xxx_clkdm
+ * could cause trouble
+ */
+static struct clockdomain core_l4_3xxx_clkdm = {
+        .name           = "core_l4_clkdm",
+        .pwrdm          = { .name = "core_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP,
+        .dep_bit        = OMAP3430_EN_CORE_SHIFT,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK,
+};
+
+/* Another case of bit name collisions between several registers: EN_DSS */
+static struct clockdomain dss_3xxx_clkdm = {
+        .name           = "dss_clkdm",
+        .pwrdm          = { .name = "dss_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP3430_PM_WKDEP_MPU_EN_DSS_SHIFT,
+        .wkdep_srcs     = dss_wkdeps,
+        .sleepdep_srcs  = dss_sleepdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK,
+};
+
+static struct clockdomain cam_clkdm = {
+        .name           = "cam_clkdm",
+        .pwrdm          = { .name = "cam_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = cam_wkdeps,
+        .sleepdep_srcs  = cam_sleepdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK,
+};
+
+static struct clockdomain usbhost_clkdm = {
+        .name           = "usbhost_clkdm",
+        .pwrdm          = { .name = "usbhost_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .wkdep_srcs     = usbhost_wkdeps,
+        .sleepdep_srcs  = usbhost_sleepdeps,
+        .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK,
+};
+
+static struct clockdomain per_clkdm = {
+        .name           = "per_clkdm",
+        .pwrdm          = { .name = "per_pwrdm" },
+        .flags          = CLKDM_CAN_HWSUP_SWSUP,
+        .dep_bit        = OMAP3430_EN_PER_SHIFT,
+        .wkdep_srcs     = per_wkdeps,
+        .sleepdep_srcs  = per_sleepdeps,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK,
+};
+
+/*
+ * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is
+ * switched of even if sdti is in use
+ */
+static struct clockdomain emu_clkdm = {
+        .name           = "emu_clkdm",
+        .pwrdm          = { .name = "emu_pwrdm" },
+        .flags          = /* CLKDM_CAN_ENABLE_AUTO |  */CLKDM_CAN_SWSUP,
+        .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK,
+};
+
+static struct clockdomain dpll1_clkdm = {
+        .name           = "dpll1_clkdm",
+        .pwrdm          = { .name = "dpll1_pwrdm" },
+};
+
+static struct clockdomain dpll2_clkdm = {
+        .name           = "dpll2_clkdm",
+        .pwrdm          = { .name = "dpll2_pwrdm" },
+};
+
+static struct clockdomain dpll3_clkdm = {
+        .name           = "dpll3_clkdm",
+        .pwrdm          = { .name = "dpll3_pwrdm" },
+};
+
+static struct clockdomain dpll4_clkdm = {
+        .name           = "dpll4_clkdm",
+        .pwrdm          = { .name = "dpll4_pwrdm" },
+};
+
+static struct clockdomain dpll5_clkdm = {
+        .name           = "dpll5_clkdm",
+        .pwrdm          = { .name = "dpll5_pwrdm" },
+};
+
+/*
+ * Clockdomain hwsup dependencies
+ */
+
+static struct clkdm_autodep clkdm_autodeps[] = {
+        {
+                .clkdm = { .name = "mpu_clkdm" },
+        },
+        {
+                .clkdm = { .name = "iva2_clkdm" },
+        },
+        {
+                .clkdm = { .name = NULL },
+        }
+};
+
+/*
+ *
+ */
+
+static struct clockdomain *clockdomains_omap3430_common[] __initdata = {
+        &wkup_common_clkdm,
+        &cm_common_clkdm,
+        &prm_common_clkdm,
+        &mpu_3xxx_clkdm,
+        &neon_clkdm,
+        &iva2_clkdm,
+        &d2d_clkdm,
+        &core_l3_3xxx_clkdm,
+        &core_l4_3xxx_clkdm,
+        &dss_3xxx_clkdm,
+        &cam_clkdm,
+        &per_clkdm,
+        &emu_clkdm,
+        &dpll1_clkdm,
+        &dpll2_clkdm,
+        &dpll3_clkdm,
+        &dpll4_clkdm,
+        NULL
+};
+
+static struct clockdomain *clockdomains_omap3430es1[] __initdata = {
+        &gfx_3430es1_clkdm,
+        NULL,
+};
+
+static struct clockdomain *clockdomains_omap3430es2plus[] __initdata = {
+        &sgx_clkdm,
+        &dpll5_clkdm,
+        &usbhost_clkdm,
+        NULL,
+};
+
+void __init omap3xxx_clockdomains_init(void)
+{
+        struct clockdomain **sc;
+
+        if (!cpu_is_omap34xx())
+                return;
+
+        clkdm_register_platform_funcs(&omap3_clkdm_operations);
+        clkdm_register_clkdms(clockdomains_omap3430_common);
+
+        sc = (omap_rev() == OMAP3430_REV_ES1_0) ? clockdomains_omap3430es1 :
+                clockdomains_omap3430es2plus;
+
+        clkdm_register_clkdms(sc);
+
+        clkdm_register_autodeps(clkdm_autodeps);
+        clkdm_complete_init();
+}
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c
index dccc651fa0d0..9299ac291d28 100644
--- a/arch/arm/mach-omap2/clockdomains44xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains44xx_data.c
@@ -34,350 +34,122 @@
 /* Static Dependencies for OMAP4 Clock Domains */
 
 static struct clkdm_dep d2d_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_2_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_init_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_2_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l3_init_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep ducati_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_2_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_dss_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_gfx_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_init_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_secure_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_wkup_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "tesla_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_2_clkdm" },
+        { .clkdm_name = "l3_dss_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l3_gfx_clkdm" },
+        { .clkdm_name = "l3_init_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
+        { .clkdm_name = "l4_secure_clkdm" },
+        { .clkdm_name = "l4_wkup_clkdm" },
+        { .clkdm_name = "tesla_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep iss_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ducati_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_dss_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_init_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_secure_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_wkup_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ducati_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_dss_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l3_init_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
+        { .clkdm_name = "l4_secure_clkdm" },
+        { .clkdm_name = "l4_wkup_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep l3_dss_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_2_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_2_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep l3_gfx_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep l3_init_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_secure_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_wkup_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
+        { .clkdm_name = "l4_secure_clkdm" },
+        { .clkdm_name = "l4_wkup_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep mpu_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ducati_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_2_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_dss_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_gfx_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_init_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_secure_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_wkup_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "tesla_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ducati_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_2_clkdm" },
+        { .clkdm_name = "l3_dss_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l3_gfx_clkdm" },
+        { .clkdm_name = "l3_init_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
+        { .clkdm_name = "l4_secure_clkdm" },
+        { .clkdm_name = "l4_wkup_clkdm" },
+        { .clkdm_name = "tesla_clkdm" },
         { NULL },
 };
 
 static struct clkdm_dep tesla_wkup_sleep_deps[] = {
-        {
-                .clkdm_name      = "abe_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "ivahd_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_1_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_2_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_emif_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l3_init_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_cfg_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_per_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
-        {
-                .clkdm_name      = "l4_wkup_clkdm",
-                .omap_chip       = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
-        },
+        { .clkdm_name = "abe_clkdm" },
+        { .clkdm_name = "ivahd_clkdm" },
+        { .clkdm_name = "l3_1_clkdm" },
+        { .clkdm_name = "l3_2_clkdm" },
+        { .clkdm_name = "l3_emif_clkdm" },
+        { .clkdm_name = "l3_init_clkdm" },
+        { .clkdm_name = "l4_cfg_clkdm" },
+        { .clkdm_name = "l4_per_clkdm" },
+        { .clkdm_name = "l4_wkup_clkdm" },
         { NULL },
 };
 
@@ -388,7 +160,6 @@ static struct clockdomain l4_cefuse_44xx_clkdm = {
         .cm_inst          = OMAP4430_CM2_CEFUSE_INST,
         .clkdm_offs       = OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l4_cfg_44xx_clkdm = {
@@ -399,7 +170,6 @@ static struct clockdomain l4_cfg_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CORE_L4CFG_CDOFFS,
         .dep_bit          = OMAP4430_L4CFG_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain tesla_44xx_clkdm = {
@@ -412,7 +182,6 @@ static struct clockdomain tesla_44xx_clkdm = {
         .wkdep_srcs       = tesla_wkup_sleep_deps,
         .sleepdep_srcs    = tesla_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_gfx_44xx_clkdm = {
@@ -425,7 +194,6 @@ static struct clockdomain l3_gfx_44xx_clkdm = {
         .wkdep_srcs       = l3_gfx_wkup_sleep_deps,
         .sleepdep_srcs    = l3_gfx_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain ivahd_44xx_clkdm = {
@@ -438,7 +206,6 @@ static struct clockdomain ivahd_44xx_clkdm = {
         .wkdep_srcs       = ivahd_wkup_sleep_deps,
         .sleepdep_srcs    = ivahd_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l4_secure_44xx_clkdm = {
@@ -451,7 +218,6 @@ static struct clockdomain l4_secure_44xx_clkdm = {
         .wkdep_srcs       = l4_secure_wkup_sleep_deps,
         .sleepdep_srcs    = l4_secure_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l4_per_44xx_clkdm = {
@@ -462,7 +228,6 @@ static struct clockdomain l4_per_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_L4PER_L4PER_CDOFFS,
         .dep_bit          = OMAP4430_L4PER_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain abe_44xx_clkdm = {
@@ -473,7 +238,6 @@ static struct clockdomain abe_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM1_ABE_ABE_CDOFFS,
         .dep_bit          = OMAP4430_ABE_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_instr_44xx_clkdm = {
@@ -482,7 +246,6 @@ static struct clockdomain l3_instr_44xx_clkdm = {
         .prcm_partition   = OMAP4430_CM2_PARTITION,
         .cm_inst          = OMAP4430_CM2_CORE_INST,
         .clkdm_offs       = OMAP4430_CM2_CORE_L3INSTR_CDOFFS,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_init_44xx_clkdm = {
@@ -495,7 +258,6 @@ static struct clockdomain l3_init_44xx_clkdm = {
         .wkdep_srcs       = l3_init_wkup_sleep_deps,
         .sleepdep_srcs    = l3_init_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain d2d_44xx_clkdm = {
@@ -507,7 +269,6 @@ static struct clockdomain d2d_44xx_clkdm = {
         .wkdep_srcs       = d2d_wkup_sleep_deps,
         .sleepdep_srcs    = d2d_wkup_sleep_deps,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain mpu0_44xx_clkdm = {
@@ -517,7 +278,6 @@ static struct clockdomain mpu0_44xx_clkdm = {
         .cm_inst          = OMAP4430_PRCM_MPU_CPU0_INST,
         .clkdm_offs       = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain mpu1_44xx_clkdm = {
@@ -527,7 +287,6 @@ static struct clockdomain mpu1_44xx_clkdm = {
         .cm_inst          = OMAP4430_PRCM_MPU_CPU1_INST,
         .clkdm_offs       = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_emif_44xx_clkdm = {
@@ -538,7 +297,6 @@ static struct clockdomain l3_emif_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CORE_MEMIF_CDOFFS,
         .dep_bit          = OMAP4430_MEMIF_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l4_ao_44xx_clkdm = {
@@ -548,7 +306,6 @@ static struct clockdomain l4_ao_44xx_clkdm = {
         .cm_inst          = OMAP4430_CM2_ALWAYS_ON_INST,
         .clkdm_offs       = OMAP4430_CM2_ALWAYS_ON_ALWON_CDOFFS,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain ducati_44xx_clkdm = {
@@ -561,7 +318,6 @@ static struct clockdomain ducati_44xx_clkdm = {
         .wkdep_srcs       = ducati_wkup_sleep_deps,
         .sleepdep_srcs    = ducati_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain mpu_44xx_clkdm = {
@@ -573,7 +329,6 @@ static struct clockdomain mpu_44xx_clkdm = {
         .wkdep_srcs       = mpu_wkup_sleep_deps,
         .sleepdep_srcs    = mpu_wkup_sleep_deps,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_2_44xx_clkdm = {
@@ -584,7 +339,6 @@ static struct clockdomain l3_2_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CORE_L3_2_CDOFFS,
         .dep_bit          = OMAP4430_L3_2_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_1_44xx_clkdm = {
@@ -595,7 +349,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_CM2_CORE_L3_1_CDOFFS,
         .dep_bit          = OMAP4430_L3_1_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain iss_44xx_clkdm = {
@@ -607,7 +360,6 @@ static struct clockdomain iss_44xx_clkdm = {
         .wkdep_srcs       = iss_wkup_sleep_deps,
         .sleepdep_srcs    = iss_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_dss_44xx_clkdm = {
@@ -620,7 +372,6 @@ static struct clockdomain l3_dss_44xx_clkdm = {
         .wkdep_srcs       = l3_dss_wkup_sleep_deps,
         .sleepdep_srcs    = l3_dss_wkup_sleep_deps,
         .flags            = CLKDM_CAN_HWSUP_SWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l4_wkup_44xx_clkdm = {
@@ -631,7 +382,6 @@ static struct clockdomain l4_wkup_44xx_clkdm = {
         .clkdm_offs       = OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS,
         .dep_bit          = OMAP4430_L4WKUP_STATDEP_SHIFT,
         .flags            = CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain emu_sys_44xx_clkdm = {
@@ -641,7 +391,6 @@ static struct clockdomain emu_sys_44xx_clkdm = {
         .cm_inst          = OMAP4430_PRM_EMU_CM_INST,
         .clkdm_offs       = OMAP4430_PRM_EMU_CM_EMU_CDOFFS,
         .flags            = CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct clockdomain l3_dma_44xx_clkdm = {
@@ -653,7 +402,6 @@ static struct clockdomain l3_dma_44xx_clkdm = {
         .wkdep_srcs       = l3_dma_wkup_sleep_deps,
         .sleepdep_srcs    = l3_dma_wkup_sleep_deps,
         .flags            = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* As clockdomains are added or removed above, this list must also be changed */
@@ -685,7 +433,10 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
         NULL
 };
 
+
 void __init omap44xx_clockdomains_init(void)
 {
-        clkdm_init(clockdomains_omap44xx, NULL, &omap4_clkdm_operations);
+        clkdm_register_platform_funcs(&omap4_clkdm_operations);
+        clkdm_register_clkdms(clockdomains_omap44xx);
+        clkdm_complete_init();
 }
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 37efb8696927..d27daf921c7e 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -28,7 +28,6 @@
 
 #include "control.h"
 
-static struct omap_chip_id omap_chip;
 static unsigned int omap_revision;
 
 u32 omap_features;
@@ -39,19 +38,6 @@ unsigned int omap_rev(void)
 }
 EXPORT_SYMBOL(omap_rev);
 
-/**
- * omap_chip_is - test whether currently running OMAP matches a chip type
- * @oc: omap_chip_t to test against
- *
- * Test whether the currently-running OMAP chip matches the supplied
- * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
- */
-int omap_chip_is(struct omap_chip_id oci)
-{
-        return (oci.oc & omap_chip.oc) ? 1 : 0;
-}
-EXPORT_SYMBOL(omap_chip_is);
-
 int omap_type(void)
 {
         u32 val = 0;
@@ -242,14 +228,12 @@ static void __init ti816x_check_features(void)
         omap_features = OMAP3_HAS_NEON;
 }
 
-static void __init omap3_check_revision(void)
+static void __init omap3_check_revision(const char **cpu_rev)
 {
         u32 cpuid, idcode;
         u16 hawkeye;
         u8 rev;
 
-        omap_chip.oc = CHIP_IS_OMAP3430;
-
         /*
          * We cannot access revision registers on ES1.0.
          * If the processor type is Cortex-A8 and the revision is 0x0
@@ -258,7 +242,7 @@ static void __init omap3_check_revision(void)
         cpuid = read_cpuid(CPUID_ID);
         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
                 omap_revision = OMAP3430_REV_ES1_0;
-                omap_chip.oc |= CHIP_IS_OMAP3430ES1;
+                *cpu_rev = "1.0";
                 return;
         }
 
@@ -279,77 +263,85 @@ static void __init omap3_check_revision(void)
                 case 0: /* Take care of early samples */
                 case 1:
                         omap_revision = OMAP3430_REV_ES2_0;
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+                        *cpu_rev = "2.0";
                         break;
                 case 2:
                         omap_revision = OMAP3430_REV_ES2_1;
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES2;
+                        *cpu_rev = "2.1";
                         break;
                 case 3:
                         omap_revision = OMAP3430_REV_ES3_0;
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
+                        *cpu_rev = "3.0";
                         break;
                 case 4:
                         omap_revision = OMAP3430_REV_ES3_1;
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+                        *cpu_rev = "3.1";
                         break;
                 case 7:
                 /* FALLTHROUGH */
                 default:
                         /* Use the latest known revision as default */
                         omap_revision = OMAP3430_REV_ES3_1_2;
-
-                        /* REVISIT: Add CHIP_IS_OMAP3430ES3_1_2? */
-                        omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+                        *cpu_rev = "3.1.2";
                 }
                 break;
         case 0xb868:
-                /* Handle OMAP35xx/AM35xx devices
+                /*
+                 * Handle OMAP/AM 3505/3517 devices
                  *
-                 * Set the device to be OMAP3505 here. Actual device
+                 * Set the device to be OMAP3517 here. Actual device
                  * is identified later based on the features.
-                 *
-                 * REVISIT: AM3505/AM3517 should have their own CHIP_IS
                  */
-                omap_revision = OMAP3505_REV(rev);
-                omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
+                switch (rev) {
+                case 0:
+                        omap_revision = OMAP3517_REV_ES1_0;
+                        *cpu_rev = "1.0";
+                        break;
+                case 1:
+                /* FALLTHROUGH */
+                default:
+                        omap_revision = OMAP3517_REV_ES1_1;
+                        *cpu_rev = "1.1";
+                }
                 break;
         case 0xb891:
                 /* Handle 36xx devices */
-                omap_chip.oc |= CHIP_IS_OMAP3630ES1;
 
                 switch(rev) {
                 case 0: /* Take care of early samples */
                         omap_revision = OMAP3630_REV_ES1_0;
+                        *cpu_rev = "1.0";
                         break;
                 case 1:
                         omap_revision = OMAP3630_REV_ES1_1;
-                        omap_chip.oc |= CHIP_IS_OMAP3630ES1_1;
+                        *cpu_rev = "1.1";
                         break;
                 case 2:
+                /* FALLTHROUGH */
                 default:
-                        omap_revision =  OMAP3630_REV_ES1_2;
-                        omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+                        omap_revision = OMAP3630_REV_ES1_2;
+                        *cpu_rev = "1.2";
                 }
                 break;
         case 0xb81e:
-                omap_chip.oc = CHIP_IS_TI816X;
-
                 switch (rev) {
                 case 0:
                         omap_revision = TI8168_REV_ES1_0;
+                        *cpu_rev = "1.0";
                         break;
                 case 1:
+                /* FALLTHROUGH */
+                default:
                         omap_revision = TI8168_REV_ES1_1;
+                        *cpu_rev = "1.1";
                         break;
-                default:
-                        omap_revision =  TI8168_REV_ES1_1;
                 }
                 break;
         default:
-                /* Unknown default to latest silicon rev as default*/
-                omap_revision =  OMAP3630_REV_ES1_2;
-                omap_chip.oc |= CHIP_IS_OMAP3630ES1_2;
+                /* Unknown default to latest silicon rev as default */
+                omap_revision = OMAP3630_REV_ES1_2;
+                *cpu_rev = "1.2";
+                pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n");
         }
 }
 
@@ -382,24 +374,20 @@ static void __init omap4_check_revision(void)
                 switch (rev) {
                 case 0:
                         omap_revision = OMAP4430_REV_ES1_0;
-                        omap_chip.oc |= CHIP_IS_OMAP4430ES1;
                         break;
                 case 1:
                 default:
                         omap_revision = OMAP4430_REV_ES2_0;
-                        omap_chip.oc |= CHIP_IS_OMAP4430ES2;
                 }
                 break;
         case 0xb95c:
                 switch (rev) {
                 case 3:
                         omap_revision = OMAP4430_REV_ES2_1;
-                        omap_chip.oc |= CHIP_IS_OMAP4430ES2_1;
                         break;
                 case 4:
                 default:
                         omap_revision = OMAP4430_REV_ES2_2;
-                        omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
                 }
                 break;
         case 0xb94e:
@@ -407,14 +395,12 @@ static void __init omap4_check_revision(void)
                 case 0:
                 default:
                         omap_revision = OMAP4460_REV_ES1_0;
-                        omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
                         break;
                 }
                 break;
         default:
                 /* Unknown default to latest silicon rev as default */
                 omap_revision = OMAP4430_REV_ES2_2;
-                omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
         }
 
         pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16,
@@ -425,94 +411,33 @@ static void __init omap4_check_revision(void)
         if (omap3_has_ ##feat())                \
                 printk(#feat" ");
 
-static void __init omap3_cpuinfo(void)
+static void __init omap3_cpuinfo(const char *cpu_rev)
 {
-        u8 rev = GET_OMAP_REVISION();
-        char cpu_name[16], cpu_rev[16];
+        const char *cpu_name;
 
-        /* OMAP3430 and OMAP3530 are assumed to be same.
+        /*
+         * OMAP3430 and OMAP3530 are assumed to be same.
          *
          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
          * on available features. Upon detection, update the CPU id
          * and CPU class bits.
          */
         if (cpu_is_omap3630()) {
-                strcpy(cpu_name, "OMAP3630");
-        } else if (cpu_is_omap3505()) {
-                /*
-                 * AM35xx devices
-                 */
-                if (omap3_has_sgx()) {
-                        omap_revision = OMAP3517_REV(rev);
-                        strcpy(cpu_name, "AM3517");
-                } else {
-                        /* Already set in omap3_check_revision() */
-                        strcpy(cpu_name, "AM3505");
-                }
+                cpu_name = "OMAP3630";
+        } else if (cpu_is_omap3517()) {
+                /* AM35xx devices */
+                cpu_name = (omap3_has_sgx()) ? "AM3517" : "AM3505";
         } else if (cpu_is_ti816x()) {
-                strcpy(cpu_name, "TI816X");
+                cpu_name = "TI816X";
         } else if (omap3_has_iva() && omap3_has_sgx()) {
                 /* OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices */
-                strcpy(cpu_name, "OMAP3430/3530");
+                cpu_name = "OMAP3430/3530";
         } else if (omap3_has_iva()) {
-                omap_revision = OMAP3525_REV(rev);
-                strcpy(cpu_name, "OMAP3525");
+                cpu_name = "OMAP3525";
         } else if (omap3_has_sgx()) {
-                omap_revision = OMAP3515_REV(rev);
-                strcpy(cpu_name, "OMAP3515");
+                cpu_name = "OMAP3515";
         } else {
-                omap_revision = OMAP3503_REV(rev);
-                strcpy(cpu_name, "OMAP3503");
-        }
-
-        if (cpu_is_omap3630() || cpu_is_ti816x()) {
-                switch (rev) {
-                case OMAP_REVBITS_00:
-                        strcpy(cpu_rev, "1.0");
-                        break;
-                case OMAP_REVBITS_01:
-                        strcpy(cpu_rev, "1.1");
-                        break;
-                case OMAP_REVBITS_02:
-                        /* FALLTHROUGH */
-                default:
-                        /* Use the latest known revision as default */
-                        strcpy(cpu_rev, "1.2");
-                }
-        } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
-                switch (rev) {
-                case OMAP_REVBITS_00:
-                        strcpy(cpu_rev, "1.0");
-                        break;
-                case OMAP_REVBITS_01:
-                        /* FALLTHROUGH */
-                default:
-                        /* Use the latest known revision as default */
-                        strcpy(cpu_rev, "1.1");
-                }
-        } else {
-                switch (rev) {
-                case OMAP_REVBITS_00:
-                        strcpy(cpu_rev, "1.0");
-                        break;
-                case OMAP_REVBITS_01:
-                        strcpy(cpu_rev, "2.0");
-                        break;
-                case OMAP_REVBITS_02:
-                        strcpy(cpu_rev, "2.1");
-                        break;
-                case OMAP_REVBITS_03:
-                        strcpy(cpu_rev, "3.0");
-                        break;
-                case OMAP_REVBITS_04:
-                        strcpy(cpu_rev, "3.1");
-                        break;
-                case OMAP_REVBITS_05:
-                        /* FALLTHROUGH */
-                default:
-                        /* Use the latest known revision as default */
-                        strcpy(cpu_rev, "3.1.2");
-                }
+                cpu_name = "OMAP3503";
         }
 
         /* Print verbose information */
@@ -533,6 +458,8 @@ static void __init omap3_cpuinfo(void)
  */
 void __init omap2_check_revision(void)
 {
+        const char *cpu_rev;
+
         /*
          * At this point we have an idea about the processor revision set
          * earlier with omap2_set_globals_tap().
@@ -540,7 +467,7 @@ void __init omap2_check_revision(void)
         if (cpu_is_omap24xx()) {
                 omap24xx_check_revision();
         } else if (cpu_is_omap34xx()) {
-                omap3_check_revision();
+                omap3_check_revision(&cpu_rev);
 
                 /* TI816X doesn't have feature register */
                 if (!cpu_is_ti816x())
@@ -548,7 +475,7 @@ void __init omap2_check_revision(void)
                 else
                         ti816x_check_features();
 
-                omap3_cpuinfo();
+                omap3_cpuinfo(cpu_rev);
                 return;
         } else if (cpu_is_omap44xx()) {
                 omap4_check_revision();
@@ -557,22 +484,6 @@ void __init omap2_check_revision(void)
         } else {
                 pr_err("OMAP revision unknown, please fix!\n");
         }
-
-        /*
-         * OK, now we know the exact revision. Initialize omap_chip bits
-         * for powerdowmain and clockdomain code.
-         */
-        if (cpu_is_omap243x()) {
-                /* Currently only supports 2430ES2.1 and 2430-all */
-                omap_chip.oc |= CHIP_IS_OMAP2430;
-                return;
-        } else if (cpu_is_omap242x()) {
-                /* Currently only supports 2420ES2.1.1 and 2420-all */
-                omap_chip.oc |= CHIP_IS_OMAP2420;
-                return;
-        }
-
-        pr_err("Uninitialized omap_chip, please fix!\n");
 }
 
 /*
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index 2ce1ce6fb4db..1a13b7916554 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -341,12 +341,12 @@ void __init omap2_init_common_infrastructure(void)
         u8 postsetup_state;
 
         if (cpu_is_omap242x()) {
-                omap2xxx_powerdomains_init();
-                omap2xxx_clockdomains_init();
+                omap242x_powerdomains_init();
+                omap242x_clockdomains_init();
                 omap2420_hwmod_init();
         } else if (cpu_is_omap243x()) {
-                omap2xxx_powerdomains_init();
-                omap2xxx_clockdomains_init();
+                omap243x_powerdomains_init();
+                omap243x_clockdomains_init();
                 omap2430_hwmod_init();
         } else if (cpu_is_omap34xx()) {
                 omap3xxx_powerdomains_init();
@@ -376,7 +376,7 @@ void __init omap2_init_common_infrastructure(void)
          * omap_hwmod_late_init(), so boards that desire full watchdog
          * coverage of kernel initialization can reprogram the
          * postsetup_state between the calls to
-         * omap2_init_common_infra() and omap2_init_common_devices().
+         * omap2_init_common_infra() and omap_sdrc_init().
          *
          * XXX ideally we could detect whether the MPU WDT was currently
          * enabled here and make this conditional
@@ -400,7 +400,47 @@ void __init omap2_init_common_infrastructure(void)
                 pr_err("Could not init clock framework - unknown SoC\n");
 }
 
-void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
+void __init omap2420_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap2430_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap3430_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap35xx_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap3630_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init am35xx_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init ti816x_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap4430_init_early(void)
+{
+        omap2_init_common_infrastructure();
+}
+
+void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                       struct omap_sdrc_params *sdrc_cs1)
 {
         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bdda3ae..d71380705080 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1954,9 +1954,6 @@ int __init omap_hwmod_register(struct omap_hwmod **ohs)
 
         i = 0;
         do {
-                if (!omap_chip_is(ohs[i]->omap_chip))
-                        continue;
-
                 r = _register(ohs[i]);
                 WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
                      r);
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
index a015c69068f6..6d7206213525 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c
@@ -100,7 +100,6 @@ static struct omap_hwmod omap2420_l3_main_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2420_l3_main_masters),
         .slaves         = omap2420_l3_main_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_l3_main_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -206,7 +205,6 @@ static struct omap_hwmod omap2420_l4_core_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2420_l4_core_masters),
         .slaves         = omap2420_l4_core_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_l4_core_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -227,7 +225,6 @@ static struct omap_hwmod omap2420_l4_wkup_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2420_l4_wkup_masters),
         .slaves         = omap2420_l4_wkup_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_l4_wkup_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -243,7 +240,6 @@ static struct omap_hwmod omap2420_mpu_hwmod = {
         .main_clk       = "mpu_ck",
         .masters        = omap2420_mpu_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_mpu_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /*
@@ -271,7 +267,16 @@ static struct omap_hwmod omap2420_iva_hwmod = {
         .class          = &iva_hwmod_class,
         .masters        = omap2420_iva_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_iva_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* always-on timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
+        .timer_capability       = OMAP_TIMER_ALWON,
+};
+
+/* pwm timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
+        .timer_capability       = OMAP_TIMER_HAS_PWM,
 };
 
 /* timer1 */
@@ -314,10 +319,10 @@ static struct omap_hwmod omap2420_timer1_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer1_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer2 */
@@ -351,10 +356,10 @@ static struct omap_hwmod omap2420_timer2_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer2_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer3 */
@@ -388,10 +393,10 @@ static struct omap_hwmod omap2420_timer3_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer3_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer4 */
@@ -425,10 +430,10 @@ static struct omap_hwmod omap2420_timer4_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer4_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer5 */
@@ -462,10 +467,10 @@ static struct omap_hwmod omap2420_timer5_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer5_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 
@@ -500,10 +505,10 @@ static struct omap_hwmod omap2420_timer6_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer6_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer7 */
@@ -537,10 +542,10 @@ static struct omap_hwmod omap2420_timer7_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer7_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer8 */
@@ -574,10 +579,10 @@ static struct omap_hwmod omap2420_timer8_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2420_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer8_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer9 */
@@ -611,10 +616,10 @@ static struct omap_hwmod omap2420_timer9_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2420_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer9_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer10 */
@@ -648,10 +653,10 @@ static struct omap_hwmod omap2420_timer10_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2420_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer10_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer11 */
@@ -685,10 +690,10 @@ static struct omap_hwmod omap2420_timer11_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2420_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer11_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* timer12 */
@@ -722,10 +727,10 @@ static struct omap_hwmod omap2420_timer12_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2420_timer12_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_timer12_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
 };
 
 /* l4_wkup -> wd_timer2 */
@@ -766,7 +771,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = {
         },
         .slaves         = omap2420_wd_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_wd_timer2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* UART1 */
@@ -792,7 +796,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = {
         .slaves         = omap2420_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart1_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* UART2 */
@@ -818,7 +821,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = {
         .slaves         = omap2420_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart2_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* UART3 */
@@ -844,7 +846,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = {
         .slaves         = omap2420_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_uart3_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* dss */
@@ -898,7 +899,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_slaves),
         .masters        = omap2420_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_dss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -938,7 +938,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = {
         },
         .slaves         = omap2420_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_dispc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -975,7 +974,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = {
         },
         .slaves         = omap2420_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_rfbi_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1013,7 +1011,6 @@ static struct omap_hwmod omap2420_dss_venc_hwmod = {
         },
         .slaves         = omap2420_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_dss_venc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1064,7 +1061,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_i2c1_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_16BIT_REG,
 };
 
@@ -1092,7 +1088,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_i2c2_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_16BIT_REG,
 };
 
@@ -1197,7 +1192,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio1_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio2 */
@@ -1223,7 +1217,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio2_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio3 */
@@ -1249,7 +1242,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio3_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* gpio4 */
@@ -1275,7 +1267,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_gpio4_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* dma attributes */
@@ -1322,7 +1313,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = {
         .masters        = omap2420_dma_system_masters,
         .masters_cnt    = ARRAY_SIZE(omap2420_dma_system_masters),
         .dev_attr       = &dma_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1363,7 +1353,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = {
         },
         .slaves         = omap2420_mailbox_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_mailbox_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* mcspi1 */
@@ -1393,7 +1382,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcspi1_slaves),
         .class          = &omap2xxx_mcspi_class,
         .dev_attr       = &omap_mcspi1_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* mcspi2 */
@@ -1423,7 +1411,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcspi2_slaves),
         .class          = &omap2xxx_mcspi_class,
         .dev_attr       = &omap_mcspi2_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /*
@@ -1473,7 +1460,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = {
         },
         .slaves         = omap2420_mcbsp1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcbsp1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 /* mcbsp2 */
@@ -1514,7 +1500,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = {
         },
         .slaves         = omap2420_mcbsp2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2420_mcbsp2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
 };
 
 static __initdata struct omap_hwmod *omap2420_hwmods[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
index 408193d8e044..a2580d01c3ff 100644
--- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c
@@ -110,7 +110,6 @@ static struct omap_hwmod omap2430_l3_main_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2430_l3_main_masters),
         .slaves         = omap2430_l3_main_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_l3_main_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -250,7 +249,6 @@ static struct omap_hwmod omap2430_l4_core_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2430_l4_core_masters),
         .slaves         = omap2430_l4_core_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_l4_core_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -301,7 +299,6 @@ static struct omap_hwmod omap2430_l4_wkup_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap2430_l4_wkup_masters),
         .slaves         = omap2430_l4_wkup_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_l4_wkup_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -317,7 +314,6 @@ static struct omap_hwmod omap2430_mpu_hwmod = {
         .main_clk       = "mpu_ck",
         .masters        = omap2430_mpu_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_mpu_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /*
@@ -345,7 +341,16 @@ static struct omap_hwmod omap2430_iva_hwmod = {
         .class          = &iva_hwmod_class,
         .masters        = omap2430_iva_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_iva_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* always-on timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
+        .timer_capability       = OMAP_TIMER_ALWON,
+};
+
+/* pwm timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
+        .timer_capability       = OMAP_TIMER_HAS_PWM,
 };
 
 /* timer1 */
@@ -388,10 +393,10 @@ static struct omap_hwmod omap2430_timer1_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer1_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer2 */
@@ -425,10 +430,10 @@ static struct omap_hwmod omap2430_timer2_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer2_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer3 */
@@ -462,10 +467,10 @@ static struct omap_hwmod omap2430_timer3_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer3_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer4 */
@@ -499,10 +504,10 @@ static struct omap_hwmod omap2430_timer4_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer4_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer5 */
@@ -536,10 +541,10 @@ static struct omap_hwmod omap2430_timer5_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer5_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer6 */
@@ -573,10 +578,10 @@ static struct omap_hwmod omap2430_timer6_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer6_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer7 */
@@ -610,10 +615,10 @@ static struct omap_hwmod omap2430_timer7_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer7_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer8 */
@@ -647,10 +652,10 @@ static struct omap_hwmod omap2430_timer8_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap2430_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer8_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer9 */
@@ -684,10 +689,10 @@ static struct omap_hwmod omap2430_timer9_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2430_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer9_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer10 */
@@ -721,10 +726,10 @@ static struct omap_hwmod omap2430_timer10_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2430_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer10_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer11 */
@@ -758,10 +763,10 @@ static struct omap_hwmod omap2430_timer11_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2430_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer11_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* timer12 */
@@ -795,10 +800,10 @@ static struct omap_hwmod omap2430_timer12_hwmod = {
                         .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap2430_timer12_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_timer12_slaves),
         .class          = &omap2xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /* l4_wkup -> wd_timer2 */
@@ -839,7 +844,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = {
         },
         .slaves         = omap2430_wd_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_wd_timer2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* UART1 */
@@ -865,7 +869,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = {
         .slaves         = omap2430_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart1_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* UART2 */
@@ -891,7 +894,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = {
         .slaves         = omap2430_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart2_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* UART3 */
@@ -917,7 +919,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = {
         .slaves         = omap2430_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_uart3_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* dss */
@@ -965,7 +966,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_slaves),
         .masters        = omap2430_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_dss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -999,7 +999,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = {
         },
         .slaves         = omap2430_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_dispc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1030,7 +1029,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = {
         },
         .slaves         = omap2430_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_rfbi_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1062,7 +1060,6 @@ static struct omap_hwmod omap2430_dss_venc_hwmod = {
         },
         .slaves         = omap2430_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_dss_venc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1123,7 +1120,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_i2c1_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* I2C2 */
@@ -1151,7 +1147,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_i2c2_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* l4_wkup -> gpio1 */
@@ -1273,7 +1268,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio1_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio2 */
@@ -1299,7 +1293,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio2_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio3 */
@@ -1325,7 +1318,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio3_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio4 */
@@ -1351,7 +1343,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio4_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* gpio5 */
@@ -1382,7 +1373,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_gpio5_slaves),
         .class          = &omap2xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* dma attributes */
@@ -1429,7 +1419,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = {
         .masters        = omap2430_dma_system_masters,
         .masters_cnt    = ARRAY_SIZE(omap2430_dma_system_masters),
         .dev_attr       = &dma_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1469,7 +1458,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = {
         },
         .slaves         = omap2430_mailbox_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mailbox_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcspi1 */
@@ -1499,7 +1487,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi1_slaves),
         .class          = &omap2xxx_mcspi_class,
         .dev_attr       = &omap_mcspi1_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcspi2 */
@@ -1529,7 +1516,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi2_slaves),
         .class          = &omap2xxx_mcspi_class,
         .dev_attr       = &omap_mcspi2_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcspi3 */
@@ -1572,7 +1558,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcspi3_slaves),
         .class          = &omap2xxx_mcspi_class,
         .dev_attr       = &omap_mcspi3_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /*
@@ -1628,7 +1613,6 @@ static struct omap_hwmod omap2430_usbhsotg_hwmod = {
          */
         .flags          = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
                                 | HWMOD_SWSUP_MSTANDBY,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
 };
 
 /*
@@ -1689,7 +1673,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = {
         },
         .slaves         = omap2430_mcbsp1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcbsp1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcbsp2 */
@@ -1731,7 +1714,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = {
         },
         .slaves         = omap2430_mcbsp2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcbsp2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcbsp3 */
@@ -1783,7 +1765,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = {
         },
         .slaves         = omap2430_mcbsp3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcbsp3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcbsp4 */
@@ -1841,7 +1822,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = {
         },
         .slaves         = omap2430_mcbsp4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcbsp4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* mcbsp5 */
@@ -1899,7 +1879,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = {
         },
         .slaves         = omap2430_mcbsp5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mcbsp5_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* MMC/SD/SDIO common */
@@ -1966,7 +1945,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = {
         .slaves         = omap2430_mmc1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mmc1_slaves),
         .class          = &omap2430_mmc_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 /* MMC/SD/SDIO2 */
@@ -2010,7 +1988,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
         .slaves         = omap2430_mmc2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap2430_mmc2_slaves),
         .class          = &omap2430_mmc_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
 };
 
 static __initdata struct omap_hwmod *omap2430_hwmods[] = {
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index 25bf43b5a4ec..2e4852d9574f 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -156,7 +156,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = {
         .masters_cnt    = ARRAY_SIZE(omap3xxx_l3_main_masters),
         .slaves         = omap3xxx_l3_main_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_l3_main_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -459,7 +458,6 @@ static struct omap_hwmod omap3xxx_l4_core_hwmod = {
         .class          = &l4_hwmod_class,
         .slaves         = omap3xxx_l4_core_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_l4_core_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -474,7 +472,6 @@ static struct omap_hwmod omap3xxx_l4_per_hwmod = {
         .class          = &l4_hwmod_class,
         .slaves         = omap3xxx_l4_per_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_l4_per_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -489,7 +486,6 @@ static struct omap_hwmod omap3xxx_l4_wkup_hwmod = {
         .class          = &l4_hwmod_class,
         .slaves         = omap3xxx_l4_wkup_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_l4_wkup_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -505,7 +501,6 @@ static struct omap_hwmod omap3xxx_mpu_hwmod = {
         .main_clk       = "arm_fck",
         .masters        = omap3xxx_mpu_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_mpu_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /*
@@ -533,7 +528,6 @@ static struct omap_hwmod omap3xxx_iva_hwmod = {
         .class          = &iva_hwmod_class,
         .masters        = omap3xxx_iva_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_iva_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer class */
@@ -570,6 +564,21 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = {
         .rev =  OMAP_TIMER_IP_VERSION_1,
 };
 
+/* secure timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_secure_dev_attr = {
+        .timer_capability       = OMAP_TIMER_SECURE,
+};
+
+/* always-on timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
+        .timer_capability       = OMAP_TIMER_ALWON,
+};
+
+/* pwm timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
+        .timer_capability       = OMAP_TIMER_HAS_PWM,
+};
+
 /* timer1 */
 static struct omap_hwmod omap3xxx_timer1_hwmod;
 
@@ -610,10 +619,10 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT1_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer1_slaves),
         .class          = &omap3xxx_timer_1ms_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer2 */
@@ -656,10 +665,10 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT2_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer2_slaves),
         .class          = &omap3xxx_timer_1ms_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer3 */
@@ -702,10 +711,10 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT3_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer3_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer4 */
@@ -748,10 +757,10 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT4_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer4_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer5 */
@@ -794,10 +803,10 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT5_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer5_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer6 */
@@ -840,10 +849,10 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT6_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer6_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer7 */
@@ -886,10 +895,10 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT7_SHIFT,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap3xxx_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer7_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer8 */
@@ -932,10 +941,10 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT8_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap3xxx_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer8_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer9 */
@@ -978,10 +987,10 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT9_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap3xxx_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer9_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer10 */
@@ -1015,10 +1024,10 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT10_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap3xxx_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer10_slaves),
         .class          = &omap3xxx_timer_1ms_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer11 */
@@ -1052,10 +1061,10 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT11_SHIFT,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap3xxx_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer11_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* timer12*/
@@ -1102,10 +1111,10 @@ static struct omap_hwmod omap3xxx_timer12_hwmod = {
                         .idlest_idle_bit = OMAP3430_ST_GPT12_SHIFT,
                 },
         },
+        .dev_attr       = &capability_secure_dev_attr,
         .slaves         = omap3xxx_timer12_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_timer12_slaves),
         .class          = &omap3xxx_timer_hwmod_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* l4_wkup -> wd_timer2 */
@@ -1182,7 +1191,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = {
         },
         .slaves         = omap3xxx_wd_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_wd_timer2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         /*
          * XXX: Use software supervised mode, HW supervised smartidle seems to
          * block CORE power domain idle transitions. Maybe a HW bug in wdt2?
@@ -1213,7 +1221,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = {
         .slaves         = omap3xxx_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart1_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* UART2 */
@@ -1239,7 +1246,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = {
         .slaves         = omap3xxx_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart2_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* UART3 */
@@ -1265,7 +1271,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = {
         .slaves         = omap3xxx_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart3_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* UART4 */
@@ -1302,7 +1307,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
         .slaves         = omap3xxx_uart4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_uart4_slaves),
         .class          = &omap2_uart_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
 };
 
 static struct omap_hwmod_class i2c_class = {
@@ -1390,7 +1394,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3430es1_dss_slaves),
         .masters        = omap3xxx_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_dss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1415,8 +1418,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_slaves),
         .masters        = omap3xxx_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_dss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2 |
-                                CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1),
 };
 
 /* l4_core -> dss_dispc */
@@ -1454,9 +1455,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
         },
         .slaves         = omap3xxx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dispc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-                                CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
-                                CHIP_GE_OMAP3630ES1_1),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1518,9 +1516,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = {
         },
         .slaves         = omap3xxx_dss_dsi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_dsi1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-                                CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
-                                CHIP_GE_OMAP3630ES1_1),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1558,9 +1553,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = {
         },
         .slaves         = omap3xxx_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_rfbi_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-                                CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
-                                CHIP_GE_OMAP3630ES1_1),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1599,9 +1591,6 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = {
         },
         .slaves         = omap3xxx_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_dss_venc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-                                CHIP_GE_OMAP3430ES2 | CHIP_IS_OMAP3630ES1 |
-                                CHIP_GE_OMAP3630ES1_1),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -1637,7 +1626,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_i2c1_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c1_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* I2C2 */
@@ -1672,7 +1660,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_i2c2_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c2_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* I2C3 */
@@ -1718,7 +1705,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_i2c3_slaves),
         .class          = &i2c_class,
         .dev_attr       = &i2c3_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* l4_wkup -> gpio1 */
@@ -1880,7 +1866,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio1_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* gpio2 */
@@ -1912,7 +1897,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio2_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* gpio3 */
@@ -1944,7 +1928,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio3_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* gpio4 */
@@ -1976,7 +1959,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio4_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* gpio5 */
@@ -2013,7 +1995,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio5_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* gpio6 */
@@ -2050,7 +2031,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_gpio6_slaves),
         .class          = &omap3xxx_gpio_hwmod_class,
         .dev_attr       = &gpio_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* dma_system -> L3 */
@@ -2134,7 +2114,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = {
         .masters        = omap3xxx_dma_system_masters,
         .masters_cnt    = ARRAY_SIZE(omap3xxx_dma_system_masters),
         .dev_attr       = &dma_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .flags          = HWMOD_NO_IDLEST,
 };
 
@@ -2207,7 +2186,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = {
         },
         .slaves         = omap3xxx_mcbsp1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcbsp2 */
@@ -2264,7 +2242,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = {
         .slaves         = omap3xxx_mcbsp2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp2_slaves),
         .dev_attr       = &omap34xx_mcbsp2_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcbsp3 */
@@ -2321,7 +2298,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = {
         .slaves         = omap3xxx_mcbsp3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp3_slaves),
         .dev_attr       = &omap34xx_mcbsp3_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcbsp4 */
@@ -2379,7 +2355,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
         },
         .slaves         = omap3xxx_mcbsp4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcbsp5 */
@@ -2437,7 +2412,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
         },
         .slaves         = omap3xxx_mcbsp5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp5_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 /* 'mcbsp sidetone' class */
 
@@ -2498,7 +2472,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
         },
         .slaves         = omap3xxx_mcbsp2_sidetone_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcbsp3_sidetone */
@@ -2547,7 +2520,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
         },
         .slaves         = omap3xxx_mcbsp3_sidetone_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 
@@ -2609,9 +2581,6 @@ static struct omap_hwmod omap34xx_sr1_hwmod = {
         },
         .slaves         = omap3_sr1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
-                                        CHIP_IS_OMAP3430ES3_0 |
-                                        CHIP_IS_OMAP3430ES3_1),
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
@@ -2631,7 +2600,6 @@ static struct omap_hwmod omap36xx_sr1_hwmod = {
         },
         .slaves         = omap3_sr1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
 };
 
 /* SR2 */
@@ -2655,9 +2623,6 @@ static struct omap_hwmod omap34xx_sr2_hwmod = {
         },
         .slaves         = omap3_sr2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2 |
-                                        CHIP_IS_OMAP3430ES3_0 |
-                                        CHIP_IS_OMAP3430ES3_1),
         .flags          = HWMOD_SET_DEFAULT_CLOCKACT,
 };
 
@@ -2677,7 +2642,6 @@ static struct omap_hwmod omap36xx_sr2_hwmod = {
         },
         .slaves         = omap3_sr2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3_sr2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1),
 };
 
 /*
@@ -2745,7 +2709,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = {
         },
         .slaves         = omap3xxx_mailbox_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mailbox_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* l4 core -> mcspi1 interface */
@@ -2843,7 +2806,6 @@ static struct omap_hwmod omap34xx_mcspi1 = {
         .slaves_cnt     = ARRAY_SIZE(omap34xx_mcspi1_slaves),
         .class          = &omap34xx_mcspi_class,
         .dev_attr       = &omap_mcspi1_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcspi2 */
@@ -2873,7 +2835,6 @@ static struct omap_hwmod omap34xx_mcspi2 = {
         .slaves_cnt     = ARRAY_SIZE(omap34xx_mcspi2_slaves),
         .class          = &omap34xx_mcspi_class,
         .dev_attr       = &omap_mcspi2_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* mcspi3 */
@@ -2916,7 +2877,6 @@ static struct omap_hwmod omap34xx_mcspi3 = {
         .slaves_cnt     = ARRAY_SIZE(omap34xx_mcspi3_slaves),
         .class          = &omap34xx_mcspi_class,
         .dev_attr       = &omap_mcspi3_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* SPI4 */
@@ -2957,7 +2917,6 @@ static struct omap_hwmod omap34xx_mcspi4 = {
         .slaves_cnt     = ARRAY_SIZE(omap34xx_mcspi4_slaves),
         .class          = &omap34xx_mcspi_class,
         .dev_attr       = &omap_mcspi4_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /*
@@ -3014,7 +2973,6 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
          */
         .flags          = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
                                 | HWMOD_SWSUP_MSTANDBY,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
 };
 
 /* usb_otg_hs */
@@ -3042,7 +3000,6 @@ static struct omap_hwmod am35xx_usbhsotg_hwmod = {
         .slaves         = am35xx_usbhsotg_slaves,
         .slaves_cnt     = ARRAY_SIZE(am35xx_usbhsotg_slaves),
         .class          = &am35xx_usbotg_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1)
 };
 
 /* MMC/SD/SDIO common */
@@ -3108,7 +3065,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = {
         .slaves         = omap3xxx_mmc1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mmc1_slaves),
         .class          = &omap34xx_mmc_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* MMC/SD/SDIO2 */
@@ -3151,7 +3107,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = {
         .slaves         = omap3xxx_mmc2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mmc2_slaves),
         .class          = &omap34xx_mmc_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 /* MMC/SD/SDIO3 */
@@ -3193,7 +3148,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
         .slaves         = omap3xxx_mmc3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap3xxx_mmc3_slaves),
         .class          = &omap34xx_mmc_class,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
@@ -3224,10 +3178,7 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
         &omap3xxx_uart1_hwmod,
         &omap3xxx_uart2_hwmod,
         &omap3xxx_uart3_hwmod,
-        &omap3xxx_uart4_hwmod,
         /* dss class */
-        &omap3430es1_dss_core_hwmod,
-        &omap3xxx_dss_core_hwmod,
         &omap3xxx_dss_dispc_hwmod,
         &omap3xxx_dss_dsi1_hwmod,
         &omap3xxx_dss_rfbi_hwmod,
@@ -3239,9 +3190,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
         &omap3xxx_i2c3_hwmod,
         &omap34xx_sr1_hwmod,
         &omap34xx_sr2_hwmod,
-        &omap36xx_sr1_hwmod,
-        &omap36xx_sr2_hwmod,
-
 
         /* gpio class */
         &omap3xxx_gpio1_hwmod,
@@ -3272,16 +3220,96 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
         &omap34xx_mcspi3,
         &omap34xx_mcspi4,
 
-        /* usbotg class */
+        NULL,
+};
+
+/* 3430ES1-only hwmods */
+static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
+        &omap3430es1_dss_core_hwmod,
+        NULL
+};
+
+/* 3430ES2+-only hwmods */
+static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
+        &omap3xxx_dss_core_hwmod,
         &omap3xxx_usbhsotg_hwmod,
+        NULL
+};
 
-        /* usbotg for am35x */
-        &am35xx_usbhsotg_hwmod,
+/* 34xx-only hwmods (all ES revisions) */
+static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
+        &omap34xx_sr1_hwmod,
+        &omap34xx_sr2_hwmod,
+        NULL
+};
 
-        NULL,
+/* 36xx-only hwmods (all ES revisions) */
+static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
+        &omap3xxx_uart4_hwmod,
+        &omap3xxx_dss_core_hwmod,
+        &omap36xx_sr1_hwmod,
+        &omap36xx_sr2_hwmod,
+        &omap3xxx_usbhsotg_hwmod,
+        NULL
+};
+
+static __initdata struct omap_hwmod *am35xx_hwmods[] = {
+        &omap3xxx_dss_core_hwmod, /* XXX ??? */
+        &am35xx_usbhsotg_hwmod,
+        NULL
 };
 
 int __init omap3xxx_hwmod_init(void)
 {
-        return omap_hwmod_register(omap3xxx_hwmods);
+        int r;
+        struct omap_hwmod **h = NULL;
+        unsigned int rev;
+
+        /* Register hwmods common to all OMAP3 */
+        r = omap_hwmod_register(omap3xxx_hwmods);
+        if (!r)
+                return r;
+
+        rev = omap_rev();
+
+        /*
+         * Register hwmods common to individual OMAP3 families, all
+         * silicon revisions (e.g., 34xx, or AM3505/3517, or 36xx)
+         * All possible revisions should be included in this conditional.
+         */
+        if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
+            rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
+            rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
+                h = omap34xx_hwmods;
+        } else if (rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1) {
+                h = am35xx_hwmods;
+        } else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
+                   rev == OMAP3630_REV_ES1_2) {
+                h = omap36xx_hwmods;
+        } else {
+                WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
+                return -EINVAL;
+        };
+
+        r = omap_hwmod_register(h);
+        if (!r)
+                return r;
+
+        /*
+         * Register hwmods specific to certain ES levels of a
+         * particular family of silicon (e.g., 34xx ES1.0)
+         */
+        h = NULL;
+        if (rev == OMAP3430_REV_ES1_0) {
+                h = omap3430es1_hwmods;
+        } else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
+                   rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
+                   rev == OMAP3430_REV_ES3_1_2) {
+                h = omap3430es2plus_hwmods;
+        };
+
+        if (h)
+                r = omap_hwmod_register(h);
+
+        return r;
 }
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
index 6201422c0606..393afac9caf6 100644
--- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c
@@ -29,6 +29,7 @@
 #include <plat/mcbsp.h>
 #include <plat/mmc.h>
 #include <plat/i2c.h>
+#include <plat/dmtimer.h>
 
 #include "omap_hwmod_common_data.h"
 
@@ -133,7 +134,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = {
         .slaves         = omap44xx_dmm_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dmm_slaves),
         .mpu_irqs       = omap44xx_dmm_irqs,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -189,7 +189,6 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = {
         },
         .slaves         = omap44xx_emif_fw_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_emif_fw_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -236,7 +235,6 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = {
         },
         .slaves         = omap44xx_l3_instr_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l3_instr_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l3_main_1 */
@@ -336,7 +334,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = {
         },
         .slaves         = omap44xx_l3_main_1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l3_main_1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l3_main_2 */
@@ -438,7 +435,6 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = {
         },
         .slaves         = omap44xx_l3_main_2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l3_main_2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l3_main_3 */
@@ -496,7 +492,6 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = {
         },
         .slaves         = omap44xx_l3_main_3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l3_main_3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -559,7 +554,6 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = {
         },
         .slaves         = omap44xx_l4_abe_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l4_abe_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l4_cfg */
@@ -588,7 +582,6 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = {
         },
         .slaves         = omap44xx_l4_cfg_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l4_cfg_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l4_per */
@@ -617,7 +610,6 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = {
         },
         .slaves         = omap44xx_l4_per_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l4_per_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* l4_wkup */
@@ -646,7 +638,6 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = {
         },
         .slaves         = omap44xx_l4_wkup_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_l4_wkup_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -677,7 +668,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = {
         .clkdm_name     = "mpuss_clkdm",
         .slaves         = omap44xx_mpu_private_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mpu_private_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -828,7 +818,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_aess_slaves),
         .masters        = omap44xx_aess_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_aess_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -856,7 +845,6 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = {
         },
         .opt_clks       = bandgap_opt_clks,
         .opt_clks_cnt   = ARRAY_SIZE(bandgap_opt_clks),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -917,7 +905,6 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = {
         },
         .slaves         = omap44xx_counter_32k_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_counter_32k_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1005,7 +992,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dma_system_slaves),
         .masters        = omap44xx_dma_system_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_dma_system_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1098,7 +1084,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = {
         },
         .slaves         = omap44xx_dmic_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dmic_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1164,7 +1149,6 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = {
                         .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET,
                 },
         },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct omap_hwmod omap44xx_dsp_hwmod = {
@@ -1187,7 +1171,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dsp_slaves),
         .masters        = omap44xx_dsp_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_dsp_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1278,7 +1261,6 @@ static struct omap_hwmod omap44xx_dss_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_slaves),
         .masters        = omap44xx_dss_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_dss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1381,7 +1363,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = {
         .opt_clks_cnt   = ARRAY_SIZE(dss_dispc_opt_clks),
         .slaves         = omap44xx_dss_dispc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dispc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1480,7 +1461,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = {
         .opt_clks_cnt   = ARRAY_SIZE(dss_dsi1_opt_clks),
         .slaves         = omap44xx_dss_dsi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dsi1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* dss_dsi2 */
@@ -1558,7 +1538,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = {
         .opt_clks_cnt   = ARRAY_SIZE(dss_dsi2_opt_clks),
         .slaves         = omap44xx_dss_dsi2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_dsi2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1656,7 +1635,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = {
         .opt_clks_cnt   = ARRAY_SIZE(dss_hdmi_opt_clks),
         .slaves         = omap44xx_dss_hdmi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_hdmi_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1748,7 +1726,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = {
         .opt_clks_cnt   = ARRAY_SIZE(dss_rfbi_opt_clks),
         .slaves         = omap44xx_dss_rfbi_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_rfbi_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1817,7 +1794,6 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = {
         },
         .slaves         = omap44xx_dss_venc_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_dss_venc_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -1901,7 +1877,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* gpio2 */
@@ -1957,7 +1932,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* gpio3 */
@@ -2013,7 +1987,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* gpio4 */
@@ -2069,7 +2042,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* gpio5 */
@@ -2125,7 +2097,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio5_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* gpio6 */
@@ -2181,7 +2152,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = {
         .dev_attr       = &gpio_dev_attr,
         .slaves         = omap44xx_gpio6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_gpio6_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2261,7 +2231,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_hsi_slaves),
         .masters        = omap44xx_hsi_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_hsi_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2345,7 +2314,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
         .slaves         = omap44xx_i2c1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c1_slaves),
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* i2c2 */
@@ -2402,7 +2370,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
         .slaves         = omap44xx_i2c2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c2_slaves),
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* i2c3 */
@@ -2459,7 +2426,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
         .slaves         = omap44xx_i2c3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c3_slaves),
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* i2c4 */
@@ -2516,7 +2482,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
         .slaves         = omap44xx_i2c4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_i2c4_slaves),
         .dev_attr       = &i2c_dev_attr,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2577,7 +2542,6 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = {
                         .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
                 },
         },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* Pseudo hwmod for reset control purpose only */
@@ -2593,7 +2557,6 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = {
                         .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET,
                 },
         },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct omap_hwmod omap44xx_ipu_hwmod = {
@@ -2616,7 +2579,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_ipu_slaves),
         .masters        = omap44xx_ipu_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_ipu_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2706,7 +2668,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_iss_slaves),
         .masters        = omap44xx_iss_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_iss_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2781,7 +2742,6 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = {
                         .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
                 },
         },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* Pseudo hwmod for reset control purpose only */
@@ -2797,7 +2757,6 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = {
                         .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET,
                 },
         },
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static struct omap_hwmod omap44xx_iva_hwmod = {
@@ -2820,7 +2779,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_iva_slaves),
         .masters        = omap44xx_iva_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_iva_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2890,7 +2848,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = {
         },
         .slaves         = omap44xx_kbd_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_kbd_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -2956,7 +2913,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = {
         },
         .slaves         = omap44xx_mailbox_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mailbox_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -3051,7 +3007,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = {
         },
         .slaves         = omap44xx_mcbsp1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcbsp2 */
@@ -3127,7 +3082,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = {
         },
         .slaves         = omap44xx_mcbsp2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcbsp3 */
@@ -3203,7 +3157,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = {
         },
         .slaves         = omap44xx_mcbsp3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcbsp4 */
@@ -3258,7 +3211,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = {
         },
         .slaves         = omap44xx_mcbsp4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcbsp4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -3353,7 +3305,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = {
         },
         .slaves         = omap44xx_mcpdm_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcpdm_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -3442,7 +3393,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = {
         .dev_attr       = &mcspi1_dev_attr,
         .slaves         = omap44xx_mcspi1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcspi1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcspi2 */
@@ -3505,7 +3455,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = {
         .dev_attr       = &mcspi2_dev_attr,
         .slaves         = omap44xx_mcspi2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcspi2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcspi3 */
@@ -3568,7 +3517,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = {
         .dev_attr       = &mcspi3_dev_attr,
         .slaves         = omap44xx_mcspi3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcspi3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mcspi4 */
@@ -3629,7 +3577,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = {
         .dev_attr       = &mcspi4_dev_attr,
         .slaves         = omap44xx_mcspi4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mcspi4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -3718,7 +3665,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mmc1_slaves),
         .masters        = omap44xx_mmc1_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_mmc1_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mmc2 */
@@ -3779,7 +3725,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mmc2_slaves),
         .masters        = omap44xx_mmc2_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_mmc2_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mmc3 */
@@ -3834,7 +3779,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = {
         },
         .slaves         = omap44xx_mmc3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mmc3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mmc4 */
@@ -3890,7 +3834,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = {
         },
         .slaves         = omap44xx_mmc4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mmc4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* mmc5 */
@@ -3945,7 +3888,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = {
         },
         .slaves         = omap44xx_mmc5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_mmc5_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -3987,7 +3929,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = {
         },
         .masters        = omap44xx_mpu_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_mpu_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -4063,7 +4004,6 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_core_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_core_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* smartreflex_iva */
@@ -4112,7 +4052,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_iva_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_iva_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* smartreflex_mpu */
@@ -4161,7 +4100,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = {
         },
         .slaves         = omap44xx_smartreflex_mpu_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_smartreflex_mpu_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -4224,7 +4162,6 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = {
         },
         .slaves         = omap44xx_spinlock_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_spinlock_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -4265,6 +4202,16 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = {
         .sysc   = &omap44xx_timer_sysc,
 };
 
+/* always-on timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = {
+        .timer_capability       = OMAP_TIMER_ALWON,
+};
+
+/* pwm timers dev attribute */
+static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = {
+        .timer_capability       = OMAP_TIMER_HAS_PWM,
+};
+
 /* timer1 */
 static struct omap_hwmod omap44xx_timer1_hwmod;
 static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = {
@@ -4308,9 +4255,9 @@ static struct omap_hwmod omap44xx_timer1_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer2 */
@@ -4356,9 +4303,9 @@ static struct omap_hwmod omap44xx_timer2_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer3 */
@@ -4404,9 +4351,9 @@ static struct omap_hwmod omap44xx_timer3_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer4 */
@@ -4452,9 +4399,9 @@ static struct omap_hwmod omap44xx_timer4_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer5 */
@@ -4519,9 +4466,9 @@ static struct omap_hwmod omap44xx_timer5_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer5_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer5_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer6 */
@@ -4587,9 +4534,9 @@ static struct omap_hwmod omap44xx_timer6_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer6_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer6_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer7 */
@@ -4654,9 +4601,9 @@ static struct omap_hwmod omap44xx_timer7_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_alwon_dev_attr,
         .slaves         = omap44xx_timer7_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer7_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer8 */
@@ -4721,9 +4668,9 @@ static struct omap_hwmod omap44xx_timer8_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap44xx_timer8_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer8_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer9 */
@@ -4769,9 +4716,9 @@ static struct omap_hwmod omap44xx_timer9_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap44xx_timer9_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer9_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer10 */
@@ -4817,9 +4764,9 @@ static struct omap_hwmod omap44xx_timer10_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap44xx_timer10_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer10_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* timer11 */
@@ -4865,9 +4812,9 @@ static struct omap_hwmod omap44xx_timer11_hwmod = {
                         .modulemode   = MODULEMODE_SWCTRL,
                 },
         },
+        .dev_attr       = &capability_pwm_dev_attr,
         .slaves         = omap44xx_timer11_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_timer11_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -4944,7 +4891,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = {
         },
         .slaves         = omap44xx_uart1_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_uart1_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* uart2 */
@@ -4999,7 +4945,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = {
         },
         .slaves         = omap44xx_uart2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_uart2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* uart3 */
@@ -5055,7 +5000,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = {
         },
         .slaves         = omap44xx_uart3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_uart3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* uart4 */
@@ -5110,7 +5054,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = {
         },
         .slaves         = omap44xx_uart4_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_uart4_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -5195,7 +5138,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = {
         .slaves_cnt     = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves),
         .masters        = omap44xx_usb_otg_hs_masters,
         .masters_cnt    = ARRAY_SIZE(omap44xx_usb_otg_hs_masters),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /*
@@ -5266,7 +5208,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = {
         },
         .slaves         = omap44xx_wd_timer2_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_wd_timer2_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 /* wd_timer3 */
@@ -5333,7 +5274,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
         },
         .slaves         = omap44xx_wd_timer3_slaves,
         .slaves_cnt     = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
 };
 
 static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
diff --git a/arch/arm/mach-omap2/powerdomain-common.c b/arch/arm/mach-omap2/powerdomain-common.c
index 171fccd208c7..f97afff68d6d 100644
--- a/arch/arm/mach-omap2/powerdomain-common.c
+++ b/arch/arm/mach-omap2/powerdomain-common.c
@@ -1,9 +1,8 @@
 /*
- *  linux/arch/arm/mach-omap2/powerdomain-common.c
- *  Contains common powerdomain framework functions
+ * Common powerdomain framework functions
  *
- *  Copyright (C) 2010 Texas Instruments, Inc.
- *  Copyright (C) 2010 Nokia Corporation
+ * Copyright (C) 2010-2011 Texas Instruments, Inc.
+ * Copyright (C) 2010 Nokia Corporation
  *
  * Derived from mach-omap2/powerdomain.c written by Paul Walmsley
  *
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index ef71fdd40fc4..896cb4c5eb1a 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -1,7 +1,7 @@
 /*
  * OMAP powerdomain control
  *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
  * Copyright (C) 2007-2011 Nokia Corporation
  *
  * Written by Paul Walmsley
@@ -81,9 +81,6 @@ static int _pwrdm_register(struct powerdomain *pwrdm)
         if (!pwrdm || !pwrdm->name)
                 return -EINVAL;
 
-        if (!omap_chip_is(pwrdm->omap_chip))
-                return -EINVAL;
-
         if (cpu_is_omap44xx() &&
             pwrdm->prcm_partition == OMAP4430_INVALID_PRCM_PARTITION) {
                 pr_err("powerdomain: %s: missing OMAP4 PRCM partition ID\n",
@@ -194,36 +191,76 @@ static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
 /* Public functions */
 
 /**
- * pwrdm_init - set up the powerdomain layer
- * @pwrdms: array of struct powerdomain pointers to register
- * @custom_funcs: func pointers for arch specific implementations
+ * pwrdm_register_platform_funcs - register powerdomain implementation fns
+ * @po: func pointers for arch specific implementations
+ *
+ * Register the list of function pointers used to implement the
+ * powerdomain functions on different OMAP SoCs.  Should be called
+ * before any other pwrdm_register*() function.  Returns -EINVAL if
+ * @po is null, -EEXIST if platform functions have already been
+ * registered, or 0 upon success.
+ */
+int pwrdm_register_platform_funcs(struct pwrdm_ops *po)
+{
+        if (!po)
+                return -EINVAL;
+
+        if (arch_pwrdm)
+                return -EEXIST;
+
+        arch_pwrdm = po;
+
+        return 0;
+}
+
+/**
+ * pwrdm_register_pwrdms - register SoC powerdomains
+ * @ps: pointer to an array of struct powerdomain to register
  *
- * Loop through the array of powerdomains @pwrdms, registering all
- * that are available on the current CPU.  Also, program all
- * powerdomain target state as ON; this is to prevent domains from
- * hitting low power states (if bootloader has target states set to
- * something other than ON) and potentially even losing context while
- * PM is not fully initialized.  The PM late init code can then program
- * the desired target state for all the power domains.  No return
- * value.
+ * Register the powerdomains available on a particular OMAP SoC.  Must
+ * be called after pwrdm_register_platform_funcs().  May be called
+ * multiple times.  Returns -EACCES if called before
+ * pwrdm_register_platform_funcs(); -EINVAL if the argument @ps is
+ * null; or 0 upon success.
  */
-void pwrdm_init(struct powerdomain **pwrdms, struct pwrdm_ops *custom_funcs)
+int pwrdm_register_pwrdms(struct powerdomain **ps)
 {
         struct powerdomain **p = NULL;
-        struct powerdomain *temp_p;
 
-        if (!custom_funcs)
-                WARN(1, "powerdomain: No custom pwrdm functions registered\n");
-        else
-                arch_pwrdm = custom_funcs;
+        if (!arch_pwrdm)
+                return -EEXIST;
 
-        if (pwrdms) {
-                for (p = pwrdms; *p; p++)
-                        _pwrdm_register(*p);
-        }
+        if (!ps)
+                return -EINVAL;
+
+        for (p = ps; *p; p++)
+                _pwrdm_register(*p);
+
+        return 0;
+}
+
+/**
+ * pwrdm_complete_init - set up the powerdomain layer
+ *
+ * Do whatever is necessary to initialize registered powerdomains and
+ * powerdomain code.  Currently, this programs the next power state
+ * for each powerdomain to ON.  This prevents powerdomains from
+ * unexpectedly losing context or entering high wakeup latency modes
+ * with non-power-management-enabled kernels.  Must be called after
+ * pwrdm_register_pwrdms().  Returns -EACCES if called before
+ * pwrdm_register_pwrdms(), or 0 upon success.
+ */
+int pwrdm_complete_init(void)
+{
+        struct powerdomain *temp_p;
+
+        if (list_empty(&pwrdm_list))
+                return -EACCES;
 
         list_for_each_entry(temp_p, &pwrdm_list, node)
                 pwrdm_set_next_pwrst(temp_p, PWRDM_POWER_ON);
+
+        return 0;
 }
 
 /**
diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h
index d23d979b9c34..8febd84e5e31 100644
--- a/arch/arm/mach-omap2/powerdomain.h
+++ b/arch/arm/mach-omap2/powerdomain.h
@@ -78,7 +78,6 @@ struct powerdomain;
 /**
  * struct powerdomain - OMAP powerdomain
  * @name: Powerdomain name
- * @omap_chip: represents the OMAP chip types containing this pwrdm
  * @prcm_offs: the address offset from CM_BASE/PRM_BASE
  * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs
  * @pwrsts: Possible powerdomain power states
@@ -98,7 +97,6 @@ struct powerdomain;
  */
 struct powerdomain {
         const char *name;
-        const struct omap_chip_id omap_chip;
         const s16 prcm_offs;
         const u8 pwrsts;
         const u8 pwrsts_logic_ret;
@@ -162,7 +160,9 @@ struct pwrdm_ops {
         int     (*pwrdm_wait_transition)(struct powerdomain *pwrdm);
 };
 
-void pwrdm_init(struct powerdomain **pwrdm_list, struct pwrdm_ops *custom_funcs);
+int pwrdm_register_platform_funcs(struct pwrdm_ops *custom_funcs);
+int pwrdm_register_pwrdms(struct powerdomain **pwrdm_list);
+int pwrdm_complete_init(void);
 
 struct powerdomain *pwrdm_lookup(const char *name);
 
@@ -210,7 +210,8 @@ int pwrdm_set_lowpwrstchange(struct powerdomain *pwrdm);
 u32 pwrdm_get_context_loss_count(struct powerdomain *pwrdm);
 bool pwrdm_can_ever_lose_context(struct powerdomain *pwrdm);
 
-extern void omap2xxx_powerdomains_init(void);
+extern void omap242x_powerdomains_init(void);
+extern void omap243x_powerdomains_init(void);
 extern void omap3xxx_powerdomains_init(void);
 extern void omap44xx_powerdomains_init(void);
 
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
index 4210c3399769..bf30483d5cb0 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2/3 common powerdomain definitions
  *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
  * Copyright (C) 2007-2011 Nokia Corporation
  *
  * Paul Walmsley, Jouni Högander
@@ -12,20 +12,6 @@
  */
 
 /*
- * To Do List
- * -> Move the Sleep/Wakeup dependencies from Power Domain framework to
- *    Clock Domain Framework
- */
-
-/*
- * This file contains all of the powerdomains that have some element
- * of software control for the OMAP24xx and OMAP34xx chips.
- *
- * This is not an exhaustive listing of powerdomains on the chips; only
- * powerdomains that can be controlled in software.
- */
-
-/*
  * The names for the DSP/IVA2 powerdomains are confusing.
  *
  * Most OMAP chips have an on-board DSP.
@@ -59,8 +45,6 @@
 struct powerdomain gfx_omap2_pwrdm = {
         .name             = "gfx_pwrdm",
         .prcm_offs        = GFX_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
-                                           CHIP_IS_OMAP3430ES1),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 1,
@@ -75,6 +59,5 @@ struct powerdomain gfx_omap2_pwrdm = {
 struct powerdomain wkup_omap2_pwrdm = {
         .name           = "wkup_pwrdm",
         .prcm_offs      = WKUP_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
         .pwrsts         = PWRSTS_ON,
 };
diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c
index cc389fb2005d..bb4394e3b621 100644
--- a/arch/arm/mach-omap2/powerdomains2xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP2XXX powerdomain definitions
  *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
  * Copyright (C) 2007-2011 Nokia Corporation
  *
  * Paul Walmsley, Jouni Högander
@@ -28,7 +28,6 @@
 static struct powerdomain dsp_pwrdm = {
         .name             = "dsp_pwrdm",
         .prcm_offs        = OMAP24XX_DSP_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 1,
@@ -43,7 +42,6 @@ static struct powerdomain dsp_pwrdm = {
 static struct powerdomain mpu_24xx_pwrdm = {
         .name             = "mpu_pwrdm",
         .prcm_offs        = MPU_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 1,
@@ -58,7 +56,6 @@ static struct powerdomain mpu_24xx_pwrdm = {
 static struct powerdomain core_24xx_pwrdm = {
         .name             = "core_pwrdm",
         .prcm_offs        = CORE_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .banks            = 3,
         .pwrsts_mem_ret   = {
@@ -78,14 +75,11 @@ static struct powerdomain core_24xx_pwrdm = {
  * 2430-specific powerdomains
  */
 
-#ifdef CONFIG_SOC_OMAP2430
-
 /* XXX 2430 KILLDOMAINWKUP bit?  No current users apparently */
 
 static struct powerdomain mdm_pwrdm = {
         .name             = "mdm_pwrdm",
         .prcm_offs        = OMAP2430_MDM_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 1,
@@ -97,27 +91,41 @@ static struct powerdomain mdm_pwrdm = {
         },
 };
 
-#endif     /* CONFIG_SOC_OMAP2430 */
-
-/* As powerdomains are added or removed above, this list must also be changed */
-static struct powerdomain *powerdomains_omap2xxx[] __initdata = {
+/*
+ *
+ */
 
+static struct powerdomain *powerdomains_omap24xx[] __initdata = {
         &wkup_omap2_pwrdm,
         &gfx_omap2_pwrdm,
-
-#ifdef CONFIG_ARCH_OMAP2
         &dsp_pwrdm,
         &mpu_24xx_pwrdm,
         &core_24xx_pwrdm,
-#endif
+        NULL
+};
 
-#ifdef CONFIG_SOC_OMAP2430
+static struct powerdomain *powerdomains_omap2430[] __initdata = {
         &mdm_pwrdm,
-#endif
         NULL
 };
 
-void __init omap2xxx_powerdomains_init(void)
+void __init omap242x_powerdomains_init(void)
+{
+        if (!cpu_is_omap2420())
+                return;
+
+        pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
+        pwrdm_register_pwrdms(powerdomains_omap24xx);
+        pwrdm_complete_init();
+}
+
+void __init omap243x_powerdomains_init(void)
 {
-        pwrdm_init(powerdomains_omap2xxx, &omap2_pwrdm_operations);
+        if (!cpu_is_omap2430())
+                return;
+
+        pwrdm_register_platform_funcs(&omap2_pwrdm_operations);
+        pwrdm_register_pwrdms(powerdomains_omap24xx);
+        pwrdm_register_pwrdms(powerdomains_omap2430);
+        pwrdm_complete_init();
 }
diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c
index 469a920a74dc..e4f3a7d6ecfc 100644
--- a/arch/arm/mach-omap2/powerdomains3xxx_data.c
+++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c
@@ -1,7 +1,7 @@
 /*
  * OMAP3 powerdomain definitions
  *
- * Copyright (C) 2007-2008 Texas Instruments, Inc.
+ * Copyright (C) 2007-2008, 2011 Texas Instruments, Inc.
  * Copyright (C) 2007-2011 Nokia Corporation
  *
  * Paul Walmsley, Jouni Högander
@@ -14,6 +14,8 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 
+#include <plat/cpu.h>
+
 #include "powerdomain.h"
 #include "powerdomains2xxx_3xxx_data.h"
 
@@ -27,8 +29,6 @@
  * 34XX-specific powerdomains, dependencies
  */
 
-#ifdef CONFIG_ARCH_OMAP3
-
 /*
  * Powerdomains
  */
@@ -36,7 +36,6 @@
 static struct powerdomain iva2_pwrdm = {
         .name             = "iva2_pwrdm",
         .prcm_offs        = OMAP3430_IVA2_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 4,
@@ -57,7 +56,6 @@ static struct powerdomain iva2_pwrdm = {
 static struct powerdomain mpu_3xxx_pwrdm = {
         .name             = "mpu_pwrdm",
         .prcm_offs        = MPU_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .flags            = PWRDM_HAS_MPU_QUIRK,
@@ -83,10 +81,6 @@ static struct powerdomain mpu_3xxx_pwrdm = {
 static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
         .name             = "core_pwrdm",
         .prcm_offs        = CORE_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 |
-                                           CHIP_IS_OMAP3430ES2 |
-                                           CHIP_IS_OMAP3430ES3_0 |
-                                           CHIP_IS_OMAP3630ES1),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 2,
@@ -103,8 +97,6 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = {
 static struct powerdomain core_3xxx_es3_1_pwrdm = {
         .name             = "core_pwrdm",
         .prcm_offs        = CORE_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1 |
-                                          CHIP_GE_OMAP3630ES1_1),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         /*
@@ -125,7 +117,6 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = {
 
 static struct powerdomain dss_pwrdm = {
         .name             = "dss_pwrdm",
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .prcm_offs        = OMAP3430_DSS_MOD,
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
@@ -146,7 +137,6 @@ static struct powerdomain dss_pwrdm = {
 static struct powerdomain sgx_pwrdm = {
         .name             = "sgx_pwrdm",
         .prcm_offs        = OMAP3430ES2_SGX_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
         /* XXX This is accurate for 3430 SGX, but what about GFX? */
         .pwrsts           = PWRSTS_OFF_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
@@ -161,7 +151,6 @@ static struct powerdomain sgx_pwrdm = {
 
 static struct powerdomain cam_pwrdm = {
         .name             = "cam_pwrdm",
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .prcm_offs        = OMAP3430_CAM_MOD,
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
@@ -177,7 +166,6 @@ static struct powerdomain cam_pwrdm = {
 static struct powerdomain per_pwrdm = {
         .name             = "per_pwrdm",
         .prcm_offs        = OMAP3430_PER_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 1,
@@ -192,13 +180,11 @@ static struct powerdomain per_pwrdm = {
 static struct powerdomain emu_pwrdm = {
         .name           = "emu_pwrdm",
         .prcm_offs      = OMAP3430_EMU_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct powerdomain neon_pwrdm = {
         .name             = "neon_pwrdm",
         .prcm_offs        = OMAP3430_NEON_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
 };
@@ -206,7 +192,6 @@ static struct powerdomain neon_pwrdm = {
 static struct powerdomain usbhost_pwrdm = {
         .name             = "usbhost_pwrdm",
         .prcm_offs        = OMAP3430ES2_USBHOST_MOD,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_RET,
         /*
@@ -228,60 +213,92 @@ static struct powerdomain usbhost_pwrdm = {
 static struct powerdomain dpll1_pwrdm = {
         .name           = "dpll1_pwrdm",
         .prcm_offs      = MPU_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct powerdomain dpll2_pwrdm = {
         .name           = "dpll2_pwrdm",
         .prcm_offs      = OMAP3430_IVA2_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct powerdomain dpll3_pwrdm = {
         .name           = "dpll3_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct powerdomain dpll4_pwrdm = {
         .name           = "dpll4_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 };
 
 static struct powerdomain dpll5_pwrdm = {
         .name           = "dpll5_pwrdm",
         .prcm_offs      = PLL_MOD,
-        .omap_chip      = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2),
 };
 
 /* As powerdomains are added or removed above, this list must also be changed */
-static struct powerdomain *powerdomains_omap3xxx[] __initdata = {
-
+static struct powerdomain *powerdomains_omap3430_common[] __initdata = {
         &wkup_omap2_pwrdm,
-        &gfx_omap2_pwrdm,
         &iva2_pwrdm,
         &mpu_3xxx_pwrdm,
         &neon_pwrdm,
-        &core_3xxx_pre_es3_1_pwrdm,
-        &core_3xxx_es3_1_pwrdm,
         &cam_pwrdm,
         &dss_pwrdm,
         &per_pwrdm,
         &emu_pwrdm,
-        &sgx_pwrdm,
-        &usbhost_pwrdm,
         &dpll1_pwrdm,
         &dpll2_pwrdm,
         &dpll3_pwrdm,
         &dpll4_pwrdm,
+        NULL
+};
+
+static struct powerdomain *powerdomains_omap3430es1[] __initdata = {
+        &gfx_omap2_pwrdm,
+        &core_3xxx_pre_es3_1_pwrdm,
+        NULL
+};
+
+/* also includes 3630ES1.0 */
+static struct powerdomain *powerdomains_omap3430es2_es3_0[] __initdata = {
+        &core_3xxx_pre_es3_1_pwrdm,
+        &sgx_pwrdm,
+        &usbhost_pwrdm,
         &dpll5_pwrdm,
-#endif
         NULL
 };
 
+/* also includes 3630ES1.1+ */
+static struct powerdomain *powerdomains_omap3430es3_1plus[] __initdata = {
+        &core_3xxx_es3_1_pwrdm,
+        &sgx_pwrdm,
+        &usbhost_pwrdm,
+        &dpll5_pwrdm,
+        NULL
+};
 
 void __init omap3xxx_powerdomains_init(void)
 {
-        pwrdm_init(powerdomains_omap3xxx, &omap3_pwrdm_operations);
+        unsigned int rev;
+
+        if (!cpu_is_omap34xx())
+                return;
+
+        pwrdm_register_platform_funcs(&omap3_pwrdm_operations);
+        pwrdm_register_pwrdms(powerdomains_omap3430_common);
+
+        rev = omap_rev();
+
+        if (rev == OMAP3430_REV_ES1_0)
+                pwrdm_register_pwrdms(powerdomains_omap3430es1);
+        else if (rev == OMAP3430_REV_ES2_0 || rev == OMAP3430_REV_ES2_1 ||
+                 rev == OMAP3430_REV_ES3_0 || rev == OMAP3630_REV_ES1_0)
+                pwrdm_register_pwrdms(powerdomains_omap3430es2_es3_0);
+        else if (rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2 ||
+                 rev == OMAP3517_REV_ES1_0 || rev == OMAP3517_REV_ES1_1 ||
+                 rev == OMAP3630_REV_ES1_1 || rev == OMAP3630_REV_ES1_2)
+                pwrdm_register_pwrdms(powerdomains_omap3430es3_1plus);
+        else
+                WARN(1, "OMAP3 powerdomain init: unknown chip type\n");
+
+        pwrdm_complete_init();
 }
diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c
index 247e79495115..cbce0c9069cd 100644
--- a/arch/arm/mach-omap2/powerdomains44xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains44xx_data.c
@@ -35,7 +35,6 @@ static struct powerdomain core_44xx_pwrdm = {
         .name             = "core_pwrdm",
         .prcm_offs        = OMAP4430_PRM_CORE_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 5,
@@ -61,7 +60,6 @@ static struct powerdomain gfx_44xx_pwrdm = {
         .name             = "gfx_pwrdm",
         .prcm_offs        = OMAP4430_PRM_GFX_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
@@ -78,7 +76,6 @@ static struct powerdomain abe_44xx_pwrdm = {
         .name             = "abe_pwrdm",
         .prcm_offs        = OMAP4430_PRM_ABE_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 2,
@@ -98,7 +95,6 @@ static struct powerdomain dss_44xx_pwrdm = {
         .name             = "dss_pwrdm",
         .prcm_offs        = OMAP4430_PRM_DSS_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 1,
@@ -116,7 +112,6 @@ static struct powerdomain tesla_44xx_pwrdm = {
         .name             = "tesla_pwrdm",
         .prcm_offs        = OMAP4430_PRM_TESLA_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 3,
@@ -138,7 +133,6 @@ static struct powerdomain wkup_44xx_pwrdm = {
         .name             = "wkup_pwrdm",
         .prcm_offs        = OMAP4430_PRM_WKUP_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
@@ -154,7 +148,6 @@ static struct powerdomain cpu0_44xx_pwrdm = {
         .name             = "cpu0_pwrdm",
         .prcm_offs        = OMAP4430_PRCM_MPU_CPU0_INST,
         .prcm_partition   = OMAP4430_PRCM_MPU_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 1,
@@ -171,7 +164,6 @@ static struct powerdomain cpu1_44xx_pwrdm = {
         .name             = "cpu1_pwrdm",
         .prcm_offs        = OMAP4430_PRCM_MPU_CPU1_INST,
         .prcm_partition   = OMAP4430_PRCM_MPU_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 1,
@@ -188,7 +180,6 @@ static struct powerdomain emu_44xx_pwrdm = {
         .name             = "emu_pwrdm",
         .prcm_offs        = OMAP4430_PRM_EMU_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
@@ -204,7 +195,6 @@ static struct powerdomain mpu_44xx_pwrdm = {
         .name             = "mpu_pwrdm",
         .prcm_offs        = OMAP4430_PRM_MPU_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 3,
@@ -225,7 +215,6 @@ static struct powerdomain ivahd_44xx_pwrdm = {
         .name             = "ivahd_pwrdm",
         .prcm_offs        = OMAP4430_PRM_IVAHD_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 4,
@@ -249,7 +238,6 @@ static struct powerdomain cam_44xx_pwrdm = {
         .name             = "cam_pwrdm",
         .prcm_offs        = OMAP4430_PRM_CAM_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
@@ -266,7 +254,6 @@ static struct powerdomain l3init_44xx_pwrdm = {
         .name             = "l3init_pwrdm",
         .prcm_offs        = OMAP4430_PRM_L3INIT_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 1,
@@ -284,7 +271,6 @@ static struct powerdomain l4per_44xx_pwrdm = {
         .name             = "l4per_pwrdm",
         .prcm_offs        = OMAP4430_PRM_L4PER_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_RET_ON,
         .pwrsts_logic_ret = PWRSTS_OFF_RET,
         .banks            = 2,
@@ -307,7 +293,6 @@ static struct powerdomain always_on_core_44xx_pwrdm = {
         .name             = "always_on_core_pwrdm",
         .prcm_offs        = OMAP4430_PRM_ALWAYS_ON_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_ON,
 };
 
@@ -316,7 +301,6 @@ static struct powerdomain cefuse_44xx_pwrdm = {
         .name             = "cefuse_pwrdm",
         .prcm_offs        = OMAP4430_PRM_CEFUSE_INST,
         .prcm_partition   = OMAP4430_PRM_PARTITION,
-        .omap_chip        = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
         .pwrsts           = PWRSTS_OFF_ON,
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -352,5 +336,7 @@ static struct powerdomain *powerdomains_omap44xx[] __initdata = {
 
 void __init omap44xx_powerdomains_init(void)
 {
-        pwrdm_init(powerdomains_omap44xx, &omap4_pwrdm_operations);
+        pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
+        pwrdm_register_pwrdms(powerdomains_omap44xx);
+        pwrdm_complete_init();
 }
diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c
index cf1de7d2630d..1140e98c9773 100644
--- a/arch/arm/mach-omap2/timer.c
+++ b/arch/arm/mach-omap2/timer.c
@@ -35,6 +35,7 @@
 #include <linux/irq.h>
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
+#include <linux/slab.h>
 
 #include <asm/mach/time.h>
 #include <plat/dmtimer.h>
@@ -42,6 +43,10 @@
 #include <asm/sched_clock.h>
 #include <plat/common.h>
 #include <plat/omap_hwmod.h>
+#include <plat/omap_device.h>
+#include <plat/omap-pm.h>
+
+#include "powerdomain.h"
 
 /* Parent clocks, eventually these will come from the clock framework */
 
@@ -67,7 +72,7 @@
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID          12
 
-u32 sys_timer_reserved;
+static u32 sys_timer_reserved;
 
 /* Clockevent code */
 
@@ -78,7 +83,7 @@ static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id)
 {
         struct clock_event_device *evt = &clockevent_gpt;
 
-        __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+        __omap_dm_timer_write_status(&clkev, OMAP_TIMER_INT_OVERFLOW);
 
         evt->event_handler(evt);
         return IRQ_HANDLED;
@@ -93,7 +98,7 @@ static struct irqaction omap2_gp_timer_irq = {
 static int omap2_gp_timer_set_next_event(unsigned long cycles,
                                          struct clock_event_device *evt)
 {
-        __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST,
+        __omap_dm_timer_load_start(&clkev, OMAP_TIMER_CTRL_ST,
                                                 0xffffffff - cycles, 1);
 
         return 0;
@@ -104,16 +109,16 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode,
 {
         u32 period;
 
-        __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate);
+        __omap_dm_timer_stop(&clkev, 1, clkev.rate);
 
         switch (mode) {
         case CLOCK_EVT_MODE_PERIODIC:
                 period = clkev.rate / HZ;
                 period -= 1;
                 /* Looks like we need to first set the load value separately */
-                __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG,
+                __omap_dm_timer_write(&clkev, OMAP_TIMER_LOAD_REG,
                                         0xffffffff - period, 1);
-                __omap_dm_timer_load_start(clkev.io_base,
+                __omap_dm_timer_load_start(&clkev,
                                         OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST,
                                                 0xffffffff - period, 1);
                 break;
@@ -189,7 +194,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
                         clk_put(src);
                 }
         }
-        __omap_dm_timer_reset(timer->io_base, 1, 1);
+        __omap_dm_timer_init_regs(timer);
+        __omap_dm_timer_reset(timer, 1, 1);
         timer->posted = 1;
 
         timer->rate = clk_get_rate(timer->fclk);
@@ -210,7 +216,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id,
         omap2_gp_timer_irq.dev_id = (void *)&clkev;
         setup_irq(clkev.irq, &omap2_gp_timer_irq);
 
-        __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW);
+        __omap_dm_timer_int_enable(&clkev, OMAP_TIMER_INT_OVERFLOW);
 
         clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC,
                                      clockevent_gpt.shift);
@@ -251,7 +257,7 @@ static struct omap_dm_timer clksrc;
 static DEFINE_CLOCK_DATA(cd);
 static cycle_t clocksource_read_cycles(struct clocksource *cs)
 {
-        return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1);
+        return (cycle_t)__omap_dm_timer_read_counter(&clksrc, 1);
 }
 
 static struct clocksource clocksource_gpt = {
@@ -266,7 +272,7 @@ static void notrace dmtimer_update_sched_clock(void)
 {
         u32 cyc;
 
-        cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
+        cyc = __omap_dm_timer_read_counter(&clksrc, 1);
 
         update_sched_clock(&cd, cyc, (u32)~0);
 }
@@ -276,7 +282,7 @@ unsigned long long notrace sched_clock(void)
         u32 cyc = 0;
 
         if (clksrc.reserved)
-                cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1);
+                cyc = __omap_dm_timer_read_counter(&clksrc, 1);
 
         return cyc_to_sched_clock(&cd, cyc, (u32)~0);
 }
@@ -293,7 +299,7 @@ static void __init omap2_gp_clocksource_init(int gptimer_id,
         pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n",
                 gptimer_id, clksrc.rate);
 
-        __omap_dm_timer_load_start(clksrc.io_base,
+        __omap_dm_timer_load_start(&clksrc,
                         OMAP_TIMER_CTRL_ST | OMAP_TIMER_CTRL_AR, 0, 1);
         init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate);
 
@@ -341,3 +347,167 @@ static void __init omap4_timer_init(void)
 }
 OMAP_SYS_TIMER(4)
 #endif
+
+/**
+ * omap2_dm_timer_set_src - change the timer input clock source
+ * @pdev:       timer platform device pointer
+ * @source:     array index of parent clock source
+ */
+static int omap2_dm_timer_set_src(struct platform_device *pdev, int source)
+{
+        int ret;
+        struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
+        struct clk *fclk, *parent;
+        char *parent_name = NULL;
+
+        fclk = clk_get(&pdev->dev, "fck");
+        if (IS_ERR_OR_NULL(fclk)) {
+                dev_err(&pdev->dev, "%s: %d: clk_get() FAILED\n",
+                                __func__, __LINE__);
+                return -EINVAL;
+        }
+
+        switch (source) {
+        case OMAP_TIMER_SRC_SYS_CLK:
+                parent_name = "sys_ck";
+                break;
+
+        case OMAP_TIMER_SRC_32_KHZ:
+                parent_name = "32k_ck";
+                break;
+
+        case OMAP_TIMER_SRC_EXT_CLK:
+                if (pdata->timer_ip_version == OMAP_TIMER_IP_VERSION_1) {
+                        parent_name = "alt_ck";
+                        break;
+                }
+                dev_err(&pdev->dev, "%s: %d: invalid clk src.\n",
+                        __func__, __LINE__);
+                clk_put(fclk);
+                return -EINVAL;
+        }
+
+        parent = clk_get(&pdev->dev, parent_name);
+        if (IS_ERR_OR_NULL(parent)) {
+                dev_err(&pdev->dev, "%s: %d: clk_get() %s FAILED\n",
+                        __func__, __LINE__, parent_name);
+                clk_put(fclk);
+                return -EINVAL;
+        }
+
+        ret = clk_set_parent(fclk, parent);
+        if (IS_ERR_VALUE(ret)) {
+                dev_err(&pdev->dev, "%s: clk_set_parent() to %s FAILED\n",
+                        __func__, parent_name);
+                ret = -EINVAL;
+        }
+
+        clk_put(parent);
+        clk_put(fclk);
+
+        return ret;
+}
+
+struct omap_device_pm_latency omap2_dmtimer_latency[] = {
+        {
+                .deactivate_func = omap_device_idle_hwmods,
+                .activate_func   = omap_device_enable_hwmods,
+                .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
+        },
+};
+
+/**
+ * omap_timer_init - build and register timer device with an
+ * associated timer hwmod
+ * @oh: timer hwmod pointer to be used to build timer device
+ * @user:       parameter that can be passed from calling hwmod API
+ *
+ * Called by omap_hwmod_for_each_by_class to register each of the timer
+ * devices present in the system. The number of timer devices is known
+ * by parsing through the hwmod database for a given class name. At the
+ * end of function call memory is allocated for timer device and it is
+ * registered to the framework ready to be proved by the driver.
+ */
+static int __init omap_timer_init(struct omap_hwmod *oh, void *unused)
+{
+        int id;
+        int ret = 0;
+        char *name = "omap_timer";
+        struct dmtimer_platform_data *pdata;
+        struct omap_device *od;
+        struct omap_timer_capability_dev_attr *timer_dev_attr;
+        struct powerdomain *pwrdm;
+
+        pr_debug("%s: %s\n", __func__, oh->name);
+
+        /* on secure device, do not register secure timer */
+        timer_dev_attr = oh->dev_attr;
+        if (omap_type() != OMAP2_DEVICE_TYPE_GP && timer_dev_attr)
+                if (timer_dev_attr->timer_capability == OMAP_TIMER_SECURE)
+                        return ret;
+
+        pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
+        if (!pdata) {
+                pr_err("%s: No memory for [%s]\n", __func__, oh->name);
+                return -ENOMEM;
+        }
+
+        /*
+         * Extract the IDs from name field in hwmod database
+         * and use the same for constructing ids' for the
+         * timer devices. In a way, we are avoiding usage of
+         * static variable witin the function to do the same.
+         * CAUTION: We have to be careful and make sure the
+         * name in hwmod database does not change in which case
+         * we might either make corresponding change here or
+         * switch back static variable mechanism.
+         */
+        sscanf(oh->name, "timer%2d", &id);
+
+        pdata->set_timer_src = omap2_dm_timer_set_src;
+        pdata->timer_ip_version = oh->class->rev;
+
+        /* Mark clocksource and clockevent timers as reserved */
+        if ((sys_timer_reserved >> (id - 1)) & 0x1)
+                pdata->reserved = 1;
+
+        pwrdm = omap_hwmod_get_pwrdm(oh);
+        pdata->loses_context = pwrdm_can_ever_lose_context(pwrdm);
+#ifdef CONFIG_PM
+        pdata->get_context_loss_count = omap_pm_get_dev_context_loss_count;
+#endif
+        od = omap_device_build(name, id, oh, pdata, sizeof(*pdata),
+                        omap2_dmtimer_latency,
+                        ARRAY_SIZE(omap2_dmtimer_latency),
+                        0);
+
+        if (IS_ERR(od)) {
+                pr_err("%s: Can't build omap_device for %s: %s.\n",
+                        __func__, name, oh->name);
+                ret = -EINVAL;
+        }
+
+        kfree(pdata);
+
+        return ret;
+}
+
+/**
+ * omap2_dm_timer_init - top level regular device initialization
+ *
+ * Uses dedicated hwmod api to parse through hwmod database for
+ * given class name and then build and register the timer device.
+ */
+static int __init omap2_dm_timer_init(void)
+{
+        int ret;
+
+        ret = omap_hwmod_for_each_by_class("timer", omap_timer_init, NULL);
+        if (unlikely(ret)) {
+                pr_err("%s: device registration failed.\n", __func__);
+                return -EINVAL;
+        }
+
+        return 0;
+}
+arch_initcall(omap2_dm_timer_init);
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 75a847dd776a..2def4e1990ed 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -3,6 +3,12 @@
  *
  * OMAP Dual-Mode Timers
  *
+ * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
+ * Tarun Kanti DebBarma <tarun.kanti@ti.com>
+ * Thara Gopinath <thara@ti.com>
+ *
+ * dmtimer adaptation to platform_driver.
+ *
  * Copyright (C) 2005 Nokia Corporation
  * OMAP2 support by Juha Yrjola
  * API improvements and OMAP2 clock framework support by Timo Teras
@@ -29,168 +35,80 @@
  * 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#include <linux/init.h>
-#include <linux/spinlock.h>
-#include <linux/errno.h>
-#include <linux/list.h>
-#include <linux/clk.h>
-#include <linux/delay.h>
 #include <linux/io.h>
-#include <linux/module.h>
-#include <mach/hardware.h>
-#include <plat/dmtimer.h>
-#include <mach/irqs.h>
-
-static int dm_timer_count;
-
-#ifdef CONFIG_ARCH_OMAP1
-static struct omap_dm_timer omap1_dm_timers[] = {
-        { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 },
-        { .phys_base = 0xfffb1c00, .irq = INT_1610_GPTIMER2 },
-        { .phys_base = 0xfffb2400, .irq = INT_1610_GPTIMER3 },
-        { .phys_base = 0xfffb2c00, .irq = INT_1610_GPTIMER4 },
-        { .phys_base = 0xfffb3400, .irq = INT_1610_GPTIMER5 },
-        { .phys_base = 0xfffb3c00, .irq = INT_1610_GPTIMER6 },
-        { .phys_base = 0xfffb7400, .irq = INT_1610_GPTIMER7 },
-        { .phys_base = 0xfffbd400, .irq = INT_1610_GPTIMER8 },
-};
-
-static const int omap1_dm_timer_count = ARRAY_SIZE(omap1_dm_timers);
-
-#else
-#define omap1_dm_timers                 NULL
-#define omap1_dm_timer_count            0
-#endif  /* CONFIG_ARCH_OMAP1 */
-
-#ifdef CONFIG_ARCH_OMAP2
-static struct omap_dm_timer omap2_dm_timers[] = {
-        { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 },
-        { .phys_base = 0x4802a000, .irq = INT_24XX_GPTIMER2 },
-        { .phys_base = 0x48078000, .irq = INT_24XX_GPTIMER3 },
-        { .phys_base = 0x4807a000, .irq = INT_24XX_GPTIMER4 },
-        { .phys_base = 0x4807c000, .irq = INT_24XX_GPTIMER5 },
-        { .phys_base = 0x4807e000, .irq = INT_24XX_GPTIMER6 },
-        { .phys_base = 0x48080000, .irq = INT_24XX_GPTIMER7 },
-        { .phys_base = 0x48082000, .irq = INT_24XX_GPTIMER8 },
-        { .phys_base = 0x48084000, .irq = INT_24XX_GPTIMER9 },
-        { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
-        { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
-        { .phys_base = 0x4808a000, .irq = INT_24XX_GPTIMER12 },
-};
-
-static const char *omap2_dm_source_names[] __initdata = {
-        "sys_ck",
-        "func_32k_ck",
-        "alt_ck",
-        NULL
-};
-
-static struct clk *omap2_dm_source_clocks[3];
-static const int omap2_dm_timer_count = ARRAY_SIZE(omap2_dm_timers);
-
-#else
-#define omap2_dm_timers                 NULL
-#define omap2_dm_timer_count            0
-#define omap2_dm_source_names           NULL
-#define omap2_dm_source_clocks          NULL
-#endif  /* CONFIG_ARCH_OMAP2 */
-
-#ifdef CONFIG_ARCH_OMAP3
-static struct omap_dm_timer omap3_dm_timers[] = {
-        { .phys_base = 0x48318000, .irq = INT_24XX_GPTIMER1 },
-        { .phys_base = 0x49032000, .irq = INT_24XX_GPTIMER2 },
-        { .phys_base = 0x49034000, .irq = INT_24XX_GPTIMER3 },
-        { .phys_base = 0x49036000, .irq = INT_24XX_GPTIMER4 },
-        { .phys_base = 0x49038000, .irq = INT_24XX_GPTIMER5 },
-        { .phys_base = 0x4903A000, .irq = INT_24XX_GPTIMER6 },
-        { .phys_base = 0x4903C000, .irq = INT_24XX_GPTIMER7 },
-        { .phys_base = 0x4903E000, .irq = INT_24XX_GPTIMER8 },
-        { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
-        { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
-        { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
-        { .phys_base = 0x48304000, .irq = INT_34XX_GPT12_IRQ },
-};
-
-static const char *omap3_dm_source_names[] __initdata = {
-        "sys_ck",
-        "omap_32k_fck",
-        NULL
-};
-
-static struct clk *omap3_dm_source_clocks[2];
-static const int omap3_dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/pm_runtime.h>
 
-#else
-#define omap3_dm_timers                 NULL
-#define omap3_dm_timer_count            0
-#define omap3_dm_source_names           NULL
-#define omap3_dm_source_clocks          NULL
-#endif  /* CONFIG_ARCH_OMAP3 */
-
-#ifdef CONFIG_ARCH_OMAP4
-static struct omap_dm_timer omap4_dm_timers[] = {
-        { .phys_base = 0x4a318000, .irq = OMAP44XX_IRQ_GPT1 },
-        { .phys_base = 0x48032000, .irq = OMAP44XX_IRQ_GPT2 },
-        { .phys_base = 0x48034000, .irq = OMAP44XX_IRQ_GPT3 },
-        { .phys_base = 0x48036000, .irq = OMAP44XX_IRQ_GPT4 },
-        { .phys_base = 0x40138000, .irq = OMAP44XX_IRQ_GPT5 },
-        { .phys_base = 0x4013a000, .irq = OMAP44XX_IRQ_GPT6 },
-        { .phys_base = 0x4013a000, .irq = OMAP44XX_IRQ_GPT7 },
-        { .phys_base = 0x4013e000, .irq = OMAP44XX_IRQ_GPT8 },
-        { .phys_base = 0x4803e000, .irq = OMAP44XX_IRQ_GPT9 },
-        { .phys_base = 0x48086000, .irq = OMAP44XX_IRQ_GPT10 },
-        { .phys_base = 0x48088000, .irq = OMAP44XX_IRQ_GPT11 },
-        { .phys_base = 0x4a320000, .irq = OMAP44XX_IRQ_GPT12 },
-};
-static const char *omap4_dm_source_names[] __initdata = {
-        "sys_clkin_ck",
-        "sys_32k_ck",
-        NULL
-};
-static struct clk *omap4_dm_source_clocks[2];
-static const int omap4_dm_timer_count = ARRAY_SIZE(omap4_dm_timers);
-
-#else
-#define omap4_dm_timers                 NULL
-#define omap4_dm_timer_count            0
-#define omap4_dm_source_names           NULL
-#define omap4_dm_source_clocks          NULL
-#endif  /* CONFIG_ARCH_OMAP4 */
-
-static struct omap_dm_timer *dm_timers;
-static const char **dm_source_names;
-static struct clk **dm_source_clocks;
+#include <plat/dmtimer.h>
 
-static spinlock_t dm_timer_lock;
+static LIST_HEAD(omap_timer_list);
+static DEFINE_SPINLOCK(dm_timer_lock);
 
-/*
- * Reads timer registers in posted and non-posted mode. The posted mode bit
- * is encoded in reg. Note that in posted mode write pending bit must be
- * checked. Otherwise a read of a non completed write will produce an error.
+/**
+ * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
+ * @timer:      timer pointer over which read operation to perform
+ * @reg:        lowest byte holds the register offset
+ *
+ * The posted mode bit is encoded in reg. Note that in posted mode write
+ * pending bit must be checked. Otherwise a read of a non completed write
+ * will produce an error.
  */
 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
 {
-        return __omap_dm_timer_read(timer->io_base, reg, timer->posted);
+        WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
+        return __omap_dm_timer_read(timer, reg, timer->posted);
 }
 
-/*
- * Writes timer registers in posted and non-posted mode. The posted mode bit
- * is encoded in reg. Note that in posted mode the write pending bit must be
- * checked. Otherwise a write on a register which has a pending write will be
- * lost.
+/**
+ * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
+ * @timer:      timer pointer over which write operation is to perform
+ * @reg:        lowest byte holds the register offset
+ * @value:      data to write into the register
+ *
+ * The posted mode bit is encoded in reg. Note that in posted mode the write
+ * pending bit must be checked. Otherwise a write on a register which has a
+ * pending write will be lost.
  */
 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
                                                 u32 value)
 {
-        __omap_dm_timer_write(timer->io_base, reg, value, timer->posted);
+        WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
+        __omap_dm_timer_write(timer, reg, value, timer->posted);
+}
+
+static void omap_timer_restore_context(struct omap_dm_timer *timer)
+{
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET,
+                                timer->context.tiocp_cfg);
+        if (timer->revision > 1)
+                __raw_writel(timer->context.tistat, timer->sys_stat);
+
+        __raw_writel(timer->context.tisr, timer->irq_stat);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
+                                timer->context.twer);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
+                                timer->context.tcrr);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
+                                timer->context.tldr);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
+                                timer->context.tmar);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
+                                timer->context.tsicr);
+        __raw_writel(timer->context.tier, timer->irq_ena);
+        omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
+                                timer->context.tclr);
 }
 
 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 {
         int c;
 
+        if (!timer->sys_stat)
+                return;
+
         c = 0;
-        while (!(omap_dm_timer_read_reg(timer, OMAP_TIMER_SYS_STAT_REG) & 1)) {
+        while (!(__raw_readl(timer->sys_stat) & 1)) {
                 c++;
                 if (c > 100000) {
                         printk(KERN_ERR "Timer failed to reset\n");
@@ -201,53 +119,65 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
 
 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
-        int autoidle = 0, wakeup = 0;
-
-        if (!cpu_class_is_omap2() || timer != &dm_timers[0]) {
+        omap_dm_timer_enable(timer);
+        if (timer->pdev->id != 1) {
                 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
                 omap_dm_timer_wait_for_reset(timer);
         }
-        omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
-
-        /* Enable autoidle on OMAP2+ */
-        if (cpu_class_is_omap2())
-                autoidle = 1;
-
-        /*
-         * Enable wake-up on OMAP2 CPUs.
-         */
-        if (cpu_class_is_omap2())
-                wakeup = 1;
 
-        __omap_dm_timer_reset(timer->io_base, autoidle, wakeup);
+        __omap_dm_timer_reset(timer, 0, 0);
+        omap_dm_timer_disable(timer);
         timer->posted = 1;
 }
 
-void omap_dm_timer_prepare(struct omap_dm_timer *timer)
+int omap_dm_timer_prepare(struct omap_dm_timer *timer)
 {
-        omap_dm_timer_enable(timer);
-        omap_dm_timer_reset(timer);
+        struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
+        int ret;
+
+        timer->fclk = clk_get(&timer->pdev->dev, "fck");
+        if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
+                timer->fclk = NULL;
+                dev_err(&timer->pdev->dev, ": No fclk handle.\n");
+                return -EINVAL;
+        }
+
+        if (pdata->needs_manual_reset)
+                omap_dm_timer_reset(timer);
+
+        ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
+
+        timer->posted = 1;
+        return ret;
 }
 
 struct omap_dm_timer *omap_dm_timer_request(void)
 {
-        struct omap_dm_timer *timer = NULL;
+        struct omap_dm_timer *timer = NULL, *t;
         unsigned long flags;
-        int i;
+        int ret = 0;
 
         spin_lock_irqsave(&dm_timer_lock, flags);
-        for (i = 0; i < dm_timer_count; i++) {
-                if (dm_timers[i].reserved)
+        list_for_each_entry(t, &omap_timer_list, node) {
+                if (t->reserved)
                         continue;
 
-                timer = &dm_timers[i];
+                timer = t;
                 timer->reserved = 1;
                 break;
         }
+
+        if (timer) {
+                ret = omap_dm_timer_prepare(timer);
+                if (ret) {
+                        timer->reserved = 0;
+                        timer = NULL;
+                }
+        }
         spin_unlock_irqrestore(&dm_timer_lock, flags);
 
-        if (timer != NULL)
-                omap_dm_timer_prepare(timer);
+        if (!timer)
+                pr_debug("%s: timer request failed!\n", __func__);
 
         return timer;
 }
@@ -255,74 +185,65 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_request);
 
 struct omap_dm_timer *omap_dm_timer_request_specific(int id)
 {
-        struct omap_dm_timer *timer;
+        struct omap_dm_timer *timer = NULL, *t;
         unsigned long flags;
+        int ret = 0;
 
         spin_lock_irqsave(&dm_timer_lock, flags);
-        if (id <= 0 || id > dm_timer_count || dm_timers[id-1].reserved) {
-                spin_unlock_irqrestore(&dm_timer_lock, flags);
-                printk("BUG: warning at %s:%d/%s(): unable to get timer %d\n",
-                       __FILE__, __LINE__, __func__, id);
-                dump_stack();
-                return NULL;
+        list_for_each_entry(t, &omap_timer_list, node) {
+                if (t->pdev->id == id && !t->reserved) {
+                        timer = t;
+                        timer->reserved = 1;
+                        break;
+                }
         }
 
-        timer = &dm_timers[id-1];
-        timer->reserved = 1;
+        if (timer) {
+                ret = omap_dm_timer_prepare(timer);
+                if (ret) {
+                        timer->reserved = 0;
+                        timer = NULL;
+                }
+        }
         spin_unlock_irqrestore(&dm_timer_lock, flags);
 
-        omap_dm_timer_prepare(timer);
+        if (!timer)
+                pr_debug("%s: timer%d request failed!\n", __func__, id);
 
         return timer;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
 
-void omap_dm_timer_free(struct omap_dm_timer *timer)
+int omap_dm_timer_free(struct omap_dm_timer *timer)
 {
-        omap_dm_timer_enable(timer);
-        omap_dm_timer_reset(timer);
-        omap_dm_timer_disable(timer);
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        clk_put(timer->fclk);
 
         WARN_ON(!timer->reserved);
         timer->reserved = 0;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_free);
 
 void omap_dm_timer_enable(struct omap_dm_timer *timer)
 {
-        if (timer->enabled)
-                return;
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-        if (cpu_class_is_omap2()) {
-                clk_enable(timer->fclk);
-                clk_enable(timer->iclk);
-        }
-#endif
-
-        timer->enabled = 1;
+        pm_runtime_get_sync(&timer->pdev->dev);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
 
 void omap_dm_timer_disable(struct omap_dm_timer *timer)
 {
-        if (!timer->enabled)
-                return;
-
-#ifdef CONFIG_ARCH_OMAP2PLUS
-        if (cpu_class_is_omap2()) {
-                clk_disable(timer->iclk);
-                clk_disable(timer->fclk);
-        }
-#endif
-
-        timer->enabled = 0;
+        pm_runtime_put(&timer->pdev->dev);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
 
 int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
 {
-        return timer->irq;
+        if (timer)
+                return timer->irq;
+        return -EINVAL;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
 
@@ -334,24 +255,29 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
  */
 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
 {
-        int i;
+        int i = 0;
+        struct omap_dm_timer *timer = NULL;
+        unsigned long flags;
 
         /* If ARMXOR cannot be idled this function call is unnecessary */
         if (!(inputmask & (1 << 1)))
                 return inputmask;
 
         /* If any active timer is using ARMXOR return modified mask */
-        for (i = 0; i < dm_timer_count; i++) {
+        spin_lock_irqsave(&dm_timer_lock, flags);
+        list_for_each_entry(timer, &omap_timer_list, node) {
                 u32 l;
 
-                l = omap_dm_timer_read_reg(&dm_timers[i], OMAP_TIMER_CTRL_REG);
+                l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
                 if (l & OMAP_TIMER_CTRL_ST) {
                         if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
                                 inputmask &= ~(1 << 1);
                         else
                                 inputmask &= ~(1 << 2);
                 }
+                i++;
         }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
 
         return inputmask;
 }
@@ -361,7 +287,9 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 
 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
 {
-        return timer->fclk;
+        if (timer)
+                return timer->fclk;
+        return NULL;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
 
@@ -375,70 +303,91 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
 
 #endif
 
-void omap_dm_timer_trigger(struct omap_dm_timer *timer)
+int omap_dm_timer_trigger(struct omap_dm_timer *timer)
 {
+        if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+                pr_err("%s: timer not available or enabled.\n", __func__);
+                return -EINVAL;
+        }
+
         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
 
-void omap_dm_timer_start(struct omap_dm_timer *timer)
+int omap_dm_timer_start(struct omap_dm_timer *timer)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
+
+        if (timer->loses_context) {
+                u32 ctx_loss_cnt_after =
+                        timer->get_context_loss_count(&timer->pdev->dev);
+                if (ctx_loss_cnt_after != timer->ctx_loss_count)
+                        omap_timer_restore_context(timer);
+        }
+
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         if (!(l & OMAP_TIMER_CTRL_ST)) {
                 l |= OMAP_TIMER_CTRL_ST;
                 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
         }
+
+        /* Save the context */
+        timer->context.tclr = l;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_start);
 
-void omap_dm_timer_stop(struct omap_dm_timer *timer)
+int omap_dm_timer_stop(struct omap_dm_timer *timer)
 {
         unsigned long rate = 0;
+        struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
 
-#ifdef CONFIG_ARCH_OMAP2PLUS
-        rate = clk_get_rate(timer->fclk);
-#endif
+        if (unlikely(!timer))
+                return -EINVAL;
 
-        __omap_dm_timer_stop(timer->io_base, timer->posted, rate);
+        if (!pdata->needs_manual_reset)
+                rate = clk_get_rate(timer->fclk);
+
+        __omap_dm_timer_stop(timer, timer->posted, rate);
+
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
 
-#ifdef CONFIG_ARCH_OMAP1
-
 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 {
-        int n = (timer - dm_timers) << 1;
-        u32 l;
-
-        l = omap_readl(MOD_CONF_CTRL_1) & ~(0x03 << n);
-        l |= source << n;
-        omap_writel(l, MOD_CONF_CTRL_1);
+        int ret;
+        struct dmtimer_platform_data *pdata;
 
-        return 0;
-}
-EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
+        if (unlikely(!timer))
+                return -EINVAL;
 
-#else
+        pdata = timer->pdev->dev.platform_data;
 
-int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
-{
         if (source < 0 || source >= 3)
                 return -EINVAL;
 
-        return __omap_dm_timer_set_source(timer->fclk,
-                                                dm_source_clocks[source]);
+        ret = pdata->set_timer_src(timer->pdev, source);
+
+        return ret;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
 
-#endif
-
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
                             unsigned int load)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         if (autoreload)
                 l |= OMAP_TIMER_CTRL_AR;
@@ -448,15 +397,32 @@ void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
         omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
 
         omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
+        /* Save the context */
+        timer->context.tclr = l;
+        timer->context.tldr = load;
+        omap_dm_timer_disable(timer);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
 
 /* Optimized set_load which removes costly spin wait in timer_start */
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
                             unsigned int load)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
+
+        if (timer->loses_context) {
+                u32 ctx_loss_cnt_after =
+                        timer->get_context_loss_count(&timer->pdev->dev);
+                if (ctx_loss_cnt_after != timer->ctx_loss_count)
+                        omap_timer_restore_context(timer);
+        }
+
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         if (autoreload) {
                 l |= OMAP_TIMER_CTRL_AR;
@@ -466,15 +432,25 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
         }
         l |= OMAP_TIMER_CTRL_ST;
 
-        __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted);
+        __omap_dm_timer_load_start(timer, l, load, timer->posted);
+
+        /* Save the context */
+        timer->context.tclr = l;
+        timer->context.tldr = load;
+        timer->context.tcrr = load;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
 
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
                              unsigned int match)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         if (enable)
                 l |= OMAP_TIMER_CTRL_CE;
@@ -482,14 +458,24 @@ void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
                 l &= ~OMAP_TIMER_CTRL_CE;
         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
         omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
+
+        /* Save the context */
+        timer->context.tclr = l;
+        timer->context.tmar = match;
+        omap_dm_timer_disable(timer);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
 
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
                            int toggle, int trigger)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
                OMAP_TIMER_CTRL_PT | (0x03 << 10));
@@ -499,13 +485,22 @@ void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
                 l |= OMAP_TIMER_CTRL_PT;
         l |= trigger << 10;
         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
+
+        /* Save the context */
+        timer->context.tclr = l;
+        omap_dm_timer_disable(timer);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
 
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
 {
         u32 l;
 
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
         l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
         l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
         if (prescaler >= 0x00 && prescaler <= 0x07) {
@@ -513,13 +508,28 @@ void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
                 l |= prescaler << 2;
         }
         omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
+
+        /* Save the context */
+        timer->context.tclr = l;
+        omap_dm_timer_disable(timer);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
 
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
                                   unsigned int value)
 {
-        __omap_dm_timer_int_enable(timer->io_base, value);
+        if (unlikely(!timer))
+                return -EINVAL;
+
+        omap_dm_timer_enable(timer);
+        __omap_dm_timer_int_enable(timer, value);
+
+        /* Save the context */
+        timer->context.tier = value;
+        timer->context.twer = value;
+        omap_dm_timer_disable(timer);
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
 
@@ -527,40 +537,61 @@ unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
 {
         unsigned int l;
 
-        l = omap_dm_timer_read_reg(timer, OMAP_TIMER_STAT_REG);
+        if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+                pr_err("%s: timer not available or enabled.\n", __func__);
+                return 0;
+        }
+
+        l = __raw_readl(timer->irq_stat);
 
         return l;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
 
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
 {
-        __omap_dm_timer_write_status(timer->io_base, value);
+        if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
+                return -EINVAL;
+
+        __omap_dm_timer_write_status(timer, value);
+        /* Save the context */
+        timer->context.tisr = value;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
 
 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
 {
-        return __omap_dm_timer_read_counter(timer->io_base, timer->posted);
+        if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+                pr_err("%s: timer not iavailable or enabled.\n", __func__);
+                return 0;
+        }
+
+        return __omap_dm_timer_read_counter(timer, timer->posted);
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
 
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
 {
+        if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
+                pr_err("%s: timer not available or enabled.\n", __func__);
+                return -EINVAL;
+        }
+
         omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
+
+        /* Save the context */
+        timer->context.tcrr = value;
+        return 0;
 }
 EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
 
 int omap_dm_timers_active(void)
 {
-        int i;
-
-        for (i = 0; i < dm_timer_count; i++) {
-                struct omap_dm_timer *timer;
-
-                timer = &dm_timers[i];
+        struct omap_dm_timer *timer;
 
-                if (!timer->enabled)
+        list_for_each_entry(timer, &omap_timer_list, node) {
+                if (!timer->reserved)
                         continue;
 
                 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
@@ -572,69 +603,147 @@ int omap_dm_timers_active(void)
 }
 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
 
-static int __init omap_dm_timer_init(void)
+/**
+ * omap_dm_timer_probe - probe function called for every registered device
+ * @pdev:       pointer to current timer platform device
+ *
+ * Called by driver framework at the end of device registration for all
+ * timer devices.
+ */
+static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
 {
+        int ret;
+        unsigned long flags;
         struct omap_dm_timer *timer;
-        int i, map_size = SZ_8K;        /* Module 4KB + L4 4KB except on omap1 */
+        struct resource *mem, *irq, *ioarea;
+        struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
 
-        if (!(cpu_is_omap16xx() || cpu_class_is_omap2()))
+        if (!pdata) {
+                dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
                 return -ENODEV;
+        }
 
-        spin_lock_init(&dm_timer_lock);
-
-        if (cpu_class_is_omap1()) {
-                dm_timers = omap1_dm_timers;
-                dm_timer_count = omap1_dm_timer_count;
-                map_size = SZ_2K;
-        } else if (cpu_is_omap24xx()) {
-                dm_timers = omap2_dm_timers;
-                dm_timer_count = omap2_dm_timer_count;
-                dm_source_names = omap2_dm_source_names;
-                dm_source_clocks = omap2_dm_source_clocks;
-        } else if (cpu_is_omap34xx()) {
-                dm_timers = omap3_dm_timers;
-                dm_timer_count = omap3_dm_timer_count;
-                dm_source_names = omap3_dm_source_names;
-                dm_source_clocks = omap3_dm_source_clocks;
-        } else if (cpu_is_omap44xx()) {
-                dm_timers = omap4_dm_timers;
-                dm_timer_count = omap4_dm_timer_count;
-                dm_source_names = omap4_dm_source_names;
-                dm_source_clocks = omap4_dm_source_clocks;
+        irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+        if (unlikely(!irq)) {
+                dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
+                return -ENODEV;
         }
 
-        if (cpu_class_is_omap2())
-                for (i = 0; dm_source_names[i] != NULL; i++)
-                        dm_source_clocks[i] = clk_get(NULL, dm_source_names[i]);
+        mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (unlikely(!mem)) {
+                dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
+                return -ENODEV;
+        }
 
-        if (cpu_is_omap243x())
-                dm_timers[0].phys_base = 0x49018000;
+        ioarea = request_mem_region(mem->start, resource_size(mem),
+                        pdev->name);
+        if (!ioarea) {
+                dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
+                return -EBUSY;
+        }
 
-        for (i = 0; i < dm_timer_count; i++) {
-                timer = &dm_timers[i];
+        timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
+        if (!timer) {
+                dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
+                        __func__);
+                ret = -ENOMEM;
+                goto err_free_ioregion;
+        }
 
-                /* Static mapping, never released */
-                timer->io_base = ioremap(timer->phys_base, map_size);
-                BUG_ON(!timer->io_base);
+        timer->io_base = ioremap(mem->start, resource_size(mem));
+        if (!timer->io_base) {
+                dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
+                ret = -ENOMEM;
+                goto err_free_mem;
+        }
 
-#ifdef CONFIG_ARCH_OMAP2PLUS
-                if (cpu_class_is_omap2()) {
-                        char clk_name[16];
-                        sprintf(clk_name, "gpt%d_ick", i + 1);
-                        timer->iclk = clk_get(NULL, clk_name);
-                        sprintf(clk_name, "gpt%d_fck", i + 1);
-                        timer->fclk = clk_get(NULL, clk_name);
-                }
+        timer->id = pdev->id;
+        timer->irq = irq->start;
+        timer->reserved = pdata->reserved;
+        timer->pdev = pdev;
+        timer->loses_context = pdata->loses_context;
+        timer->get_context_loss_count = pdata->get_context_loss_count;
+
+        /* Skip pm_runtime_enable for OMAP1 */
+        if (!pdata->needs_manual_reset) {
+                pm_runtime_enable(&pdev->dev);
+                pm_runtime_irq_safe(&pdev->dev);
+        }
 
-                /* One or two timers may be set up early for sys_timer */
-                if (sys_timer_reserved & (1  << i)) {
-                        timer->reserved = 1;
-                        timer->posted = 1;
-                }
-#endif
+        if (!timer->reserved) {
+                pm_runtime_get_sync(&pdev->dev);
+                __omap_dm_timer_init_regs(timer);
+                pm_runtime_put(&pdev->dev);
         }
 
+        /* add the timer element to the list */
+        spin_lock_irqsave(&dm_timer_lock, flags);
+        list_add_tail(&timer->node, &omap_timer_list);
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
+
+        dev_dbg(&pdev->dev, "Device Probed.\n");
+
         return 0;
+
+err_free_mem:
+        kfree(timer);
+
+err_free_ioregion:
+        release_mem_region(mem->start, resource_size(mem));
+
+        return ret;
 }
 
-arch_initcall(omap_dm_timer_init);
+/**
+ * omap_dm_timer_remove - cleanup a registered timer device
+ * @pdev:       pointer to current timer platform device
+ *
+ * Called by driver framework whenever a timer device is unregistered.
+ * In addition to freeing platform resources it also deletes the timer
+ * entry from the local list.
+ */
+static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
+{
+        struct omap_dm_timer *timer;
+        unsigned long flags;
+        int ret = -EINVAL;
+
+        spin_lock_irqsave(&dm_timer_lock, flags);
+        list_for_each_entry(timer, &omap_timer_list, node)
+                if (timer->pdev->id == pdev->id) {
+                        list_del(&timer->node);
+                        kfree(timer);
+                        ret = 0;
+                        break;
+                }
+        spin_unlock_irqrestore(&dm_timer_lock, flags);
+
+        return ret;
+}
+
+static struct platform_driver omap_dm_timer_driver = {
+        .probe  = omap_dm_timer_probe,
+        .remove = __devexit_p(omap_dm_timer_remove),
+        .driver = {
+                .name   = "omap_timer",
+        },
+};
+
+static int __init omap_dm_timer_driver_init(void)
+{
+        return platform_driver_register(&omap_dm_timer_driver);
+}
+
+static void __exit omap_dm_timer_driver_exit(void)
+{
+        platform_driver_unregister(&omap_dm_timer_driver);
+}
+
+early_platform_init("earlytimer", &omap_dm_timer_driver);
+module_init(omap_dm_timer_driver_init);
+module_exit(omap_dm_timer_driver_exit);
+
+MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
+MODULE_AUTHOR("Texas Instruments Inc");
diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h
index df4b9683f17f..197ca03c3f7d 100644
--- a/arch/arm/plat-omap/include/plat/clock.h
+++ b/arch/arm/plat-omap/include/plat/clock.h
@@ -80,8 +80,6 @@ struct clkops {
  *
  * @div is the divisor that should be applied to the parent clock's rate
  * to produce the current clock's rate.
- *
- * XXX @flags probably should be replaced with an struct omap_chip.
  */
 struct clksel_rate {
         u32                     val;
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 4564cc697d7f..5cac97e36079 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -45,6 +45,15 @@ extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 
+void omap2420_init_early(void);
+void omap2430_init_early(void);
+void omap3430_init_early(void);
+void omap35xx_init_early(void);
+void omap3630_init_early(void);
+void am35xx_init_early(void);
+void ti816x_init_early(void);
+void omap4430_init_early(void);
+
 /*
  * IO bases for various OMAP processors
  * Except the tap base, rest all the io bases
diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h
index 67b3d75884cd..2f9026942229 100644
--- a/arch/arm/plat-omap/include/plat/cpu.h
+++ b/arch/arm/plat-omap/include/plat/cpu.h
@@ -44,13 +44,6 @@
 
 int omap_type(void);
 
-struct omap_chip_id {
-        u16 oc;
-        u8 type;
-};
-
-#define OMAP_CHIP_INIT(x)       { .oc = x }
-
 /*
  * omap_rev bits:
  * CPU id bits  (0730, 1510, 1710, 2422...)     [31:16]
@@ -60,19 +53,6 @@ struct omap_chip_id {
 unsigned int omap_rev(void);
 
 /*
- * Define CPU revision bits
- *
- * Verbose meaning of the revision bits may be different for a silicon
- * family. This difference can be handled separately.
- */
-#define OMAP_REVBITS_00         0x00
-#define OMAP_REVBITS_01         0x01
-#define OMAP_REVBITS_02         0x02
-#define OMAP_REVBITS_03         0x03
-#define OMAP_REVBITS_04         0x04
-#define OMAP_REVBITS_05         0x05
-
-/*
  * Get the CPU revision for OMAP devices
  */
 #define GET_OMAP_REVISION()     ((omap_rev() >> 8) & 0xff)
@@ -262,7 +242,7 @@ IS_OMAP_TYPE(2422, 0x2422)
 IS_OMAP_TYPE(2423, 0x2423)
 IS_OMAP_TYPE(2430, 0x2430)
 IS_OMAP_TYPE(3430, 0x3430)
-IS_OMAP_TYPE(3505, 0x3505)
+IS_OMAP_TYPE(3505, 0x3517)
 IS_OMAP_TYPE(3517, 0x3517)
 
 #define cpu_is_omap310()                0
@@ -354,8 +334,9 @@ IS_OMAP_TYPE(3517, 0x3517)
                                                 (!omap3_has_sgx()) &&   \
                                                 (omap3_has_iva()))
 # define cpu_is_omap3530()              (cpu_is_omap3430())
-# define cpu_is_omap3505()              is_omap3505()
 # define cpu_is_omap3517()              is_omap3517()
+# define cpu_is_omap3505()              (cpu_is_omap3517() &&           \
+                                                !omap3_has_sgx())
 # undef cpu_is_omap3630
 # define cpu_is_omap3630()              is_omap363x()
 # define cpu_is_ti816x()                is_ti816x()
@@ -379,35 +360,31 @@ IS_OMAP_TYPE(3517, 0x3517)
 /* Various silicon revisions for omap2 */
 #define OMAP242X_CLASS          0x24200024
 #define OMAP2420_REV_ES1_0      OMAP242X_CLASS
-#define OMAP2420_REV_ES2_0      (OMAP242X_CLASS | (OMAP_REVBITS_01 << 8))
+#define OMAP2420_REV_ES2_0      (OMAP242X_CLASS | (0x1 << 8))
 
 #define OMAP243X_CLASS          0x24300024
 #define OMAP2430_REV_ES1_0      OMAP243X_CLASS
 
 #define OMAP343X_CLASS          0x34300034
 #define OMAP3430_REV_ES1_0      OMAP343X_CLASS
-#define OMAP3430_REV_ES2_0      (OMAP343X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3430_REV_ES2_1      (OMAP343X_CLASS | (OMAP_REVBITS_02 << 8))
-#define OMAP3430_REV_ES3_0      (OMAP343X_CLASS | (OMAP_REVBITS_03 << 8))
-#define OMAP3430_REV_ES3_1      (OMAP343X_CLASS | (OMAP_REVBITS_04 << 8))
-#define OMAP3430_REV_ES3_1_2    (OMAP343X_CLASS | (OMAP_REVBITS_05 << 8))
+#define OMAP3430_REV_ES2_0      (OMAP343X_CLASS | (0x1 << 8))
+#define OMAP3430_REV_ES2_1      (OMAP343X_CLASS | (0x2 << 8))
+#define OMAP3430_REV_ES3_0      (OMAP343X_CLASS | (0x3 << 8))
+#define OMAP3430_REV_ES3_1      (OMAP343X_CLASS | (0x4 << 8))
+#define OMAP3430_REV_ES3_1_2    (OMAP343X_CLASS | (0x5 << 8))
 
 #define OMAP363X_CLASS          0x36300034
 #define OMAP3630_REV_ES1_0      OMAP363X_CLASS
-#define OMAP3630_REV_ES1_1      (OMAP363X_CLASS | (OMAP_REVBITS_01 << 8))
-#define OMAP3630_REV_ES1_2      (OMAP363X_CLASS | (OMAP_REVBITS_02 << 8))
+#define OMAP3630_REV_ES1_1      (OMAP363X_CLASS | (0x1 << 8))
+#define OMAP3630_REV_ES1_2      (OMAP363X_CLASS | (0x2 << 8))
 
-#define OMAP35XX_CLASS          0x35000034
-#define OMAP3503_REV(v)         (OMAP35XX_CLASS | (0x3503 << 16) | (v << 8))
-#define OMAP3515_REV(v)         (OMAP35XX_CLASS | (0x3515 << 16) | (v << 8))
-#define OMAP3525_REV(v)         (OMAP35XX_CLASS | (0x3525 << 16) | (v << 8))
-#define OMAP3530_REV(v)         (OMAP35XX_CLASS | (0x3530 << 16) | (v << 8))
-#define OMAP3505_REV(v)         (OMAP35XX_CLASS | (0x3505 << 16) | (v << 8))
-#define OMAP3517_REV(v)         (OMAP35XX_CLASS | (0x3517 << 16) | (v << 8))
+#define OMAP3517_CLASS          0x35170034
+#define OMAP3517_REV_ES1_0      OMAP3517_CLASS
+#define OMAP3517_REV_ES1_1      (OMAP3517_CLASS | (0x1 << 8))
 
 #define TI816X_CLASS            0x81600034
 #define TI8168_REV_ES1_0        TI816X_CLASS
-#define TI8168_REV_ES1_1        (TI816X_CLASS | (OMAP_REVBITS_01 << 8))
+#define TI8168_REV_ES1_1        (TI816X_CLASS | (0x1 << 8))
 
 #define OMAP443X_CLASS          0x44300044
 #define OMAP4430_REV_ES1_0      (OMAP443X_CLASS | (0x10 << 8))
@@ -418,61 +395,6 @@ IS_OMAP_TYPE(3517, 0x3517)
 #define OMAP446X_CLASS          0x44600044
 #define OMAP4460_REV_ES1_0      (OMAP446X_CLASS | (0x10 << 8))
 
-/*
- * omap_chip bits
- *
- * CHIP_IS_OMAP{2420,2430,3430} indicate that a particular structure is
- * valid on all chips of that type.  CHIP_IS_OMAP3430ES{1,2} indicates
- * something that is only valid on that particular ES revision.
- *
- * These bits may be ORed together to indicate structures that are
- * available on multiple chip types.
- *
- * To test whether a particular structure matches the current OMAP chip type,
- * use omap_chip_is().
- *
- */
-#define CHIP_IS_OMAP2420                (1 << 0)
-#define CHIP_IS_OMAP2430                (1 << 1)
-#define CHIP_IS_OMAP3430                (1 << 2)
-#define CHIP_IS_OMAP3430ES1             (1 << 3)
-#define CHIP_IS_OMAP3430ES2             (1 << 4)
-#define CHIP_IS_OMAP3430ES3_0           (1 << 5)
-#define CHIP_IS_OMAP3430ES3_1           (1 << 6)
-#define CHIP_IS_OMAP3630ES1             (1 << 7)
-#define CHIP_IS_OMAP4430ES1             (1 << 8)
-#define CHIP_IS_OMAP3630ES1_1           (1 << 9)
-#define CHIP_IS_OMAP3630ES1_2           (1 << 10)
-#define CHIP_IS_OMAP4430ES2             (1 << 11)
-#define CHIP_IS_OMAP4430ES2_1           (1 << 12)
-#define CHIP_IS_OMAP4430ES2_2           (1 << 13)
-#define CHIP_IS_TI816X                  (1 << 14)
-#define CHIP_IS_OMAP4460ES1_0           (1 << 15)
-
-#define CHIP_IS_OMAP24XX                (CHIP_IS_OMAP2420 | CHIP_IS_OMAP2430)
-
-#define CHIP_IS_OMAP4430                (CHIP_IS_OMAP4430ES1 |          \
-                                         CHIP_IS_OMAP4430ES2 |          \
-                                         CHIP_IS_OMAP4430ES2_1 |        \
-                                         CHIP_IS_OMAP4430ES2_2 |        \
-                                         CHIP_IS_OMAP4460ES1_0)
-
-/*
- * "GE" here represents "greater than or equal to" in terms of ES
- * levels.  So CHIP_GE_OMAP3430ES2 is intended to match all OMAP3430
- * chips at ES2 and beyond, but not, for example, any OMAP lines after
- * OMAP3.
- */
-#define CHIP_GE_OMAP3430ES2             (CHIP_IS_OMAP3430ES2 | \
-                                         CHIP_IS_OMAP3430ES3_0 | \
-                                         CHIP_GE_OMAP3430ES3_1)
-#define CHIP_GE_OMAP3430ES3_1           (CHIP_IS_OMAP3430ES3_1 | \
-                                         CHIP_IS_OMAP3630ES1 | \
-                                         CHIP_GE_OMAP3630ES1_1)
-#define CHIP_GE_OMAP3630ES1_1           (CHIP_IS_OMAP3630ES1_1 | \
-                                         CHIP_IS_OMAP3630ES1_2)
-
-int omap_chip_is(struct omap_chip_id oci);
 void omap2_check_revision(void);
 
 /*
diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h
index eb5d16c60cd9..d11025e6e7a4 100644
--- a/arch/arm/plat-omap/include/plat/dmtimer.h
+++ b/arch/arm/plat-omap/include/plat/dmtimer.h
@@ -1,5 +1,5 @@
 /*
- * arch/arm/plat-omap/include/mach/dmtimer.h
+ * arch/arm/plat-omap/include/plat/dmtimer.h
  *
  * OMAP Dual-Mode Timers
  *
@@ -35,6 +35,7 @@
 #include <linux/clk.h>
 #include <linux/delay.h>
 #include <linux/io.h>
+#include <linux/platform_device.h>
 
 #ifndef __ASM_ARCH_DMTIMER_H
 #define __ASM_ARCH_DMTIMER_H
@@ -59,12 +60,56 @@
  * in OMAP4 can be distinguished.
  */
 #define OMAP_TIMER_IP_VERSION_1                        0x1
+
+/* timer capabilities used in hwmod database */
+#define OMAP_TIMER_SECURE                               0x80000000
+#define OMAP_TIMER_ALWON                                0x40000000
+#define OMAP_TIMER_HAS_PWM                              0x20000000
+
+struct omap_timer_capability_dev_attr {
+        u32 timer_capability;
+};
+
 struct omap_dm_timer;
 struct clk;
 
+struct timer_regs {
+        u32 tidr;
+        u32 tiocp_cfg;
+        u32 tistat;
+        u32 tisr;
+        u32 tier;
+        u32 twer;
+        u32 tclr;
+        u32 tcrr;
+        u32 tldr;
+        u32 ttrg;
+        u32 twps;
+        u32 tmar;
+        u32 tcar1;
+        u32 tsicr;
+        u32 tcar2;
+        u32 tpir;
+        u32 tnir;
+        u32 tcvr;
+        u32 tocr;
+        u32 towr;
+};
+
+struct dmtimer_platform_data {
+        int (*set_timer_src)(struct platform_device *pdev, int source);
+        int timer_ip_version;
+        u32 needs_manual_reset:1;
+        bool reserved;
+
+        bool loses_context;
+
+        u32 (*get_context_loss_count)(struct device *dev);
+};
+
 struct omap_dm_timer *omap_dm_timer_request(void);
 struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id);
-void omap_dm_timer_free(struct omap_dm_timer *timer);
+int omap_dm_timer_free(struct omap_dm_timer *timer);
 void omap_dm_timer_enable(struct omap_dm_timer *timer);
 void omap_dm_timer_disable(struct omap_dm_timer *timer);
 
@@ -73,23 +118,23 @@ int omap_dm_timer_get_irq(struct omap_dm_timer *timer);
 u32 omap_dm_timer_modify_idlect_mask(u32 inputmask);
 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer);
 
-void omap_dm_timer_trigger(struct omap_dm_timer *timer);
-void omap_dm_timer_start(struct omap_dm_timer *timer);
-void omap_dm_timer_stop(struct omap_dm_timer *timer);
+int omap_dm_timer_trigger(struct omap_dm_timer *timer);
+int omap_dm_timer_start(struct omap_dm_timer *timer);
+int omap_dm_timer_stop(struct omap_dm_timer *timer);
 
 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source);
-void omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
-void omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
-void omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
-void omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
+int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, unsigned int value);
+int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable, unsigned int match);
+int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on, int toggle, int trigger);
+int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler);
 
-void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, unsigned int value);
 
 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer);
-void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value);
 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer);
-void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
+int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value);
 
 int omap_dm_timers_active(void);
 
@@ -98,12 +143,30 @@ int omap_dm_timers_active(void);
  * used by dmtimer.c and sys_timer related code.
  */
 
-/* register offsets */
-#define _OMAP_TIMER_ID_OFFSET           0x00
-#define _OMAP_TIMER_OCP_CFG_OFFSET      0x10
-#define _OMAP_TIMER_SYS_STAT_OFFSET     0x14
-#define _OMAP_TIMER_STAT_OFFSET         0x18
-#define _OMAP_TIMER_INT_EN_OFFSET       0x1c
+/*
+ * The interrupt registers are different between v1 and v2 ip.
+ * These registers are offsets from timer->iobase.
+ */
+#define OMAP_TIMER_ID_OFFSET            0x00
+#define OMAP_TIMER_OCP_CFG_OFFSET       0x10
+
+#define OMAP_TIMER_V1_SYS_STAT_OFFSET   0x14
+#define OMAP_TIMER_V1_STAT_OFFSET       0x18
+#define OMAP_TIMER_V1_INT_EN_OFFSET     0x1c
+
+#define OMAP_TIMER_V2_IRQSTATUS_RAW     0x24
+#define OMAP_TIMER_V2_IRQSTATUS         0x28
+#define OMAP_TIMER_V2_IRQENABLE_SET     0x2c
+#define OMAP_TIMER_V2_IRQENABLE_CLR     0x30
+
+/*
+ * The functional registers have a different base on v1 and v2 ip.
+ * These registers are offsets from timer->func_base. The func_base
+ * is samae as io_base for v1 and io_base + 0x14 for v2 ip.
+ *
+ */
+#define OMAP_TIMER_V2_FUNC_OFFSET               0x14
+
 #define _OMAP_TIMER_WAKEUP_EN_OFFSET    0x20
 #define _OMAP_TIMER_CTRL_OFFSET         0x24
 #define         OMAP_TIMER_CTRL_GPOCFG          (1 << 14)
@@ -147,21 +210,6 @@ int omap_dm_timers_active(void);
 /* register offsets with the write pending bit encoded */
 #define WPSHIFT                                 16
 
-#define OMAP_TIMER_ID_REG                       (_OMAP_TIMER_ID_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_OCP_CFG_REG                  (_OMAP_TIMER_OCP_CFG_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_SYS_STAT_REG                 (_OMAP_TIMER_SYS_STAT_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_STAT_REG                     (_OMAP_TIMER_STAT_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
-#define OMAP_TIMER_INT_EN_REG                   (_OMAP_TIMER_INT_EN_OFFSET \
-                                                        | (WP_NONE << WPSHIFT))
-
 #define OMAP_TIMER_WAKEUP_EN_REG                (_OMAP_TIMER_WAKEUP_EN_OFFSET \
                                                         | (WP_NONE << WPSHIFT))
 
@@ -209,49 +257,88 @@ int omap_dm_timers_active(void);
 
 struct omap_dm_timer {
         unsigned long phys_base;
+        int id;
         int irq;
-#ifdef CONFIG_ARCH_OMAP2PLUS
         struct clk *iclk, *fclk;
-#endif
-        void __iomem *io_base;
+
+        void __iomem    *io_base;
+        void __iomem    *sys_stat;      /* TISTAT timer status */
+        void __iomem    *irq_stat;      /* TISR/IRQSTATUS interrupt status */
+        void __iomem    *irq_ena;       /* irq enable */
+        void __iomem    *irq_dis;       /* irq disable, only on v2 ip */
+        void __iomem    *pend;          /* write pending */
+        void __iomem    *func_base;     /* function register base */
+
         unsigned long rate;
         unsigned reserved:1;
-        unsigned enabled:1;
         unsigned posted:1;
+        struct timer_regs context;
+        bool loses_context;
+        int ctx_loss_count;
+        int revision;
+        struct platform_device *pdev;
+        struct list_head node;
+
+        u32 (*get_context_loss_count)(struct device *dev);
 };
 
-extern u32 sys_timer_reserved;
-void omap_dm_timer_prepare(struct omap_dm_timer *timer);
+int omap_dm_timer_prepare(struct omap_dm_timer *timer);
 
-static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg,
+static inline u32 __omap_dm_timer_read(struct omap_dm_timer *timer, u32 reg,
                                                 int posted)
 {
         if (posted)
-                while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
-                                & (reg >> WPSHIFT))
+                while (__raw_readl(timer->pend) & (reg >> WPSHIFT))
                         cpu_relax();
 
-        return __raw_readl(base + (reg & 0xff));
+        return __raw_readl(timer->func_base + (reg & 0xff));
 }
 
-static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val,
-                                                int posted)
+static inline void __omap_dm_timer_write(struct omap_dm_timer *timer,
+                                        u32 reg, u32 val, int posted)
 {
         if (posted)
-                while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff))
-                                & (reg >> WPSHIFT))
+                while (__raw_readl(timer->pend) & (reg >> WPSHIFT))
                         cpu_relax();
 
-        __raw_writel(val, base + (reg & 0xff));
+        __raw_writel(val, timer->func_base + (reg & 0xff));
+}
+
+static inline void __omap_dm_timer_init_regs(struct omap_dm_timer *timer)
+{
+        u32 tidr;
+
+        /* Assume v1 ip if bits [31:16] are zero */
+        tidr = __raw_readl(timer->io_base);
+        if (!(tidr >> 16)) {
+                timer->revision = 1;
+                timer->sys_stat = timer->io_base +
+                                OMAP_TIMER_V1_SYS_STAT_OFFSET;
+                timer->irq_stat = timer->io_base + OMAP_TIMER_V1_STAT_OFFSET;
+                timer->irq_ena = timer->io_base + OMAP_TIMER_V1_INT_EN_OFFSET;
+                timer->irq_dis = 0;
+                timer->pend = timer->io_base + _OMAP_TIMER_WRITE_PEND_OFFSET;
+                timer->func_base = timer->io_base;
+        } else {
+                timer->revision = 2;
+                timer->sys_stat = 0;
+                timer->irq_stat = timer->io_base + OMAP_TIMER_V2_IRQSTATUS;
+                timer->irq_ena = timer->io_base + OMAP_TIMER_V2_IRQENABLE_SET;
+                timer->irq_dis = timer->io_base + OMAP_TIMER_V2_IRQENABLE_CLR;
+                timer->pend = timer->io_base +
+                        _OMAP_TIMER_WRITE_PEND_OFFSET +
+                                OMAP_TIMER_V2_FUNC_OFFSET;
+                timer->func_base = timer->io_base + OMAP_TIMER_V2_FUNC_OFFSET;
+        }
 }
 
 /* Assumes the source clock has been set by caller */
-static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle,
-                                                int wakeup)
+static inline void __omap_dm_timer_reset(struct omap_dm_timer *timer,
+                                        int autoidle, int wakeup)
 {
         u32 l;
 
-        l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0);
+        l = __raw_readl(timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
         l |= 0x02 << 3;  /* Set to smart-idle mode */
         l |= 0x2 << 8;   /* Set clock activity to perserve f-clock on idle */
 
@@ -261,10 +348,10 @@ static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle,
         if (wakeup)
                 l |= 1 << 2;
 
-        __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0);
+        __raw_writel(l, timer->io_base + OMAP_TIMER_OCP_CFG_OFFSET);
 
         /* Match hardware reset default of posted mode */
-        __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG,
+        __omap_dm_timer_write(timer, OMAP_TIMER_IF_CTRL_REG,
                                         OMAP_TIMER_CTRL_POSTED, 0);
 }
 
@@ -286,18 +373,18 @@ static inline int __omap_dm_timer_set_source(struct clk *timer_fck,
         return ret;
 }
 
-static inline void __omap_dm_timer_stop(void __iomem *base, int posted,
-                                                unsigned long rate)
+static inline void __omap_dm_timer_stop(struct omap_dm_timer *timer,
+                                        int posted, unsigned long rate)
 {
         u32 l;
 
-        l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
+        l = __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted);
         if (l & OMAP_TIMER_CTRL_ST) {
                 l &= ~0x1;
-                __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted);
+                __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, l, posted);
 #ifdef CONFIG_ARCH_OMAP2PLUS
                 /* Readback to make sure write has completed */
-                __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted);
+                __omap_dm_timer_read(timer, OMAP_TIMER_CTRL_REG, posted);
                 /*
                  * Wait for functional clock period x 3.5 to make sure that
                  * timer is stopped
@@ -307,34 +394,34 @@ static inline void __omap_dm_timer_stop(void __iomem *base, int posted,
         }
 
         /* Ack possibly pending interrupt */
-        __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG,
-                                        OMAP_TIMER_INT_OVERFLOW, 0);
+        __raw_writel(OMAP_TIMER_INT_OVERFLOW, timer->irq_stat);
 }
 
-static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl,
-                                                unsigned int load, int posted)
+static inline void __omap_dm_timer_load_start(struct omap_dm_timer *timer,
+                                                u32 ctrl, unsigned int load,
+                                                int posted)
 {
-        __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted);
-        __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted);
+        __omap_dm_timer_write(timer, OMAP_TIMER_COUNTER_REG, load, posted);
+        __omap_dm_timer_write(timer, OMAP_TIMER_CTRL_REG, ctrl, posted);
 }
 
-static inline void __omap_dm_timer_int_enable(void __iomem *base,
+static inline void __omap_dm_timer_int_enable(struct omap_dm_timer *timer,
                                                 unsigned int value)
 {
-        __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0);
-        __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
+        __raw_writel(value, timer->irq_ena);
+        __omap_dm_timer_write(timer, OMAP_TIMER_WAKEUP_EN_REG, value, 0);
 }
 
-static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base,
-                                                        int posted)
+static inline unsigned int
+__omap_dm_timer_read_counter(struct omap_dm_timer *timer, int posted)
 {
-        return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted);
+        return __omap_dm_timer_read(timer, OMAP_TIMER_COUNTER_REG, posted);
 }
 
-static inline void __omap_dm_timer_write_status(void __iomem *base,
+static inline void __omap_dm_timer_write_status(struct omap_dm_timer *timer,
                                                 unsigned int value)
 {
-        __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0);
+        __raw_writel(value, timer->irq_stat);
 }
 
 #endif /* __ASM_ARCH_DMTIMER_H */
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index d72ec85c97e6..75311fc9c018 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -300,7 +300,7 @@ static inline void omap44xx_map_common_io(void)
 #endif
 
 extern void omap2_init_common_infrastructure(void);
-extern void omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
+extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
                                       struct omap_sdrc_params *sdrc_cs1);
 
 #define __arch_ioremap  omap_ioremap
diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h
index 0e329ca88a70..9115aedd2124 100644
--- a/arch/arm/plat-omap/include/plat/omap_hwmod.h
+++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h
@@ -496,7 +496,6 @@ struct omap_hwmod_class {
  * @_state: internal-use hwmod state
  * @_postsetup_state: internal-use state to leave the hwmod in after _setup()
  * @flags: hwmod flags (documented below)
- * @omap_chip: OMAP chips this hwmod is present on
  * @_lock: spinlock serializing operations on this hwmod
  * @node: list node for hwmod list (internal use)
  *
@@ -545,7 +544,6 @@ struct omap_hwmod {
         u8                              _int_flags;
         u8                              _state;
         u8                              _postsetup_state;
-        const struct omap_chip_id       omap_chip;
 };
 
 int omap_hwmod_register(struct omap_hwmod **ohs);