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authorJon Callan <Jon.Callan@arm.com>2008-12-01 09:54:56 -0500
committerCatalin Marinas <catalin.marinas@arm.com>2008-12-01 09:54:56 -0500
commit4c3ea3717103ffcccfaebedb98c2dadfb54e0482 (patch)
treeaeef9b14e999051c9b1e3cb01c0dae48428f16d8 /arch/arm
parent8aa2da872a492a2196397603ed756a4c48677122 (diff)
RealView: Add Cortex-A9 support to the EB board
This patch adds the necessary definitions and Kconfig entries to enable Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board. Signed-off-by: Jon Callan <Jon.Callan@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/mach-realview/Kconfig7
-rw-r--r--arch/arm/mach-realview/include/mach/board-eb.h9
-rw-r--r--arch/arm/mach-realview/platsmp.c12
-rw-r--r--arch/arm/mach-realview/realview_eb.c8
-rw-r--r--arch/arm/mm/Kconfig2
6 files changed, 29 insertions, 11 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5021db2217ed..fc022f06979f 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -782,7 +782,7 @@ config HOTPLUG_CPU
782 782
783config LOCAL_TIMERS 783config LOCAL_TIMERS
784 bool "Use local timer interrupts" 784 bool "Use local timer interrupts"
785 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) 785 depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
786 default y 786 default y
787 help 787 help
788 Enable support for local timers on SMP platforms, rather then the 788 Enable support for local timers on SMP platforms, rather then the
diff --git a/arch/arm/mach-realview/Kconfig b/arch/arm/mach-realview/Kconfig
index 8032f234c143..eebf7ec9a156 100644
--- a/arch/arm/mach-realview/Kconfig
+++ b/arch/arm/mach-realview/Kconfig
@@ -7,6 +7,13 @@ config MACH_REALVIEW_EB
7 help 7 help
8 Include support for the ARM(R) RealView Emulation Baseboard platform. 8 Include support for the ARM(R) RealView Emulation Baseboard platform.
9 9
10config REALVIEW_EB_A9MP
11 bool "Support Multicore Cortex-A9"
12 depends on MACH_REALVIEW_EB
13 select CPU_V7
14 help
15 Enable support for the Cortex-A9MPCore tile on the Realview platform.
16
10config REALVIEW_EB_ARM11MP 17config REALVIEW_EB_ARM11MP
11 bool "Support ARM11MPCore tile" 18 bool "Support ARM11MPCore tile"
12 depends on MACH_REALVIEW_EB 19 depends on MACH_REALVIEW_EB
diff --git a/arch/arm/mach-realview/include/mach/board-eb.h b/arch/arm/mach-realview/include/mach/board-eb.h
index 8d699fd324d0..e1a6df29eaf6 100644
--- a/arch/arm/mach-realview/include/mach/board-eb.h
+++ b/arch/arm/mach-realview/include/mach/board-eb.h
@@ -163,7 +163,7 @@
163#define NR_IRQS NR_IRQS_EB 163#define NR_IRQS NR_IRQS_EB
164#endif 164#endif
165 165
166#if defined(CONFIG_REALVIEW_EB_ARM11MP) \ 166#if defined(CONFIG_REALVIEW_EB_ARM11MP) || defined(CONFIG_REALVIEW_EB_A9MP) \
167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP)) 167 && (!defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_EB11MP))
168#undef MAX_GIC_NR 168#undef MAX_GIC_NR
169#define MAX_GIC_NR NR_GIC_EB11MP 169#define MAX_GIC_NR NR_GIC_EB11MP
@@ -177,6 +177,7 @@
177#define REALVIEW_EB_PROC_ARM9 0x02000000 177#define REALVIEW_EB_PROC_ARM9 0x02000000
178#define REALVIEW_EB_PROC_ARM11 0x04000000 178#define REALVIEW_EB_PROC_ARM11 0x04000000
179#define REALVIEW_EB_PROC_ARM11MP 0x06000000 179#define REALVIEW_EB_PROC_ARM11MP 0x06000000
180#define REALVIEW_EB_PROC_A9MP 0x0C000000
180 181
181#define check_eb_proc(proc_type) \ 182#define check_eb_proc(proc_type) \
182 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \ 183 ((readl(__io_address(REALVIEW_SYS_PROCID)) & REALVIEW_EB_PROC_MASK) \
@@ -188,4 +189,10 @@
188#define core_tile_eb11mp() 0 189#define core_tile_eb11mp() 0
189#endif 190#endif
190 191
192#ifdef CONFIG_REALVIEW_EB_A9MP
193#define core_tile_a9mp() check_eb_proc(REALVIEW_EB_PROC_A9MP)
194#else
195#define core_tile_a9mp() 0
196#endif
197
191#endif /* __ASM_ARCH_BOARD_EB_H */ 198#endif /* __ASM_ARCH_BOARD_EB_H */
diff --git a/arch/arm/mach-realview/platsmp.c b/arch/arm/mach-realview/platsmp.c
index e102aeb0f76e..8dcb085dca4e 100644
--- a/arch/arm/mach-realview/platsmp.c
+++ b/arch/arm/mach-realview/platsmp.c
@@ -36,7 +36,8 @@ static unsigned int __init get_core_count(void)
36 unsigned int ncores; 36 unsigned int ncores;
37 void __iomem *scu_base = 0; 37 void __iomem *scu_base = 0;
38 38
39 if (machine_is_realview_eb() && core_tile_eb11mp()) 39 if (machine_is_realview_eb() &&
40 (core_tile_eb11mp() || core_tile_a9mp()))
40 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE); 41 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
41 else if (machine_is_realview_pb11mp()) 42 else if (machine_is_realview_pb11mp())
42 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE); 43 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
@@ -58,7 +59,8 @@ static void scu_enable(void)
58 u32 scu_ctrl; 59 u32 scu_ctrl;
59 void __iomem *scu_base; 60 void __iomem *scu_base;
60 61
61 if (machine_is_realview_eb() && core_tile_eb11mp()) 62 if (machine_is_realview_eb() &&
63 (core_tile_eb11mp() || core_tile_a9mp()))
62 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE); 64 scu_base = __io_address(REALVIEW_EB11MP_SCU_BASE);
63 else if (machine_is_realview_pb11mp()) 65 else if (machine_is_realview_pb11mp())
64 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE); 66 scu_base = __io_address(REALVIEW_TC11MP_SCU_BASE);
@@ -88,7 +90,8 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
88 * core (e.g. timer irq), then they will not have been enabled 90 * core (e.g. timer irq), then they will not have been enabled
89 * for us: do so 91 * for us: do so
90 */ 92 */
91 if (machine_is_realview_eb() && core_tile_eb11mp()) 93 if (machine_is_realview_eb() &&
94 (core_tile_eb11mp() || core_tile_a9mp()))
92 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); 95 gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE));
93 else if (machine_is_realview_pb11mp()) 96 else if (machine_is_realview_pb11mp())
94 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE)); 97 gic_cpu_init(0, __io_address(REALVIEW_TC11MP_GIC_CPU_BASE));
@@ -232,7 +235,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
232 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in 235 * dummy (!CONFIG_LOCAL_TIMERS), it was already registers in
233 * realview_timer_init 236 * realview_timer_init
234 */ 237 */
235 if ((machine_is_realview_eb() && core_tile_eb11mp()) || 238 if ((machine_is_realview_eb() &&
239 (core_tile_eb11mp() || core_tile_a9mp())) ||
236 machine_is_realview_pb11mp()) 240 machine_is_realview_pb11mp())
237 local_timer_setup(cpu); 241 local_timer_setup(cpu);
238#endif 242#endif
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index f6e04edf922d..3adb53562985 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -108,7 +108,7 @@ static struct map_desc realview_eb11mp_io_desc[] __initdata = {
108static void __init realview_eb_map_io(void) 108static void __init realview_eb_map_io(void)
109{ 109{
110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc)); 110 iotable_init(realview_eb_io_desc, ARRAY_SIZE(realview_eb_io_desc));
111 if (core_tile_eb11mp()) 111 if (core_tile_eb11mp() || core_tile_a9mp())
112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc)); 112 iotable_init(realview_eb11mp_io_desc, ARRAY_SIZE(realview_eb11mp_io_desc));
113} 113}
114 114
@@ -274,7 +274,7 @@ static int eth_device_register(void)
274 274
275static void __init gic_init_irq(void) 275static void __init gic_init_irq(void)
276{ 276{
277 if (core_tile_eb11mp()) { 277 if (core_tile_eb11mp() || core_tile_a9mp()) {
278 unsigned int pldctrl; 278 unsigned int pldctrl;
279 279
280 /* new irq mode */ 280 /* new irq mode */
@@ -342,7 +342,7 @@ static void __init realview_eb_timer_init(void)
342 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE); 342 timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
343 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20; 343 timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
344 344
345 if (core_tile_eb11mp()) { 345 if (core_tile_eb11mp() || core_tile_a9mp()) {
346#ifdef CONFIG_LOCAL_TIMERS 346#ifdef CONFIG_LOCAL_TIMERS
347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); 347 twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
348 twd_size = REALVIEW_EB11MP_TWD_SIZE; 348 twd_size = REALVIEW_EB11MP_TWD_SIZE;
@@ -362,7 +362,7 @@ static void __init realview_eb_init(void)
362{ 362{
363 int i; 363 int i;
364 364
365 if (core_tile_eb11mp()) { 365 if (core_tile_eb11mp() || core_tile_a9mp()) {
366 realview_eb11mp_fixup(); 366 realview_eb11mp_fixup();
367 367
368#ifdef CONFIG_CACHE_L2X0 368#ifdef CONFIG_CACHE_L2X0
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ab5f7a21350b..37f71066f086 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -745,7 +745,7 @@ config CACHE_FEROCEON_L2_WRITETHROUGH
745 745
746config CACHE_L2X0 746config CACHE_L2X0
747 bool "Enable the L2x0 outer cache controller" 747 bool "Enable the L2x0 outer cache controller"
748 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 748 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 || REALVIEW_EB_A9MP
749 default y 749 default y
750 select OUTER_CACHE 750 select OUTER_CACHE
751 help 751 help