diff options
author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-07-09 15:06:25 -0400 |
---|---|---|
committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-08-23 09:00:09 -0400 |
commit | 2ed1f58900280f79485bbc15f781687bd9584675 (patch) | |
tree | 38b426c5bdb28497cf8aa144bca4d375de24cb45 /arch/arm | |
parent | e402af6caa02f12ad213af2e22aa8a32970f99b0 (diff) |
ARM: at91/clock: fix PLLA overclock warning
Fix PLLA overclock warning in relation with datasheet numbers.
Add new > 240 MHz and > 210 MHz SoC categories.
Reported-by: Jiri Prchal <jiri.prchal@aksignal.cz>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-at91/clock.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index de2ec6b8fea7..188c82971ebd 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c | |||
@@ -63,6 +63,12 @@ EXPORT_SYMBOL_GPL(at91_pmc_base); | |||
63 | 63 | ||
64 | #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) | 64 | #define cpu_has_300M_plla() (cpu_is_at91sam9g10()) |
65 | 65 | ||
66 | #define cpu_has_240M_plla() (cpu_is_at91sam9261() \ | ||
67 | || cpu_is_at91sam9263() \ | ||
68 | || cpu_is_at91sam9rl()) | ||
69 | |||
70 | #define cpu_has_210M_plla() (cpu_is_at91sam9260()) | ||
71 | |||
66 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ | 72 | #define cpu_has_pllb() (!(cpu_is_at91sam9rl() \ |
67 | || cpu_is_at91sam9g45() \ | 73 | || cpu_is_at91sam9g45() \ |
68 | || cpu_is_at91sam9x5() \ | 74 | || cpu_is_at91sam9x5() \ |
@@ -706,6 +712,12 @@ static int __init at91_pmc_init(unsigned long main_clock) | |||
706 | } else if (cpu_has_800M_plla()) { | 712 | } else if (cpu_has_800M_plla()) { |
707 | if (plla.rate_hz > 800000000) | 713 | if (plla.rate_hz > 800000000) |
708 | pll_overclock = true; | 714 | pll_overclock = true; |
715 | } else if (cpu_has_240M_plla()) { | ||
716 | if (plla.rate_hz > 240000000) | ||
717 | pll_overclock = true; | ||
718 | } else if (cpu_has_210M_plla()) { | ||
719 | if (plla.rate_hz > 210000000) | ||
720 | pll_overclock = true; | ||
709 | } else { | 721 | } else { |
710 | if (plla.rate_hz > 209000000) | 722 | if (plla.rate_hz > 209000000) |
711 | pll_overclock = true; | 723 | pll_overclock = true; |