diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-03-21 10:27:34 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-03-21 10:27:34 -0400 |
commit | 2cbe23e3a432e3d09a849adb197c8fcc09e7391d (patch) | |
tree | 711fe5845c4c7e7eaf8c57a597d86c0f9dda5b06 /arch/arm | |
parent | b2f1df8d2fc14bf7e6d9d967043d4b60c2efd8dc (diff) | |
parent | ed1b4acc43b0c3289faa30cf184f322ab70a5be3 (diff) |
Merge branch 'tegra/cleanups' into next/timer
Conflicts:
arch/arm/mach-tegra/Makefile
arch/arm/mach-vexpress/core.h
The tegra Makefile was changed in four different branches
in the same line. This merge should reduce the amount
of churn.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm')
203 files changed, 853 insertions, 2877 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dfb0312f4e73..87693e631129 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -186,6 +186,9 @@ config GENERIC_ISA_DMA | |||
186 | config FIQ | 186 | config FIQ |
187 | bool | 187 | bool |
188 | 188 | ||
189 | config NEED_RET_TO_USER | ||
190 | bool | ||
191 | |||
189 | config ARCH_MTD_XIP | 192 | config ARCH_MTD_XIP |
190 | bool | 193 | bool |
191 | 194 | ||
@@ -479,6 +482,7 @@ config ARCH_IOP13XX | |||
479 | select ARCH_SUPPORTS_MSI | 482 | select ARCH_SUPPORTS_MSI |
480 | select VMSPLIT_1G | 483 | select VMSPLIT_1G |
481 | select NEED_MACH_MEMORY_H | 484 | select NEED_MACH_MEMORY_H |
485 | select NEED_RET_TO_USER | ||
482 | help | 486 | help |
483 | Support for Intel's IOP13XX (XScale) family of processors. | 487 | Support for Intel's IOP13XX (XScale) family of processors. |
484 | 488 | ||
@@ -486,6 +490,7 @@ config ARCH_IOP32X | |||
486 | bool "IOP32x-based" | 490 | bool "IOP32x-based" |
487 | depends on MMU | 491 | depends on MMU |
488 | select CPU_XSCALE | 492 | select CPU_XSCALE |
493 | select NEED_RET_TO_USER | ||
489 | select PLAT_IOP | 494 | select PLAT_IOP |
490 | select PCI | 495 | select PCI |
491 | select ARCH_REQUIRE_GPIOLIB | 496 | select ARCH_REQUIRE_GPIOLIB |
@@ -497,6 +502,7 @@ config ARCH_IOP33X | |||
497 | bool "IOP33x-based" | 502 | bool "IOP33x-based" |
498 | depends on MMU | 503 | depends on MMU |
499 | select CPU_XSCALE | 504 | select CPU_XSCALE |
505 | select NEED_RET_TO_USER | ||
500 | select PLAT_IOP | 506 | select PLAT_IOP |
501 | select PCI | 507 | select PCI |
502 | select ARCH_REQUIRE_GPIOLIB | 508 | select ARCH_REQUIRE_GPIOLIB |
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index e0d236d7ff73..03646c4c13d1 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug | |||
@@ -81,25 +81,6 @@ choice | |||
81 | prompt "Kernel low-level debugging port" | 81 | prompt "Kernel low-level debugging port" |
82 | depends on DEBUG_LL | 82 | depends on DEBUG_LL |
83 | 83 | ||
84 | config DEBUG_LL_UART_NONE | ||
85 | bool "No low-level debugging UART" | ||
86 | help | ||
87 | Say Y here if your platform doesn't provide a UART option | ||
88 | below. This relies on your platform choosing the right UART | ||
89 | definition internally in order for low-level debugging to | ||
90 | work. | ||
91 | |||
92 | config DEBUG_ICEDCC | ||
93 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" | ||
94 | help | ||
95 | Say Y here if you want the debug print routines to direct | ||
96 | their output to the EmbeddedICE macrocell's DCC channel using | ||
97 | co-processor 14. This is known to work on the ARM9 style ICE | ||
98 | channel and on the XScale with the PEEDI. | ||
99 | |||
100 | Note that the system will appear to hang during boot if there | ||
101 | is nothing connected to read from the DCC. | ||
102 | |||
103 | config AT91_DEBUG_LL_DBGU0 | 84 | config AT91_DEBUG_LL_DBGU0 |
104 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" | 85 | bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" |
105 | depends on HAVE_AT91_DBGU0 | 86 | depends on HAVE_AT91_DBGU0 |
@@ -108,20 +89,6 @@ choice | |||
108 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" | 89 | bool "Kernel low-level debugging on 9263, 9g45 and cap9" |
109 | depends on HAVE_AT91_DBGU1 | 90 | depends on HAVE_AT91_DBGU1 |
110 | 91 | ||
111 | config DEBUG_FOOTBRIDGE_COM1 | ||
112 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
113 | depends on FOOTBRIDGE | ||
114 | help | ||
115 | Say Y here if you want the debug print routines to direct | ||
116 | their output to the 8250 at PCI COM1. | ||
117 | |||
118 | config DEBUG_DC21285_PORT | ||
119 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
120 | depends on FOOTBRIDGE | ||
121 | help | ||
122 | Say Y here if you want the debug print routines to direct | ||
123 | their output to the serial port in the DC21285 (Footbridge). | ||
124 | |||
125 | config DEBUG_CLPS711X_UART1 | 92 | config DEBUG_CLPS711X_UART1 |
126 | bool "Kernel low-level debugging messages via UART1" | 93 | bool "Kernel low-level debugging messages via UART1" |
127 | depends on ARCH_CLPS711X | 94 | depends on ARCH_CLPS711X |
@@ -136,6 +103,20 @@ choice | |||
136 | Say Y here if you want the debug print routines to direct | 103 | Say Y here if you want the debug print routines to direct |
137 | their output to the second serial port on these devices. | 104 | their output to the second serial port on these devices. |
138 | 105 | ||
106 | config DEBUG_DC21285_PORT | ||
107 | bool "Kernel low-level debugging messages via footbridge serial port" | ||
108 | depends on FOOTBRIDGE | ||
109 | help | ||
110 | Say Y here if you want the debug print routines to direct | ||
111 | their output to the serial port in the DC21285 (Footbridge). | ||
112 | |||
113 | config DEBUG_FOOTBRIDGE_COM1 | ||
114 | bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" | ||
115 | depends on FOOTBRIDGE | ||
116 | help | ||
117 | Say Y here if you want the debug print routines to direct | ||
118 | their output to the 8250 at PCI COM1. | ||
119 | |||
139 | config DEBUG_HIGHBANK_UART | 120 | config DEBUG_HIGHBANK_UART |
140 | bool "Kernel low-level debugging messages via Highbank UART" | 121 | bool "Kernel low-level debugging messages via Highbank UART" |
141 | depends on ARCH_HIGHBANK | 122 | depends on ARCH_HIGHBANK |
@@ -206,38 +187,42 @@ choice | |||
206 | Say Y here if you want kernel low-level debugging support | 187 | Say Y here if you want kernel low-level debugging support |
207 | on i.MX6Q. | 188 | on i.MX6Q. |
208 | 189 | ||
209 | config DEBUG_S3C_UART0 | 190 | config DEBUG_MSM_UART1 |
210 | depends on PLAT_SAMSUNG | 191 | bool "Kernel low-level debugging messages via MSM UART1" |
211 | bool "Use S3C UART 0 for low-level debug" | 192 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
212 | help | 193 | help |
213 | Say Y here if you want the debug print routines to direct | 194 | Say Y here if you want the debug print routines to direct |
214 | their output to UART 0. The port must have been initialised | 195 | their output to the first serial port on MSM devices. |
215 | by the boot-loader before use. | ||
216 | |||
217 | The uncompressor code port configuration is now handled | ||
218 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | ||
219 | 196 | ||
220 | config DEBUG_S3C_UART1 | 197 | config DEBUG_MSM_UART2 |
221 | depends on PLAT_SAMSUNG | 198 | bool "Kernel low-level debugging messages via MSM UART2" |
222 | bool "Use S3C UART 1 for low-level debug" | 199 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 |
223 | help | 200 | help |
224 | Say Y here if you want the debug print routines to direct | 201 | Say Y here if you want the debug print routines to direct |
225 | their output to UART 1. The port must have been initialised | 202 | their output to the second serial port on MSM devices. |
226 | by the boot-loader before use. | ||
227 | 203 | ||
228 | The uncompressor code port configuration is now handled | 204 | config DEBUG_MSM_UART3 |
229 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 205 | bool "Kernel low-level debugging messages via MSM UART3" |
206 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | ||
207 | help | ||
208 | Say Y here if you want the debug print routines to direct | ||
209 | their output to the third serial port on MSM devices. | ||
230 | 210 | ||
231 | config DEBUG_S3C_UART2 | 211 | config DEBUG_MSM8660_UART |
232 | depends on PLAT_SAMSUNG | 212 | bool "Kernel low-level debugging messages via MSM 8660 UART" |
233 | bool "Use S3C UART 2 for low-level debug" | 213 | depends on ARCH_MSM8X60 |
214 | select MSM_HAS_DEBUG_UART_HS | ||
234 | help | 215 | help |
235 | Say Y here if you want the debug print routines to direct | 216 | Say Y here if you want the debug print routines to direct |
236 | their output to UART 2. The port must have been initialised | 217 | their output to the serial port on MSM 8660 devices. |
237 | by the boot-loader before use. | ||
238 | 218 | ||
239 | The uncompressor code port configuration is now handled | 219 | config DEBUG_MSM8960_UART |
240 | by CONFIG_S3C_LOWLEVEL_UART_PORT. | 220 | bool "Kernel low-level debugging messages via MSM 8960 UART" |
221 | depends on ARCH_MSM8960 | ||
222 | select MSM_HAS_DEBUG_UART_HS | ||
223 | help | ||
224 | Say Y here if you want the debug print routines to direct | ||
225 | their output to the serial port on MSM 8960 devices. | ||
241 | 226 | ||
242 | config DEBUG_REALVIEW_STD_PORT | 227 | config DEBUG_REALVIEW_STD_PORT |
243 | bool "RealView Default UART" | 228 | bool "RealView Default UART" |
@@ -255,42 +240,57 @@ choice | |||
255 | their output to the standard serial port on the RealView | 240 | their output to the standard serial port on the RealView |
256 | PB1176 platform. | 241 | PB1176 platform. |
257 | 242 | ||
258 | config DEBUG_MSM_UART1 | 243 | config DEBUG_S3C_UART0 |
259 | bool "Kernel low-level debugging messages via MSM UART1" | 244 | depends on PLAT_SAMSUNG |
260 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 245 | bool "Use S3C UART 0 for low-level debug" |
261 | help | 246 | help |
262 | Say Y here if you want the debug print routines to direct | 247 | Say Y here if you want the debug print routines to direct |
263 | their output to the first serial port on MSM devices. | 248 | their output to UART 0. The port must have been initialised |
249 | by the boot-loader before use. | ||
264 | 250 | ||
265 | config DEBUG_MSM_UART2 | 251 | The uncompressor code port configuration is now handled |
266 | bool "Kernel low-level debugging messages via MSM UART2" | 252 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
267 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 253 | |
254 | config DEBUG_S3C_UART1 | ||
255 | depends on PLAT_SAMSUNG | ||
256 | bool "Use S3C UART 1 for low-level debug" | ||
268 | help | 257 | help |
269 | Say Y here if you want the debug print routines to direct | 258 | Say Y here if you want the debug print routines to direct |
270 | their output to the second serial port on MSM devices. | 259 | their output to UART 1. The port must have been initialised |
260 | by the boot-loader before use. | ||
271 | 261 | ||
272 | config DEBUG_MSM_UART3 | 262 | The uncompressor code port configuration is now handled |
273 | bool "Kernel low-level debugging messages via MSM UART3" | 263 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
274 | depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50 | 264 | |
265 | config DEBUG_S3C_UART2 | ||
266 | depends on PLAT_SAMSUNG | ||
267 | bool "Use S3C UART 2 for low-level debug" | ||
275 | help | 268 | help |
276 | Say Y here if you want the debug print routines to direct | 269 | Say Y here if you want the debug print routines to direct |
277 | their output to the third serial port on MSM devices. | 270 | their output to UART 2. The port must have been initialised |
271 | by the boot-loader before use. | ||
278 | 272 | ||
279 | config DEBUG_MSM8660_UART | 273 | The uncompressor code port configuration is now handled |
280 | bool "Kernel low-level debugging messages via MSM 8660 UART" | 274 | by CONFIG_S3C_LOWLEVEL_UART_PORT. |
281 | depends on ARCH_MSM8X60 | 275 | |
282 | select MSM_HAS_DEBUG_UART_HS | 276 | config DEBUG_LL_UART_NONE |
277 | bool "No low-level debugging UART" | ||
283 | help | 278 | help |
284 | Say Y here if you want the debug print routines to direct | 279 | Say Y here if your platform doesn't provide a UART option |
285 | their output to the serial port on MSM 8660 devices. | 280 | below. This relies on your platform choosing the right UART |
281 | definition internally in order for low-level debugging to | ||
282 | work. | ||
286 | 283 | ||
287 | config DEBUG_MSM8960_UART | 284 | config DEBUG_ICEDCC |
288 | bool "Kernel low-level debugging messages via MSM 8960 UART" | 285 | bool "Kernel low-level debugging via EmbeddedICE DCC channel" |
289 | depends on ARCH_MSM8960 | ||
290 | select MSM_HAS_DEBUG_UART_HS | ||
291 | help | 286 | help |
292 | Say Y here if you want the debug print routines to direct | 287 | Say Y here if you want the debug print routines to direct |
293 | their output to the serial port on MSM 8960 devices. | 288 | their output to the EmbeddedICE macrocell's DCC channel using |
289 | co-processor 14. This is known to work on the ARM9 style ICE | ||
290 | channel and on the XScale with the PEEDI. | ||
291 | |||
292 | Note that the system will appear to hang during boot if there | ||
293 | is nothing connected to read from the DCC. | ||
294 | 294 | ||
295 | endchoice | 295 | endchoice |
296 | 296 | ||
diff --git a/arch/arm/include/asm/hardware/entry-macro-iomd.S b/arch/arm/include/asm/hardware/entry-macro-iomd.S index e0af4983723f..8c215acd9b57 100644 --- a/arch/arm/include/asm/hardware/entry-macro-iomd.S +++ b/arch/arm/include/asm/hardware/entry-macro-iomd.S | |||
@@ -11,14 +11,6 @@ | |||
11 | /* IOC / IOMD based hardware */ | 11 | /* IOC / IOMD based hardware */ |
12 | #include <asm/hardware/iomd.h> | 12 | #include <asm/hardware/iomd.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | mov r12, #ioc_base_high | ||
16 | .if ioc_base_low | ||
17 | orr r12, r12, #ioc_base_low | ||
18 | .endif | ||
19 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first | 15 | ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first |
24 | ldr \tmp, =irq_prio_h | 16 | ldr \tmp, =irq_prio_h |
diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index e4c96cc6ec0c..424aa458c487 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h | |||
@@ -110,6 +110,7 @@ extern void cpu_init(void); | |||
110 | 110 | ||
111 | void soft_restart(unsigned long); | 111 | void soft_restart(unsigned long); |
112 | extern void (*arm_pm_restart)(char str, const char *cmd); | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
113 | extern void (*arm_pm_idle)(void); | ||
113 | 114 | ||
114 | #define UDBG_UNDEFINED (1 << 0) | 115 | #define UDBG_UNDEFINED (1 << 0) |
115 | #define UDBG_SYSCALL (1 << 1) | 116 | #define UDBG_SYSCALL (1 << 1) |
diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index be16a48007b4..22f0ed324f37 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S | |||
@@ -19,7 +19,9 @@ | |||
19 | #include <asm/glue-df.h> | 19 | #include <asm/glue-df.h> |
20 | #include <asm/glue-pf.h> | 20 | #include <asm/glue-pf.h> |
21 | #include <asm/vfpmacros.h> | 21 | #include <asm/vfpmacros.h> |
22 | #ifndef CONFIG_MULTI_IRQ_HANDLER | ||
22 | #include <mach/entry-macro.S> | 23 | #include <mach/entry-macro.S> |
24 | #endif | ||
23 | #include <asm/thread_notify.h> | 25 | #include <asm/thread_notify.h> |
24 | #include <asm/unwind.h> | 26 | #include <asm/unwind.h> |
25 | #include <asm/unistd.h> | 27 | #include <asm/unistd.h> |
@@ -1101,7 +1103,6 @@ __stubs_start: | |||
1101 | * get out of that mode without clobbering one register. | 1103 | * get out of that mode without clobbering one register. |
1102 | */ | 1104 | */ |
1103 | vector_fiq: | 1105 | vector_fiq: |
1104 | disable_fiq | ||
1105 | subs pc, lr, #4 | 1106 | subs pc, lr, #4 |
1106 | 1107 | ||
1107 | /*============================================================================= | 1108 | /*============================================================================= |
diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S index 9fd0ba90c1d2..54ee265dd819 100644 --- a/arch/arm/kernel/entry-common.S +++ b/arch/arm/kernel/entry-common.S | |||
@@ -10,9 +10,15 @@ | |||
10 | 10 | ||
11 | #include <asm/unistd.h> | 11 | #include <asm/unistd.h> |
12 | #include <asm/ftrace.h> | 12 | #include <asm/ftrace.h> |
13 | #include <mach/entry-macro.S> | ||
14 | #include <asm/unwind.h> | 13 | #include <asm/unwind.h> |
15 | 14 | ||
15 | #ifdef CONFIG_NEED_RET_TO_USER | ||
16 | #include <mach/entry-macro.S> | ||
17 | #else | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | #endif | ||
21 | |||
16 | #include "entry-header.S" | 22 | #include "entry-header.S" |
17 | 23 | ||
18 | 24 | ||
diff --git a/arch/arm/kernel/process.c b/arch/arm/kernel/process.c index 971d65c253a9..008e7ce766a7 100644 --- a/arch/arm/kernel/process.c +++ b/arch/arm/kernel/process.c | |||
@@ -61,8 +61,6 @@ extern void setup_mm_for_reboot(void); | |||
61 | 61 | ||
62 | static volatile int hlt_counter; | 62 | static volatile int hlt_counter; |
63 | 63 | ||
64 | #include <mach/system.h> | ||
65 | |||
66 | void disable_hlt(void) | 64 | void disable_hlt(void) |
67 | { | 65 | { |
68 | hlt_counter++; | 66 | hlt_counter++; |
@@ -181,13 +179,17 @@ void cpu_idle_wait(void) | |||
181 | EXPORT_SYMBOL_GPL(cpu_idle_wait); | 179 | EXPORT_SYMBOL_GPL(cpu_idle_wait); |
182 | 180 | ||
183 | /* | 181 | /* |
184 | * This is our default idle handler. We need to disable | 182 | * This is our default idle handler. |
185 | * interrupts here to ensure we don't miss a wakeup call. | ||
186 | */ | 183 | */ |
184 | |||
185 | void (*arm_pm_idle)(void); | ||
186 | |||
187 | static void default_idle(void) | 187 | static void default_idle(void) |
188 | { | 188 | { |
189 | if (!need_resched()) | 189 | if (arm_pm_idle) |
190 | arch_idle(); | 190 | arm_pm_idle(); |
191 | else | ||
192 | cpu_do_idle(); | ||
191 | local_irq_enable(); | 193 | local_irq_enable(); |
192 | } | 194 | } |
193 | 195 | ||
@@ -215,6 +217,10 @@ void cpu_idle(void) | |||
215 | cpu_die(); | 217 | cpu_die(); |
216 | #endif | 218 | #endif |
217 | 219 | ||
220 | /* | ||
221 | * We need to disable interrupts here | ||
222 | * to ensure we don't miss a wakeup call. | ||
223 | */ | ||
218 | local_irq_disable(); | 224 | local_irq_disable(); |
219 | #ifdef CONFIG_PL310_ERRATA_769419 | 225 | #ifdef CONFIG_PL310_ERRATA_769419 |
220 | wmb(); | 226 | wmb(); |
@@ -222,19 +228,18 @@ void cpu_idle(void) | |||
222 | if (hlt_counter) { | 228 | if (hlt_counter) { |
223 | local_irq_enable(); | 229 | local_irq_enable(); |
224 | cpu_relax(); | 230 | cpu_relax(); |
225 | } else { | 231 | } else if (!need_resched()) { |
226 | stop_critical_timings(); | 232 | stop_critical_timings(); |
227 | if (cpuidle_idle_call()) | 233 | if (cpuidle_idle_call()) |
228 | pm_idle(); | 234 | pm_idle(); |
229 | start_critical_timings(); | 235 | start_critical_timings(); |
230 | /* | 236 | /* |
231 | * This will eventually be removed - pm_idle | 237 | * pm_idle functions must always |
232 | * functions should always return with IRQs | 238 | * return with IRQs enabled. |
233 | * enabled. | ||
234 | */ | 239 | */ |
235 | WARN_ON(irqs_disabled()); | 240 | WARN_ON(irqs_disabled()); |
241 | } else | ||
236 | local_irq_enable(); | 242 | local_irq_enable(); |
237 | } | ||
238 | } | 243 | } |
239 | leds_event(led_idle_end); | 244 | leds_event(led_idle_end); |
240 | rcu_idle_exit(); | 245 | rcu_idle_exit(); |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index a42edc25a87e..8967d75c2ea3 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -14,6 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/module.h> | 15 | #include <linux/module.h> |
16 | 16 | ||
17 | #include <asm/proc-fns.h> | ||
17 | #include <asm/irq.h> | 18 | #include <asm/irq.h> |
18 | #include <asm/mach/arch.h> | 19 | #include <asm/mach/arch.h> |
19 | #include <asm/mach/map.h> | 20 | #include <asm/mach/map.h> |
@@ -313,6 +314,12 @@ static struct at91_gpio_bank at91cap9_gpio[] __initdata = { | |||
313 | } | 314 | } |
314 | }; | 315 | }; |
315 | 316 | ||
317 | static void at91cap9_idle(void) | ||
318 | { | ||
319 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
320 | cpu_do_idle(); | ||
321 | } | ||
322 | |||
316 | /* -------------------------------------------------------------------- | 323 | /* -------------------------------------------------------------------- |
317 | * AT91CAP9 processor initialization | 324 | * AT91CAP9 processor initialization |
318 | * -------------------------------------------------------------------- */ | 325 | * -------------------------------------------------------------------- */ |
@@ -332,6 +339,7 @@ static void __init at91cap9_ioremap_registers(void) | |||
332 | 339 | ||
333 | static void __init at91cap9_initialize(void) | 340 | static void __init at91cap9_initialize(void) |
334 | { | 341 | { |
342 | arm_pm_idle = at91cap9_idle; | ||
335 | arm_pm_restart = at91sam9g45_restart; | 343 | arm_pm_restart = at91sam9g45_restart; |
336 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); | 344 | at91_extern_irq = (1 << AT91CAP9_ID_IRQ0) | (1 << AT91CAP9_ID_IRQ1); |
337 | 345 | ||
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 99c3174e24a2..dd6e2de13420 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -289,6 +289,15 @@ static struct at91_gpio_bank at91rm9200_gpio[] __initdata = { | |||
289 | } | 289 | } |
290 | }; | 290 | }; |
291 | 291 | ||
292 | static void at91rm9200_idle(void) | ||
293 | { | ||
294 | /* | ||
295 | * Disable the processor clock. The processor will be automatically | ||
296 | * re-enabled by an interrupt or by a reset. | ||
297 | */ | ||
298 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
299 | } | ||
300 | |||
292 | static void at91rm9200_restart(char mode, const char *cmd) | 301 | static void at91rm9200_restart(char mode, const char *cmd) |
293 | { | 302 | { |
294 | /* | 303 | /* |
@@ -314,6 +323,7 @@ static void __init at91rm9200_ioremap_registers(void) | |||
314 | 323 | ||
315 | static void __init at91rm9200_initialize(void) | 324 | static void __init at91rm9200_initialize(void) |
316 | { | 325 | { |
326 | arm_pm_idle = at91rm9200_idle; | ||
317 | arm_pm_restart = at91rm9200_restart; | 327 | arm_pm_restart = at91rm9200_restart; |
318 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) | 328 | at91_extern_irq = (1 << AT91RM9200_ID_IRQ0) | (1 << AT91RM9200_ID_IRQ1) |
319 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) | 329 | | (1 << AT91RM9200_ID_IRQ2) | (1 << AT91RM9200_ID_IRQ3) |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d4036ba43612..9ac8c6fe3363 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -328,8 +329,15 @@ static void __init at91sam9260_ioremap_registers(void) | |||
328 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); | 329 | at91sam9_ioremap_smc(0, AT91SAM9260_BASE_SMC); |
329 | } | 330 | } |
330 | 331 | ||
332 | static void at91sam9260_idle(void) | ||
333 | { | ||
334 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
335 | cpu_do_idle(); | ||
336 | } | ||
337 | |||
331 | static void __init at91sam9260_initialize(void) | 338 | static void __init at91sam9260_initialize(void) |
332 | { | 339 | { |
340 | arm_pm_idle = at91sam9260_idle; | ||
333 | arm_pm_restart = at91sam9_alt_restart; | 341 | arm_pm_restart = at91sam9_alt_restart; |
334 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) | 342 | at91_extern_irq = (1 << AT91SAM9260_ID_IRQ0) | (1 << AT91SAM9260_ID_IRQ1) |
335 | | (1 << AT91SAM9260_ID_IRQ2); | 343 | | (1 << AT91SAM9260_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 023c2ff138df..ab76868f01f5 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -286,8 +287,15 @@ static void __init at91sam9261_ioremap_registers(void) | |||
286 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); | 287 | at91sam9_ioremap_smc(0, AT91SAM9261_BASE_SMC); |
287 | } | 288 | } |
288 | 289 | ||
290 | static void at91sam9261_idle(void) | ||
291 | { | ||
292 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
293 | cpu_do_idle(); | ||
294 | } | ||
295 | |||
289 | static void __init at91sam9261_initialize(void) | 296 | static void __init at91sam9261_initialize(void) |
290 | { | 297 | { |
298 | arm_pm_idle = at91sam9261_idle; | ||
291 | arm_pm_restart = at91sam9_alt_restart; | 299 | arm_pm_restart = at91sam9_alt_restart; |
292 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) | 300 | at91_extern_irq = (1 << AT91SAM9261_ID_IRQ0) | (1 << AT91SAM9261_ID_IRQ1) |
293 | | (1 << AT91SAM9261_ID_IRQ2); | 301 | | (1 << AT91SAM9261_ID_IRQ2); |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 75e876c258af..247ab633abcc 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -12,6 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/module.h> | 13 | #include <linux/module.h> |
14 | 14 | ||
15 | #include <asm/proc-fns.h> | ||
15 | #include <asm/irq.h> | 16 | #include <asm/irq.h> |
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <asm/mach/map.h> | 18 | #include <asm/mach/map.h> |
@@ -307,8 +308,15 @@ static void __init at91sam9263_ioremap_registers(void) | |||
307 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); | 308 | at91sam9_ioremap_smc(1, AT91SAM9263_BASE_SMC1); |
308 | } | 309 | } |
309 | 310 | ||
311 | static void at91sam9263_idle(void) | ||
312 | { | ||
313 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
314 | cpu_do_idle(); | ||
315 | } | ||
316 | |||
310 | static void __init at91sam9263_initialize(void) | 317 | static void __init at91sam9263_initialize(void) |
311 | { | 318 | { |
319 | arm_pm_idle = at91sam9263_idle; | ||
312 | arm_pm_restart = at91sam9_alt_restart; | 320 | arm_pm_restart = at91sam9_alt_restart; |
313 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); | 321 | at91_extern_irq = (1 << AT91SAM9263_ID_IRQ0) | (1 << AT91SAM9263_ID_IRQ1); |
314 | 322 | ||
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 1cb6a96b1c1e..5b12192e52ec 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -317,6 +317,12 @@ static struct at91_gpio_bank at91sam9g45_gpio[] __initdata = { | |||
317 | } | 317 | } |
318 | }; | 318 | }; |
319 | 319 | ||
320 | static void at91sam9g45_idle(void) | ||
321 | { | ||
322 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
323 | cpu_do_idle(); | ||
324 | } | ||
325 | |||
320 | /* -------------------------------------------------------------------- | 326 | /* -------------------------------------------------------------------- |
321 | * AT91SAM9G45 processor initialization | 327 | * AT91SAM9G45 processor initialization |
322 | * -------------------------------------------------------------------- */ | 328 | * -------------------------------------------------------------------- */ |
@@ -337,6 +343,7 @@ static void __init at91sam9g45_ioremap_registers(void) | |||
337 | 343 | ||
338 | static void __init at91sam9g45_initialize(void) | 344 | static void __init at91sam9g45_initialize(void) |
339 | { | 345 | { |
346 | arm_pm_idle = at91sam9g45_idle; | ||
340 | arm_pm_restart = at91sam9g45_restart; | 347 | arm_pm_restart = at91sam9g45_restart; |
341 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); | 348 | at91_extern_irq = (1 << AT91SAM9G45_ID_IRQ0); |
342 | 349 | ||
diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index d2c91a841cb8..fd60e226a987 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c | |||
@@ -11,6 +11,7 @@ | |||
11 | 11 | ||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | 13 | ||
14 | #include <asm/proc-fns.h> | ||
14 | #include <asm/irq.h> | 15 | #include <asm/irq.h> |
15 | #include <asm/mach/arch.h> | 16 | #include <asm/mach/arch.h> |
16 | #include <asm/mach/map.h> | 17 | #include <asm/mach/map.h> |
@@ -291,8 +292,15 @@ static void __init at91sam9rl_ioremap_registers(void) | |||
291 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); | 292 | at91sam9_ioremap_smc(0, AT91SAM9RL_BASE_SMC); |
292 | } | 293 | } |
293 | 294 | ||
295 | static void at91sam9rl_idle(void) | ||
296 | { | ||
297 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
298 | cpu_do_idle(); | ||
299 | } | ||
300 | |||
294 | static void __init at91sam9rl_initialize(void) | 301 | static void __init at91sam9rl_initialize(void) |
295 | { | 302 | { |
303 | arm_pm_idle = at91sam9rl_idle; | ||
296 | arm_pm_restart = at91sam9_alt_restart; | 304 | arm_pm_restart = at91sam9_alt_restart; |
297 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); | 305 | at91_extern_irq = (1 << AT91SAM9RL_ID_IRQ0); |
298 | 306 | ||
diff --git a/arch/arm/mach-at91/at91x40.c b/arch/arm/mach-at91/at91x40.c index 56ba3bd035ae..0154b7f44ff1 100644 --- a/arch/arm/mach-at91/at91x40.c +++ b/arch/arm/mach-at91/at91x40.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irq.h> | 15 | #include <linux/irq.h> |
16 | #include <asm/proc-fns.h> | ||
16 | #include <asm/mach/arch.h> | 17 | #include <asm/mach/arch.h> |
17 | #include <mach/at91x40.h> | 18 | #include <mach/at91x40.h> |
18 | #include <mach/at91_st.h> | 19 | #include <mach/at91_st.h> |
@@ -37,8 +38,19 @@ unsigned long clk_get_rate(struct clk *clk) | |||
37 | return AT91X40_MASTER_CLOCK; | 38 | return AT91X40_MASTER_CLOCK; |
38 | } | 39 | } |
39 | 40 | ||
41 | static void at91x40_idle(void) | ||
42 | { | ||
43 | /* | ||
44 | * Disable the processor clock. The processor will be automatically | ||
45 | * re-enabled by an interrupt or by a reset. | ||
46 | */ | ||
47 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
48 | cpu_do_idle(); | ||
49 | } | ||
50 | |||
40 | void __init at91x40_initialize(unsigned long main_clock) | 51 | void __init at91x40_initialize(unsigned long main_clock) |
41 | { | 52 | { |
53 | arm_pm_idle = at91x40_idle; | ||
42 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) | 54 | at91_extern_irq = (1 << AT91X40_ID_IRQ0) | (1 << AT91X40_ID_IRQ1) |
43 | | (1 << AT91X40_ID_IRQ2); | 55 | | (1 << AT91X40_ID_IRQ2); |
44 | } | 56 | } |
diff --git a/arch/arm/mach-at91/include/mach/entry-macro.S b/arch/arm/mach-at91/include/mach/entry-macro.S index 423eea0ed74c..903bf205a333 100644 --- a/arch/arm/mach-at91/include/mach/entry-macro.S +++ b/arch/arm/mach-at91/include/mach/entry-macro.S | |||
@@ -13,17 +13,11 @@ | |||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/at91_aic.h> | 14 | #include <mach/at91_aic.h> |
15 | 15 | ||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 16 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral | 17 | ldr \base, =at91_aic_base @ base virtual address of AIC peripheral |
21 | ldr \base, [\base] | 18 | ldr \base, [\base] |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 22 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
29 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number | 23 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number |
diff --git a/arch/arm/mach-at91/include/mach/system.h b/arch/arm/mach-at91/include/mach/system.h deleted file mode 100644 index cbd64f3bcecd..000000000000 --- a/arch/arm/mach-at91/include/mach/system.h +++ /dev/null | |||
@@ -1,50 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-at91/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 SAN People | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | #include <mach/hardware.h> | ||
25 | #include <mach/at91_st.h> | ||
26 | #include <mach/at91_dbgu.h> | ||
27 | #include <mach/at91_pmc.h> | ||
28 | |||
29 | static inline void arch_idle(void) | ||
30 | { | ||
31 | /* | ||
32 | * Disable the processor clock. The processor will be automatically | ||
33 | * re-enabled by an interrupt or by a reset. | ||
34 | */ | ||
35 | #ifdef AT91_PS | ||
36 | at91_sys_write(AT91_PS_CR, AT91_PS_CR_CPU); | ||
37 | #else | ||
38 | at91_sys_write(AT91_PMC_SCDR, AT91_PMC_PCK); | ||
39 | #endif | ||
40 | #ifndef CONFIG_CPU_ARM920T | ||
41 | /* | ||
42 | * Set the processor (CP15) into 'Wait for Interrupt' mode. | ||
43 | * Post-RM9200 processors need this in conjunction with the above | ||
44 | * to save power when idle. | ||
45 | */ | ||
46 | cpu_do_idle(); | ||
47 | #endif | ||
48 | } | ||
49 | |||
50 | #endif | ||
diff --git a/arch/arm/mach-bcmring/core.c b/arch/arm/mach-bcmring/core.c index 6b67b7e8426c..22e4e0a28ad1 100644 --- a/arch/arm/mach-bcmring/core.c +++ b/arch/arm/mach-bcmring/core.c | |||
@@ -52,27 +52,8 @@ | |||
52 | #include <mach/csp/chipcHw_inline.h> | 52 | #include <mach/csp/chipcHw_inline.h> |
53 | #include <mach/csp/tmrHw_reg.h> | 53 | #include <mach/csp/tmrHw_reg.h> |
54 | 54 | ||
55 | #define AMBA_DEVICE(name, initname, base, plat, size) \ | 55 | static AMBA_APB_DEVICE(uartA, "uarta", MM_ADDR_IO_UARTA, { IRQ_UARTA }, NULL); |
56 | static struct amba_device name##_device = { \ | 56 | static AMBA_APB_DEVICE(uartB, "uartb", MM_ADDR_IO_UARTB, { IRQ_UARTB }, NULL); |
57 | .dev = { \ | ||
58 | .coherent_dma_mask = ~0, \ | ||
59 | .init_name = initname, \ | ||
60 | .platform_data = plat \ | ||
61 | }, \ | ||
62 | .res = { \ | ||
63 | .start = MM_ADDR_IO_##base, \ | ||
64 | .end = MM_ADDR_IO_##base + (size) - 1, \ | ||
65 | .flags = IORESOURCE_MEM \ | ||
66 | }, \ | ||
67 | .dma_mask = ~0, \ | ||
68 | .irq = { \ | ||
69 | IRQ_##base \ | ||
70 | } \ | ||
71 | } | ||
72 | |||
73 | |||
74 | AMBA_DEVICE(uartA, "uarta", UARTA, NULL, SZ_4K); | ||
75 | AMBA_DEVICE(uartB, "uartb", UARTB, NULL, SZ_4K); | ||
76 | 57 | ||
77 | static struct clk pll1_clk = { | 58 | static struct clk pll1_clk = { |
78 | .name = "PLL1", | 59 | .name = "PLL1", |
diff --git a/arch/arm/mach-bcmring/include/mach/entry-macro.S b/arch/arm/mach-bcmring/include/mach/entry-macro.S index 94c950d783ba..2f316f0e6e69 100644 --- a/arch/arm/mach-bcmring/include/mach/entry-macro.S +++ b/arch/arm/mach-bcmring/include/mach/entry-macro.S | |||
@@ -21,9 +21,6 @@ | |||
21 | #include <mach/hardware.h> | 21 | #include <mach/hardware.h> |
22 | #include <mach/csp/mm_io.h> | 22 | #include <mach/csp/mm_io.h> |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \base, =(MM_IO_BASE_INTC0) | 25 | ldr \base, =(MM_IO_BASE_INTC0) |
29 | ldr \irqstat, [\base, #0] @ get status | 26 | ldr \irqstat, [\base, #0] @ get status |
@@ -77,6 +74,3 @@ | |||
77 | 74 | ||
78 | .macro get_irqnr_preamble, base, tmp | 75 | .macro get_irqnr_preamble, base, tmp |
79 | .endm | 76 | .endm |
80 | |||
81 | .macro arch_ret_to_user, tmp1, tmp2 | ||
82 | .endm | ||
diff --git a/arch/arm/mach-bcmring/include/mach/system.h b/arch/arm/mach-bcmring/include/mach/system.h deleted file mode 100644 index cb78250db649..000000000000 --- a/arch/arm/mach-bcmring/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * Copyright (C) 1999 ARM Limited | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | cpu_do_idle(); | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c index ab1711b9b4d6..8736c1acc166 100644 --- a/arch/arm/mach-clps711x/common.c +++ b/arch/arm/mach-clps711x/common.c | |||
@@ -225,3 +225,19 @@ void clps711x_restart(char mode, const char *cmd) | |||
225 | { | 225 | { |
226 | soft_restart(0); | 226 | soft_restart(0); |
227 | } | 227 | } |
228 | |||
229 | static void clps711x_idle(void) | ||
230 | { | ||
231 | clps_writel(1, HALT); | ||
232 | __asm__ __volatile__( | ||
233 | "mov r0, r0\n\ | ||
234 | mov r0, r0"); | ||
235 | } | ||
236 | |||
237 | static int __init clps711x_idle_init(void) | ||
238 | { | ||
239 | arm_pm_idle = clps711x_idle; | ||
240 | return 0; | ||
241 | } | ||
242 | |||
243 | arch_initcall(clps711x_idle_init); | ||
diff --git a/arch/arm/mach-clps711x/include/mach/entry-macro.S b/arch/arm/mach-clps711x/include/mach/entry-macro.S index 90fa2f70489f..125af59d7a29 100644 --- a/arch/arm/mach-clps711x/include/mach/entry-macro.S +++ b/arch/arm/mach-clps711x/include/mach/entry-macro.S | |||
@@ -10,15 +10,9 @@ | |||
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | #include <asm/hardware/clps7111.h> | 11 | #include <asm/hardware/clps7111.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) | 16 | #if (INTSR2 - INTSR1) != (INTMR2 - INTMR1) |
23 | #error INTSR stride != INTMR stride | 17 | #error INTSR stride != INTMR stride |
24 | #endif | 18 | #endif |
diff --git a/arch/arm/mach-clps711x/include/mach/system.h b/arch/arm/mach-clps711x/include/mach/system.h deleted file mode 100644 index 23d6ef8c84da..000000000000 --- a/arch/arm/mach-clps711x/include/mach/system.h +++ /dev/null | |||
@@ -1,35 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-clps711x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | #include <linux/io.h> | ||
24 | #include <mach/hardware.h> | ||
25 | #include <asm/hardware/clps7111.h> | ||
26 | |||
27 | static inline void arch_idle(void) | ||
28 | { | ||
29 | clps_writel(1, HALT); | ||
30 | __asm__ __volatile__( | ||
31 | "mov r0, r0\n\ | ||
32 | mov r0, r0"); | ||
33 | } | ||
34 | |||
35 | #endif | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S b/arch/arm/mach-cns3xxx/include/mach/entry-macro.S deleted file mode 100644 index 01c57df5f716..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Cavium Networks platforms | ||
3 | * | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-cns3xxx/include/mach/system.h b/arch/arm/mach-cns3xxx/include/mach/system.h deleted file mode 100644 index 9e56b7dc133a..000000000000 --- a/arch/arm/mach-cns3xxx/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2000 Deep Blue Solutions Ltd | ||
3 | * Copyright 2003 ARM Limited | ||
4 | * Copyright 2008 Cavium Networks | ||
5 | * | ||
6 | * This file is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License, Version 2, as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __MACH_SYSTEM_H | ||
12 | #define __MACH_SYSTEM_H | ||
13 | |||
14 | #include <asm/proc-fns.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | /* | ||
19 | * This should do all the clock switching | ||
20 | * and wait for interrupt tricks | ||
21 | */ | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif | ||
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S index e14c0dc0e12c..c1661d2feca9 100644 --- a/arch/arm/mach-davinci/include/mach/entry-macro.S +++ b/arch/arm/mach-davinci/include/mach/entry-macro.S | |||
@@ -11,17 +11,11 @@ | |||
11 | #include <mach/io.h> | 11 | #include <mach/io.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | ldr \base, =davinci_intc_base | 15 | ldr \base, =davinci_intc_base |
19 | ldr \base, [\base] | 16 | ldr \base, [\base] |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
26 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) | 20 | #if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC) |
27 | ldr \tmp, =davinci_intc_type | 21 | ldr \tmp, =davinci_intc_type |
diff --git a/arch/arm/mach-davinci/include/mach/system.h b/arch/arm/mach-davinci/include/mach/system.h deleted file mode 100644 index fcb7a015aba5..000000000000 --- a/arch/arm/mach-davinci/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* | ||
2 | * DaVinci system defines | ||
3 | * | ||
4 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
5 | * | ||
6 | * 2007 (c) MontaVista Software, Inc. This file is licensed under | ||
7 | * the terms of the GNU General Public License version 2. This program | ||
8 | * is licensed "as is" without any warranty of any kind, whether express | ||
9 | * or implied. | ||
10 | */ | ||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | #include <mach/common.h> | ||
15 | |||
16 | static inline void arch_idle(void) | ||
17 | { | ||
18 | cpu_do_idle(); | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-dove/include/mach/entry-macro.S b/arch/arm/mach-dove/include/mach/entry-macro.S index e84c78c2a8b7..72d622baaad3 100644 --- a/arch/arm/mach-dove/include/mach/entry-macro.S +++ b/arch/arm/mach-dove/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-dove/include/mach/system.h b/arch/arm/mach-dove/include/mach/system.h deleted file mode 100644 index 3027954f6162..000000000000 --- a/arch/arm/mach-dove/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-dove/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-ebsa110/core.c b/arch/arm/mach-ebsa110/core.c index 294aad07f7a0..804c9122b7b3 100644 --- a/arch/arm/mach-ebsa110/core.c +++ b/arch/arm/mach-ebsa110/core.c | |||
@@ -271,8 +271,33 @@ static struct platform_device *ebsa110_devices[] = { | |||
271 | &am79c961_device, | 271 | &am79c961_device, |
272 | }; | 272 | }; |
273 | 273 | ||
274 | /* | ||
275 | * EBSA110 idling methodology: | ||
276 | * | ||
277 | * We can not execute the "wait for interrupt" instruction since that | ||
278 | * will stop our MCLK signal (which provides the clock for the glue | ||
279 | * logic, and therefore the timer interrupt). | ||
280 | * | ||
281 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
282 | * of any interrupt with core clock down to the memory clock. | ||
283 | */ | ||
284 | static void ebsa110_idle(void) | ||
285 | { | ||
286 | const char *irq_stat = (char *)0xff000000; | ||
287 | |||
288 | /* disable clock switching */ | ||
289 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
290 | |||
291 | /* wait for an interrupt to occur */ | ||
292 | while (!*irq_stat); | ||
293 | |||
294 | /* enable clock switching */ | ||
295 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
296 | } | ||
297 | |||
274 | static int __init ebsa110_init(void) | 298 | static int __init ebsa110_init(void) |
275 | { | 299 | { |
300 | arm_pm_idle = ebsa110_idle; | ||
276 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); | 301 | return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices)); |
277 | } | 302 | } |
278 | 303 | ||
diff --git a/arch/arm/mach-ebsa110/include/mach/entry-macro.S b/arch/arm/mach-ebsa110/include/mach/entry-macro.S index cc3e5992f6b3..14b110de78a9 100644 --- a/arch/arm/mach-ebsa110/include/mach/entry-macro.S +++ b/arch/arm/mach-ebsa110/include/mach/entry-macro.S | |||
@@ -12,16 +12,10 @@ | |||
12 | 12 | ||
13 | #define IRQ_STAT 0xff000000 /* read */ | 13 | #define IRQ_STAT 0xff000000 /* read */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | mov \base, #IRQ_STAT | 16 | mov \base, #IRQ_STAT |
20 | .endm | 17 | .endm |
21 | 18 | ||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | .macro get_irqnr_and_base, irqnr, stat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, stat, base, tmp |
26 | ldrb \stat, [\base] @ get interrupts | 20 | ldrb \stat, [\base] @ get interrupts |
27 | mov \irqnr, #0 | 21 | mov \irqnr, #0 |
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h deleted file mode 100644 index 2e4af65edb6f..000000000000 --- a/arch/arm/mach-ebsa110/include/mach/system.h +++ /dev/null | |||
@@ -1,37 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ebsa110/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-2000 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #ifndef __ASM_ARCH_SYSTEM_H | ||
11 | #define __ASM_ARCH_SYSTEM_H | ||
12 | |||
13 | /* | ||
14 | * EBSA110 idling methodology: | ||
15 | * | ||
16 | * We can not execute the "wait for interrupt" instruction since that | ||
17 | * will stop our MCLK signal (which provides the clock for the glue | ||
18 | * logic, and therefore the timer interrupt). | ||
19 | * | ||
20 | * Instead, we spin, polling the IRQ_STAT register for the occurrence | ||
21 | * of any interrupt with core clock down to the memory clock. | ||
22 | */ | ||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | const char *irq_stat = (char *)0xff000000; | ||
26 | |||
27 | /* disable clock switching */ | ||
28 | asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); | ||
29 | |||
30 | /* wait for an interrupt to occur */ | ||
31 | while (!*irq_stat); | ||
32 | |||
33 | /* enable clock switching */ | ||
34 | asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); | ||
35 | } | ||
36 | |||
37 | #endif | ||
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c index 24203f9a6796..903edb02fe4f 100644 --- a/arch/arm/mach-ep93xx/core.c +++ b/arch/arm/mach-ep93xx/core.c | |||
@@ -279,48 +279,14 @@ static struct amba_pl010_data ep93xx_uart_data = { | |||
279 | .set_mctrl = ep93xx_uart_set_mctrl, | 279 | .set_mctrl = ep93xx_uart_set_mctrl, |
280 | }; | 280 | }; |
281 | 281 | ||
282 | static struct amba_device uart1_device = { | 282 | static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, |
283 | .dev = { | 283 | { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); |
284 | .init_name = "apb:uart1", | ||
285 | .platform_data = &ep93xx_uart_data, | ||
286 | }, | ||
287 | .res = { | ||
288 | .start = EP93XX_UART1_PHYS_BASE, | ||
289 | .end = EP93XX_UART1_PHYS_BASE + 0x0fff, | ||
290 | .flags = IORESOURCE_MEM, | ||
291 | }, | ||
292 | .irq = { IRQ_EP93XX_UART1, NO_IRQ }, | ||
293 | .periphid = 0x00041010, | ||
294 | }; | ||
295 | |||
296 | static struct amba_device uart2_device = { | ||
297 | .dev = { | ||
298 | .init_name = "apb:uart2", | ||
299 | .platform_data = &ep93xx_uart_data, | ||
300 | }, | ||
301 | .res = { | ||
302 | .start = EP93XX_UART2_PHYS_BASE, | ||
303 | .end = EP93XX_UART2_PHYS_BASE + 0x0fff, | ||
304 | .flags = IORESOURCE_MEM, | ||
305 | }, | ||
306 | .irq = { IRQ_EP93XX_UART2, NO_IRQ }, | ||
307 | .periphid = 0x00041010, | ||
308 | }; | ||
309 | 284 | ||
310 | static struct amba_device uart3_device = { | 285 | static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, |
311 | .dev = { | 286 | { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); |
312 | .init_name = "apb:uart3", | ||
313 | .platform_data = &ep93xx_uart_data, | ||
314 | }, | ||
315 | .res = { | ||
316 | .start = EP93XX_UART3_PHYS_BASE, | ||
317 | .end = EP93XX_UART3_PHYS_BASE + 0x0fff, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }, | ||
320 | .irq = { IRQ_EP93XX_UART3, NO_IRQ }, | ||
321 | .periphid = 0x00041010, | ||
322 | }; | ||
323 | 287 | ||
288 | static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, | ||
289 | { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); | ||
324 | 290 | ||
325 | static struct resource ep93xx_rtc_resource[] = { | 291 | static struct resource ep93xx_rtc_resource[] = { |
326 | { | 292 | { |
diff --git a/arch/arm/mach-ep93xx/include/mach/entry-macro.S b/arch/arm/mach-ep93xx/include/mach/entry-macro.S deleted file mode 100644 index 9be6edcf9045..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/entry-macro.S | ||
3 | * IRQ demultiplexing for EP93xx | ||
4 | * | ||
5 | * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or (at | ||
10 | * your option) any later version. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-ep93xx/include/mach/system.h b/arch/arm/mach-ep93xx/include/mach/system.h deleted file mode 100644 index b5bec7cb9b52..000000000000 --- a/arch/arm/mach-ep93xx/include/mach/system.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ep93xx/include/mach/system.h | ||
3 | */ | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index c59e18871006..031c1e5b3dfe 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c | |||
@@ -201,14 +201,6 @@ static struct map_desc exynos4_iodesc1[] __initdata = { | |||
201 | }, | 201 | }, |
202 | }; | 202 | }; |
203 | 203 | ||
204 | static void exynos_idle(void) | ||
205 | { | ||
206 | if (!need_resched()) | ||
207 | cpu_do_idle(); | ||
208 | |||
209 | local_irq_enable(); | ||
210 | } | ||
211 | |||
212 | void exynos4_restart(char mode, const char *cmd) | 204 | void exynos4_restart(char mode, const char *cmd) |
213 | { | 205 | { |
214 | __raw_writel(0x1, S5P_SWRESET); | 206 | __raw_writel(0x1, S5P_SWRESET); |
@@ -467,10 +459,6 @@ early_initcall(exynos4_l2x0_cache_init); | |||
467 | int __init exynos_init(void) | 459 | int __init exynos_init(void) |
468 | { | 460 | { |
469 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); | 461 | printk(KERN_INFO "EXYNOS: Initializing architecture\n"); |
470 | |||
471 | /* set idle function */ | ||
472 | pm_idle = exynos_idle; | ||
473 | |||
474 | return device_register(&exynos4_dev); | 462 | return device_register(&exynos4_dev); |
475 | } | 463 | } |
476 | 464 | ||
diff --git a/arch/arm/mach-exynos/dma.c b/arch/arm/mach-exynos/dma.c index b10fcd270f07..91370def4a70 100644 --- a/arch/arm/mach-exynos/dma.c +++ b/arch/arm/mach-exynos/dma.c | |||
@@ -74,21 +74,8 @@ struct dma_pl330_platdata exynos4_pdma0_pdata = { | |||
74 | .peri_id = pdma0_peri, | 74 | .peri_id = pdma0_peri, |
75 | }; | 75 | }; |
76 | 76 | ||
77 | struct amba_device exynos4_device_pdma0 = { | 77 | AMBA_AHB_DEVICE(exynos4_pdma0, "dma-pl330.0", 0x00041330, EXYNOS4_PA_PDMA0, |
78 | .dev = { | 78 | {IRQ_PDMA0}, &exynos4_pdma0_pdata); |
79 | .init_name = "dma-pl330.0", | ||
80 | .dma_mask = &dma_dmamask, | ||
81 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
82 | .platform_data = &exynos4_pdma0_pdata, | ||
83 | }, | ||
84 | .res = { | ||
85 | .start = EXYNOS4_PA_PDMA0, | ||
86 | .end = EXYNOS4_PA_PDMA0 + SZ_4K, | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }, | ||
89 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
90 | .periphid = 0x00041330, | ||
91 | }; | ||
92 | 79 | ||
93 | u8 pdma1_peri[] = { | 80 | u8 pdma1_peri[] = { |
94 | DMACH_PCM0_RX, | 81 | DMACH_PCM0_RX, |
@@ -123,21 +110,8 @@ struct dma_pl330_platdata exynos4_pdma1_pdata = { | |||
123 | .peri_id = pdma1_peri, | 110 | .peri_id = pdma1_peri, |
124 | }; | 111 | }; |
125 | 112 | ||
126 | struct amba_device exynos4_device_pdma1 = { | 113 | AMBA_AHB_DEVICE(exynos4_pdma1, "dma-pl330.1", 0x00041330, EXYNOS4_PA_PDMA1, |
127 | .dev = { | 114 | {IRQ_PDMA1}, &exynos4_pdma1_pdata); |
128 | .init_name = "dma-pl330.1", | ||
129 | .dma_mask = &dma_dmamask, | ||
130 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
131 | .platform_data = &exynos4_pdma1_pdata, | ||
132 | }, | ||
133 | .res = { | ||
134 | .start = EXYNOS4_PA_PDMA1, | ||
135 | .end = EXYNOS4_PA_PDMA1 + SZ_4K, | ||
136 | .flags = IORESOURCE_MEM, | ||
137 | }, | ||
138 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
139 | .periphid = 0x00041330, | ||
140 | }; | ||
141 | 115 | ||
142 | static int __init exynos4_dma_init(void) | 116 | static int __init exynos4_dma_init(void) |
143 | { | 117 | { |
@@ -146,11 +120,11 @@ static int __init exynos4_dma_init(void) | |||
146 | 120 | ||
147 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, exynos4_pdma0_pdata.cap_mask); |
148 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, exynos4_pdma0_pdata.cap_mask); |
149 | amba_device_register(&exynos4_device_pdma0, &iomem_resource); | 123 | amba_device_register(&exynos4_pdma0_device, &iomem_resource); |
150 | 124 | ||
151 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); | 125 | dma_cap_set(DMA_SLAVE, exynos4_pdma1_pdata.cap_mask); |
152 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_CYCLIC, exynos4_pdma1_pdata.cap_mask); |
153 | amba_device_register(&exynos4_device_pdma1, &iomem_resource); | 127 | amba_device_register(&exynos4_pdma1_device, &iomem_resource); |
154 | 128 | ||
155 | return 0; | 129 | return 0; |
156 | } | 130 | } |
diff --git a/arch/arm/mach-exynos/include/mach/entry-macro.S b/arch/arm/mach-exynos/include/mach/entry-macro.S deleted file mode 100644 index 3ba4f547534b..000000000000 --- a/arch/arm/mach-exynos/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* arch/arm/mach-exynos4/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Cloned from arch/arm/mach-realview/include/mach/entry-macro.S | ||
4 | * | ||
5 | * Low-level IRQ helper macros for EXYNOS4 platforms | ||
6 | * | ||
7 | * This file is licensed under the terms of the GNU General Public | ||
8 | * License version 2. This program is licensed "as is" without any | ||
9 | * warranty of any kind, whether express or implied. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-exynos/include/mach/system.h b/arch/arm/mach-exynos/include/mach/system.h deleted file mode 100644 index 0063a6de3dc8..000000000000 --- a/arch/arm/mach-exynos/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-exynos4/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * EXYNOS4 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-footbridge/include/mach/entry-macro.S b/arch/arm/mach-footbridge/include/mach/entry-macro.S index d3847be0c667..dabbd5c54a78 100644 --- a/arch/arm/mach-footbridge/include/mach/entry-macro.S +++ b/arch/arm/mach-footbridge/include/mach/entry-macro.S | |||
@@ -14,9 +14,6 @@ | |||
14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 | 14 | .equ dc21285_high, ARMCSR_BASE & 0xff000000 |
15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff | 15 | .equ dc21285_low, ARMCSR_BASE & 0x00ffffff |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | mov \base, #dc21285_high | 18 | mov \base, #dc21285_high |
22 | .if dc21285_low | 19 | .if dc21285_low |
@@ -24,9 +21,6 @@ | |||
24 | .endif | 21 | .endif |
25 | .endm | 22 | .endm |
26 | 23 | ||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
30 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
31 | ldr \irqstat, [\base, #0x180] @ get interrupts | 25 | ldr \irqstat, [\base, #0x180] @ get interrupts |
32 | 26 | ||
diff --git a/arch/arm/mach-footbridge/include/mach/system.h b/arch/arm/mach-footbridge/include/mach/system.h deleted file mode 100644 index a174a5841bc2..000000000000 --- a/arch/arm/mach-footbridge/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-footbridge/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-gemini/Makefile b/arch/arm/mach-gemini/Makefile index c5b24b95a76e..7355c0bbcb5e 100644 --- a/arch/arm/mach-gemini/Makefile +++ b/arch/arm/mach-gemini/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := irq.o mm.o time.o devices.o gpio.o | 7 | obj-y := irq.o mm.o time.o devices.o gpio.o idle.o |
8 | 8 | ||
9 | # Board-specific support | 9 | # Board-specific support |
10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o | 10 | obj-$(CONFIG_MACH_NAS4220B) += board-nas4220b.o |
diff --git a/arch/arm/mach-gemini/idle.c b/arch/arm/mach-gemini/idle.c new file mode 100644 index 000000000000..92bbd6bb600a --- /dev/null +++ b/arch/arm/mach-gemini/idle.c | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-gemini/idle.c | ||
3 | */ | ||
4 | |||
5 | #include <linux/init.h> | ||
6 | #include <asm/system.h> | ||
7 | #include <asm/proc-fns.h> | ||
8 | |||
9 | static void gemini_idle(void) | ||
10 | { | ||
11 | /* | ||
12 | * Because of broken hardware we have to enable interrupts or the CPU | ||
13 | * will never wakeup... Acctualy it is not very good to enable | ||
14 | * interrupts first since scheduler can miss a tick, but there is | ||
15 | * no other way around this. Platforms that needs it for power saving | ||
16 | * should call enable_hlt() in init code, since by default it is | ||
17 | * disabled. | ||
18 | */ | ||
19 | local_irq_enable(); | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | static int __init gemini_idle_init(void) | ||
24 | { | ||
25 | arm_pm_idle = gemini_idle; | ||
26 | return 0; | ||
27 | } | ||
28 | |||
29 | arch_initcall(gemini_idle_init); | ||
diff --git a/arch/arm/mach-gemini/include/mach/entry-macro.S b/arch/arm/mach-gemini/include/mach/entry-macro.S index 1624f91a2b8b..f044e430bfa4 100644 --- a/arch/arm/mach-gemini/include/mach/entry-macro.S +++ b/arch/arm/mach-gemini/include/mach/entry-macro.S | |||
@@ -12,15 +12,9 @@ | |||
12 | 12 | ||
13 | #define IRQ_STATUS 0x14 | 13 | #define IRQ_STATUS 0x14 |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) | 19 | ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS) |
26 | ldr \irqnr, [\irqstat] | 20 | ldr \irqnr, [\irqstat] |
diff --git a/arch/arm/mach-gemini/include/mach/system.h b/arch/arm/mach-gemini/include/mach/system.h index 4d9c1f872472..a33b5a1f8ab4 100644 --- a/arch/arm/mach-gemini/include/mach/system.h +++ b/arch/arm/mach-gemini/include/mach/system.h | |||
@@ -14,20 +14,6 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/global_reg.h> | 15 | #include <mach/global_reg.h> |
16 | 16 | ||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * Because of broken hardware we have to enable interrupts or the CPU | ||
21 | * will never wakeup... Acctualy it is not very good to enable | ||
22 | * interrupts here since scheduler can miss a tick, but there is | ||
23 | * no other way around this. Platforms that needs it for power saving | ||
24 | * should call enable_hlt() in init code, since by default it is | ||
25 | * disabled. | ||
26 | */ | ||
27 | local_irq_enable(); | ||
28 | cpu_do_idle(); | ||
29 | } | ||
30 | |||
31 | static inline void arch_reset(char mode, const char *cmd) | 17 | static inline void arch_reset(char mode, const char *cmd) |
32 | { | 18 | { |
33 | __raw_writel(RESET_GLOBAL | RESET_CPU1, | 19 | __raw_writel(RESET_GLOBAL | RESET_CPU1, |
diff --git a/arch/arm/mach-gemini/irq.c b/arch/arm/mach-gemini/irq.c index 9485a8fdf851..ca70e5fcc7ac 100644 --- a/arch/arm/mach-gemini/irq.c +++ b/arch/arm/mach-gemini/irq.c | |||
@@ -73,8 +73,8 @@ void __init gemini_init_irq(void) | |||
73 | unsigned int i, mode = 0, level = 0; | 73 | unsigned int i, mode = 0, level = 0; |
74 | 74 | ||
75 | /* | 75 | /* |
76 | * Disable arch_idle() by default since it is buggy | 76 | * Disable the idle handler by default since it is buggy |
77 | * For more info see arch/arm/mach-gemini/include/mach/system.h | 77 | * For more info see arch/arm/mach-gemini/idle.c |
78 | */ | 78 | */ |
79 | disable_hlt(); | 79 | disable_hlt(); |
80 | 80 | ||
diff --git a/arch/arm/mach-h720x/common.c b/arch/arm/mach-h720x/common.c index f8a2f6bb5483..e756d1ac00c2 100644 --- a/arch/arm/mach-h720x/common.c +++ b/arch/arm/mach-h720x/common.c | |||
@@ -247,3 +247,21 @@ void h720x_restart(char mode, const char *cmd) | |||
247 | { | 247 | { |
248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; | 248 | CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; |
249 | } | 249 | } |
250 | |||
251 | static void h720x__idle(void) | ||
252 | { | ||
253 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
254 | nop(); | ||
255 | nop(); | ||
256 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
257 | nop(); | ||
258 | nop(); | ||
259 | } | ||
260 | |||
261 | static int __init h720x_idle_init(void) | ||
262 | { | ||
263 | arm_pm_idle = h720x__idle; | ||
264 | return 0; | ||
265 | } | ||
266 | |||
267 | arch_initcall(h720x_idle_init); | ||
diff --git a/arch/arm/mach-h720x/include/mach/entry-macro.S b/arch/arm/mach-h720x/include/mach/entry-macro.S index c3948e5ba4a0..75267fad7012 100644 --- a/arch/arm/mach-h720x/include/mach/entry-macro.S +++ b/arch/arm/mach-h720x/include/mach/entry-macro.S | |||
@@ -8,15 +8,9 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) | 15 | #if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202) |
22 | @ we could use the id register on H7202, but this is not | 16 | @ we could use the id register on H7202, but this is not |
diff --git a/arch/arm/mach-h720x/include/mach/system.h b/arch/arm/mach-h720x/include/mach/system.h deleted file mode 100644 index 16ac46e239aa..000000000000 --- a/arch/arm/mach-h720x/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-h720x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001-2002 Jungjun Kim, Hynix Semiconductor Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * arch/arm/mach-h720x/include/mach/system.h | ||
10 | * | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H | ||
15 | #include <mach/hardware.h> | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_IDLE; | ||
20 | nop(); | ||
21 | nop(); | ||
22 | CPU_REG (PMU_BASE, PMU_MODE) = PMU_MODE_RUN; | ||
23 | nop(); | ||
24 | nop(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-highbank/include/mach/entry-macro.S b/arch/arm/mach-highbank/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-highbank/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-highbank/include/mach/system.h b/arch/arm/mach-highbank/include/mach/system.h deleted file mode 100644 index b1d8b5fbe373..000000000000 --- a/arch/arm/mach-highbank/include/mach/system.h +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2010-2011 Calxeda, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along with | ||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | #ifndef __MACH_SYSTEM_H | ||
17 | #define __MACH_SYSTEM_H | ||
18 | |||
19 | static inline void arch_idle(void) | ||
20 | { | ||
21 | cpu_do_idle(); | ||
22 | } | ||
23 | |||
24 | #endif | ||
diff --git a/arch/arm/mach-imx/mm-imx3.c b/arch/arm/mach-imx/mm-imx3.c index 31807d2a8b7b..8404ee72555a 100644 --- a/arch/arm/mach-imx/mm-imx3.c +++ b/arch/arm/mach-imx/mm-imx3.c | |||
@@ -34,31 +34,29 @@ static void imx3_idle(void) | |||
34 | { | 34 | { |
35 | unsigned long reg = 0; | 35 | unsigned long reg = 0; |
36 | 36 | ||
37 | if (!need_resched()) | 37 | __asm__ __volatile__( |
38 | __asm__ __volatile__( | 38 | /* disable I and D cache */ |
39 | /* disable I and D cache */ | 39 | "mrc p15, 0, %0, c1, c0, 0\n" |
40 | "mrc p15, 0, %0, c1, c0, 0\n" | 40 | "bic %0, %0, #0x00001000\n" |
41 | "bic %0, %0, #0x00001000\n" | 41 | "bic %0, %0, #0x00000004\n" |
42 | "bic %0, %0, #0x00000004\n" | 42 | "mcr p15, 0, %0, c1, c0, 0\n" |
43 | "mcr p15, 0, %0, c1, c0, 0\n" | 43 | /* invalidate I cache */ |
44 | /* invalidate I cache */ | 44 | "mov %0, #0\n" |
45 | "mov %0, #0\n" | 45 | "mcr p15, 0, %0, c7, c5, 0\n" |
46 | "mcr p15, 0, %0, c7, c5, 0\n" | 46 | /* clear and invalidate D cache */ |
47 | /* clear and invalidate D cache */ | 47 | "mov %0, #0\n" |
48 | "mov %0, #0\n" | 48 | "mcr p15, 0, %0, c7, c14, 0\n" |
49 | "mcr p15, 0, %0, c7, c14, 0\n" | 49 | /* WFI */ |
50 | /* WFI */ | 50 | "mov %0, #0\n" |
51 | "mov %0, #0\n" | 51 | "mcr p15, 0, %0, c7, c0, 4\n" |
52 | "mcr p15, 0, %0, c7, c0, 4\n" | 52 | "nop\n" "nop\n" "nop\n" "nop\n" |
53 | "nop\n" "nop\n" "nop\n" "nop\n" | 53 | "nop\n" "nop\n" "nop\n" |
54 | "nop\n" "nop\n" "nop\n" | 54 | /* enable I and D cache */ |
55 | /* enable I and D cache */ | 55 | "mrc p15, 0, %0, c1, c0, 0\n" |
56 | "mrc p15, 0, %0, c1, c0, 0\n" | 56 | "orr %0, %0, #0x00001000\n" |
57 | "orr %0, %0, #0x00001000\n" | 57 | "orr %0, %0, #0x00000004\n" |
58 | "orr %0, %0, #0x00000004\n" | 58 | "mcr p15, 0, %0, c1, c0, 0\n" |
59 | "mcr p15, 0, %0, c1, c0, 0\n" | 59 | : "=r" (reg)); |
60 | : "=r" (reg)); | ||
61 | local_irq_enable(); | ||
62 | } | 60 | } |
63 | 61 | ||
64 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, | 62 | static void __iomem *imx3_ioremap(unsigned long phys_addr, size_t size, |
@@ -134,8 +132,8 @@ void __init imx31_init_early(void) | |||
134 | { | 132 | { |
135 | mxc_set_cpu_type(MXC_CPU_MX31); | 133 | mxc_set_cpu_type(MXC_CPU_MX31); |
136 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | 134 | mxc_arch_reset_init(MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); |
137 | pm_idle = imx3_idle; | ||
138 | imx_ioremap = imx3_ioremap; | 135 | imx_ioremap = imx3_ioremap; |
136 | arm_pm_idle = imx3_idle; | ||
139 | } | 137 | } |
140 | 138 | ||
141 | void __init mx31_init_irq(void) | 139 | void __init mx31_init_irq(void) |
@@ -197,7 +195,7 @@ void __init imx35_init_early(void) | |||
197 | mxc_set_cpu_type(MXC_CPU_MX35); | 195 | mxc_set_cpu_type(MXC_CPU_MX35); |
198 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); | 196 | mxc_iomux_v3_init(MX35_IO_ADDRESS(MX35_IOMUXC_BASE_ADDR)); |
199 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); | 197 | mxc_arch_reset_init(MX35_IO_ADDRESS(MX35_WDOG_BASE_ADDR)); |
200 | pm_idle = imx3_idle; | 198 | arm_pm_idle = imx3_idle; |
201 | imx_ioremap = imx3_ioremap; | 199 | imx_ioremap = imx3_ioremap; |
202 | } | 200 | } |
203 | 201 | ||
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index bc17dfea3817..49549a72dc7d 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c | |||
@@ -26,23 +26,17 @@ static struct clk *gpc_dvfs_clk; | |||
26 | 26 | ||
27 | static void imx5_idle(void) | 27 | static void imx5_idle(void) |
28 | { | 28 | { |
29 | if (!need_resched()) { | 29 | /* gpc clock is needed for SRPG */ |
30 | /* gpc clock is needed for SRPG */ | 30 | if (gpc_dvfs_clk == NULL) { |
31 | if (gpc_dvfs_clk == NULL) { | 31 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); |
32 | gpc_dvfs_clk = clk_get(NULL, "gpc_dvfs"); | 32 | if (IS_ERR(gpc_dvfs_clk)) |
33 | if (IS_ERR(gpc_dvfs_clk)) | 33 | return; |
34 | goto err0; | ||
35 | } | ||
36 | clk_enable(gpc_dvfs_clk); | ||
37 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); | ||
38 | if (tzic_enable_wake()) | ||
39 | goto err1; | ||
40 | cpu_do_idle(); | ||
41 | err1: | ||
42 | clk_disable(gpc_dvfs_clk); | ||
43 | } | 34 | } |
44 | err0: | 35 | clk_enable(gpc_dvfs_clk); |
45 | local_irq_enable(); | 36 | mx5_cpu_lp_set(WAIT_UNCLOCKED_POWER_OFF); |
37 | if (tzic_enable_wake() != 0) | ||
38 | cpu_do_idle(); | ||
39 | clk_disable(gpc_dvfs_clk); | ||
46 | } | 40 | } |
47 | 41 | ||
48 | /* | 42 | /* |
@@ -108,7 +102,7 @@ void __init imx51_init_early(void) | |||
108 | mxc_set_cpu_type(MXC_CPU_MX51); | 102 | mxc_set_cpu_type(MXC_CPU_MX51); |
109 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); | 103 | mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); |
110 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); | 104 | mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); |
111 | pm_idle = imx5_idle; | 105 | arm_pm_idle = imx5_idle; |
112 | } | 106 | } |
113 | 107 | ||
114 | void __init imx53_init_early(void) | 108 | void __init imx53_init_early(void) |
diff --git a/arch/arm/mach-imx/pm-imx27.c b/arch/arm/mach-imx/pm-imx27.c index e455d2f855bf..6fcffa7db978 100644 --- a/arch/arm/mach-imx/pm-imx27.c +++ b/arch/arm/mach-imx/pm-imx27.c | |||
@@ -10,7 +10,6 @@ | |||
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/suspend.h> | 11 | #include <linux/suspend.h> |
12 | #include <linux/io.h> | 12 | #include <linux/io.h> |
13 | #include <mach/system.h> | ||
14 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
15 | 14 | ||
16 | static int mx27_suspend_enter(suspend_state_t state) | 15 | static int mx27_suspend_enter(suspend_state_t state) |
@@ -23,7 +22,7 @@ static int mx27_suspend_enter(suspend_state_t state) | |||
23 | cscr &= 0xFFFFFFFC; | 22 | cscr &= 0xFFFFFFFC; |
24 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); | 23 | __raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR)); |
25 | /* Executes WFI */ | 24 | /* Executes WFI */ |
26 | arch_idle(); | 25 | cpu_do_idle(); |
27 | break; | 26 | break; |
28 | 27 | ||
29 | default: | 28 | default: |
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c index 019f0ab08f66..15b87f26ac96 100644 --- a/arch/arm/mach-integrator/core.c +++ b/arch/arm/mach-integrator/core.c | |||
@@ -35,67 +35,23 @@ | |||
35 | 35 | ||
36 | static struct amba_pl010_data integrator_uart_data; | 36 | static struct amba_pl010_data integrator_uart_data; |
37 | 37 | ||
38 | static struct amba_device rtc_device = { | 38 | #define INTEGRATOR_RTC_IRQ { IRQ_RTCINT } |
39 | .dev = { | 39 | #define INTEGRATOR_UART0_IRQ { IRQ_UARTINT0 } |
40 | .init_name = "mb:15", | 40 | #define INTEGRATOR_UART1_IRQ { IRQ_UARTINT1 } |
41 | }, | 41 | #define KMI0_IRQ { IRQ_KMIINT0 } |
42 | .res = { | 42 | #define KMI1_IRQ { IRQ_KMIINT1 } |
43 | .start = INTEGRATOR_RTC_BASE, | ||
44 | .end = INTEGRATOR_RTC_BASE + SZ_4K - 1, | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, | ||
47 | .irq = { IRQ_RTCINT, NO_IRQ }, | ||
48 | }; | ||
49 | 43 | ||
50 | static struct amba_device uart0_device = { | 44 | static AMBA_APB_DEVICE(rtc, "mb:15", 0, |
51 | .dev = { | 45 | INTEGRATOR_RTC_BASE, INTEGRATOR_RTC_IRQ, NULL); |
52 | .init_name = "mb:16", | ||
53 | .platform_data = &integrator_uart_data, | ||
54 | }, | ||
55 | .res = { | ||
56 | .start = INTEGRATOR_UART0_BASE, | ||
57 | .end = INTEGRATOR_UART0_BASE + SZ_4K - 1, | ||
58 | .flags = IORESOURCE_MEM, | ||
59 | }, | ||
60 | .irq = { IRQ_UARTINT0, NO_IRQ }, | ||
61 | }; | ||
62 | 46 | ||
63 | static struct amba_device uart1_device = { | 47 | static AMBA_APB_DEVICE(uart0, "mb:16", 0, |
64 | .dev = { | 48 | INTEGRATOR_UART0_BASE, INTEGRATOR_UART0_IRQ, &integrator_uart_data); |
65 | .init_name = "mb:17", | ||
66 | .platform_data = &integrator_uart_data, | ||
67 | }, | ||
68 | .res = { | ||
69 | .start = INTEGRATOR_UART1_BASE, | ||
70 | .end = INTEGRATOR_UART1_BASE + SZ_4K - 1, | ||
71 | .flags = IORESOURCE_MEM, | ||
72 | }, | ||
73 | .irq = { IRQ_UARTINT1, NO_IRQ }, | ||
74 | }; | ||
75 | 49 | ||
76 | static struct amba_device kmi0_device = { | 50 | static AMBA_APB_DEVICE(uart1, "mb:17", 0, |
77 | .dev = { | 51 | INTEGRATOR_UART1_BASE, INTEGRATOR_UART1_IRQ, &integrator_uart_data); |
78 | .init_name = "mb:18", | ||
79 | }, | ||
80 | .res = { | ||
81 | .start = KMI0_BASE, | ||
82 | .end = KMI0_BASE + SZ_4K - 1, | ||
83 | .flags = IORESOURCE_MEM, | ||
84 | }, | ||
85 | .irq = { IRQ_KMIINT0, NO_IRQ }, | ||
86 | }; | ||
87 | 52 | ||
88 | static struct amba_device kmi1_device = { | 53 | static AMBA_APB_DEVICE(kmi0, "mb:18", 0, KMI0_BASE, KMI0_IRQ, NULL); |
89 | .dev = { | 54 | static AMBA_APB_DEVICE(kmi1, "mb:19", 0, KMI1_BASE, KMI1_IRQ, NULL); |
90 | .init_name = "mb:19", | ||
91 | }, | ||
92 | .res = { | ||
93 | .start = KMI1_BASE, | ||
94 | .end = KMI1_BASE + SZ_4K - 1, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | .irq = { IRQ_KMIINT1, NO_IRQ }, | ||
98 | }; | ||
99 | 55 | ||
100 | static struct amba_device *amba_devs[] __initdata = { | 56 | static struct amba_device *amba_devs[] __initdata = { |
101 | &rtc_device, | 57 | &rtc_device, |
diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index 8cbb75a96bd4..3e538da6cb1f 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c | |||
@@ -401,24 +401,21 @@ static int impd1_probe(struct lm_device *dev) | |||
401 | 401 | ||
402 | pc_base = dev->resource.start + idev->offset; | 402 | pc_base = dev->resource.start + idev->offset; |
403 | 403 | ||
404 | d = kzalloc(sizeof(struct amba_device), GFP_KERNEL); | 404 | d = amba_device_alloc(NULL, pc_base, SZ_4K); |
405 | if (!d) | 405 | if (!d) |
406 | continue; | 406 | continue; |
407 | 407 | ||
408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); | 408 | dev_set_name(&d->dev, "lm%x:%5.5lx", dev->id, idev->offset >> 12); |
409 | d->dev.parent = &dev->dev; | 409 | d->dev.parent = &dev->dev; |
410 | d->res.start = dev->resource.start + idev->offset; | ||
411 | d->res.end = d->res.start + SZ_4K - 1; | ||
412 | d->res.flags = IORESOURCE_MEM; | ||
413 | d->irq[0] = dev->irq; | 410 | d->irq[0] = dev->irq; |
414 | d->irq[1] = dev->irq; | 411 | d->irq[1] = dev->irq; |
415 | d->periphid = idev->id; | 412 | d->periphid = idev->id; |
416 | d->dev.platform_data = idev->platform_data; | 413 | d->dev.platform_data = idev->platform_data; |
417 | 414 | ||
418 | ret = amba_device_register(d, &dev->resource); | 415 | ret = amba_device_add(d, &dev->resource); |
419 | if (ret) { | 416 | if (ret) { |
420 | dev_err(&d->dev, "unable to register device: %d\n", ret); | 417 | dev_err(&d->dev, "unable to register device: %d\n", ret); |
421 | kfree(d); | 418 | amba_device_put(d); |
422 | } | 419 | } |
423 | } | 420 | } |
424 | 421 | ||
diff --git a/arch/arm/mach-integrator/include/mach/entry-macro.S b/arch/arm/mach-integrator/include/mach/entry-macro.S index 3d029c9f3ef6..5cc7b85ad9df 100644 --- a/arch/arm/mach-integrator/include/mach/entry-macro.S +++ b/arch/arm/mach-integrator/include/mach/entry-macro.S | |||
@@ -11,15 +11,9 @@ | |||
11 | #include <mach/platform.h> | 11 | #include <mach/platform.h> |
12 | #include <mach/irqs.h> | 12 | #include <mach/irqs.h> |
13 | 13 | ||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 14 | .macro get_irqnr_preamble, base, tmp |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | /* FIXME: should not be using soo many LDRs here */ | 18 | /* FIXME: should not be using soo many LDRs here */ |
25 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) | 19 | ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE) |
diff --git a/arch/arm/mach-integrator/include/mach/system.h b/arch/arm/mach-integrator/include/mach/system.h deleted file mode 100644 index 901514eba4a6..000000000000 --- a/arch/arm/mach-integrator/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-integrator/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1999 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c index a8b6aa6003f3..be9ead4a3bcc 100644 --- a/arch/arm/mach-integrator/integrator_cp.c +++ b/arch/arm/mach-integrator/integrator_cp.c | |||
@@ -347,32 +347,14 @@ static struct mmci_platform_data mmc_data = { | |||
347 | .gpio_cd = -1, | 347 | .gpio_cd = -1, |
348 | }; | 348 | }; |
349 | 349 | ||
350 | static struct amba_device mmc_device = { | 350 | #define INTEGRATOR_CP_MMC_IRQS { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 } |
351 | .dev = { | 351 | #define INTEGRATOR_CP_AACI_IRQS { IRQ_CP_AACIINT } |
352 | .init_name = "mb:1c", | ||
353 | .platform_data = &mmc_data, | ||
354 | }, | ||
355 | .res = { | ||
356 | .start = INTEGRATOR_CP_MMC_BASE, | ||
357 | .end = INTEGRATOR_CP_MMC_BASE + SZ_4K - 1, | ||
358 | .flags = IORESOURCE_MEM, | ||
359 | }, | ||
360 | .irq = { IRQ_CP_MMCIINT0, IRQ_CP_MMCIINT1 }, | ||
361 | .periphid = 0, | ||
362 | }; | ||
363 | 352 | ||
364 | static struct amba_device aaci_device = { | 353 | static AMBA_APB_DEVICE(mmc, "mb:1c", 0, INTEGRATOR_CP_MMC_BASE, |
365 | .dev = { | 354 | INTEGRATOR_CP_MMC_IRQS, &mmc_data); |
366 | .init_name = "mb:1d", | 355 | |
367 | }, | 356 | static AMBA_APB_DEVICE(aaci, "mb:1d", 0, INTEGRATOR_CP_AACI_BASE, |
368 | .res = { | 357 | INTEGRATOR_CP_AACI_IRQS, NULL); |
369 | .start = INTEGRATOR_CP_AACI_BASE, | ||
370 | .end = INTEGRATOR_CP_AACI_BASE + SZ_4K - 1, | ||
371 | .flags = IORESOURCE_MEM, | ||
372 | }, | ||
373 | .irq = { IRQ_CP_AACIINT, NO_IRQ }, | ||
374 | .periphid = 0, | ||
375 | }; | ||
376 | 358 | ||
377 | 359 | ||
378 | /* | 360 | /* |
@@ -425,21 +407,8 @@ static struct clcd_board clcd_data = { | |||
425 | .remove = versatile_clcd_remove_dma, | 407 | .remove = versatile_clcd_remove_dma, |
426 | }; | 408 | }; |
427 | 409 | ||
428 | static struct amba_device clcd_device = { | 410 | static AMBA_AHB_DEVICE(clcd, "mb:c0", 0, INTCP_PA_CLCD_BASE, |
429 | .dev = { | 411 | { IRQ_CP_CLCDCINT }, &clcd_data); |
430 | .init_name = "mb:c0", | ||
431 | .coherent_dma_mask = ~0, | ||
432 | .platform_data = &clcd_data, | ||
433 | }, | ||
434 | .res = { | ||
435 | .start = INTCP_PA_CLCD_BASE, | ||
436 | .end = INTCP_PA_CLCD_BASE + SZ_4K - 1, | ||
437 | .flags = IORESOURCE_MEM, | ||
438 | }, | ||
439 | .dma_mask = ~0, | ||
440 | .irq = { IRQ_CP_CLCDCINT, NO_IRQ }, | ||
441 | .periphid = 0, | ||
442 | }; | ||
443 | 412 | ||
444 | static struct amba_device *amba_devs[] __initdata = { | 413 | static struct amba_device *amba_devs[] __initdata = { |
445 | &mmc_device, | 414 | &mmc_device, |
diff --git a/arch/arm/mach-iop13xx/include/mach/entry-macro.S b/arch/arm/mach-iop13xx/include/mach/entry-macro.S index a624a7870c64..1a2d603488d8 100644 --- a/arch/arm/mach-iop13xx/include/mach/entry-macro.S +++ b/arch/arm/mach-iop13xx/include/mach/entry-macro.S | |||
@@ -16,9 +16,6 @@ | |||
16 | * Place - Suite 330, Boston, MA 02111-1307 USA. | 16 | * Place - Suite 330, Boston, MA 02111-1307 USA. |
17 | * | 17 | * |
18 | */ | 18 | */ |
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_preamble, base, tmp | 19 | .macro get_irqnr_preamble, base, tmp |
23 | mrc p15, 0, \tmp, c15, c1, 0 | 20 | mrc p15, 0, \tmp, c15, c1, 0 |
24 | orr \tmp, \tmp, #(1 << 6) | 21 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop13xx/include/mach/system.h b/arch/arm/mach-iop13xx/include/mach/system.h deleted file mode 100644 index 1f31ed3f8ae2..000000000000 --- a/arch/arm/mach-iop13xx/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop13xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2004 Intel Corp. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop32x/include/mach/entry-macro.S b/arch/arm/mach-iop32x/include/mach/entry-macro.S index b02fb56bafcc..ea13ae02d9b1 100644 --- a/arch/arm/mach-iop32x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop32x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop32x.h> | 10 | #include <mach/iop32x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop32x/include/mach/system.h b/arch/arm/mach-iop32x/include/mach/system.h deleted file mode 100644 index 4a88727bca98..000000000000 --- a/arch/arm/mach-iop32x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop32x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-iop33x/include/mach/entry-macro.S b/arch/arm/mach-iop33x/include/mach/entry-macro.S index 4e1f7282b354..0a398fe1fba4 100644 --- a/arch/arm/mach-iop33x/include/mach/entry-macro.S +++ b/arch/arm/mach-iop33x/include/mach/entry-macro.S | |||
@@ -9,9 +9,6 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/iop33x.h> | 10 | #include <mach/iop33x.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | mrc p15, 0, \tmp, c15, c1, 0 | 13 | mrc p15, 0, \tmp, c15, c1, 0 |
17 | orr \tmp, \tmp, #(1 << 6) | 14 | orr \tmp, \tmp, #(1 << 6) |
diff --git a/arch/arm/mach-iop33x/include/mach/system.h b/arch/arm/mach-iop33x/include/mach/system.h deleted file mode 100644 index 4f98e765397c..000000000000 --- a/arch/arm/mach-iop33x/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-iop33x/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2001 MontaVista Software, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-ixp2000/include/mach/entry-macro.S b/arch/arm/mach-ixp2000/include/mach/entry-macro.S index 5850ffc8c751..c4444dff9202 100644 --- a/arch/arm/mach-ixp2000/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp2000/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/irqs.h> | 10 | #include <mach/irqs.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 16 | ||
23 | mov \irqnr, #0x0 @clear out irqnr as default | 17 | mov \irqnr, #0x0 @clear out irqnr as default |
diff --git a/arch/arm/mach-ixp2000/include/mach/system.h b/arch/arm/mach-ixp2000/include/mach/system.h deleted file mode 100644 index a7fb08b2b8e7..000000000000 --- a/arch/arm/mach-ixp2000/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp2000/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corp. | ||
5 | * Copyricht (C) 2003-2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 0923bb905cc0..7c1495e4fe7a 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c | |||
@@ -441,6 +441,9 @@ static struct platform_device *ixp23xx_devices[] __initdata = { | |||
441 | 441 | ||
442 | void __init ixp23xx_sys_init(void) | 442 | void __init ixp23xx_sys_init(void) |
443 | { | 443 | { |
444 | /* by default, the idle code is disabled */ | ||
445 | disable_hlt(); | ||
446 | |||
444 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; | 447 | *IXP23XX_EXP_UNIT_FUSE |= 0xf; |
445 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); | 448 | platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); |
446 | } | 449 | } |
diff --git a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S index 3f5338a7bbdd..3fd2cb984e42 100644 --- a/arch/arm/mach-ixp23xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp23xx/include/mach/entry-macro.S | |||
@@ -2,15 +2,9 @@ | |||
2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S | 2 | * arch/arm/mach-ixp23xx/include/mach/entry-macro.S |
3 | */ | 3 | */ |
4 | 4 | ||
5 | .macro disable_fiq | ||
6 | .endm | ||
7 | |||
8 | .macro get_irqnr_preamble, base, tmp | 5 | .macro get_irqnr_preamble, base, tmp |
9 | .endm | 6 | .endm |
10 | 7 | ||
11 | .macro arch_ret_to_user, tmp1, tmp2 | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 8 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
15 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) | 9 | ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET) |
16 | ldr \irqnr, [\irqnr] @ get interrupt number | 10 | ldr \irqnr, [\irqnr] @ get interrupt number |
diff --git a/arch/arm/mach-ixp23xx/include/mach/system.h b/arch/arm/mach-ixp23xx/include/mach/system.h deleted file mode 100644 index 277dda7334b9..000000000000 --- a/arch/arm/mach-ixp23xx/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp23xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | #if 0 | ||
13 | if (!hlt_counter) | ||
14 | cpu_do_idle(); | ||
15 | #endif | ||
16 | } | ||
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c index 3841ab4146ba..a6329a0a8ec4 100644 --- a/arch/arm/mach-ixp4xx/common.c +++ b/arch/arm/mach-ixp4xx/common.c | |||
@@ -236,6 +236,12 @@ void __init ixp4xx_init_irq(void) | |||
236 | { | 236 | { |
237 | int i = 0; | 237 | int i = 0; |
238 | 238 | ||
239 | /* | ||
240 | * ixp4xx does not implement the XScale PWRMODE register | ||
241 | * so it must not call cpu_do_idle(). | ||
242 | */ | ||
243 | disable_hlt(); | ||
244 | |||
239 | /* Route all sources to IRQ instead of FIQ */ | 245 | /* Route all sources to IRQ instead of FIQ */ |
240 | *IXP4XX_ICLR = 0x0; | 246 | *IXP4XX_ICLR = 0x0; |
241 | 247 | ||
diff --git a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S index f2e14e94ed15..79adf83e2c3d 100644 --- a/arch/arm/mach-ixp4xx/include/mach/entry-macro.S +++ b/arch/arm/mach-ixp4xx/include/mach/entry-macro.S | |||
@@ -9,15 +9,9 @@ | |||
9 | */ | 9 | */ |
10 | #include <mach/hardware.h> | 10 | #include <mach/hardware.h> |
11 | 11 | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro get_irqnr_preamble, base, tmp | 12 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 13 | .endm |
17 | 14 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 15 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) | 16 | ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET) |
23 | ldr \irqstat, [\irqstat] @ get interrupts | 17 | ldr \irqstat, [\irqstat] @ get interrupts |
diff --git a/arch/arm/mach-ixp4xx/include/mach/system.h b/arch/arm/mach-ixp4xx/include/mach/system.h deleted file mode 100644 index 140a9bef4466..000000000000 --- a/arch/arm/mach-ixp4xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-ixp4xx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2002 Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* ixp4xx does not implement the XScale PWRMODE register, | ||
14 | * so it must not call cpu_do_idle() here. | ||
15 | */ | ||
16 | #if 0 | ||
17 | cpu_do_idle(); | ||
18 | #endif | ||
19 | } | ||
diff --git a/arch/arm/mach-kirkwood/include/mach/entry-macro.S b/arch/arm/mach-kirkwood/include/mach/entry-macro.S index 8939d36f893c..82db29f7af8f 100644 --- a/arch/arm/mach-kirkwood/include/mach/entry-macro.S +++ b/arch/arm/mach-kirkwood/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-kirkwood/include/mach/system.h b/arch/arm/mach-kirkwood/include/mach/system.h deleted file mode 100644 index 5fddde002b5e..000000000000 --- a/arch/arm/mach-kirkwood/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-ks8695/include/mach/entry-macro.S b/arch/arm/mach-ks8695/include/mach/entry-macro.S index b4fe0c11c6ce..8315b34f32ff 100644 --- a/arch/arm/mach-ks8695/include/mach/entry-macro.S +++ b/arch/arm/mach-ks8695/include/mach/entry-macro.S | |||
@@ -14,16 +14,10 @@ | |||
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/regs-irq.h> | 15 | #include <mach/regs-irq.h> |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller | 18 | ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller |
22 | .endm | 19 | .endm |
23 | 20 | ||
24 | .macro arch_ret_to_user, tmp1, tmp2 | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
28 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register | 22 | ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register |
29 | 23 | ||
diff --git a/arch/arm/mach-ks8695/include/mach/system.h b/arch/arm/mach-ks8695/include/mach/system.h deleted file mode 100644 index 59fe992395bf..000000000000 --- a/arch/arm/mach-ks8695/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-s3c2410/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2006 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * | ||
7 | * KS8695 - System function defines and includes | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License version 2 as | ||
11 | * published by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks, | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | |||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S index b725f6c93975..24ca11b377c8 100644 --- a/arch/arm/mach-lpc32xx/include/mach/entry-macro.S +++ b/arch/arm/mach-lpc32xx/include/mach/entry-macro.S | |||
@@ -21,16 +21,10 @@ | |||
21 | 21 | ||
22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 | 22 | #define LPC32XX_INTC_MASKED_STATUS_OFS 0x8 |
23 | 23 | ||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro get_irqnr_preamble, base, tmp | 24 | .macro get_irqnr_preamble, base, tmp |
28 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) | 25 | ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE) |
29 | .endm | 26 | .endm |
30 | 27 | ||
31 | .macro arch_ret_to_user, tmp1, tmp2 | ||
32 | .endm | ||
33 | |||
34 | /* | 28 | /* |
35 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR | 29 | * Return IRQ number in irqnr. Also return processor Z flag status in CPSR |
36 | * as set if an interrupt is pending. | 30 | * as set if an interrupt is pending. |
diff --git a/arch/arm/mach-lpc32xx/include/mach/system.h b/arch/arm/mach-lpc32xx/include/mach/system.h deleted file mode 100644 index bf176c991520..000000000000 --- a/arch/arm/mach-lpc32xx/include/mach/system.h +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-lpc32xx/include/mach/system.h | ||
3 | * | ||
4 | * Author: Kevin Wells <kevin.wells@nxp.com> | ||
5 | * | ||
6 | * Copyright (C) 2010 NXP Semiconductors | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bfee5b455105..5d51c102c255 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c | |||
@@ -149,20 +149,8 @@ static struct clcd_board lpc32xx_clcd_data = { | |||
149 | .remove = lpc32xx_clcd_remove, | 149 | .remove = lpc32xx_clcd_remove, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static struct amba_device lpc32xx_clcd_device = { | 152 | static AMBA_AHB_DEVICE(lpc32xx_clcd, "dev:clcd", 0, |
153 | .dev = { | 153 | LPC32XX_LCD_BASE, { IRQ_LPC32XX_LCD }, &lpc32xx_clcd_data); |
154 | .coherent_dma_mask = ~0, | ||
155 | .init_name = "dev:clcd", | ||
156 | .platform_data = &lpc32xx_clcd_data, | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = LPC32XX_LCD_BASE, | ||
160 | .end = (LPC32XX_LCD_BASE + SZ_4K - 1), | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .dma_mask = ~0, | ||
164 | .irq = {IRQ_LPC32XX_LCD, NO_IRQ}, | ||
165 | }; | ||
166 | 154 | ||
167 | /* | 155 | /* |
168 | * AMBA SSP (SPI) | 156 | * AMBA SSP (SPI) |
@@ -191,20 +179,8 @@ static struct pl022_ssp_controller lpc32xx_ssp0_data = { | |||
191 | .enable_dma = 0, | 179 | .enable_dma = 0, |
192 | }; | 180 | }; |
193 | 181 | ||
194 | static struct amba_device lpc32xx_ssp0_device = { | 182 | static AMBA_APB_DEVICE(lpc32xx_ssp0, "dev:ssp0", 0, |
195 | .dev = { | 183 | LPC32XX_SSP0_BASE, { IRQ_LPC32XX_SSP0 }, &lpc32xx_ssp0_data); |
196 | .coherent_dma_mask = ~0, | ||
197 | .init_name = "dev:ssp0", | ||
198 | .platform_data = &lpc32xx_ssp0_data, | ||
199 | }, | ||
200 | .res = { | ||
201 | .start = LPC32XX_SSP0_BASE, | ||
202 | .end = (LPC32XX_SSP0_BASE + SZ_4K - 1), | ||
203 | .flags = IORESOURCE_MEM, | ||
204 | }, | ||
205 | .dma_mask = ~0, | ||
206 | .irq = {IRQ_LPC32XX_SSP0, NO_IRQ}, | ||
207 | }; | ||
208 | 184 | ||
209 | /* AT25 driver registration */ | 185 | /* AT25 driver registration */ |
210 | static int __init phy3250_spi_board_register(void) | 186 | static int __init phy3250_spi_board_register(void) |
diff --git a/arch/arm/mach-mmp/include/mach/entry-macro.S b/arch/arm/mach-mmp/include/mach/entry-macro.S index c42d9d4e892d..9cff9e7a2b26 100644 --- a/arch/arm/mach-mmp/include/mach/entry-macro.S +++ b/arch/arm/mach-mmp/include/mach/entry-macro.S | |||
@@ -8,12 +8,6 @@ | |||
8 | 8 | ||
9 | #include <mach/regs-icu.h> | 9 | #include <mach/regs-icu.h> |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
17 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
18 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID | 12 | mrc p15, 0, \tmp, c0, c0, 0 @ CPUID |
19 | and \tmp, \tmp, #0xff00 | 13 | and \tmp, \tmp, #0xff00 |
diff --git a/arch/arm/mach-mmp/include/mach/system.h b/arch/arm/mach-mmp/include/mach/system.h deleted file mode 100644 index 1d001eab81e1..000000000000 --- a/arch/arm/mach-mmp/include/mach/system.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * linux/arch/arm/mach-mmp/include/mach/system.h | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License version 2 as | ||
6 | * published by the Free Software Foundation. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_MACH_SYSTEM_H | ||
10 | #define __ASM_MACH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | #endif /* __ASM_MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-msm/idle.S b/arch/arm/mach-msm/idle.S deleted file mode 100644 index 6a94f0527137..000000000000 --- a/arch/arm/mach-msm/idle.S +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* arch/arm/mach-msm/include/mach/idle.S | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/linkage.h> | ||
20 | #include <asm/assembler.h> | ||
21 | |||
22 | ENTRY(arch_idle) | ||
23 | #ifdef CONFIG_MSM7X00A_IDLE | ||
24 | mrc p15, 0, r1, c1, c0, 0 /* read current CR */ | ||
25 | bic r0, r1, #(1 << 2) /* clear dcache bit */ | ||
26 | bic r0, r0, #(1 << 12) /* clear icache bit */ | ||
27 | mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ | ||
28 | |||
29 | mov r0, #0 /* prepare wfi value */ | ||
30 | mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ | ||
31 | mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ | ||
32 | mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ | ||
33 | |||
34 | mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ | ||
35 | #endif | ||
36 | mov pc, lr | ||
diff --git a/arch/arm/mach-msm/idle.c b/arch/arm/mach-msm/idle.c new file mode 100644 index 000000000000..0c9e13c65743 --- /dev/null +++ b/arch/arm/mach-msm/idle.c | |||
@@ -0,0 +1,49 @@ | |||
1 | /* arch/arm/mach-msm/idle.c | ||
2 | * | ||
3 | * Idle processing for MSM7K - work around bugs with SWFI. | ||
4 | * | ||
5 | * Copyright (c) 2007 QUALCOMM Incorporated. | ||
6 | * Copyright (C) 2007 Google, Inc. | ||
7 | * | ||
8 | * This software is licensed under the terms of the GNU General Public | ||
9 | * License version 2, as published by the Free Software Foundation, and | ||
10 | * may be copied, distributed, and modified under those terms. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | */ | ||
18 | |||
19 | #include <linux/init.h> | ||
20 | #include <asm/system.h> | ||
21 | |||
22 | static void msm_idle(void) | ||
23 | { | ||
24 | #ifdef CONFIG_MSM7X00A_IDLE | ||
25 | asm volatile ( | ||
26 | |||
27 | "mrc p15, 0, r1, c1, c0, 0 /* read current CR */ \n\t" | ||
28 | "bic r0, r1, #(1 << 2) /* clear dcache bit */ \n\t" | ||
29 | "bic r0, r0, #(1 << 12) /* clear icache bit */ \n\t" | ||
30 | "mcr p15, 0, r0, c1, c0, 0 /* disable d/i cache */ \n\t" | ||
31 | |||
32 | "mov r0, #0 /* prepare wfi value */ \n\t" | ||
33 | "mcr p15, 0, r0, c7, c10, 0 /* flush the cache */ \n\t" | ||
34 | "mcr p15, 0, r0, c7, c10, 4 /* memory barrier */ \n\t" | ||
35 | "mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */ \n\t" | ||
36 | |||
37 | "mcr p15, 0, r1, c1, c0, 0 /* restore d/i cache */ \n\t" | ||
38 | |||
39 | : : : "r0","r1" ); | ||
40 | #endif | ||
41 | } | ||
42 | |||
43 | static int __init msm_idle_init(void) | ||
44 | { | ||
45 | arm_pm_idle = msm_idle; | ||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | arch_initcall(msm_idle_init); | ||
diff --git a/arch/arm/mach-msm/include/mach/entry-macro.S b/arch/arm/mach-msm/include/mach/entry-macro.S index 41f7003ef34f..f2ae9087f654 100644 --- a/arch/arm/mach-msm/include/mach/entry-macro.S +++ b/arch/arm/mach-msm/include/mach/entry-macro.S | |||
@@ -16,12 +16,6 @@ | |||
16 | * | 16 | * |
17 | */ | 17 | */ |
18 | 18 | ||
19 | .macro disable_fiq | ||
20 | .endm | ||
21 | |||
22 | .macro arch_ret_to_user, tmp1, tmp2 | ||
23 | .endm | ||
24 | |||
25 | #if !defined(CONFIG_ARM_GIC) | 19 | #if !defined(CONFIG_ARM_GIC) |
26 | #include <mach/msm_iomap.h> | 20 | #include <mach/msm_iomap.h> |
27 | 21 | ||
diff --git a/arch/arm/mach-msm/include/mach/system.h b/arch/arm/mach-msm/include/mach/system.h index 311db2b35da0..f5fb2ec87ffe 100644 --- a/arch/arm/mach-msm/include/mach/system.h +++ b/arch/arm/mach-msm/include/mach/system.h | |||
@@ -12,7 +12,6 @@ | |||
12 | * GNU General Public License for more details. | 12 | * GNU General Public License for more details. |
13 | * | 13 | * |
14 | */ | 14 | */ |
15 | void arch_idle(void); | ||
16 | 15 | ||
17 | /* low level hardware reset hook -- for example, hitting the | 16 | /* low level hardware reset hook -- for example, hitting the |
18 | * PSHOLD line on the PMIC to hard reset the system | 17 | * PSHOLD line on the PMIC to hard reset the system |
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S index 66ae2d29e773..6b1f088e0597 100644 --- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S +++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =IRQ_VIRT_BASE | 14 | ldr \base, =IRQ_VIRT_BASE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-mv78xx0/include/mach/system.h b/arch/arm/mach-mv78xx0/include/mach/system.h deleted file mode 100644 index 8c3a5387cec7..000000000000 --- a/arch/arm/mach-mv78xx0/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-mv78xx0/include/mach/system.h | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | #ifndef __ASM_ARCH_SYSTEM_H | ||
10 | #define __ASM_ARCH_SYSTEM_H | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-mxs/devices.c b/arch/arm/mach-mxs/devices.c index fe3e847930c9..01faffec3064 100644 --- a/arch/arm/mach-mxs/devices.c +++ b/arch/arm/mach-mxs/devices.c | |||
@@ -77,16 +77,18 @@ err: | |||
77 | 77 | ||
78 | int __init mxs_add_amba_device(const struct amba_device *dev) | 78 | int __init mxs_add_amba_device(const struct amba_device *dev) |
79 | { | 79 | { |
80 | struct amba_device *adev = kmalloc(sizeof(*adev), GFP_KERNEL); | 80 | struct amba_device *adev = amba_device_alloc(dev->dev.init_name, |
81 | dev->res.start, resource_size(&dev->res)); | ||
81 | 82 | ||
82 | if (!adev) { | 83 | if (!adev) { |
83 | pr_err("%s: failed to allocate memory", __func__); | 84 | pr_err("%s: failed to allocate memory", __func__); |
84 | return -ENOMEM; | 85 | return -ENOMEM; |
85 | } | 86 | } |
86 | 87 | ||
87 | *adev = *dev; | 88 | adev->irq[0] = dev->irq[0]; |
89 | adev->irq[1] = dev->irq[1]; | ||
88 | 90 | ||
89 | return amba_device_register(adev, &iomem_resource); | 91 | return amba_device_add(adev, &iomem_resource); |
90 | } | 92 | } |
91 | 93 | ||
92 | struct device mxs_apbh_bus = { | 94 | struct device mxs_apbh_bus = { |
diff --git a/arch/arm/mach-mxs/devices/amba-duart.c b/arch/arm/mach-mxs/devices/amba-duart.c index a559db09b49c..a5479f766046 100644 --- a/arch/arm/mach-mxs/devices/amba-duart.c +++ b/arch/arm/mach-mxs/devices/amba-duart.c | |||
@@ -23,7 +23,7 @@ const struct amba_device name##_device __initconst = { \ | |||
23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ | 23 | .end = (soc ## _DUART_BASE_ADDR) + SZ_8K - 1, \ |
24 | .flags = IORESOURCE_MEM, \ | 24 | .flags = IORESOURCE_MEM, \ |
25 | }, \ | 25 | }, \ |
26 | .irq = {soc ## _INT_DUART, NO_IRQ}, \ | 26 | .irq = {soc ## _INT_DUART}, \ |
27 | } | 27 | } |
28 | 28 | ||
29 | #ifdef CONFIG_SOC_IMX23 | 29 | #ifdef CONFIG_SOC_IMX23 |
diff --git a/arch/arm/mach-mxs/include/mach/entry-macro.S b/arch/arm/mach-mxs/include/mach/entry-macro.S index 9f0da12e657a..0c14259705b9 100644 --- a/arch/arm/mach-mxs/include/mach/entry-macro.S +++ b/arch/arm/mach-mxs/include/mach/entry-macro.S | |||
@@ -23,9 +23,6 @@ | |||
23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) | 23 | #define MXS_ICOLL_VBASE MXS_IO_ADDRESS(MXS_ICOLL_BASE_ADDR) |
24 | #define HW_ICOLL_STAT_OFFSET 0x70 | 24 | #define HW_ICOLL_STAT_OFFSET 0x70 |
25 | 25 | ||
26 | .macro disable_fiq | ||
27 | .endm | ||
28 | |||
29 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
30 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] | 27 | ldr \irqnr, [\base, #HW_ICOLL_STAT_OFFSET] |
31 | cmp \irqnr, #0x7F | 28 | cmp \irqnr, #0x7F |
@@ -36,6 +33,3 @@ | |||
36 | .macro get_irqnr_preamble, base, tmp | 33 | .macro get_irqnr_preamble, base, tmp |
37 | ldr \base, =MXS_ICOLL_VBASE | 34 | ldr \base, =MXS_ICOLL_VBASE |
38 | .endm | 35 | .endm |
39 | |||
40 | .macro arch_ret_to_user, tmp1, tmp2 | ||
41 | .endm | ||
diff --git a/arch/arm/mach-mxs/include/mach/system.h b/arch/arm/mach-mxs/include/mach/system.h deleted file mode 100644 index e7ad1bb29423..000000000000 --- a/arch/arm/mach-mxs/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __MACH_MXS_SYSTEM_H__ | ||
18 | #define __MACH_MXS_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __MACH_MXS_SYSTEM_H__ */ | ||
diff --git a/arch/arm/mach-mxs/pm.c b/arch/arm/mach-mxs/pm.c index fb042da29bda..a9b4bbcdafb4 100644 --- a/arch/arm/mach-mxs/pm.c +++ b/arch/arm/mach-mxs/pm.c | |||
@@ -15,13 +15,12 @@ | |||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/suspend.h> | 16 | #include <linux/suspend.h> |
17 | #include <linux/io.h> | 17 | #include <linux/io.h> |
18 | #include <mach/system.h> | ||
19 | 18 | ||
20 | static int mxs_suspend_enter(suspend_state_t state) | 19 | static int mxs_suspend_enter(suspend_state_t state) |
21 | { | 20 | { |
22 | switch (state) { | 21 | switch (state) { |
23 | case PM_SUSPEND_MEM: | 22 | case PM_SUSPEND_MEM: |
24 | arch_idle(); | 23 | cpu_do_idle(); |
25 | break; | 24 | break; |
26 | 25 | ||
27 | default: | 26 | default: |
diff --git a/arch/arm/mach-netx/fb.c b/arch/arm/mach-netx/fb.c index b9913234bbf6..2cdf6ef69bee 100644 --- a/arch/arm/mach-netx/fb.c +++ b/arch/arm/mach-netx/fb.c | |||
@@ -92,18 +92,7 @@ void clk_put(struct clk *clk) | |||
92 | { | 92 | { |
93 | } | 93 | } |
94 | 94 | ||
95 | static struct amba_device fb_device = { | 95 | static AMBA_AHB_DEVICE(fb, "fb", 0, 0x00104000, { NETX_IRQ_LCD }, NULL); |
96 | .dev = { | ||
97 | .init_name = "fb", | ||
98 | .coherent_dma_mask = ~0, | ||
99 | }, | ||
100 | .res = { | ||
101 | .start = 0x00104000, | ||
102 | .end = 0x00104fff, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | .irq = { NETX_IRQ_LCD, NO_IRQ }, | ||
106 | }; | ||
107 | 96 | ||
108 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) | 97 | int netx_fb_init(struct clcd_board *board, struct clcd_panel *panel) |
109 | { | 98 | { |
diff --git a/arch/arm/mach-netx/include/mach/entry-macro.S b/arch/arm/mach-netx/include/mach/entry-macro.S deleted file mode 100644 index 6e9f1cbe1634..000000000000 --- a/arch/arm/mach-netx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Hilscher netX based platforms | ||
5 | * | ||
6 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 | ||
10 | * as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | .macro disable_fiq | ||
23 | .endm | ||
24 | |||
25 | .macro arch_ret_to_user, tmp1, tmp2 | ||
26 | .endm | ||
diff --git a/arch/arm/mach-netx/include/mach/system.h b/arch/arm/mach-netx/include/mach/system.h deleted file mode 100644 index b38fa36d58c4..000000000000 --- a/arch/arm/mach-netx/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-netx/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 | ||
8 | * as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #ifndef __ASM_ARCH_SYSTEM_H | ||
20 | #define __ASM_ARCH_SYSTEM_H | ||
21 | |||
22 | static inline void arch_idle(void) | ||
23 | { | ||
24 | cpu_do_idle(); | ||
25 | } | ||
26 | |||
27 | #endif | ||
28 | |||
diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index b77cb8465d31..58cacafcf662 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c | |||
@@ -185,20 +185,11 @@ static void __init nhk8815_onenand_init(void) | |||
185 | #endif | 185 | #endif |
186 | } | 186 | } |
187 | 187 | ||
188 | #define __MEM_4K_RESOURCE(x) \ | 188 | static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, |
189 | .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} | 189 | { IRQ_UART0 }, NULL); |
190 | 190 | ||
191 | static struct amba_device uart0_device = { | 191 | static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, |
192 | .dev = { .init_name = "uart0" }, | 192 | { IRQ_UART1 }, NULL); |
193 | __MEM_4K_RESOURCE(NOMADIK_UART0_BASE), | ||
194 | .irq = {IRQ_UART0, NO_IRQ}, | ||
195 | }; | ||
196 | |||
197 | static struct amba_device uart1_device = { | ||
198 | .dev = { .init_name = "uart1" }, | ||
199 | __MEM_4K_RESOURCE(NOMADIK_UART1_BASE), | ||
200 | .irq = {IRQ_UART1, NO_IRQ}, | ||
201 | }; | ||
202 | 193 | ||
203 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
204 | &uart0_device, | 195 | &uart0_device, |
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 65df7b4fdd3e..27f43a46985e 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c | |||
@@ -97,12 +97,7 @@ static struct platform_device cpu8815_platform_gpio[] = { | |||
97 | GPIO_DEVICE(3), | 97 | GPIO_DEVICE(3), |
98 | }; | 98 | }; |
99 | 99 | ||
100 | static struct amba_device cpu8815_amba_rng = { | 100 | static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); |
101 | .dev = { | ||
102 | .init_name = "rng", | ||
103 | }, | ||
104 | __MEM_4K_RESOURCE(NOMADIK_RNG_BASE), | ||
105 | }; | ||
106 | 101 | ||
107 | static struct platform_device *platform_devs[] __initdata = { | 102 | static struct platform_device *platform_devs[] __initdata = { |
108 | cpu8815_platform_gpio + 0, | 103 | cpu8815_platform_gpio + 0, |
@@ -112,7 +107,7 @@ static struct platform_device *platform_devs[] __initdata = { | |||
112 | }; | 107 | }; |
113 | 108 | ||
114 | static struct amba_device *amba_devs[] __initdata = { | 109 | static struct amba_device *amba_devs[] __initdata = { |
115 | &cpu8815_amba_rng | 110 | &cpu8815_amba_rng_device |
116 | }; | 111 | }; |
117 | 112 | ||
118 | static int __init cpu8815_init(void) | 113 | static int __init cpu8815_init(void) |
diff --git a/arch/arm/mach-nomadik/include/mach/entry-macro.S b/arch/arm/mach-nomadik/include/mach/entry-macro.S deleted file mode 100644 index 98ea1c1fbbab..000000000000 --- a/arch/arm/mach-nomadik/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for Nomadik platforms | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | |||
9 | .macro disable_fiq | ||
10 | .endm | ||
11 | |||
12 | .macro arch_ret_to_user, tmp1, tmp2 | ||
13 | .endm | ||
diff --git a/arch/arm/mach-nomadik/include/mach/system.h b/arch/arm/mach-nomadik/include/mach/system.h deleted file mode 100644 index 25e198b8976c..000000000000 --- a/arch/arm/mach-nomadik/include/mach/system.h +++ /dev/null | |||
@@ -1,32 +0,0 @@ | |||
1 | /* | ||
2 | * mach-nomadik/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2008 STMicroelectronics | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #ifndef __ASM_ARCH_SYSTEM_H | ||
21 | #define __ASM_ARCH_SYSTEM_H | ||
22 | |||
23 | static inline void arch_idle(void) | ||
24 | { | ||
25 | /* | ||
26 | * This should do all the clock switching | ||
27 | * and wait for interrupt tricks | ||
28 | */ | ||
29 | cpu_do_idle(); | ||
30 | } | ||
31 | |||
32 | #endif | ||
diff --git a/arch/arm/mach-omap1/include/mach/entry-macro.S b/arch/arm/mach-omap1/include/mach/entry-macro.S index bfb4fb1d7382..83c0250c530a 100644 --- a/arch/arm/mach-omap1/include/mach/entry-macro.S +++ b/arch/arm/mach-omap1/include/mach/entry-macro.S | |||
@@ -14,15 +14,9 @@ | |||
14 | #include <mach/irqs.h> | 14 | #include <mach/irqs.h> |
15 | #include <asm/hardware/gic.h> | 15 | #include <asm/hardware/gic.h> |
16 | 16 | ||
17 | .macro disable_fiq | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | .endm | 18 | .endm |
22 | 19 | ||
23 | .macro arch_ret_to_user, tmp1, tmp2 | ||
24 | .endm | ||
25 | |||
26 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
27 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) | 21 | ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE) |
28 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] | 22 | ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET] |
diff --git a/arch/arm/mach-omap1/include/mach/system.h b/arch/arm/mach-omap1/include/mach/system.h deleted file mode 100644 index a6c1b3a16dfc..000000000000 --- a/arch/arm/mach-omap1/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap1/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap1/pm.c b/arch/arm/mach-omap1/pm.c index 89ea20ca0ccc..0c2c3669d594 100644 --- a/arch/arm/mach-omap1/pm.c +++ b/arch/arm/mach-omap1/pm.c | |||
@@ -42,9 +42,9 @@ | |||
42 | #include <linux/sysfs.h> | 42 | #include <linux/sysfs.h> |
43 | #include <linux/module.h> | 43 | #include <linux/module.h> |
44 | #include <linux/io.h> | 44 | #include <linux/io.h> |
45 | #include <linux/atomic.h> | ||
45 | 46 | ||
46 | #include <asm/irq.h> | 47 | #include <asm/irq.h> |
47 | #include <linux/atomic.h> | ||
48 | #include <asm/mach/time.h> | 48 | #include <asm/mach/time.h> |
49 | #include <asm/mach/irq.h> | 49 | #include <asm/mach/irq.h> |
50 | 50 | ||
@@ -108,13 +108,7 @@ void omap1_pm_idle(void) | |||
108 | __u32 use_idlect1 = arm_idlect1_mask; | 108 | __u32 use_idlect1 = arm_idlect1_mask; |
109 | int do_sleep = 0; | 109 | int do_sleep = 0; |
110 | 110 | ||
111 | local_irq_disable(); | ||
112 | local_fiq_disable(); | 111 | local_fiq_disable(); |
113 | if (need_resched()) { | ||
114 | local_fiq_enable(); | ||
115 | local_irq_enable(); | ||
116 | return; | ||
117 | } | ||
118 | 112 | ||
119 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) | 113 | #if defined(CONFIG_OMAP_MPU_TIMER) && !defined(CONFIG_OMAP_DM_TIMER) |
120 | #warning Enable 32kHz OS timer in order to allow sleep states in idle | 114 | #warning Enable 32kHz OS timer in order to allow sleep states in idle |
@@ -157,14 +151,12 @@ void omap1_pm_idle(void) | |||
157 | omap_writel(saved_idlect1, ARM_IDLECT1); | 151 | omap_writel(saved_idlect1, ARM_IDLECT1); |
158 | 152 | ||
159 | local_fiq_enable(); | 153 | local_fiq_enable(); |
160 | local_irq_enable(); | ||
161 | return; | 154 | return; |
162 | } | 155 | } |
163 | omap_sram_suspend(omap_readl(ARM_IDLECT1), | 156 | omap_sram_suspend(omap_readl(ARM_IDLECT1), |
164 | omap_readl(ARM_IDLECT2)); | 157 | omap_readl(ARM_IDLECT2)); |
165 | 158 | ||
166 | local_fiq_enable(); | 159 | local_fiq_enable(); |
167 | local_irq_enable(); | ||
168 | } | 160 | } |
169 | 161 | ||
170 | /* | 162 | /* |
@@ -583,8 +575,6 @@ static void omap_pm_init_proc(void) | |||
583 | 575 | ||
584 | #endif /* DEBUG && CONFIG_PROC_FS */ | 576 | #endif /* DEBUG && CONFIG_PROC_FS */ |
585 | 577 | ||
586 | static void (*saved_idle)(void) = NULL; | ||
587 | |||
588 | /* | 578 | /* |
589 | * omap_pm_prepare - Do preliminary suspend work. | 579 | * omap_pm_prepare - Do preliminary suspend work. |
590 | * | 580 | * |
@@ -592,8 +582,7 @@ static void (*saved_idle)(void) = NULL; | |||
592 | static int omap_pm_prepare(void) | 582 | static int omap_pm_prepare(void) |
593 | { | 583 | { |
594 | /* We cannot sleep in idle until we have resumed */ | 584 | /* We cannot sleep in idle until we have resumed */ |
595 | saved_idle = pm_idle; | 585 | disable_hlt(); |
596 | pm_idle = NULL; | ||
597 | 586 | ||
598 | return 0; | 587 | return 0; |
599 | } | 588 | } |
@@ -630,7 +619,7 @@ static int omap_pm_enter(suspend_state_t state) | |||
630 | 619 | ||
631 | static void omap_pm_finish(void) | 620 | static void omap_pm_finish(void) |
632 | { | 621 | { |
633 | pm_idle = saved_idle; | 622 | enable_hlt(); |
634 | } | 623 | } |
635 | 624 | ||
636 | 625 | ||
@@ -687,7 +676,7 @@ static int __init omap_pm_init(void) | |||
687 | return -ENODEV; | 676 | return -ENODEV; |
688 | } | 677 | } |
689 | 678 | ||
690 | pm_idle = omap1_pm_idle; | 679 | arm_pm_idle = omap1_pm_idle; |
691 | 680 | ||
692 | if (cpu_is_omap7xx()) | 681 | if (cpu_is_omap7xx()) |
693 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); | 682 | setup_irq(INT_7XX_WAKE_UP_REQ, &omap_wakeup_irq); |
diff --git a/arch/arm/mach-omap2/emu.c b/arch/arm/mach-omap2/emu.c index 9c442e290ccb..ce91aad4cdad 100644 --- a/arch/arm/mach-omap2/emu.c +++ b/arch/arm/mach-omap2/emu.c | |||
@@ -30,29 +30,8 @@ MODULE_AUTHOR("Alexander Shishkin"); | |||
30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) | 30 | #define ETB_BASE (L4_EMU_34XX_PHYS + 0x1b000) |
31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) | 31 | #define DAPCTL (L4_EMU_34XX_PHYS + 0x1d000) |
32 | 32 | ||
33 | static struct amba_device omap3_etb_device = { | 33 | static AMBA_APB_DEVICE(omap3_etb, "etb", 0x000bb907, ETB_BASE, { }, NULL); |
34 | .dev = { | 34 | static AMBA_APB_DEVICE(omap3_etm, "etm", 0x102bb921, ETM_BASE, { }, NULL); |
35 | .init_name = "etb", | ||
36 | }, | ||
37 | .res = { | ||
38 | .start = ETB_BASE, | ||
39 | .end = ETB_BASE + SZ_4K - 1, | ||
40 | .flags = IORESOURCE_MEM, | ||
41 | }, | ||
42 | .periphid = 0x000bb907, | ||
43 | }; | ||
44 | |||
45 | static struct amba_device omap3_etm_device = { | ||
46 | .dev = { | ||
47 | .init_name = "etm", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = ETM_BASE, | ||
51 | .end = ETM_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .periphid = 0x102bb921, | ||
55 | }; | ||
56 | 35 | ||
57 | static int __init emu_init(void) | 36 | static int __init emu_init(void) |
58 | { | 37 | { |
@@ -66,4 +45,3 @@ static int __init emu_init(void) | |||
66 | } | 45 | } |
67 | 46 | ||
68 | subsys_initcall(emu_init); | 47 | subsys_initcall(emu_init); |
69 | |||
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S deleted file mode 100644 index 56964a0c4c7e..000000000000 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-omap/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for OMAP-based platforms | ||
5 | * | ||
6 | * Copyright (C) 2009 Texas Instruments | ||
7 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-omap2/include/mach/system.h b/arch/arm/mach-omap2/include/mach/system.h deleted file mode 100644 index d488721ab90b..000000000000 --- a/arch/arm/mach-omap2/include/mach/system.h +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-omap2/include/mach/system.h | ||
3 | */ | ||
4 | |||
5 | #include <plat/system.h> | ||
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index 23de98d03841..a4eb5c280435 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c | |||
@@ -226,7 +226,6 @@ static int omap2_can_sleep(void) | |||
226 | 226 | ||
227 | static void omap2_pm_idle(void) | 227 | static void omap2_pm_idle(void) |
228 | { | 228 | { |
229 | local_irq_disable(); | ||
230 | local_fiq_disable(); | 229 | local_fiq_disable(); |
231 | 230 | ||
232 | if (!omap2_can_sleep()) { | 231 | if (!omap2_can_sleep()) { |
@@ -243,7 +242,6 @@ static void omap2_pm_idle(void) | |||
243 | 242 | ||
244 | out: | 243 | out: |
245 | local_fiq_enable(); | 244 | local_fiq_enable(); |
246 | local_irq_enable(); | ||
247 | } | 245 | } |
248 | 246 | ||
249 | #ifdef CONFIG_SUSPEND | 247 | #ifdef CONFIG_SUSPEND |
@@ -462,7 +460,7 @@ static int __init omap2_pm_init(void) | |||
462 | } | 460 | } |
463 | 461 | ||
464 | suspend_set_ops(&omap_pm_ops); | 462 | suspend_set_ops(&omap_pm_ops); |
465 | pm_idle = omap2_pm_idle; | 463 | arm_pm_idle = omap2_pm_idle; |
466 | 464 | ||
467 | return 0; | 465 | return 0; |
468 | } | 466 | } |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fc6987578920..b77df735fa6c 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -418,10 +418,9 @@ void omap_sram_idle(void) | |||
418 | 418 | ||
419 | static void omap3_pm_idle(void) | 419 | static void omap3_pm_idle(void) |
420 | { | 420 | { |
421 | local_irq_disable(); | ||
422 | local_fiq_disable(); | 421 | local_fiq_disable(); |
423 | 422 | ||
424 | if (omap_irq_pending() || need_resched()) | 423 | if (omap_irq_pending()) |
425 | goto out; | 424 | goto out; |
426 | 425 | ||
427 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); | 426 | trace_power_start(POWER_CSTATE, 1, smp_processor_id()); |
@@ -434,7 +433,6 @@ static void omap3_pm_idle(void) | |||
434 | 433 | ||
435 | out: | 434 | out: |
436 | local_fiq_enable(); | 435 | local_fiq_enable(); |
437 | local_irq_enable(); | ||
438 | } | 436 | } |
439 | 437 | ||
440 | #ifdef CONFIG_SUSPEND | 438 | #ifdef CONFIG_SUSPEND |
@@ -848,7 +846,7 @@ static int __init omap3_pm_init(void) | |||
848 | suspend_set_ops(&omap_pm_ops); | 846 | suspend_set_ops(&omap_pm_ops); |
849 | #endif /* CONFIG_SUSPEND */ | 847 | #endif /* CONFIG_SUSPEND */ |
850 | 848 | ||
851 | pm_idle = omap3_pm_idle; | 849 | arm_pm_idle = omap3_pm_idle; |
852 | omap3_idle_init(); | 850 | omap3_idle_init(); |
853 | 851 | ||
854 | /* | 852 | /* |
diff --git a/arch/arm/mach-omap2/pm44xx.c b/arch/arm/mach-omap2/pm44xx.c index c264ef7219c1..c840689df24a 100644 --- a/arch/arm/mach-omap2/pm44xx.c +++ b/arch/arm/mach-omap2/pm44xx.c | |||
@@ -173,18 +173,16 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused) | |||
173 | * omap_default_idle - OMAP4 default ilde routine.' | 173 | * omap_default_idle - OMAP4 default ilde routine.' |
174 | * | 174 | * |
175 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed | 175 | * Implements OMAP4 memory, IO ordering requirements which can't be addressed |
176 | * with default arch_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and | 176 | * with default cpu_do_idle() hook. Used by all CPUs with !CONFIG_CPUIDLE and |
177 | * by secondary CPU with CONFIG_CPUIDLE. | 177 | * by secondary CPU with CONFIG_CPUIDLE. |
178 | */ | 178 | */ |
179 | static void omap_default_idle(void) | 179 | static void omap_default_idle(void) |
180 | { | 180 | { |
181 | local_irq_disable(); | ||
182 | local_fiq_disable(); | 181 | local_fiq_disable(); |
183 | 182 | ||
184 | omap_do_wfi(); | 183 | omap_do_wfi(); |
185 | 184 | ||
186 | local_fiq_enable(); | 185 | local_fiq_enable(); |
187 | local_irq_enable(); | ||
188 | } | 186 | } |
189 | 187 | ||
190 | /** | 188 | /** |
@@ -255,8 +253,8 @@ static int __init omap4_pm_init(void) | |||
255 | suspend_set_ops(&omap_pm_ops); | 253 | suspend_set_ops(&omap_pm_ops); |
256 | #endif /* CONFIG_SUSPEND */ | 254 | #endif /* CONFIG_SUSPEND */ |
257 | 255 | ||
258 | /* Overwrite the default arch_idle() */ | 256 | /* Overwrite the default cpu_do_idle() */ |
259 | pm_idle = omap_default_idle; | 257 | arm_pm_idle = omap_default_idle; |
260 | 258 | ||
261 | omap4_idle_init(); | 259 | omap4_idle_init(); |
262 | 260 | ||
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index 860118ab43e2..873b51d494ea 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c | |||
@@ -24,7 +24,6 @@ | |||
24 | #include <linux/interrupt.h> | 24 | #include <linux/interrupt.h> |
25 | #include <linux/slab.h> | 25 | #include <linux/slab.h> |
26 | 26 | ||
27 | #include <mach/system.h> | ||
28 | #include <plat/common.h> | 27 | #include <plat/common.h> |
29 | #include <plat/prcm.h> | 28 | #include <plat/prcm.h> |
30 | #include <plat/irqs.h> | 29 | #include <plat/irqs.h> |
diff --git a/arch/arm/mach-orion5x/include/mach/entry-macro.S b/arch/arm/mach-orion5x/include/mach/entry-macro.S index d658992e5401..79eb502a1e64 100644 --- a/arch/arm/mach-orion5x/include/mach/entry-macro.S +++ b/arch/arm/mach-orion5x/include/mach/entry-macro.S | |||
@@ -10,12 +10,6 @@ | |||
10 | 10 | ||
11 | #include <mach/bridge-regs.h> | 11 | #include <mach/bridge-regs.h> |
12 | 12 | ||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
18 | |||
19 | .macro get_irqnr_preamble, base, tmp | 13 | .macro get_irqnr_preamble, base, tmp |
20 | ldr \base, =MAIN_IRQ_CAUSE | 14 | ldr \base, =MAIN_IRQ_CAUSE |
21 | .endm | 15 | .endm |
diff --git a/arch/arm/mach-orion5x/include/mach/system.h b/arch/arm/mach-orion5x/include/mach/system.h deleted file mode 100644 index 825a2650cefa..000000000000 --- a/arch/arm/mach-orion5x/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-orion5x/include/mach/system.h | ||
3 | * | ||
4 | * Tzachi Perelstein <tzachi@marvell.com> | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H | ||
13 | |||
14 | static inline void arch_idle(void) | ||
15 | { | ||
16 | cpu_do_idle(); | ||
17 | } | ||
18 | |||
19 | #endif | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/entry-macro.S b/arch/arm/mach-picoxcell/include/mach/entry-macro.S deleted file mode 100644 index 9b505ac00be9..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * entry-macro.S | ||
3 | * | ||
4 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
5 | * | ||
6 | * Low-level IRQ helper macros for picoXcell platforms | ||
7 | * | ||
8 | * This file is licensed under the terms of the GNU General Public | ||
9 | * License version 2. This program is licensed "as is" without any | ||
10 | * warranty of any kind, whether express or implied. | ||
11 | */ | ||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-picoxcell/include/mach/system.h b/arch/arm/mach-picoxcell/include/mach/system.h deleted file mode 100644 index 1a5d8cb57df4..000000000000 --- a/arch/arm/mach-picoxcell/include/mach/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2011 Picochip Ltd., Jamie Iles | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | #ifndef __ASM_ARCH_SYSTEM_H | ||
15 | #define __ASM_ARCH_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching and wait for interrupt | ||
21 | * tricks. | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-pnx4008/include/mach/entry-macro.S b/arch/arm/mach-pnx4008/include/mach/entry-macro.S index db7eeebf30d7..77a555846719 100644 --- a/arch/arm/mach-pnx4008/include/mach/entry-macro.S +++ b/arch/arm/mach-pnx4008/include/mach/entry-macro.S | |||
@@ -25,15 +25,9 @@ | |||
25 | #define SIC1_BASE_INT 32 | 25 | #define SIC1_BASE_INT 32 |
26 | #define SIC2_BASE_INT 64 | 26 | #define SIC2_BASE_INT 64 |
27 | 27 | ||
28 | .macro disable_fiq | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_preamble, base, tmp | 28 | .macro get_irqnr_preamble, base, tmp |
32 | .endm | 29 | .endm |
33 | 30 | ||
34 | .macro arch_ret_to_user, tmp1, tmp2 | ||
35 | .endm | ||
36 | |||
37 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
38 | /* decode the MIC interrupt numbers */ | 32 | /* decode the MIC interrupt numbers */ |
39 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) | 33 | ldr \base, =IO_ADDRESS(PNX4008_INTCTRLMIC_BASE) |
diff --git a/arch/arm/mach-pnx4008/include/mach/system.h b/arch/arm/mach-pnx4008/include/mach/system.h deleted file mode 100644 index 60cfe7188091..000000000000 --- a/arch/arm/mach-pnx4008/include/mach/system.h +++ /dev/null | |||
@@ -1,29 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pnx4008/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 Philips Semiconductors | ||
5 | * Copyright (C) 2005 MontaVista Software, Inc. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static void arch_idle(void) | ||
25 | { | ||
26 | cpu_do_idle(); | ||
27 | } | ||
28 | |||
29 | #endif | ||
diff --git a/arch/arm/mach-prima2/include/mach/entry-macro.S b/arch/arm/mach-prima2/include/mach/entry-macro.S index 1c8a50f102a7..86434e7a5be9 100644 --- a/arch/arm/mach-prima2/include/mach/entry-macro.S +++ b/arch/arm/mach-prima2/include/mach/entry-macro.S | |||
@@ -20,10 +20,3 @@ | |||
20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f | 20 | cmp \irqnr, #0x40 @ the irq num can't be larger than 0x3f |
21 | movges \irqnr, #0 | 21 | movges \irqnr, #0 |
22 | .endm | 22 | .endm |
23 | |||
24 | .macro disable_fiq | ||
25 | .endm | ||
26 | |||
27 | .macro arch_ret_to_user, tmp1, tmp2 | ||
28 | .endm | ||
29 | |||
diff --git a/arch/arm/mach-prima2/include/mach/system.h b/arch/arm/mach-prima2/include/mach/system.h deleted file mode 100644 index 2c7d2a9d0c92..000000000000 --- a/arch/arm/mach-prima2/include/mach/system.h +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-prima2/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2011 Cambridge Silicon Radio Limited, a CSR plc group company. | ||
5 | * | ||
6 | * Licensed under GPLv2 or later. | ||
7 | */ | ||
8 | |||
9 | #ifndef __MACH_SYSTEM_H__ | ||
10 | #define __MACH_SYSTEM_H__ | ||
11 | |||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
16 | |||
17 | #endif | ||
diff --git a/arch/arm/mach-pxa/include/mach/entry-macro.S b/arch/arm/mach-pxa/include/mach/entry-macro.S deleted file mode 100644 index 260c0c17692a..000000000000 --- a/arch/arm/mach-pxa/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for PXA-based platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-pxa/include/mach/system.h b/arch/arm/mach-pxa/include/mach/system.h deleted file mode 100644 index c5afacd3cc0b..000000000000 --- a/arch/arm/mach-pxa/include/mach/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-pxa/include/mach/system.h | ||
3 | * | ||
4 | * Author: Nicolas Pitre | ||
5 | * Created: Jun 15, 2001 | ||
6 | * Copyright: MontaVista Software Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | static inline void arch_idle(void) | ||
13 | { | ||
14 | cpu_do_idle(); | ||
15 | } | ||
diff --git a/arch/arm/mach-realview/core.h b/arch/arm/mach-realview/core.h index 735b57aaf2d6..f8f2c0ac4c01 100644 --- a/arch/arm/mach-realview/core.h +++ b/arch/arm/mach-realview/core.h | |||
@@ -28,21 +28,11 @@ | |||
28 | #include <asm/setup.h> | 28 | #include <asm/setup.h> |
29 | #include <asm/leds.h> | 29 | #include <asm/leds.h> |
30 | 30 | ||
31 | #define AMBA_DEVICE(name,busid,base,plat) \ | 31 | #define APB_DEVICE(name, busid, base, plat) \ |
32 | static struct amba_device name##_device = { \ | 32 | static AMBA_APB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
33 | .dev = { \ | 33 | |
34 | .coherent_dma_mask = ~0, \ | 34 | #define AHB_DEVICE(name, busid, base, plat) \ |
35 | .init_name = busid, \ | 35 | static AMBA_AHB_DEVICE(name, busid, 0, REALVIEW_##base##_BASE, base##_IRQ, plat) |
36 | .platform_data = plat, \ | ||
37 | }, \ | ||
38 | .res = { \ | ||
39 | .start = REALVIEW_##base##_BASE, \ | ||
40 | .end = (REALVIEW_##base##_BASE) + SZ_4K - 1, \ | ||
41 | .flags = IORESOURCE_MEM, \ | ||
42 | }, \ | ||
43 | .dma_mask = ~0, \ | ||
44 | .irq = base##_IRQ, \ | ||
45 | } | ||
46 | 36 | ||
47 | struct machine_desc; | 37 | struct machine_desc; |
48 | 38 | ||
diff --git a/arch/arm/mach-realview/include/mach/entry-macro.S b/arch/arm/mach-realview/include/mach/entry-macro.S deleted file mode 100644 index e8a5179c2653..000000000000 --- a/arch/arm/mach-realview/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for RealView platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-realview/include/mach/irqs-pb1176.h b/arch/arm/mach-realview/include/mach/irqs-pb1176.h index 5c3c625e3e04..708f84156f2c 100644 --- a/arch/arm/mach-realview/include/mach/irqs-pb1176.h +++ b/arch/arm/mach-realview/include/mach/irqs-pb1176.h | |||
@@ -40,6 +40,7 @@ | |||
40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) | 40 | #define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13) |
41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) | 41 | #define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14) |
42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ | 42 | #define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */ |
43 | #define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16) | ||
43 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ | 44 | #define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */ |
44 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ | 45 | #define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */ |
45 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ | 46 | #define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */ |
@@ -73,7 +74,6 @@ | |||
73 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ | 74 | #define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */ |
74 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ | 75 | #define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */ |
75 | 76 | ||
76 | #define IRQ_PB1176_GPIO0 -1 | ||
77 | #define IRQ_PB1176_SCTL -1 | 77 | #define IRQ_PB1176_SCTL -1 |
78 | 78 | ||
79 | #define NR_GIC_PB1176 2 | 79 | #define NR_GIC_PB1176 2 |
diff --git a/arch/arm/mach-realview/include/mach/system.h b/arch/arm/mach-realview/include/mach/system.h deleted file mode 100644 index 471b671159ce..000000000000 --- a/arch/arm/mach-realview/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-realview/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index a2e959037954..baf382c5e776 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c | |||
@@ -135,63 +135,63 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
135 | /* | 135 | /* |
136 | * These devices are connected via the core APB bridge | 136 | * These devices are connected via the core APB bridge |
137 | */ | 137 | */ |
138 | #define GPIO2_IRQ { IRQ_EB_GPIO2, NO_IRQ } | 138 | #define GPIO2_IRQ { IRQ_EB_GPIO2 } |
139 | #define GPIO3_IRQ { IRQ_EB_GPIO3, NO_IRQ } | 139 | #define GPIO3_IRQ { IRQ_EB_GPIO3 } |
140 | 140 | ||
141 | #define AACI_IRQ { IRQ_EB_AACI, NO_IRQ } | 141 | #define AACI_IRQ { IRQ_EB_AACI } |
142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } | 142 | #define MMCI0_IRQ { IRQ_EB_MMCI0A, IRQ_EB_MMCI0B } |
143 | #define KMI0_IRQ { IRQ_EB_KMI0, NO_IRQ } | 143 | #define KMI0_IRQ { IRQ_EB_KMI0 } |
144 | #define KMI1_IRQ { IRQ_EB_KMI1, NO_IRQ } | 144 | #define KMI1_IRQ { IRQ_EB_KMI1 } |
145 | 145 | ||
146 | /* | 146 | /* |
147 | * These devices are connected directly to the multi-layer AHB switch | 147 | * These devices are connected directly to the multi-layer AHB switch |
148 | */ | 148 | */ |
149 | #define EB_SMC_IRQ { NO_IRQ, NO_IRQ } | 149 | #define EB_SMC_IRQ { } |
150 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 150 | #define MPMC_IRQ { } |
151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD, NO_IRQ } | 151 | #define EB_CLCD_IRQ { IRQ_EB_CLCD } |
152 | #define DMAC_IRQ { IRQ_EB_DMA, NO_IRQ } | 152 | #define DMAC_IRQ { IRQ_EB_DMA } |
153 | 153 | ||
154 | /* | 154 | /* |
155 | * These devices are connected via the core APB bridge | 155 | * These devices are connected via the core APB bridge |
156 | */ | 156 | */ |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG, NO_IRQ } | 158 | #define EB_WATCHDOG_IRQ { IRQ_EB_WDOG } |
159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0, NO_IRQ } | 159 | #define EB_GPIO0_IRQ { IRQ_EB_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_EB_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_EB_GPIO1 } |
161 | #define EB_RTC_IRQ { IRQ_EB_RTC, NO_IRQ } | 161 | #define EB_RTC_IRQ { IRQ_EB_RTC } |
162 | 162 | ||
163 | /* | 163 | /* |
164 | * These devices are connected via the DMA APB bridge | 164 | * These devices are connected via the DMA APB bridge |
165 | */ | 165 | */ |
166 | #define SCI_IRQ { IRQ_EB_SCI, NO_IRQ } | 166 | #define SCI_IRQ { IRQ_EB_SCI } |
167 | #define EB_UART0_IRQ { IRQ_EB_UART0, NO_IRQ } | 167 | #define EB_UART0_IRQ { IRQ_EB_UART0 } |
168 | #define EB_UART1_IRQ { IRQ_EB_UART1, NO_IRQ } | 168 | #define EB_UART1_IRQ { IRQ_EB_UART1 } |
169 | #define EB_UART2_IRQ { IRQ_EB_UART2, NO_IRQ } | 169 | #define EB_UART2_IRQ { IRQ_EB_UART2 } |
170 | #define EB_UART3_IRQ { IRQ_EB_UART3, NO_IRQ } | 170 | #define EB_UART3_IRQ { IRQ_EB_UART3 } |
171 | #define EB_SSP_IRQ { IRQ_EB_SSP, NO_IRQ } | 171 | #define EB_SSP_IRQ { IRQ_EB_SSP } |
172 | 172 | ||
173 | /* FPGA Primecells */ | 173 | /* FPGA Primecells */ |
174 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 174 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
175 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 175 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
176 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 176 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
177 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 177 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
178 | AMBA_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); | 178 | APB_DEVICE(uart3, "fpga:uart3", EB_UART3, NULL); |
179 | 179 | ||
180 | /* DevChip Primecells */ | 180 | /* DevChip Primecells */ |
181 | AMBA_DEVICE(smc, "dev:smc", EB_SMC, NULL); | 181 | AHB_DEVICE(smc, "dev:smc", EB_SMC, NULL); |
182 | AMBA_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); | 182 | AHB_DEVICE(clcd, "dev:clcd", EB_CLCD, &clcd_plat_data); |
183 | AMBA_DEVICE(dmac, "dev:dmac", DMAC, NULL); | 183 | AHB_DEVICE(dmac, "dev:dmac", DMAC, NULL); |
184 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 184 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
185 | AMBA_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); | 185 | APB_DEVICE(wdog, "dev:wdog", EB_WATCHDOG, NULL); |
186 | AMBA_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); | 186 | APB_DEVICE(gpio0, "dev:gpio0", EB_GPIO0, &gpio0_plat_data); |
187 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 187 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
188 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 188 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
189 | AMBA_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); | 189 | APB_DEVICE(rtc, "dev:rtc", EB_RTC, NULL); |
190 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 190 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
191 | AMBA_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); | 191 | APB_DEVICE(uart0, "dev:uart0", EB_UART0, NULL); |
192 | AMBA_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); | 192 | APB_DEVICE(uart1, "dev:uart1", EB_UART1, NULL); |
193 | AMBA_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); | 193 | APB_DEVICE(uart2, "dev:uart2", EB_UART2, NULL); |
194 | AMBA_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); | 194 | APB_DEVICE(ssp0, "dev:ssp0", EB_SSP, &ssp0_plat_data); |
195 | 195 | ||
196 | static struct amba_device *amba_devs[] __initdata = { | 196 | static struct amba_device *amba_devs[] __initdata = { |
197 | &dmac_device, | 197 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pb1176.c b/arch/arm/mach-realview/realview_pb1176.c index e4abe94fb11a..b1d7cafa1a6d 100644 --- a/arch/arm/mach-realview/realview_pb1176.c +++ b/arch/arm/mach-realview/realview_pb1176.c | |||
@@ -132,50 +132,50 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
132 | /* | 132 | /* |
133 | * RealView PB1176 AMBA devices | 133 | * RealView PB1176 AMBA devices |
134 | */ | 134 | */ |
135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2, NO_IRQ } | 135 | #define GPIO2_IRQ { IRQ_PB1176_GPIO2 } |
136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3, NO_IRQ } | 136 | #define GPIO3_IRQ { IRQ_PB1176_GPIO3 } |
137 | #define AACI_IRQ { IRQ_PB1176_AACI, NO_IRQ } | 137 | #define AACI_IRQ { IRQ_PB1176_AACI } |
138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } | 138 | #define MMCI0_IRQ { IRQ_PB1176_MMCI0A, IRQ_PB1176_MMCI0B } |
139 | #define KMI0_IRQ { IRQ_PB1176_KMI0, NO_IRQ } | 139 | #define KMI0_IRQ { IRQ_PB1176_KMI0 } |
140 | #define KMI1_IRQ { IRQ_PB1176_KMI1, NO_IRQ } | 140 | #define KMI1_IRQ { IRQ_PB1176_KMI1 } |
141 | #define PB1176_SMC_IRQ { NO_IRQ, NO_IRQ } | 141 | #define PB1176_SMC_IRQ { } |
142 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 142 | #define MPMC_IRQ { } |
143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD, NO_IRQ } | 143 | #define PB1176_CLCD_IRQ { IRQ_DC1176_CLCD } |
144 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 144 | #define SCTL_IRQ { } |
145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG, NO_IRQ } | 145 | #define PB1176_WATCHDOG_IRQ { IRQ_DC1176_WATCHDOG } |
146 | #define PB1176_GPIO0_IRQ { IRQ_PB1176_GPIO0, NO_IRQ } | 146 | #define PB1176_GPIO0_IRQ { IRQ_DC1176_GPIO0 } |
147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1, NO_IRQ } | 147 | #define GPIO1_IRQ { IRQ_PB1176_GPIO1 } |
148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC, NO_IRQ } | 148 | #define PB1176_RTC_IRQ { IRQ_DC1176_RTC } |
149 | #define SCI_IRQ { IRQ_PB1176_SCI, NO_IRQ } | 149 | #define SCI_IRQ { IRQ_PB1176_SCI } |
150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0, NO_IRQ } | 150 | #define PB1176_UART0_IRQ { IRQ_DC1176_UART0 } |
151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1, NO_IRQ } | 151 | #define PB1176_UART1_IRQ { IRQ_DC1176_UART1 } |
152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2, NO_IRQ } | 152 | #define PB1176_UART2_IRQ { IRQ_DC1176_UART2 } |
153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3, NO_IRQ } | 153 | #define PB1176_UART3_IRQ { IRQ_DC1176_UART3 } |
154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4, NO_IRQ } | 154 | #define PB1176_UART4_IRQ { IRQ_PB1176_UART4 } |
155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP, NO_IRQ } | 155 | #define PB1176_SSP_IRQ { IRQ_DC1176_SSP } |
156 | 156 | ||
157 | /* FPGA Primecells */ | 157 | /* FPGA Primecells */ |
158 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 158 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
159 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 159 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
160 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 160 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
161 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 161 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
162 | AMBA_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); | 162 | APB_DEVICE(uart4, "fpga:uart4", PB1176_UART4, NULL); |
163 | 163 | ||
164 | /* DevChip Primecells */ | 164 | /* DevChip Primecells */ |
165 | AMBA_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); | 165 | AHB_DEVICE(smc, "dev:smc", PB1176_SMC, NULL); |
166 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 166 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
167 | AMBA_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); | 167 | APB_DEVICE(wdog, "dev:wdog", PB1176_WATCHDOG, NULL); |
168 | AMBA_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); | 168 | APB_DEVICE(gpio0, "dev:gpio0", PB1176_GPIO0, &gpio0_plat_data); |
169 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 169 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
170 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 170 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
171 | AMBA_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); | 171 | APB_DEVICE(rtc, "dev:rtc", PB1176_RTC, NULL); |
172 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 172 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
173 | AMBA_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); | 173 | APB_DEVICE(uart0, "dev:uart0", PB1176_UART0, NULL); |
174 | AMBA_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); | 174 | APB_DEVICE(uart1, "dev:uart1", PB1176_UART1, NULL); |
175 | AMBA_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); | 175 | APB_DEVICE(uart2, "dev:uart2", PB1176_UART2, NULL); |
176 | AMBA_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); | 176 | APB_DEVICE(uart3, "dev:uart3", PB1176_UART3, NULL); |
177 | AMBA_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); | 177 | APB_DEVICE(ssp0, "dev:ssp0", PB1176_SSP, &ssp0_plat_data); |
178 | AMBA_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); | 178 | AHB_DEVICE(clcd, "dev:clcd", PB1176_CLCD, &clcd_plat_data); |
179 | 179 | ||
180 | static struct amba_device *amba_devs[] __initdata = { | 180 | static struct amba_device *amba_devs[] __initdata = { |
181 | &uart0_device, | 181 | &uart0_device, |
diff --git a/arch/arm/mach-realview/realview_pb11mp.c b/arch/arm/mach-realview/realview_pb11mp.c index 3bea5bd0221d..a98c536e3327 100644 --- a/arch/arm/mach-realview/realview_pb11mp.c +++ b/arch/arm/mach-realview/realview_pb11mp.c | |||
@@ -127,52 +127,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
127 | * RealView PB11MPCore AMBA devices | 127 | * RealView PB11MPCore AMBA devices |
128 | */ | 128 | */ |
129 | 129 | ||
130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2, NO_IRQ } | 130 | #define GPIO2_IRQ { IRQ_PB11MP_GPIO2 } |
131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3, NO_IRQ } | 131 | #define GPIO3_IRQ { IRQ_PB11MP_GPIO3 } |
132 | #define AACI_IRQ { IRQ_TC11MP_AACI, NO_IRQ } | 132 | #define AACI_IRQ { IRQ_TC11MP_AACI } |
133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } | 133 | #define MMCI0_IRQ { IRQ_TC11MP_MMCI0A, IRQ_TC11MP_MMCI0B } |
134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0, NO_IRQ } | 134 | #define KMI0_IRQ { IRQ_TC11MP_KMI0 } |
135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1, NO_IRQ } | 135 | #define KMI1_IRQ { IRQ_TC11MP_KMI1 } |
136 | #define PB11MP_SMC_IRQ { NO_IRQ, NO_IRQ } | 136 | #define PB11MP_SMC_IRQ { } |
137 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 137 | #define MPMC_IRQ { } |
138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD, NO_IRQ } | 138 | #define PB11MP_CLCD_IRQ { IRQ_PB11MP_CLCD } |
139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC, NO_IRQ } | 139 | #define DMAC_IRQ { IRQ_PB11MP_DMAC } |
140 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 140 | #define SCTL_IRQ { } |
141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG, NO_IRQ } | 141 | #define PB11MP_WATCHDOG_IRQ { IRQ_PB11MP_WATCHDOG } |
142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0, NO_IRQ } | 142 | #define PB11MP_GPIO0_IRQ { IRQ_PB11MP_GPIO0 } |
143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1, NO_IRQ } | 143 | #define GPIO1_IRQ { IRQ_PB11MP_GPIO1 } |
144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC, NO_IRQ } | 144 | #define PB11MP_RTC_IRQ { IRQ_TC11MP_RTC } |
145 | #define SCI_IRQ { IRQ_PB11MP_SCI, NO_IRQ } | 145 | #define SCI_IRQ { IRQ_PB11MP_SCI } |
146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0, NO_IRQ } | 146 | #define PB11MP_UART0_IRQ { IRQ_TC11MP_UART0 } |
147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1, NO_IRQ } | 147 | #define PB11MP_UART1_IRQ { IRQ_TC11MP_UART1 } |
148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2, NO_IRQ } | 148 | #define PB11MP_UART2_IRQ { IRQ_PB11MP_UART2 } |
149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3, NO_IRQ } | 149 | #define PB11MP_UART3_IRQ { IRQ_PB11MP_UART3 } |
150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP, NO_IRQ } | 150 | #define PB11MP_SSP_IRQ { IRQ_PB11MP_SSP } |
151 | 151 | ||
152 | /* FPGA Primecells */ | 152 | /* FPGA Primecells */ |
153 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 153 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
154 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 154 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
155 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 155 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
156 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 156 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
157 | AMBA_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); | 157 | APB_DEVICE(uart3, "fpga:uart3", PB11MP_UART3, NULL); |
158 | 158 | ||
159 | /* DevChip Primecells */ | 159 | /* DevChip Primecells */ |
160 | AMBA_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); | 160 | AHB_DEVICE(smc, "dev:smc", PB11MP_SMC, NULL); |
161 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 161 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
162 | AMBA_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); | 162 | APB_DEVICE(wdog, "dev:wdog", PB11MP_WATCHDOG, NULL); |
163 | AMBA_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); | 163 | APB_DEVICE(gpio0, "dev:gpio0", PB11MP_GPIO0, &gpio0_plat_data); |
164 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 164 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
165 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 165 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
166 | AMBA_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); | 166 | APB_DEVICE(rtc, "dev:rtc", PB11MP_RTC, NULL); |
167 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 167 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
168 | AMBA_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); | 168 | APB_DEVICE(uart0, "dev:uart0", PB11MP_UART0, NULL); |
169 | AMBA_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); | 169 | APB_DEVICE(uart1, "dev:uart1", PB11MP_UART1, NULL); |
170 | AMBA_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); | 170 | APB_DEVICE(uart2, "dev:uart2", PB11MP_UART2, NULL); |
171 | AMBA_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); | 171 | APB_DEVICE(ssp0, "dev:ssp0", PB11MP_SSP, &ssp0_plat_data); |
172 | 172 | ||
173 | /* Primecells on the NEC ISSP chip */ | 173 | /* Primecells on the NEC ISSP chip */ |
174 | AMBA_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); | 174 | AHB_DEVICE(clcd, "issp:clcd", PB11MP_CLCD, &clcd_plat_data); |
175 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 175 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
176 | 176 | ||
177 | static struct amba_device *amba_devs[] __initdata = { | 177 | static struct amba_device *amba_devs[] __initdata = { |
178 | &dmac_device, | 178 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pba8.c b/arch/arm/mach-realview/realview_pba8.c index 25b2e59296f8..59650174e6ed 100644 --- a/arch/arm/mach-realview/realview_pba8.c +++ b/arch/arm/mach-realview/realview_pba8.c | |||
@@ -122,52 +122,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
122 | * RealView PBA8Core AMBA devices | 122 | * RealView PBA8Core AMBA devices |
123 | */ | 123 | */ |
124 | 124 | ||
125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2, NO_IRQ } | 125 | #define GPIO2_IRQ { IRQ_PBA8_GPIO2 } |
126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3, NO_IRQ } | 126 | #define GPIO3_IRQ { IRQ_PBA8_GPIO3 } |
127 | #define AACI_IRQ { IRQ_PBA8_AACI, NO_IRQ } | 127 | #define AACI_IRQ { IRQ_PBA8_AACI } |
128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } | 128 | #define MMCI0_IRQ { IRQ_PBA8_MMCI0A, IRQ_PBA8_MMCI0B } |
129 | #define KMI0_IRQ { IRQ_PBA8_KMI0, NO_IRQ } | 129 | #define KMI0_IRQ { IRQ_PBA8_KMI0 } |
130 | #define KMI1_IRQ { IRQ_PBA8_KMI1, NO_IRQ } | 130 | #define KMI1_IRQ { IRQ_PBA8_KMI1 } |
131 | #define PBA8_SMC_IRQ { NO_IRQ, NO_IRQ } | 131 | #define PBA8_SMC_IRQ { } |
132 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 132 | #define MPMC_IRQ { } |
133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD, NO_IRQ } | 133 | #define PBA8_CLCD_IRQ { IRQ_PBA8_CLCD } |
134 | #define DMAC_IRQ { IRQ_PBA8_DMAC, NO_IRQ } | 134 | #define DMAC_IRQ { IRQ_PBA8_DMAC } |
135 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 135 | #define SCTL_IRQ { } |
136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG, NO_IRQ } | 136 | #define PBA8_WATCHDOG_IRQ { IRQ_PBA8_WATCHDOG } |
137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0, NO_IRQ } | 137 | #define PBA8_GPIO0_IRQ { IRQ_PBA8_GPIO0 } |
138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1, NO_IRQ } | 138 | #define GPIO1_IRQ { IRQ_PBA8_GPIO1 } |
139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC, NO_IRQ } | 139 | #define PBA8_RTC_IRQ { IRQ_PBA8_RTC } |
140 | #define SCI_IRQ { IRQ_PBA8_SCI, NO_IRQ } | 140 | #define SCI_IRQ { IRQ_PBA8_SCI } |
141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0, NO_IRQ } | 141 | #define PBA8_UART0_IRQ { IRQ_PBA8_UART0 } |
142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1, NO_IRQ } | 142 | #define PBA8_UART1_IRQ { IRQ_PBA8_UART1 } |
143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2, NO_IRQ } | 143 | #define PBA8_UART2_IRQ { IRQ_PBA8_UART2 } |
144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3, NO_IRQ } | 144 | #define PBA8_UART3_IRQ { IRQ_PBA8_UART3 } |
145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP, NO_IRQ } | 145 | #define PBA8_SSP_IRQ { IRQ_PBA8_SSP } |
146 | 146 | ||
147 | /* FPGA Primecells */ | 147 | /* FPGA Primecells */ |
148 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 148 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
149 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 149 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
150 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 150 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
151 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 151 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
152 | AMBA_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); | 152 | APB_DEVICE(uart3, "fpga:uart3", PBA8_UART3, NULL); |
153 | 153 | ||
154 | /* DevChip Primecells */ | 154 | /* DevChip Primecells */ |
155 | AMBA_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); | 155 | AHB_DEVICE(smc, "dev:smc", PBA8_SMC, NULL); |
156 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 156 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
157 | AMBA_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); | 157 | APB_DEVICE(wdog, "dev:wdog", PBA8_WATCHDOG, NULL); |
158 | AMBA_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); | 158 | APB_DEVICE(gpio0, "dev:gpio0", PBA8_GPIO0, &gpio0_plat_data); |
159 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 159 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
160 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 160 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
161 | AMBA_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); | 161 | APB_DEVICE(rtc, "dev:rtc", PBA8_RTC, NULL); |
162 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 162 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
163 | AMBA_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); | 163 | APB_DEVICE(uart0, "dev:uart0", PBA8_UART0, NULL); |
164 | AMBA_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); | 164 | APB_DEVICE(uart1, "dev:uart1", PBA8_UART1, NULL); |
165 | AMBA_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); | 165 | APB_DEVICE(uart2, "dev:uart2", PBA8_UART2, NULL); |
166 | AMBA_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); | 166 | APB_DEVICE(ssp0, "dev:ssp0", PBA8_SSP, &ssp0_plat_data); |
167 | 167 | ||
168 | /* Primecells on the NEC ISSP chip */ | 168 | /* Primecells on the NEC ISSP chip */ |
169 | AMBA_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); | 169 | AHB_DEVICE(clcd, "issp:clcd", PBA8_CLCD, &clcd_plat_data); |
170 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 170 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
171 | 171 | ||
172 | static struct amba_device *amba_devs[] __initdata = { | 172 | static struct amba_device *amba_devs[] __initdata = { |
173 | &dmac_device, | 173 | &dmac_device, |
diff --git a/arch/arm/mach-realview/realview_pbx.c b/arch/arm/mach-realview/realview_pbx.c index 6ddcc6147bfa..3f2f605624e9 100644 --- a/arch/arm/mach-realview/realview_pbx.c +++ b/arch/arm/mach-realview/realview_pbx.c | |||
@@ -144,52 +144,52 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
144 | * RealView PBXCore AMBA devices | 144 | * RealView PBXCore AMBA devices |
145 | */ | 145 | */ |
146 | 146 | ||
147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2, NO_IRQ } | 147 | #define GPIO2_IRQ { IRQ_PBX_GPIO2 } |
148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3, NO_IRQ } | 148 | #define GPIO3_IRQ { IRQ_PBX_GPIO3 } |
149 | #define AACI_IRQ { IRQ_PBX_AACI, NO_IRQ } | 149 | #define AACI_IRQ { IRQ_PBX_AACI } |
150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } | 150 | #define MMCI0_IRQ { IRQ_PBX_MMCI0A, IRQ_PBX_MMCI0B } |
151 | #define KMI0_IRQ { IRQ_PBX_KMI0, NO_IRQ } | 151 | #define KMI0_IRQ { IRQ_PBX_KMI0 } |
152 | #define KMI1_IRQ { IRQ_PBX_KMI1, NO_IRQ } | 152 | #define KMI1_IRQ { IRQ_PBX_KMI1 } |
153 | #define PBX_SMC_IRQ { NO_IRQ, NO_IRQ } | 153 | #define PBX_SMC_IRQ { } |
154 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 154 | #define MPMC_IRQ { } |
155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD, NO_IRQ } | 155 | #define PBX_CLCD_IRQ { IRQ_PBX_CLCD } |
156 | #define DMAC_IRQ { IRQ_PBX_DMAC, NO_IRQ } | 156 | #define DMAC_IRQ { IRQ_PBX_DMAC } |
157 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 157 | #define SCTL_IRQ { } |
158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG, NO_IRQ } | 158 | #define PBX_WATCHDOG_IRQ { IRQ_PBX_WATCHDOG } |
159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0, NO_IRQ } | 159 | #define PBX_GPIO0_IRQ { IRQ_PBX_GPIO0 } |
160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1, NO_IRQ } | 160 | #define GPIO1_IRQ { IRQ_PBX_GPIO1 } |
161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC, NO_IRQ } | 161 | #define PBX_RTC_IRQ { IRQ_PBX_RTC } |
162 | #define SCI_IRQ { IRQ_PBX_SCI, NO_IRQ } | 162 | #define SCI_IRQ { IRQ_PBX_SCI } |
163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0, NO_IRQ } | 163 | #define PBX_UART0_IRQ { IRQ_PBX_UART0 } |
164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1, NO_IRQ } | 164 | #define PBX_UART1_IRQ { IRQ_PBX_UART1 } |
165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2, NO_IRQ } | 165 | #define PBX_UART2_IRQ { IRQ_PBX_UART2 } |
166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3, NO_IRQ } | 166 | #define PBX_UART3_IRQ { IRQ_PBX_UART3 } |
167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP, NO_IRQ } | 167 | #define PBX_SSP_IRQ { IRQ_PBX_SSP } |
168 | 168 | ||
169 | /* FPGA Primecells */ | 169 | /* FPGA Primecells */ |
170 | AMBA_DEVICE(aaci, "fpga:aaci", AACI, NULL); | 170 | APB_DEVICE(aaci, "fpga:aaci", AACI, NULL); |
171 | AMBA_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); | 171 | APB_DEVICE(mmc0, "fpga:mmc0", MMCI0, &realview_mmc0_plat_data); |
172 | AMBA_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); | 172 | APB_DEVICE(kmi0, "fpga:kmi0", KMI0, NULL); |
173 | AMBA_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); | 173 | APB_DEVICE(kmi1, "fpga:kmi1", KMI1, NULL); |
174 | AMBA_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); | 174 | APB_DEVICE(uart3, "fpga:uart3", PBX_UART3, NULL); |
175 | 175 | ||
176 | /* DevChip Primecells */ | 176 | /* DevChip Primecells */ |
177 | AMBA_DEVICE(smc, "dev:smc", PBX_SMC, NULL); | 177 | AHB_DEVICE(smc, "dev:smc", PBX_SMC, NULL); |
178 | AMBA_DEVICE(sctl, "dev:sctl", SCTL, NULL); | 178 | AHB_DEVICE(sctl, "dev:sctl", SCTL, NULL); |
179 | AMBA_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); | 179 | APB_DEVICE(wdog, "dev:wdog", PBX_WATCHDOG, NULL); |
180 | AMBA_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); | 180 | APB_DEVICE(gpio0, "dev:gpio0", PBX_GPIO0, &gpio0_plat_data); |
181 | AMBA_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); | 181 | APB_DEVICE(gpio1, "dev:gpio1", GPIO1, &gpio1_plat_data); |
182 | AMBA_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); | 182 | APB_DEVICE(gpio2, "dev:gpio2", GPIO2, &gpio2_plat_data); |
183 | AMBA_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); | 183 | APB_DEVICE(rtc, "dev:rtc", PBX_RTC, NULL); |
184 | AMBA_DEVICE(sci0, "dev:sci0", SCI, NULL); | 184 | APB_DEVICE(sci0, "dev:sci0", SCI, NULL); |
185 | AMBA_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); | 185 | APB_DEVICE(uart0, "dev:uart0", PBX_UART0, NULL); |
186 | AMBA_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); | 186 | APB_DEVICE(uart1, "dev:uart1", PBX_UART1, NULL); |
187 | AMBA_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); | 187 | APB_DEVICE(uart2, "dev:uart2", PBX_UART2, NULL); |
188 | AMBA_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); | 188 | APB_DEVICE(ssp0, "dev:ssp0", PBX_SSP, &ssp0_plat_data); |
189 | 189 | ||
190 | /* Primecells on the NEC ISSP chip */ | 190 | /* Primecells on the NEC ISSP chip */ |
191 | AMBA_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); | 191 | AHB_DEVICE(clcd, "issp:clcd", PBX_CLCD, &clcd_plat_data); |
192 | AMBA_DEVICE(dmac, "issp:dmac", DMAC, NULL); | 192 | AHB_DEVICE(dmac, "issp:dmac", DMAC, NULL); |
193 | 193 | ||
194 | static struct amba_device *amba_devs[] __initdata = { | 194 | static struct amba_device *amba_devs[] __initdata = { |
195 | &dmac_device, | 195 | &dmac_device, |
diff --git a/arch/arm/mach-rpc/Makefile b/arch/arm/mach-rpc/Makefile index aa77bc9efbbb..dfa405c0cfde 100644 --- a/arch/arm/mach-rpc/Makefile +++ b/arch/arm/mach-rpc/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | 4 | ||
5 | # Object file lists. | 5 | # Object file lists. |
6 | 6 | ||
7 | obj-y := dma.o irq.o riscpc.o | 7 | obj-y := dma.o fiq.o irq.o riscpc.o |
8 | obj-m := | 8 | obj-m := |
9 | obj-n := | 9 | obj-n := |
10 | obj- := | 10 | obj- := |
diff --git a/arch/arm/mach-rpc/fiq.S b/arch/arm/mach-rpc/fiq.S new file mode 100644 index 000000000000..48ddd57db16e --- /dev/null +++ b/arch/arm/mach-rpc/fiq.S | |||
@@ -0,0 +1,16 @@ | |||
1 | #include <linux/linkage.h> | ||
2 | #include <asm/assembler.h> | ||
3 | #include <mach/hardware.h> | ||
4 | #include <mach/entry-macro.S> | ||
5 | |||
6 | .text | ||
7 | |||
8 | .global rpc_default_fiq_end | ||
9 | ENTRY(rpc_default_fiq_start) | ||
10 | mov r12, #ioc_base_high | ||
11 | .if ioc_base_low | ||
12 | orr r12, r12, #ioc_base_low | ||
13 | .endif | ||
14 | strb r12, [r12, #0x38] @ Disable FIQ register | ||
15 | subs pc, lr, #4 | ||
16 | rpc_default_fiq_end: | ||
diff --git a/arch/arm/mach-rpc/include/mach/entry-macro.S b/arch/arm/mach-rpc/include/mach/entry-macro.S index 4e7e54144093..7178368d7062 100644 --- a/arch/arm/mach-rpc/include/mach/entry-macro.S +++ b/arch/arm/mach-rpc/include/mach/entry-macro.S | |||
@@ -10,7 +10,3 @@ | |||
10 | orr \base, \base, #ioc_base_low | 10 | orr \base, \base, #ioc_base_low |
11 | .endif | 11 | .endif |
12 | .endm | 12 | .endm |
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
16 | |||
diff --git a/arch/arm/mach-rpc/include/mach/system.h b/arch/arm/mach-rpc/include/mach/system.h deleted file mode 100644 index 359bab94b6af..000000000000 --- a/arch/arm/mach-rpc/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-rpc/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 1996-1999 Russell King. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
diff --git a/arch/arm/mach-rpc/irq.c b/arch/arm/mach-rpc/irq.c index 2e1b5309fbab..cf0e669eaf1a 100644 --- a/arch/arm/mach-rpc/irq.c +++ b/arch/arm/mach-rpc/irq.c | |||
@@ -5,6 +5,7 @@ | |||
5 | #include <asm/mach/irq.h> | 5 | #include <asm/mach/irq.h> |
6 | #include <asm/hardware/iomd.h> | 6 | #include <asm/hardware/iomd.h> |
7 | #include <asm/irq.h> | 7 | #include <asm/irq.h> |
8 | #include <asm/fiq.h> | ||
8 | 9 | ||
9 | static void iomd_ack_irq_a(struct irq_data *d) | 10 | static void iomd_ack_irq_a(struct irq_data *d) |
10 | { | 11 | { |
@@ -112,6 +113,8 @@ static struct irq_chip iomd_fiq_chip = { | |||
112 | .irq_unmask = iomd_unmask_irq_fiq, | 113 | .irq_unmask = iomd_unmask_irq_fiq, |
113 | }; | 114 | }; |
114 | 115 | ||
116 | extern unsigned char rpc_default_fiq_start, rpc_default_fiq_end; | ||
117 | |||
115 | void __init rpc_init_irq(void) | 118 | void __init rpc_init_irq(void) |
116 | { | 119 | { |
117 | unsigned int irq, flags; | 120 | unsigned int irq, flags; |
@@ -121,6 +124,9 @@ void __init rpc_init_irq(void) | |||
121 | iomd_writeb(0, IOMD_FIQMASK); | 124 | iomd_writeb(0, IOMD_FIQMASK); |
122 | iomd_writeb(0, IOMD_DMAMASK); | 125 | iomd_writeb(0, IOMD_DMAMASK); |
123 | 126 | ||
127 | set_fiq_handler(&rpc_default_fiq_start, | ||
128 | &rpc_default_fiq_end - &rpc_default_fiq_start); | ||
129 | |||
124 | for (irq = 0; irq < NR_IRQS; irq++) { | 130 | for (irq = 0; irq < NR_IRQS; irq++) { |
125 | flags = IRQF_VALID; | 131 | flags = IRQF_VALID; |
126 | 132 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/entry-macro.S b/arch/arm/mach-s3c2410/include/mach/entry-macro.S index 473b3cd37d9b..7615a14773fa 100644 --- a/arch/arm/mach-s3c2410/include/mach/entry-macro.S +++ b/arch/arm/mach-s3c2410/include/mach/entry-macro.S | |||
@@ -25,9 +25,6 @@ | |||
25 | .macro get_irqnr_preamble, base, tmp | 25 | .macro get_irqnr_preamble, base, tmp |
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro arch_ret_to_user, tmp1, tmp2 | ||
29 | .endm | ||
30 | |||
31 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 28 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
32 | 29 | ||
33 | mov \base, #S3C24XX_VA_IRQ | 30 | mov \base, #S3C24XX_VA_IRQ |
@@ -71,8 +68,3 @@ | |||
71 | @@ exit here, Z flag unset if IRQ | 68 | @@ exit here, Z flag unset if IRQ |
72 | 69 | ||
73 | .endm | 70 | .endm |
74 | |||
75 | /* currently don't need an disable_fiq macro */ | ||
76 | |||
77 | .macro disable_fiq | ||
78 | .endm | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/system.h b/arch/arm/mach-s3c2410/include/mach/system.h deleted file mode 100644 index 5e215c1a5c8f..000000000000 --- a/arch/arm/mach-s3c2410/include/mach/system.h +++ /dev/null | |||
@@ -1,54 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c2410/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2003 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C2410 - System function defines and includes | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <mach/hardware.h> | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <mach/idle.h> | ||
18 | |||
19 | #include <mach/regs-clock.h> | ||
20 | |||
21 | void (*s3c24xx_idle)(void); | ||
22 | |||
23 | void s3c24xx_default_idle(void) | ||
24 | { | ||
25 | unsigned long tmp; | ||
26 | int i; | ||
27 | |||
28 | /* idle the system by using the idle mode which will wait for an | ||
29 | * interrupt to happen before restarting the system. | ||
30 | */ | ||
31 | |||
32 | /* Warning: going into idle state upsets jtag scanning */ | ||
33 | |||
34 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
35 | S3C2410_CLKCON); | ||
36 | |||
37 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
38 | for (i = 0; i < 50; i++) { | ||
39 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
40 | } | ||
41 | |||
42 | /* this bit is not cleared on re-start... */ | ||
43 | |||
44 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
45 | S3C2410_CLKCON); | ||
46 | } | ||
47 | |||
48 | static void arch_idle(void) | ||
49 | { | ||
50 | if (s3c24xx_idle != NULL) | ||
51 | (s3c24xx_idle)(); | ||
52 | else | ||
53 | s3c24xx_default_idle(); | ||
54 | } | ||
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c index aff6e85a97c6..c6eac9871093 100644 --- a/arch/arm/mach-s3c2412/s3c2412.c +++ b/arch/arm/mach-s3c2412/s3c2412.c | |||
@@ -32,8 +32,6 @@ | |||
32 | #include <asm/proc-fns.h> | 32 | #include <asm/proc-fns.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | 34 | ||
35 | #include <mach/idle.h> | ||
36 | |||
37 | #include <plat/cpu-freq.h> | 35 | #include <plat/cpu-freq.h> |
38 | 36 | ||
39 | #include <mach/regs-clock.h> | 37 | #include <mach/regs-clock.h> |
@@ -164,7 +162,7 @@ void __init s3c2412_map_io(void) | |||
164 | 162 | ||
165 | /* set our idle function */ | 163 | /* set our idle function */ |
166 | 164 | ||
167 | s3c24xx_idle = s3c2412_idle; | 165 | arm_pm_idle = s3c2412_idle; |
168 | 166 | ||
169 | /* register our io-tables */ | 167 | /* register our io-tables */ |
170 | 168 | ||
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c index 5287d2808d3e..08bb0355159d 100644 --- a/arch/arm/mach-s3c2416/s3c2416.c +++ b/arch/arm/mach-s3c2416/s3c2416.c | |||
@@ -44,7 +44,6 @@ | |||
44 | #include <asm/proc-fns.h> | 44 | #include <asm/proc-fns.h> |
45 | #include <asm/irq.h> | 45 | #include <asm/irq.h> |
46 | 46 | ||
47 | #include <mach/idle.h> | ||
48 | #include <mach/regs-s3c2443-clock.h> | 47 | #include <mach/regs-s3c2443-clock.h> |
49 | 48 | ||
50 | #include <plat/gpio-core.h> | 49 | #include <plat/gpio-core.h> |
@@ -88,8 +87,6 @@ int __init s3c2416_init(void) | |||
88 | { | 87 | { |
89 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); | 88 | printk(KERN_INFO "S3C2416: Initializing architecture\n"); |
90 | 89 | ||
91 | /* s3c24xx_idle = s3c2416_idle; */ | ||
92 | |||
93 | /* change WDT IRQ number */ | 90 | /* change WDT IRQ number */ |
94 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | 91 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; |
95 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | 92 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; |
diff --git a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S b/arch/arm/mach-s3c64xx/include/mach/entry-macro.S deleted file mode 100644 index dc2bc15142ce..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* arch/arm/mach-s3c6400/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * http://armlinux.simtec.co.uk/ | ||
6 | * Ben Dooks <ben@simtec.co.uk> | ||
7 | * | ||
8 | * Low-level IRQ helper macros for the Samsung S3C64XX series | ||
9 | * | ||
10 | * This file is licensed under the terms of the GNU General Public | ||
11 | * License version 2. This program is licensed "as is" without any | ||
12 | * warranty of any kind, whether express or implied. | ||
13 | */ | ||
14 | |||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
diff --git a/arch/arm/mach-s3c64xx/include/mach/system.h b/arch/arm/mach-s3c64xx/include/mach/system.h deleted file mode 100644 index 353ed4389ae7..000000000000 --- a/arch/arm/mach-s3c64xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s3c6400/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2008 Openmoko, Inc. | ||
4 | * Copyright 2008 Simtec Electronics | ||
5 | * Ben Dooks <ben@simtec.co.uk> | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * S3C6400 - system implementation | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5p64x0/common.c b/arch/arm/mach-s5p64x0/common.c index 52b89a376447..9143f8b19962 100644 --- a/arch/arm/mach-s5p64x0/common.c +++ b/arch/arm/mach-s5p64x0/common.c | |||
@@ -146,15 +146,12 @@ static void s5p64x0_idle(void) | |||
146 | { | 146 | { |
147 | unsigned long val; | 147 | unsigned long val; |
148 | 148 | ||
149 | if (!need_resched()) { | 149 | val = __raw_readl(S5P64X0_PWR_CFG); |
150 | val = __raw_readl(S5P64X0_PWR_CFG); | 150 | val &= ~(0x3 << 5); |
151 | val &= ~(0x3 << 5); | 151 | val |= (0x1 << 5); |
152 | val |= (0x1 << 5); | 152 | __raw_writel(val, S5P64X0_PWR_CFG); |
153 | __raw_writel(val, S5P64X0_PWR_CFG); | ||
154 | 153 | ||
155 | cpu_do_idle(); | 154 | cpu_do_idle(); |
156 | } | ||
157 | local_irq_enable(); | ||
158 | } | 155 | } |
159 | 156 | ||
160 | /* | 157 | /* |
@@ -286,7 +283,7 @@ int __init s5p64x0_init(void) | |||
286 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); | 283 | printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n"); |
287 | 284 | ||
288 | /* set idle function */ | 285 | /* set idle function */ |
289 | pm_idle = s5p64x0_idle; | 286 | arm_pm_idle = s5p64x0_idle; |
290 | 287 | ||
291 | return device_register(&s5p64x0_dev); | 288 | return device_register(&s5p64x0_dev); |
292 | } | 289 | } |
diff --git a/arch/arm/mach-s5p64x0/dma.c b/arch/arm/mach-s5p64x0/dma.c index f820c0744405..f7f68ad77910 100644 --- a/arch/arm/mach-s5p64x0/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -108,34 +108,22 @@ struct dma_pl330_platdata s5p6450_pdma_pdata = { | |||
108 | .peri_id = s5p6450_pdma_peri, | 108 | .peri_id = s5p6450_pdma_peri, |
109 | }; | 109 | }; |
110 | 110 | ||
111 | struct amba_device s5p64x0_device_pdma = { | 111 | AMBA_AHB_DEVICE(s5p64x0_pdma, "dma-pl330", 0x00041330, S5P64X0_PA_PDMA, |
112 | .dev = { | 112 | {IRQ_DMA0}, NULL); |
113 | .init_name = "dma-pl330", | ||
114 | .dma_mask = &dma_dmamask, | ||
115 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
116 | }, | ||
117 | .res = { | ||
118 | .start = S5P64X0_PA_PDMA, | ||
119 | .end = S5P64X0_PA_PDMA + SZ_4K, | ||
120 | .flags = IORESOURCE_MEM, | ||
121 | }, | ||
122 | .irq = {IRQ_DMA0, NO_IRQ}, | ||
123 | .periphid = 0x00041330, | ||
124 | }; | ||
125 | 113 | ||
126 | static int __init s5p64x0_dma_init(void) | 114 | static int __init s5p64x0_dma_init(void) |
127 | { | 115 | { |
128 | if (soc_is_s5p6450()) { | 116 | if (soc_is_s5p6450()) { |
129 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); | 117 | dma_cap_set(DMA_SLAVE, s5p6450_pdma_pdata.cap_mask); |
130 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); | 118 | dma_cap_set(DMA_CYCLIC, s5p6450_pdma_pdata.cap_mask); |
131 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | 119 | s5p64x0_pdma_device.dev.platform_data = &s5p6450_pdma_pdata; |
132 | } else { | 120 | } else { |
133 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); | 121 | dma_cap_set(DMA_SLAVE, s5p6440_pdma_pdata.cap_mask); |
134 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); | 122 | dma_cap_set(DMA_CYCLIC, s5p6440_pdma_pdata.cap_mask); |
135 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | 123 | s5p64x0_pdma_device.dev.platform_data = &s5p6440_pdma_pdata; |
136 | } | 124 | } |
137 | 125 | ||
138 | amba_device_register(&s5p64x0_device_pdma, &iomem_resource); | 126 | amba_device_register(&s5p64x0_pdma_device, &iomem_resource); |
139 | 127 | ||
140 | return 0; | 128 | return 0; |
141 | } | 129 | } |
diff --git a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S deleted file mode 100644 index fbb246d0a3df..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5P64X0 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5p64x0/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h deleted file mode 100644 index cf26e0954a2f..000000000000 --- a/arch/arm/mach-s5p64x0/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5p64x0/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * S5P64X0 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-s5pc100/common.c b/arch/arm/mach-s5pc100/common.c index c9095730a7f5..ff71e2d467c6 100644 --- a/arch/arm/mach-s5pc100/common.c +++ b/arch/arm/mach-s5pc100/common.c | |||
@@ -129,14 +129,6 @@ static struct map_desc s5pc100_iodesc[] __initdata = { | |||
129 | } | 129 | } |
130 | }; | 130 | }; |
131 | 131 | ||
132 | static void s5pc100_idle(void) | ||
133 | { | ||
134 | if (!need_resched()) | ||
135 | cpu_do_idle(); | ||
136 | |||
137 | local_irq_enable(); | ||
138 | } | ||
139 | |||
140 | /* | 132 | /* |
141 | * s5pc100_map_io | 133 | * s5pc100_map_io |
142 | * | 134 | * |
@@ -210,10 +202,6 @@ core_initcall(s5pc100_core_init); | |||
210 | int __init s5pc100_init(void) | 202 | int __init s5pc100_init(void) |
211 | { | 203 | { |
212 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); | 204 | printk(KERN_INFO "S5PC100: Initializing architecture\n"); |
213 | |||
214 | /* set idle function */ | ||
215 | pm_idle = s5pc100_idle; | ||
216 | |||
217 | return device_register(&s5pc100_dev); | 205 | return device_register(&s5pc100_dev); |
218 | } | 206 | } |
219 | 207 | ||
diff --git a/arch/arm/mach-s5pc100/dma.c b/arch/arm/mach-s5pc100/dma.c index c841f4d313f2..96b1ab3dcd48 100644 --- a/arch/arm/mach-s5pc100/dma.c +++ b/arch/arm/mach-s5pc100/dma.c | |||
@@ -73,21 +73,8 @@ struct dma_pl330_platdata s5pc100_pdma0_pdata = { | |||
73 | .peri_id = pdma0_peri, | 73 | .peri_id = pdma0_peri, |
74 | }; | 74 | }; |
75 | 75 | ||
76 | struct amba_device s5pc100_device_pdma0 = { | 76 | AMBA_AHB_DEVICE(s5pc100_pdma0, "dma-pl330.0", 0x00041330, S5PC100_PA_PDMA0, |
77 | .dev = { | 77 | {IRQ_PDMA0}, &s5pc100_pdma0_pdata); |
78 | .init_name = "dma-pl330.0", | ||
79 | .dma_mask = &dma_dmamask, | ||
80 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
81 | .platform_data = &s5pc100_pdma0_pdata, | ||
82 | }, | ||
83 | .res = { | ||
84 | .start = S5PC100_PA_PDMA0, | ||
85 | .end = S5PC100_PA_PDMA0 + SZ_4K, | ||
86 | .flags = IORESOURCE_MEM, | ||
87 | }, | ||
88 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
89 | .periphid = 0x00041330, | ||
90 | }; | ||
91 | 78 | ||
92 | u8 pdma1_peri[] = { | 79 | u8 pdma1_peri[] = { |
93 | DMACH_UART0_RX, | 80 | DMACH_UART0_RX, |
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pc100_pdma1_pdata = { | |||
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pc100_device_pdma1 = { | 117 | AMBA_AHB_DEVICE(s5pc100_pdma1, "dma-pl330.1", 0x00041330, S5PC100_PA_PDMA1, |
131 | .dev = { | 118 | {IRQ_PDMA1}, &s5pc100_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pc100_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PC100_PA_PDMA1, | ||
139 | .end = S5PC100_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pc100_dma_init(void) | 120 | static int __init s5pc100_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pc100_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pc100_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pc100_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pc100_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pc100_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pc100_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pc100_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pc100/include/mach/entry-macro.S b/arch/arm/mach-s5pc100/include/mach/entry-macro.S index b8c242edfa22..bad0700457db 100644 --- a/arch/arm/mach-s5pc100/include/mach/entry-macro.S +++ b/arch/arm/mach-s5pc100/include/mach/entry-macro.S | |||
@@ -12,14 +12,8 @@ | |||
12 | * warranty of any kind, whether express or implied. | 12 | * warranty of any kind, whether express or implied. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | .macro disable_fiq | ||
16 | .endm | ||
17 | |||
18 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
19 | .endm | 16 | .endm |
20 | 17 | ||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
23 | |||
24 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
25 | .endm | 19 | .endm |
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h deleted file mode 100644 index afc96c298518..000000000000 --- a/arch/arm/mach-s5pc100/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pc100/include/mach/system.h | ||
2 | * | ||
3 | * Copyright 2009 Samsung Electronics Co. | ||
4 | * Byungho Min <bhmin@samsung.com> | ||
5 | * | ||
6 | * S5PC100 - system implementation | ||
7 | * | ||
8 | * Based on mach-s3c6400/include/mach/system.h | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_SYSTEM_H | ||
12 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
13 | |||
14 | static void arch_idle(void) | ||
15 | { | ||
16 | /* nothing here yet */ | ||
17 | } | ||
18 | |||
19 | #endif /* __ASM_ARCH_IRQ_H */ | ||
diff --git a/arch/arm/mach-s5pv210/common.c b/arch/arm/mach-s5pv210/common.c index 9c1bcdcc12c3..4c9e9027df9a 100644 --- a/arch/arm/mach-s5pv210/common.c +++ b/arch/arm/mach-s5pv210/common.c | |||
@@ -142,14 +142,6 @@ static struct map_desc s5pv210_iodesc[] __initdata = { | |||
142 | } | 142 | } |
143 | }; | 143 | }; |
144 | 144 | ||
145 | static void s5pv210_idle(void) | ||
146 | { | ||
147 | if (!need_resched()) | ||
148 | cpu_do_idle(); | ||
149 | |||
150 | local_irq_enable(); | ||
151 | } | ||
152 | |||
153 | void s5pv210_restart(char mode, const char *cmd) | 145 | void s5pv210_restart(char mode, const char *cmd) |
154 | { | 146 | { |
155 | __raw_writel(0x1, S5P_SWRESET); | 147 | __raw_writel(0x1, S5P_SWRESET); |
@@ -247,10 +239,6 @@ core_initcall(s5pv210_core_init); | |||
247 | int __init s5pv210_init(void) | 239 | int __init s5pv210_init(void) |
248 | { | 240 | { |
249 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); | 241 | printk(KERN_INFO "S5PV210: Initializing architecture\n"); |
250 | |||
251 | /* set idle function */ | ||
252 | pm_idle = s5pv210_idle; | ||
253 | |||
254 | return device_register(&s5pv210_dev); | 242 | return device_register(&s5pv210_dev); |
255 | } | 243 | } |
256 | 244 | ||
diff --git a/arch/arm/mach-s5pv210/dma.c b/arch/arm/mach-s5pv210/dma.c index a6113e0267f2..f6885d247d14 100644 --- a/arch/arm/mach-s5pv210/dma.c +++ b/arch/arm/mach-s5pv210/dma.c | |||
@@ -71,21 +71,8 @@ struct dma_pl330_platdata s5pv210_pdma0_pdata = { | |||
71 | .peri_id = pdma0_peri, | 71 | .peri_id = pdma0_peri, |
72 | }; | 72 | }; |
73 | 73 | ||
74 | struct amba_device s5pv210_device_pdma0 = { | 74 | AMBA_AHB_DEVICE(s5pv210_pdma0, "dma-pl330.0", 0x00041330, S5PV210_PA_PDMA0, |
75 | .dev = { | 75 | {IRQ_PDMA0}, &s5pv210_pdma0_pdata); |
76 | .init_name = "dma-pl330.0", | ||
77 | .dma_mask = &dma_dmamask, | ||
78 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
79 | .platform_data = &s5pv210_pdma0_pdata, | ||
80 | }, | ||
81 | .res = { | ||
82 | .start = S5PV210_PA_PDMA0, | ||
83 | .end = S5PV210_PA_PDMA0 + SZ_4K, | ||
84 | .flags = IORESOURCE_MEM, | ||
85 | }, | ||
86 | .irq = {IRQ_PDMA0, NO_IRQ}, | ||
87 | .periphid = 0x00041330, | ||
88 | }; | ||
89 | 76 | ||
90 | u8 pdma1_peri[] = { | 77 | u8 pdma1_peri[] = { |
91 | DMACH_UART0_RX, | 78 | DMACH_UART0_RX, |
@@ -127,31 +114,18 @@ struct dma_pl330_platdata s5pv210_pdma1_pdata = { | |||
127 | .peri_id = pdma1_peri, | 114 | .peri_id = pdma1_peri, |
128 | }; | 115 | }; |
129 | 116 | ||
130 | struct amba_device s5pv210_device_pdma1 = { | 117 | AMBA_AHB_DEVICE(s5pv210_pdma1, "dma-pl330.1", 0x00041330, S5PV210_PA_PDMA1, |
131 | .dev = { | 118 | {IRQ_PDMA1}, &s5pv210_pdma1_pdata); |
132 | .init_name = "dma-pl330.1", | ||
133 | .dma_mask = &dma_dmamask, | ||
134 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
135 | .platform_data = &s5pv210_pdma1_pdata, | ||
136 | }, | ||
137 | .res = { | ||
138 | .start = S5PV210_PA_PDMA1, | ||
139 | .end = S5PV210_PA_PDMA1 + SZ_4K, | ||
140 | .flags = IORESOURCE_MEM, | ||
141 | }, | ||
142 | .irq = {IRQ_PDMA1, NO_IRQ}, | ||
143 | .periphid = 0x00041330, | ||
144 | }; | ||
145 | 119 | ||
146 | static int __init s5pv210_dma_init(void) | 120 | static int __init s5pv210_dma_init(void) |
147 | { | 121 | { |
148 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); | 122 | dma_cap_set(DMA_SLAVE, s5pv210_pdma0_pdata.cap_mask); |
149 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); | 123 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma0_pdata.cap_mask); |
150 | amba_device_register(&s5pv210_device_pdma0, &iomem_resource); | 124 | amba_device_register(&s5pv210_pdma0_device, &iomem_resource); |
151 | 125 | ||
152 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); | 126 | dma_cap_set(DMA_SLAVE, s5pv210_pdma1_pdata.cap_mask); |
153 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); | 127 | dma_cap_set(DMA_CYCLIC, s5pv210_pdma1_pdata.cap_mask); |
154 | amba_device_register(&s5pv210_device_pdma1, &iomem_resource); | 128 | amba_device_register(&s5pv210_pdma1_device, &iomem_resource); |
155 | 129 | ||
156 | return 0; | 130 | return 0; |
157 | } | 131 | } |
diff --git a/arch/arm/mach-s5pv210/include/mach/entry-macro.S b/arch/arm/mach-s5pv210/include/mach/entry-macro.S deleted file mode 100644 index bebca1b5d0b1..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,17 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * Low-level IRQ helper macros for the Samsung S5PV210 | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | .macro disable_fiq | ||
14 | .endm | ||
15 | |||
16 | .macro arch_ret_to_user, tmp1, tmp2 | ||
17 | .endm | ||
diff --git a/arch/arm/mach-s5pv210/include/mach/system.h b/arch/arm/mach-s5pv210/include/mach/system.h deleted file mode 100644 index bf288ced860a..000000000000 --- a/arch/arm/mach-s5pv210/include/mach/system.h +++ /dev/null | |||
@@ -1,21 +0,0 @@ | |||
1 | /* linux/arch/arm/mach-s5pv210/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5PV210 - system support header | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_SYSTEM_H | ||
14 | #define __ASM_ARCH_SYSTEM_H __FILE__ | ||
15 | |||
16 | static void arch_idle(void) | ||
17 | { | ||
18 | /* nothing here yet */ | ||
19 | } | ||
20 | |||
21 | #endif /* __ASM_ARCH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-sa1100/include/mach/entry-macro.S b/arch/arm/mach-sa1100/include/mach/entry-macro.S index 6aa13c46c5d3..8cf7630bf024 100644 --- a/arch/arm/mach-sa1100/include/mach/entry-macro.S +++ b/arch/arm/mach-sa1100/include/mach/entry-macro.S | |||
@@ -8,17 +8,11 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 | 12 | mov \base, #0xfa000000 @ ICIP = 0xfa050000 |
16 | add \base, \base, #0x00050000 | 13 | add \base, \base, #0x00050000 |
17 | .endm | 14 | .endm |
18 | 15 | ||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
21 | |||
22 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 16 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
23 | ldr \irqstat, [\base] @ get irqs | 17 | ldr \irqstat, [\base] @ get irqs |
24 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 | 18 | ldr \irqnr, [\base, #4] @ ICMR = 0xfa050004 |
diff --git a/arch/arm/mach-sa1100/include/mach/system.h b/arch/arm/mach-sa1100/include/mach/system.h deleted file mode 100644 index e17b208f76d4..000000000000 --- a/arch/arm/mach-sa1100/include/mach/system.h +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
5 | */ | ||
6 | static inline void arch_idle(void) | ||
7 | { | ||
8 | cpu_do_idle(); | ||
9 | } | ||
diff --git a/arch/arm/mach-shark/core.c b/arch/arm/mach-shark/core.c index a851c254ad6c..6a2a7f2c2557 100644 --- a/arch/arm/mach-shark/core.c +++ b/arch/arm/mach-shark/core.c | |||
@@ -149,10 +149,16 @@ static struct sys_timer shark_timer = { | |||
149 | .init = shark_timer_init, | 149 | .init = shark_timer_init, |
150 | }; | 150 | }; |
151 | 151 | ||
152 | static void shark_init_early(void) | ||
153 | { | ||
154 | disable_hlt(); | ||
155 | } | ||
156 | |||
152 | MACHINE_START(SHARK, "Shark") | 157 | MACHINE_START(SHARK, "Shark") |
153 | /* Maintainer: Alexander Schulz */ | 158 | /* Maintainer: Alexander Schulz */ |
154 | .atag_offset = 0x3000, | 159 | .atag_offset = 0x3000, |
155 | .map_io = shark_map_io, | 160 | .map_io = shark_map_io, |
161 | .init_early = shark_init_early, | ||
156 | .init_irq = shark_init_irq, | 162 | .init_irq = shark_init_irq, |
157 | .timer = &shark_timer, | 163 | .timer = &shark_timer, |
158 | .dma_zone_size = SZ_4M, | 164 | .dma_zone_size = SZ_4M, |
diff --git a/arch/arm/mach-shark/include/mach/entry-macro.S b/arch/arm/mach-shark/include/mach/entry-macro.S index 0bb6cc626eb7..5901b09fc96a 100644 --- a/arch/arm/mach-shark/include/mach/entry-macro.S +++ b/arch/arm/mach-shark/include/mach/entry-macro.S | |||
@@ -7,16 +7,10 @@ | |||
7 | * License version 2. This program is licensed "as is" without any | 7 | * License version 2. This program is licensed "as is" without any |
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | .macro disable_fiq | ||
11 | .endm | ||
12 | |||
13 | .macro get_irqnr_preamble, base, tmp | 10 | .macro get_irqnr_preamble, base, tmp |
14 | mov \base, #0xe0000000 | 11 | mov \base, #0xe0000000 |
15 | .endm | 12 | .endm |
16 | 13 | ||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
19 | |||
20 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 14 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
21 | 15 | ||
22 | mov \irqstat, #0x0C | 16 | mov \irqstat, #0x0C |
diff --git a/arch/arm/mach-shark/include/mach/system.h b/arch/arm/mach-shark/include/mach/system.h deleted file mode 100644 index 1b2f2c5050a8..000000000000 --- a/arch/arm/mach-shark/include/mach/system.h +++ /dev/null | |||
@@ -1,13 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-shark/include/mach/system.h | ||
3 | * | ||
4 | * by Alexander Schulz | ||
5 | */ | ||
6 | #ifndef __ASM_ARCH_SYSTEM_H | ||
7 | #define __ASM_ARCH_SYSTEM_H | ||
8 | |||
9 | static inline void arch_idle(void) | ||
10 | { | ||
11 | } | ||
12 | |||
13 | #endif | ||
diff --git a/arch/arm/mach-shmobile/include/mach/entry-macro.S b/arch/arm/mach-shmobile/include/mach/entry-macro.S deleted file mode 100644 index 2a57b2964ee9..000000000000 --- a/arch/arm/mach-shmobile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,22 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2010 Paul Mundt | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; version 2 of the License. | ||
7 | * | ||
8 | * This program is distributed in the hope that it will be useful, | ||
9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
11 | * GNU General Public License for more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program; if not, write to the Free Software | ||
15 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
16 | */ | ||
17 | |||
18 | .macro disable_fiq | ||
19 | .endm | ||
20 | |||
21 | .macro arch_ret_to_user, tmp1, tmp2 | ||
22 | .endm | ||
diff --git a/arch/arm/mach-shmobile/include/mach/system.h b/arch/arm/mach-shmobile/include/mach/system.h index 956ac18ddbf9..3bbcb3fa0775 100644 --- a/arch/arm/mach-shmobile/include/mach/system.h +++ b/arch/arm/mach-shmobile/include/mach/system.h | |||
@@ -1,11 +1,6 @@ | |||
1 | #ifndef __ASM_ARCH_SYSTEM_H | 1 | #ifndef __ASM_ARCH_SYSTEM_H |
2 | #define __ASM_ARCH_SYSTEM_H | 2 | #define __ASM_ARCH_SYSTEM_H |
3 | 3 | ||
4 | static inline void arch_idle(void) | ||
5 | { | ||
6 | cpu_do_idle(); | ||
7 | } | ||
8 | |||
9 | static inline void arch_reset(char mode, const char *cmd) | 4 | static inline void arch_reset(char mode, const char *cmd) |
10 | { | 5 | { |
11 | soft_restart(0); | 6 | soft_restart(0); |
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S deleted file mode 100644 index de3bb41c8e9e..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr3xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear3xx/include/mach/system.h b/arch/arm/mach-spear3xx/include/mach/system.h deleted file mode 100644 index 92cee6335c90..000000000000 --- a/arch/arm/mach-spear3xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear3xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr3xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear3xx/spear300.c b/arch/arm/mach-spear3xx/spear300.c index a5e46b4ade20..9da50e281e98 100644 --- a/arch/arm/mach-spear3xx/spear300.c +++ b/arch/arm/mach-spear3xx/spear300.c | |||
@@ -430,18 +430,8 @@ static struct pl061_platform_data gpio1_plat_data = { | |||
430 | .irq_base = SPEAR300_GPIO1_INT_BASE, | 430 | .irq_base = SPEAR300_GPIO1_INT_BASE, |
431 | }; | 431 | }; |
432 | 432 | ||
433 | struct amba_device spear300_gpio1_device = { | 433 | AMBA_APB_DEVICE(spear300_gpio1, "gpio1", 0, SPEAR300_GPIO_BASE, |
434 | .dev = { | 434 | {SPEAR300_VIRQ_GPIO1}, &gpio1_plat_data); |
435 | .init_name = "gpio1", | ||
436 | .platform_data = &gpio1_plat_data, | ||
437 | }, | ||
438 | .res = { | ||
439 | .start = SPEAR300_GPIO_BASE, | ||
440 | .end = SPEAR300_GPIO_BASE + SZ_4K - 1, | ||
441 | .flags = IORESOURCE_MEM, | ||
442 | }, | ||
443 | .irq = {SPEAR300_VIRQ_GPIO1, NO_IRQ}, | ||
444 | }; | ||
445 | 435 | ||
446 | /* spear300 routines */ | 436 | /* spear300 routines */ |
447 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, | 437 | void __init spear300_init(struct pmx_mode *pmx_mode, struct pmx_dev **pmx_devs, |
diff --git a/arch/arm/mach-spear3xx/spear3xx.c b/arch/arm/mach-spear3xx/spear3xx.c index 10af45da86a0..b1733c37f209 100644 --- a/arch/arm/mach-spear3xx/spear3xx.c +++ b/arch/arm/mach-spear3xx/spear3xx.c | |||
@@ -28,31 +28,12 @@ static struct pl061_platform_data gpio_plat_data = { | |||
28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, | 28 | .irq_base = SPEAR3XX_GPIO_INT_BASE, |
29 | }; | 29 | }; |
30 | 30 | ||
31 | struct amba_device spear3xx_gpio_device = { | 31 | AMBA_APB_DEVICE(spear3xx_gpio, "gpio", 0, SPEAR3XX_ICM3_GPIO_BASE, |
32 | .dev = { | 32 | {SPEAR3XX_IRQ_BASIC_GPIO}, &gpio_plat_data); |
33 | .init_name = "gpio", | ||
34 | .platform_data = &gpio_plat_data, | ||
35 | }, | ||
36 | .res = { | ||
37 | .start = SPEAR3XX_ICM3_GPIO_BASE, | ||
38 | .end = SPEAR3XX_ICM3_GPIO_BASE + SZ_4K - 1, | ||
39 | .flags = IORESOURCE_MEM, | ||
40 | }, | ||
41 | .irq = {SPEAR3XX_IRQ_BASIC_GPIO, NO_IRQ}, | ||
42 | }; | ||
43 | 33 | ||
44 | /* uart device registration */ | 34 | /* uart device registration */ |
45 | struct amba_device spear3xx_uart_device = { | 35 | AMBA_APB_DEVICE(spear3xx_uart, "uart", 0, SPEAR3XX_ICM1_UART_BASE, |
46 | .dev = { | 36 | {SPEAR3XX_IRQ_UART}, NULL); |
47 | .init_name = "uart", | ||
48 | }, | ||
49 | .res = { | ||
50 | .start = SPEAR3XX_ICM1_UART_BASE, | ||
51 | .end = SPEAR3XX_ICM1_UART_BASE + SZ_4K - 1, | ||
52 | .flags = IORESOURCE_MEM, | ||
53 | }, | ||
54 | .irq = {SPEAR3XX_IRQ_UART, NO_IRQ}, | ||
55 | }; | ||
56 | 37 | ||
57 | /* Do spear3xx familiy common initialization part here */ | 38 | /* Do spear3xx familiy common initialization part here */ |
58 | void __init spear3xx_init(void) | 39 | void __init spear3xx_init(void) |
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S deleted file mode 100644 index d490a910d925..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for SPEAr6xx machine family | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-spear6xx/include/mach/system.h b/arch/arm/mach-spear6xx/include/mach/system.h deleted file mode 100644 index 0b1d2be81cfb..000000000000 --- a/arch/arm/mach-spear6xx/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-spear6xx/include/mach/system.h | ||
3 | * | ||
4 | * SPEAr6xx Machine family specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Rajeev Kumar<rajeev-dlh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __MACH_SYSTEM_H | ||
15 | #define __MACH_SYSTEM_H | ||
16 | |||
17 | #include <plat/system.h> | ||
18 | |||
19 | #endif /* __MACH_SYSTEM_H */ | ||
diff --git a/arch/arm/mach-spear6xx/spear6xx.c b/arch/arm/mach-spear6xx/spear6xx.c index e0f6628c8b2c..b997b1b10ba0 100644 --- a/arch/arm/mach-spear6xx/spear6xx.c +++ b/arch/arm/mach-spear6xx/spear6xx.c | |||
@@ -34,7 +34,7 @@ struct amba_device uart_device[] = { | |||
34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, | 34 | .end = SPEAR6XX_ICM1_UART0_BASE + SZ_4K - 1, |
35 | .flags = IORESOURCE_MEM, | 35 | .flags = IORESOURCE_MEM, |
36 | }, | 36 | }, |
37 | .irq = {IRQ_UART_0, NO_IRQ}, | 37 | .irq = {IRQ_UART_0}, |
38 | }, { | 38 | }, { |
39 | .dev = { | 39 | .dev = { |
40 | .init_name = "uart1", | 40 | .init_name = "uart1", |
@@ -44,7 +44,7 @@ struct amba_device uart_device[] = { | |||
44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, | 44 | .end = SPEAR6XX_ICM1_UART1_BASE + SZ_4K - 1, |
45 | .flags = IORESOURCE_MEM, | 45 | .flags = IORESOURCE_MEM, |
46 | }, | 46 | }, |
47 | .irq = {IRQ_UART_1, NO_IRQ}, | 47 | .irq = {IRQ_UART_1}, |
48 | } | 48 | } |
49 | }; | 49 | }; |
50 | 50 | ||
@@ -73,7 +73,7 @@ struct amba_device gpio_device[] = { | |||
73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, | 73 | .end = SPEAR6XX_CPU_GPIO_BASE + SZ_4K - 1, |
74 | .flags = IORESOURCE_MEM, | 74 | .flags = IORESOURCE_MEM, |
75 | }, | 75 | }, |
76 | .irq = {IRQ_LOCAL_GPIO, NO_IRQ}, | 76 | .irq = {IRQ_LOCAL_GPIO}, |
77 | }, { | 77 | }, { |
78 | .dev = { | 78 | .dev = { |
79 | .init_name = "gpio1", | 79 | .init_name = "gpio1", |
@@ -84,7 +84,7 @@ struct amba_device gpio_device[] = { | |||
84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, | 84 | .end = SPEAR6XX_ICM3_GPIO_BASE + SZ_4K - 1, |
85 | .flags = IORESOURCE_MEM, | 85 | .flags = IORESOURCE_MEM, |
86 | }, | 86 | }, |
87 | .irq = {IRQ_BASIC_GPIO, NO_IRQ}, | 87 | .irq = {IRQ_BASIC_GPIO}, |
88 | }, { | 88 | }, { |
89 | .dev = { | 89 | .dev = { |
90 | .init_name = "gpio2", | 90 | .init_name = "gpio2", |
@@ -95,7 +95,7 @@ struct amba_device gpio_device[] = { | |||
95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, | 95 | .end = SPEAR6XX_ICM2_GPIO_BASE + SZ_4K - 1, |
96 | .flags = IORESOURCE_MEM, | 96 | .flags = IORESOURCE_MEM, |
97 | }, | 97 | }, |
98 | .irq = {IRQ_APPL_GPIO, NO_IRQ}, | 98 | .irq = {IRQ_APPL_GPIO}, |
99 | } | 99 | } |
100 | }; | 100 | }; |
101 | 101 | ||
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 373652d76b90..6ae78821fd8e 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -8,8 +8,16 @@ config ARCH_TEGRA_2x_SOC | |||
8 | select ARM_GIC | 8 | select ARM_GIC |
9 | select ARCH_REQUIRE_GPIOLIB | 9 | select ARCH_REQUIRE_GPIOLIB |
10 | select USB_ARCH_HAS_EHCI if USB_SUPPORT | 10 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
11 | select USB_ULPI if USB_SUPPORT | 11 | select USB_ULPI if USB |
12 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 12 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
13 | select ARM_ERRATA_720789 | ||
14 | select ARM_ERRATA_742230 | ||
15 | select ARM_ERRATA_751472 | ||
16 | select ARM_ERRATA_754327 | ||
17 | select ARM_ERRATA_764369 | ||
18 | select PL310_ERRATA_727915 if CACHE_L2X0 | ||
19 | select PL310_ERRATA_769419 if CACHE_L2X0 | ||
20 | select CPU_FREQ_TABLE if CPU_FREQ | ||
13 | help | 21 | help |
14 | Support for NVIDIA Tegra AP20 and T20 processors, based on the | 22 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
15 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 23 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
@@ -20,9 +28,15 @@ config ARCH_TEGRA_3x_SOC | |||
20 | select ARM_GIC | 28 | select ARM_GIC |
21 | select ARCH_REQUIRE_GPIOLIB | 29 | select ARCH_REQUIRE_GPIOLIB |
22 | select USB_ARCH_HAS_EHCI if USB_SUPPORT | 30 | select USB_ARCH_HAS_EHCI if USB_SUPPORT |
23 | select USB_ULPI if USB_SUPPORT | 31 | select USB_ULPI if USB |
24 | select USB_ULPI_VIEWPORT if USB_SUPPORT | 32 | select USB_ULPI_VIEWPORT if USB_SUPPORT |
25 | select USE_OF | 33 | select USE_OF |
34 | select ARM_ERRATA_743622 | ||
35 | select ARM_ERRATA_751472 | ||
36 | select ARM_ERRATA_754322 | ||
37 | select ARM_ERRATA_764369 | ||
38 | select PL310_ERRATA_769419 if CACHE_L2X0 | ||
39 | select CPU_FREQ_TABLE if CPU_FREQ | ||
26 | help | 40 | help |
27 | Support for NVIDIA Tegra T30 processor family, based on the | 41 | Support for NVIDIA Tegra T30 processor family, based on the |
28 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 42 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index f7d044369ed5..bcbb4e8d5530 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile | |||
@@ -13,7 +13,7 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o | |||
13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o | 13 | obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += pinmux-tegra20-tables.o |
14 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o | 14 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += pinmux-tegra30-tables.o |
15 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o | 15 | obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o |
16 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o | 16 | obj-$(CONFIG_SMP) += platsmp.o headsmp.o |
17 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o | 17 | obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o |
18 | obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o | 18 | obj-$(CONFIG_TEGRA_SYSTEM_DMA) += dma.o |
19 | obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o | 19 | obj-$(CONFIG_CPU_FREQ) += cpu-tegra.o |
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 465808c8ac0b..1af85bccc0f1 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c | |||
@@ -53,7 +53,7 @@ static struct tegra_pingroup_config harmony_pinmux[] = { | |||
53 | {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 53 | {TEGRA_PINGROUP_GME, TEGRA_MUX_SDIO4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
54 | {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 54 | {TEGRA_PINGROUP_GPU, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
55 | {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 55 | {TEGRA_PINGROUP_GPU7, TEGRA_MUX_RTCK, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
56 | {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 56 | {TEGRA_PINGROUP_GPV, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
57 | {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 57 | {TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
58 | {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 58 | {TEGRA_PINGROUP_I2CP, TEGRA_MUX_I2C, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
59 | {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 59 | {TEGRA_PINGROUP_IRRX, TEGRA_MUX_UARTA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
@@ -112,10 +112,10 @@ static struct tegra_pingroup_config harmony_pinmux[] = { | |||
112 | {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, | 112 | {TEGRA_PINGROUP_SDC, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_NORMAL}, |
113 | {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, | 113 | {TEGRA_PINGROUP_SDD, TEGRA_MUX_PWM, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE}, |
114 | {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 114 | {TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
115 | {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 115 | {TEGRA_PINGROUP_SLXA, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
116 | {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 116 | {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
117 | {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 117 | {TEGRA_PINGROUP_SLXD, TEGRA_MUX_SPDIF, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
118 | {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 118 | {TEGRA_PINGROUP_SLXK, TEGRA_MUX_PCIE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
119 | {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 119 | {TEGRA_PINGROUP_SPDI, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
120 | {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 120 | {TEGRA_PINGROUP_SPDO, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
121 | {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 121 | {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
diff --git a/arch/arm/mach-tegra/common.c b/arch/arm/mach-tegra/common.c index a2eb90169aed..fac449e84d80 100644 --- a/arch/arm/mach-tegra/common.c +++ b/arch/arm/mach-tegra/common.c | |||
@@ -27,7 +27,6 @@ | |||
27 | #include <asm/hardware/gic.h> | 27 | #include <asm/hardware/gic.h> |
28 | 28 | ||
29 | #include <mach/iomap.h> | 29 | #include <mach/iomap.h> |
30 | #include <mach/system.h> | ||
31 | 30 | ||
32 | #include "board.h" | 31 | #include "board.h" |
33 | #include "clock.h" | 32 | #include "clock.h" |
diff --git a/arch/arm/mach-tegra/include/mach/entry-macro.S b/arch/arm/mach-tegra/include/mach/entry-macro.S deleted file mode 100644 index e577cfe27e72..000000000000 --- a/arch/arm/mach-tegra/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* arch/arm/mach-tegra/include/mach/entry-macro.S | ||
2 | * | ||
3 | * Copyright (C) 2009 Palm, Inc. | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | */ | ||
15 | |||
16 | .macro disable_fiq | ||
17 | .endm | ||
18 | |||
19 | .macro arch_ret_to_user, tmp1, tmp2 | ||
20 | .endm | ||
diff --git a/arch/arm/mach-tegra/include/mach/system.h b/arch/arm/mach-tegra/include/mach/system.h deleted file mode 100644 index a312988bf6f8..000000000000 --- a/arch/arm/mach-tegra/include/mach/system.h +++ /dev/null | |||
@@ -1,28 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-tegra/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2010 Google, Inc. | ||
5 | * | ||
6 | * Author: | ||
7 | * Colin Cross <ccross@google.com> | ||
8 | * Erik Gilling <konkers@google.com> | ||
9 | * | ||
10 | * This software is licensed under the terms of the GNU General Public | ||
11 | * License version 2, as published by the Free Software Foundation, and | ||
12 | * may be copied, distributed, and modified under those terms. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | */ | ||
20 | |||
21 | #ifndef __MACH_TEGRA_SYSTEM_H | ||
22 | #define __MACH_TEGRA_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | } | ||
27 | |||
28 | #endif | ||
diff --git a/arch/arm/mach-tegra/pcie.c b/arch/arm/mach-tegra/pcie.c index af8b63435727..91536996c3f0 100644 --- a/arch/arm/mach-tegra/pcie.c +++ b/arch/arm/mach-tegra/pcie.c | |||
@@ -585,10 +585,10 @@ static void tegra_pcie_setup_translations(void) | |||
585 | afi_writel(0, AFI_MSI_BAR_SZ); | 585 | afi_writel(0, AFI_MSI_BAR_SZ); |
586 | } | 586 | } |
587 | 587 | ||
588 | static void tegra_pcie_enable_controller(void) | 588 | static int tegra_pcie_enable_controller(void) |
589 | { | 589 | { |
590 | u32 val, reg; | 590 | u32 val, reg; |
591 | int i; | 591 | int i, timeout; |
592 | 592 | ||
593 | /* Enable slot clock and pulse the reset signals */ | 593 | /* Enable slot clock and pulse the reset signals */ |
594 | for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { | 594 | for (i = 0, reg = AFI_PEX0_CTRL; i < 2; i++, reg += 0x8) { |
@@ -639,8 +639,14 @@ static void tegra_pcie_enable_controller(void) | |||
639 | pads_writel(0xfa5cfa5c, 0xc8); | 639 | pads_writel(0xfa5cfa5c, 0xc8); |
640 | 640 | ||
641 | /* Wait for the PLL to lock */ | 641 | /* Wait for the PLL to lock */ |
642 | timeout = 300; | ||
642 | do { | 643 | do { |
643 | val = pads_readl(PADS_PLL_CTL); | 644 | val = pads_readl(PADS_PLL_CTL); |
645 | usleep_range(1000, 1000); | ||
646 | if (--timeout == 0) { | ||
647 | pr_err("Tegra PCIe error: timeout waiting for PLL\n"); | ||
648 | return -EBUSY; | ||
649 | } | ||
644 | } while (!(val & PADS_PLL_CTL_LOCKDET)); | 650 | } while (!(val & PADS_PLL_CTL_LOCKDET)); |
645 | 651 | ||
646 | /* turn off IDDQ override */ | 652 | /* turn off IDDQ override */ |
@@ -671,7 +677,7 @@ static void tegra_pcie_enable_controller(void) | |||
671 | /* Disable all execptions */ | 677 | /* Disable all execptions */ |
672 | afi_writel(0, AFI_FPCI_ERROR_MASKS); | 678 | afi_writel(0, AFI_FPCI_ERROR_MASKS); |
673 | 679 | ||
674 | return; | 680 | return 0; |
675 | } | 681 | } |
676 | 682 | ||
677 | static void tegra_pcie_xclk_clamp(bool clamp) | 683 | static void tegra_pcie_xclk_clamp(bool clamp) |
@@ -921,7 +927,9 @@ int __init tegra_pcie_init(bool init_port0, bool init_port1) | |||
921 | if (err) | 927 | if (err) |
922 | return err; | 928 | return err; |
923 | 929 | ||
924 | tegra_pcie_enable_controller(); | 930 | err = tegra_pcie_enable_controller(); |
931 | if (err) | ||
932 | return err; | ||
925 | 933 | ||
926 | /* setup the AFI address translations */ | 934 | /* setup the AFI address translations */ |
927 | tegra_pcie_setup_translations(); | 935 | tegra_pcie_setup_translations(); |
diff --git a/arch/arm/mach-tegra/usb_phy.c b/arch/arm/mach-tegra/usb_phy.c index 37576a721aeb..6091cf3d8e8b 100644 --- a/arch/arm/mach-tegra/usb_phy.c +++ b/arch/arm/mach-tegra/usb_phy.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/delay.h> | 22 | #include <linux/delay.h> |
23 | #include <linux/slab.h> | 23 | #include <linux/slab.h> |
24 | #include <linux/err.h> | 24 | #include <linux/err.h> |
25 | #include <linux/export.h> | ||
25 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
26 | #include <linux/io.h> | 27 | #include <linux/io.h> |
27 | #include <linux/gpio.h> | 28 | #include <linux/gpio.h> |
@@ -730,6 +731,7 @@ err0: | |||
730 | kfree(phy); | 731 | kfree(phy); |
731 | return ERR_PTR(err); | 732 | return ERR_PTR(err); |
732 | } | 733 | } |
734 | EXPORT_SYMBOL_GPL(tegra_usb_phy_open); | ||
733 | 735 | ||
734 | int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) | 736 | int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) |
735 | { | 737 | { |
@@ -738,6 +740,7 @@ int tegra_usb_phy_power_on(struct tegra_usb_phy *phy) | |||
738 | else | 740 | else |
739 | return utmi_phy_power_on(phy); | 741 | return utmi_phy_power_on(phy); |
740 | } | 742 | } |
743 | EXPORT_SYMBOL_GPL(tegra_usb_phy_power_on); | ||
741 | 744 | ||
742 | void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) | 745 | void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) |
743 | { | 746 | { |
@@ -746,18 +749,21 @@ void tegra_usb_phy_power_off(struct tegra_usb_phy *phy) | |||
746 | else | 749 | else |
747 | utmi_phy_power_off(phy); | 750 | utmi_phy_power_off(phy); |
748 | } | 751 | } |
752 | EXPORT_SYMBOL_GPL(tegra_usb_phy_power_off); | ||
749 | 753 | ||
750 | void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) | 754 | void tegra_usb_phy_preresume(struct tegra_usb_phy *phy) |
751 | { | 755 | { |
752 | if (!phy_is_ulpi(phy)) | 756 | if (!phy_is_ulpi(phy)) |
753 | utmi_phy_preresume(phy); | 757 | utmi_phy_preresume(phy); |
754 | } | 758 | } |
759 | EXPORT_SYMBOL_GPL(tegra_usb_phy_preresume); | ||
755 | 760 | ||
756 | void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) | 761 | void tegra_usb_phy_postresume(struct tegra_usb_phy *phy) |
757 | { | 762 | { |
758 | if (!phy_is_ulpi(phy)) | 763 | if (!phy_is_ulpi(phy)) |
759 | utmi_phy_postresume(phy); | 764 | utmi_phy_postresume(phy); |
760 | } | 765 | } |
766 | EXPORT_SYMBOL_GPL(tegra_usb_phy_postresume); | ||
761 | 767 | ||
762 | void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, | 768 | void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, |
763 | enum tegra_usb_phy_port_speed port_speed) | 769 | enum tegra_usb_phy_port_speed port_speed) |
@@ -765,24 +771,28 @@ void tegra_ehci_phy_restore_start(struct tegra_usb_phy *phy, | |||
765 | if (!phy_is_ulpi(phy)) | 771 | if (!phy_is_ulpi(phy)) |
766 | utmi_phy_restore_start(phy, port_speed); | 772 | utmi_phy_restore_start(phy, port_speed); |
767 | } | 773 | } |
774 | EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_start); | ||
768 | 775 | ||
769 | void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) | 776 | void tegra_ehci_phy_restore_end(struct tegra_usb_phy *phy) |
770 | { | 777 | { |
771 | if (!phy_is_ulpi(phy)) | 778 | if (!phy_is_ulpi(phy)) |
772 | utmi_phy_restore_end(phy); | 779 | utmi_phy_restore_end(phy); |
773 | } | 780 | } |
781 | EXPORT_SYMBOL_GPL(tegra_ehci_phy_restore_end); | ||
774 | 782 | ||
775 | void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) | 783 | void tegra_usb_phy_clk_disable(struct tegra_usb_phy *phy) |
776 | { | 784 | { |
777 | if (!phy_is_ulpi(phy)) | 785 | if (!phy_is_ulpi(phy)) |
778 | utmi_phy_clk_disable(phy); | 786 | utmi_phy_clk_disable(phy); |
779 | } | 787 | } |
788 | EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_disable); | ||
780 | 789 | ||
781 | void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) | 790 | void tegra_usb_phy_clk_enable(struct tegra_usb_phy *phy) |
782 | { | 791 | { |
783 | if (!phy_is_ulpi(phy)) | 792 | if (!phy_is_ulpi(phy)) |
784 | utmi_phy_clk_enable(phy); | 793 | utmi_phy_clk_enable(phy); |
785 | } | 794 | } |
795 | EXPORT_SYMBOL_GPL(tegra_usb_phy_clk_enable); | ||
786 | 796 | ||
787 | void tegra_usb_phy_close(struct tegra_usb_phy *phy) | 797 | void tegra_usb_phy_close(struct tegra_usb_phy *phy) |
788 | { | 798 | { |
@@ -794,3 +804,4 @@ void tegra_usb_phy_close(struct tegra_usb_phy *phy) | |||
794 | clk_put(phy->pll_u); | 804 | clk_put(phy->pll_u); |
795 | kfree(phy); | 805 | kfree(phy); |
796 | } | 806 | } |
807 | EXPORT_SYMBOL_GPL(tegra_usb_phy_close); | ||
diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index b4c6926a700c..b9865605da09 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c | |||
@@ -94,19 +94,9 @@ static struct amba_pl011_data uart0_plat_data = { | |||
94 | #endif | 94 | #endif |
95 | }; | 95 | }; |
96 | 96 | ||
97 | static struct amba_device uart0_device = { | 97 | /* Slow device at 0x3000 offset */ |
98 | .dev = { | 98 | static AMBA_APB_DEVICE(uart0, "uart0", 0, U300_UART0_BASE, |
99 | .coherent_dma_mask = ~0, | 99 | { IRQ_U300_UART0 }, &uart0_plat_data); |
100 | .init_name = "uart0", /* Slow device at 0x3000 offset */ | ||
101 | .platform_data = &uart0_plat_data, | ||
102 | }, | ||
103 | .res = { | ||
104 | .start = U300_UART0_BASE, | ||
105 | .end = U300_UART0_BASE + SZ_4K - 1, | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | }, | ||
108 | .irq = { IRQ_U300_UART0, NO_IRQ }, | ||
109 | }; | ||
110 | 100 | ||
111 | /* The U335 have an additional UART1 on the APP CPU */ | 101 | /* The U335 have an additional UART1 on the APP CPU */ |
112 | #ifdef CONFIG_MACH_U300_BS335 | 102 | #ifdef CONFIG_MACH_U300_BS335 |
@@ -118,71 +108,28 @@ static struct amba_pl011_data uart1_plat_data = { | |||
118 | #endif | 108 | #endif |
119 | }; | 109 | }; |
120 | 110 | ||
121 | static struct amba_device uart1_device = { | 111 | /* Fast device at 0x7000 offset */ |
122 | .dev = { | 112 | static AMBA_APB_DEVICE(uart1, "uart1", 0, U300_UART1_BASE, |
123 | .coherent_dma_mask = ~0, | 113 | { IRQ_U300_UART1 }, &uart1_plat_data); |
124 | .init_name = "uart1", /* Fast device at 0x7000 offset */ | ||
125 | .platform_data = &uart1_plat_data, | ||
126 | }, | ||
127 | .res = { | ||
128 | .start = U300_UART1_BASE, | ||
129 | .end = U300_UART1_BASE + SZ_4K - 1, | ||
130 | .flags = IORESOURCE_MEM, | ||
131 | }, | ||
132 | .irq = { IRQ_U300_UART1, NO_IRQ }, | ||
133 | }; | ||
134 | #endif | 114 | #endif |
135 | 115 | ||
136 | static struct amba_device pl172_device = { | 116 | /* AHB device at 0x4000 offset */ |
137 | .dev = { | 117 | static AMBA_APB_DEVICE(pl172, "pl172", 0, U300_EMIF_CFG_BASE, { }, NULL); |
138 | .init_name = "pl172", /* AHB device at 0x4000 offset */ | ||
139 | .platform_data = NULL, | ||
140 | }, | ||
141 | .res = { | ||
142 | .start = U300_EMIF_CFG_BASE, | ||
143 | .end = U300_EMIF_CFG_BASE + SZ_4K - 1, | ||
144 | .flags = IORESOURCE_MEM, | ||
145 | }, | ||
146 | }; | ||
147 | 118 | ||
148 | 119 | ||
149 | /* | 120 | /* |
150 | * Everything within this next ifdef deals with external devices connected to | 121 | * Everything within this next ifdef deals with external devices connected to |
151 | * the APP SPI bus. | 122 | * the APP SPI bus. |
152 | */ | 123 | */ |
153 | static struct amba_device pl022_device = { | 124 | /* Fast device at 0x6000 offset */ |
154 | .dev = { | 125 | static AMBA_APB_DEVICE(pl022, "pl022", 0, U300_SPI_BASE, |
155 | .coherent_dma_mask = ~0, | 126 | { IRQ_U300_SPI }, NULL); |
156 | .init_name = "pl022", /* Fast device at 0x6000 offset */ | ||
157 | }, | ||
158 | .res = { | ||
159 | .start = U300_SPI_BASE, | ||
160 | .end = U300_SPI_BASE + SZ_4K - 1, | ||
161 | .flags = IORESOURCE_MEM, | ||
162 | }, | ||
163 | .irq = {IRQ_U300_SPI, NO_IRQ }, | ||
164 | /* | ||
165 | * This device has a DMA channel but the Linux driver does not use | ||
166 | * it currently. | ||
167 | */ | ||
168 | }; | ||
169 | 127 | ||
170 | static struct amba_device mmcsd_device = { | 128 | /* Fast device at 0x1000 offset */ |
171 | .dev = { | 129 | #define U300_MMCSD_IRQS { IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 } |
172 | .init_name = "mmci", /* Fast device at 0x1000 offset */ | 130 | |
173 | .platform_data = NULL, /* Added later */ | 131 | static AMBA_APB_DEVICE(mmcsd, "mmci", 0, U300_MMCSD_BASE, |
174 | }, | 132 | U300_MMCSD_IRQS, NULL); |
175 | .res = { | ||
176 | .start = U300_MMCSD_BASE, | ||
177 | .end = U300_MMCSD_BASE + SZ_4K - 1, | ||
178 | .flags = IORESOURCE_MEM, | ||
179 | }, | ||
180 | .irq = {IRQ_U300_MMCSD_MCIINTR0, IRQ_U300_MMCSD_MCIINTR1 }, | ||
181 | /* | ||
182 | * This device has a DMA channel but the Linux driver does not use | ||
183 | * it currently. | ||
184 | */ | ||
185 | }; | ||
186 | 133 | ||
187 | /* | 134 | /* |
188 | * The order of device declaration may be important, since some devices | 135 | * The order of device declaration may be important, since some devices |
diff --git a/arch/arm/mach-u300/include/mach/entry-macro.S b/arch/arm/mach-u300/include/mach/entry-macro.S deleted file mode 100644 index 7181d6ac6651..000000000000 --- a/arch/arm/mach-u300/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch-arm/mach-u300/include/mach/entry-macro.S | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2006-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * Low-level IRQ helper macros for ST-Ericsson U300 | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/mach-u300/include/mach/system.h b/arch/arm/mach-u300/include/mach/system.h deleted file mode 100644 index 574d46e38290..000000000000 --- a/arch/arm/mach-u300/include/mach/system.h +++ /dev/null | |||
@@ -1,14 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * arch/arm/mach-u300/include/mach/system.h | ||
4 | * | ||
5 | * | ||
6 | * Copyright (C) 2007-2009 ST-Ericsson AB | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * System shutdown and reset functions. | ||
9 | * Author: Linus Walleij <linus.walleij@stericsson.com> | ||
10 | */ | ||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | cpu_do_idle(); | ||
14 | } | ||
diff --git a/arch/arm/mach-ux500/devices-common.c b/arch/arm/mach-ux500/devices-common.c index c563e5418d80..898a64517b09 100644 --- a/arch/arm/mach-ux500/devices-common.c +++ b/arch/arm/mach-ux500/devices-common.c | |||
@@ -26,29 +26,22 @@ dbx500_add_amba_device(const char *name, resource_size_t base, | |||
26 | struct amba_device *dev; | 26 | struct amba_device *dev; |
27 | int ret; | 27 | int ret; |
28 | 28 | ||
29 | dev = kzalloc(sizeof *dev, GFP_KERNEL); | 29 | dev = amba_device_alloc(name, base, SZ_4K); |
30 | if (!dev) | 30 | if (!dev) |
31 | return ERR_PTR(-ENOMEM); | 31 | return ERR_PTR(-ENOMEM); |
32 | 32 | ||
33 | dev->dev.init_name = name; | ||
34 | |||
35 | dev->res.start = base; | ||
36 | dev->res.end = base + SZ_4K - 1; | ||
37 | dev->res.flags = IORESOURCE_MEM; | ||
38 | |||
39 | dev->dma_mask = DMA_BIT_MASK(32); | 33 | dev->dma_mask = DMA_BIT_MASK(32); |
40 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); | 34 | dev->dev.coherent_dma_mask = DMA_BIT_MASK(32); |
41 | 35 | ||
42 | dev->irq[0] = irq; | 36 | dev->irq[0] = irq; |
43 | dev->irq[1] = NO_IRQ; | ||
44 | 37 | ||
45 | dev->periphid = periphid; | 38 | dev->periphid = periphid; |
46 | 39 | ||
47 | dev->dev.platform_data = pdata; | 40 | dev->dev.platform_data = pdata; |
48 | 41 | ||
49 | ret = amba_device_register(dev, &iomem_resource); | 42 | ret = amba_device_add(dev, &iomem_resource); |
50 | if (ret) { | 43 | if (ret) { |
51 | kfree(dev); | 44 | amba_device_put(dev); |
52 | return ERR_PTR(ret); | 45 | return ERR_PTR(ret); |
53 | } | 46 | } |
54 | 47 | ||
diff --git a/arch/arm/mach-ux500/include/mach/entry-macro.S b/arch/arm/mach-ux500/include/mach/entry-macro.S deleted file mode 100644 index e16299e1020a..000000000000 --- a/arch/arm/mach-ux500/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,18 +0,0 @@ | |||
1 | /* | ||
2 | * Low-level IRQ helper macros for U8500 platforms | ||
3 | * | ||
4 | * Copyright (C) 2009 ST-Ericsson. | ||
5 | * | ||
6 | * This file is a copy of ARM Realview platform. | ||
7 | * -just satisfied checkpatch script. | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | .macro disable_fiq | ||
15 | .endm | ||
16 | |||
17 | .macro arch_ret_to_user, tmp1, tmp2 | ||
18 | .endm | ||
diff --git a/arch/arm/mach-ux500/include/mach/system.h b/arch/arm/mach-ux500/include/mach/system.h deleted file mode 100644 index 258e5c919c24..000000000000 --- a/arch/arm/mach-ux500/include/mach/system.h +++ /dev/null | |||
@@ -1,20 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 ST-Ericsson. | ||
3 | * | ||
4 | * This file is licensed under the terms of the GNU General Public | ||
5 | * License version 2. This program is licensed "as is" without any | ||
6 | * warranty of any kind, whether express or implied. | ||
7 | */ | ||
8 | #ifndef __ASM_ARCH_SYSTEM_H | ||
9 | #define __ASM_ARCH_SYSTEM_H | ||
10 | |||
11 | static inline void arch_idle(void) | ||
12 | { | ||
13 | /* | ||
14 | * This should do all the clock switching | ||
15 | * and wait for interrupt tricks | ||
16 | */ | ||
17 | cpu_do_idle(); | ||
18 | } | ||
19 | |||
20 | #endif | ||
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c index 02b7b9303f3b..4f352e45be0a 100644 --- a/arch/arm/mach-versatile/core.c +++ b/arch/arm/mach-versatile/core.c | |||
@@ -582,58 +582,58 @@ static struct pl022_ssp_controller ssp0_plat_data = { | |||
582 | .num_chipselect = 1, | 582 | .num_chipselect = 1, |
583 | }; | 583 | }; |
584 | 584 | ||
585 | #define AACI_IRQ { IRQ_AACI, NO_IRQ } | 585 | #define AACI_IRQ { IRQ_AACI } |
586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } | 586 | #define MMCI0_IRQ { IRQ_MMCI0A,IRQ_SIC_MMCI0B } |
587 | #define KMI0_IRQ { IRQ_SIC_KMI0, NO_IRQ } | 587 | #define KMI0_IRQ { IRQ_SIC_KMI0 } |
588 | #define KMI1_IRQ { IRQ_SIC_KMI1, NO_IRQ } | 588 | #define KMI1_IRQ { IRQ_SIC_KMI1 } |
589 | 589 | ||
590 | /* | 590 | /* |
591 | * These devices are connected directly to the multi-layer AHB switch | 591 | * These devices are connected directly to the multi-layer AHB switch |
592 | */ | 592 | */ |
593 | #define SMC_IRQ { NO_IRQ, NO_IRQ } | 593 | #define SMC_IRQ { } |
594 | #define MPMC_IRQ { NO_IRQ, NO_IRQ } | 594 | #define MPMC_IRQ { } |
595 | #define CLCD_IRQ { IRQ_CLCDINT, NO_IRQ } | 595 | #define CLCD_IRQ { IRQ_CLCDINT } |
596 | #define DMAC_IRQ { IRQ_DMAINT, NO_IRQ } | 596 | #define DMAC_IRQ { IRQ_DMAINT } |
597 | 597 | ||
598 | /* | 598 | /* |
599 | * These devices are connected via the core APB bridge | 599 | * These devices are connected via the core APB bridge |
600 | */ | 600 | */ |
601 | #define SCTL_IRQ { NO_IRQ, NO_IRQ } | 601 | #define SCTL_IRQ { } |
602 | #define WATCHDOG_IRQ { IRQ_WDOGINT, NO_IRQ } | 602 | #define WATCHDOG_IRQ { IRQ_WDOGINT } |
603 | #define GPIO0_IRQ { IRQ_GPIOINT0, NO_IRQ } | 603 | #define GPIO0_IRQ { IRQ_GPIOINT0 } |
604 | #define GPIO1_IRQ { IRQ_GPIOINT1, NO_IRQ } | 604 | #define GPIO1_IRQ { IRQ_GPIOINT1 } |
605 | #define RTC_IRQ { IRQ_RTCINT, NO_IRQ } | 605 | #define RTC_IRQ { IRQ_RTCINT } |
606 | 606 | ||
607 | /* | 607 | /* |
608 | * These devices are connected via the DMA APB bridge | 608 | * These devices are connected via the DMA APB bridge |
609 | */ | 609 | */ |
610 | #define SCI_IRQ { IRQ_SCIINT, NO_IRQ } | 610 | #define SCI_IRQ { IRQ_SCIINT } |
611 | #define UART0_IRQ { IRQ_UARTINT0, NO_IRQ } | 611 | #define UART0_IRQ { IRQ_UARTINT0 } |
612 | #define UART1_IRQ { IRQ_UARTINT1, NO_IRQ } | 612 | #define UART1_IRQ { IRQ_UARTINT1 } |
613 | #define UART2_IRQ { IRQ_UARTINT2, NO_IRQ } | 613 | #define UART2_IRQ { IRQ_UARTINT2 } |
614 | #define SSP_IRQ { IRQ_SSPINT, NO_IRQ } | 614 | #define SSP_IRQ { IRQ_SSPINT } |
615 | 615 | ||
616 | /* FPGA Primecells */ | 616 | /* FPGA Primecells */ |
617 | AMBA_DEVICE(aaci, "fpga:04", AACI, NULL); | 617 | APB_DEVICE(aaci, "fpga:04", AACI, NULL); |
618 | AMBA_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); | 618 | APB_DEVICE(mmc0, "fpga:05", MMCI0, &mmc0_plat_data); |
619 | AMBA_DEVICE(kmi0, "fpga:06", KMI0, NULL); | 619 | APB_DEVICE(kmi0, "fpga:06", KMI0, NULL); |
620 | AMBA_DEVICE(kmi1, "fpga:07", KMI1, NULL); | 620 | APB_DEVICE(kmi1, "fpga:07", KMI1, NULL); |
621 | 621 | ||
622 | /* DevChip Primecells */ | 622 | /* DevChip Primecells */ |
623 | AMBA_DEVICE(smc, "dev:00", SMC, NULL); | 623 | AHB_DEVICE(smc, "dev:00", SMC, NULL); |
624 | AMBA_DEVICE(mpmc, "dev:10", MPMC, NULL); | 624 | AHB_DEVICE(mpmc, "dev:10", MPMC, NULL); |
625 | AMBA_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); | 625 | AHB_DEVICE(clcd, "dev:20", CLCD, &clcd_plat_data); |
626 | AMBA_DEVICE(dmac, "dev:30", DMAC, NULL); | 626 | AHB_DEVICE(dmac, "dev:30", DMAC, NULL); |
627 | AMBA_DEVICE(sctl, "dev:e0", SCTL, NULL); | 627 | APB_DEVICE(sctl, "dev:e0", SCTL, NULL); |
628 | AMBA_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); | 628 | APB_DEVICE(wdog, "dev:e1", WATCHDOG, NULL); |
629 | AMBA_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); | 629 | APB_DEVICE(gpio0, "dev:e4", GPIO0, &gpio0_plat_data); |
630 | AMBA_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); | 630 | APB_DEVICE(gpio1, "dev:e5", GPIO1, &gpio1_plat_data); |
631 | AMBA_DEVICE(rtc, "dev:e8", RTC, NULL); | 631 | APB_DEVICE(rtc, "dev:e8", RTC, NULL); |
632 | AMBA_DEVICE(sci0, "dev:f0", SCI, NULL); | 632 | APB_DEVICE(sci0, "dev:f0", SCI, NULL); |
633 | AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); | 633 | APB_DEVICE(uart0, "dev:f1", UART0, NULL); |
634 | AMBA_DEVICE(uart1, "dev:f2", UART1, NULL); | 634 | APB_DEVICE(uart1, "dev:f2", UART1, NULL); |
635 | AMBA_DEVICE(uart2, "dev:f3", UART2, NULL); | 635 | APB_DEVICE(uart2, "dev:f3", UART2, NULL); |
636 | AMBA_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); | 636 | APB_DEVICE(ssp0, "dev:f4", SSP, &ssp0_plat_data); |
637 | 637 | ||
638 | static struct amba_device *amba_devs[] __initdata = { | 638 | static struct amba_device *amba_devs[] __initdata = { |
639 | &dmac_device, | 639 | &dmac_device, |
diff --git a/arch/arm/mach-versatile/core.h b/arch/arm/mach-versatile/core.h index 2ef2f555f315..683e60776a85 100644 --- a/arch/arm/mach-versatile/core.h +++ b/arch/arm/mach-versatile/core.h | |||
@@ -36,20 +36,10 @@ extern unsigned int mmc_status(struct device *dev); | |||
36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; | 36 | extern struct of_dev_auxdata versatile_auxdata_lookup[]; |
37 | #endif | 37 | #endif |
38 | 38 | ||
39 | #define AMBA_DEVICE(name,busid,base,plat) \ | 39 | #define APB_DEVICE(name, busid, base, plat) \ |
40 | static struct amba_device name##_device = { \ | 40 | static AMBA_APB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
41 | .dev = { \ | 41 | |
42 | .coherent_dma_mask = ~0, \ | 42 | #define AHB_DEVICE(name, busid, base, plat) \ |
43 | .init_name = busid, \ | 43 | static AMBA_AHB_DEVICE(name, busid, 0, VERSATILE_##base##_BASE, base##_IRQ, plat) |
44 | .platform_data = plat, \ | ||
45 | }, \ | ||
46 | .res = { \ | ||
47 | .start = VERSATILE_##base##_BASE, \ | ||
48 | .end = (VERSATILE_##base##_BASE) + SZ_4K - 1,\ | ||
49 | .flags = IORESOURCE_MEM, \ | ||
50 | }, \ | ||
51 | .dma_mask = ~0, \ | ||
52 | .irq = base##_IRQ, \ | ||
53 | } | ||
54 | 44 | ||
55 | #endif | 45 | #endif |
diff --git a/arch/arm/mach-versatile/include/mach/entry-macro.S b/arch/arm/mach-versatile/include/mach/entry-macro.S deleted file mode 100644 index b6f0dbf122ee..000000000000 --- a/arch/arm/mach-versatile/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros for Versatile platforms | ||
5 | * | ||
6 | * This file is licensed under the terms of the GNU General Public | ||
7 | * License version 2. This program is licensed "as is" without any | ||
8 | * warranty of any kind, whether express or implied. | ||
9 | */ | ||
10 | |||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro arch_ret_to_user, tmp1, tmp2 | ||
15 | .endm | ||
diff --git a/arch/arm/mach-versatile/include/mach/system.h b/arch/arm/mach-versatile/include/mach/system.h deleted file mode 100644 index f3fa347895f0..000000000000 --- a/arch/arm/mach-versatile/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-versatile/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-versatile/versatile_pb.c b/arch/arm/mach-versatile/versatile_pb.c index 9581c197500c..19738331bd3d 100644 --- a/arch/arm/mach-versatile/versatile_pb.c +++ b/arch/arm/mach-versatile/versatile_pb.c | |||
@@ -58,28 +58,28 @@ static struct pl061_platform_data gpio3_plat_data = { | |||
58 | .irq_base = IRQ_GPIO3_START, | 58 | .irq_base = IRQ_GPIO3_START, |
59 | }; | 59 | }; |
60 | 60 | ||
61 | #define UART3_IRQ { IRQ_SIC_UART3, NO_IRQ } | 61 | #define UART3_IRQ { IRQ_SIC_UART3 } |
62 | #define SCI1_IRQ { IRQ_SIC_SCI3, NO_IRQ } | 62 | #define SCI1_IRQ { IRQ_SIC_SCI3 } |
63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } | 63 | #define MMCI1_IRQ { IRQ_MMCI1A, IRQ_SIC_MMCI1B } |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * These devices are connected via the core APB bridge | 66 | * These devices are connected via the core APB bridge |
67 | */ | 67 | */ |
68 | #define GPIO2_IRQ { IRQ_GPIOINT2, NO_IRQ } | 68 | #define GPIO2_IRQ { IRQ_GPIOINT2 } |
69 | #define GPIO3_IRQ { IRQ_GPIOINT3, NO_IRQ } | 69 | #define GPIO3_IRQ { IRQ_GPIOINT3 } |
70 | 70 | ||
71 | /* | 71 | /* |
72 | * These devices are connected via the DMA APB bridge | 72 | * These devices are connected via the DMA APB bridge |
73 | */ | 73 | */ |
74 | 74 | ||
75 | /* FPGA Primecells */ | 75 | /* FPGA Primecells */ |
76 | AMBA_DEVICE(uart3, "fpga:09", UART3, NULL); | 76 | APB_DEVICE(uart3, "fpga:09", UART3, NULL); |
77 | AMBA_DEVICE(sci1, "fpga:0a", SCI1, NULL); | 77 | APB_DEVICE(sci1, "fpga:0a", SCI1, NULL); |
78 | AMBA_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); | 78 | APB_DEVICE(mmc1, "fpga:0b", MMCI1, &mmc1_plat_data); |
79 | 79 | ||
80 | /* DevChip Primecells */ | 80 | /* DevChip Primecells */ |
81 | AMBA_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); | 81 | APB_DEVICE(gpio2, "dev:e6", GPIO2, &gpio2_plat_data); |
82 | AMBA_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); | 82 | APB_DEVICE(gpio3, "dev:e7", GPIO3, &gpio3_plat_data); |
83 | 83 | ||
84 | static struct amba_device *amba_devs[] __initdata = { | 84 | static struct amba_device *amba_devs[] __initdata = { |
85 | &uart3_device, | 85 | &uart3_device, |
diff --git a/arch/arm/mach-vexpress/core.h b/arch/arm/mach-vexpress/core.h index 3508f6ef78ea..33c5a825aba1 100644 --- a/arch/arm/mach-vexpress/core.h +++ b/arch/arm/mach-vexpress/core.h | |||
@@ -1,20 +1,3 @@ | |||
1 | #define AMBA_DEVICE(name,busid,base,plat) \ | ||
2 | struct amba_device name##_device = { \ | ||
3 | .dev = { \ | ||
4 | .coherent_dma_mask = ~0UL, \ | ||
5 | .init_name = busid, \ | ||
6 | .platform_data = plat, \ | ||
7 | }, \ | ||
8 | .res = { \ | ||
9 | .start = base, \ | ||
10 | .end = base + SZ_4K - 1, \ | ||
11 | .flags = IORESOURCE_MEM, \ | ||
12 | }, \ | ||
13 | .dma_mask = ~0UL, \ | ||
14 | .irq = IRQ_##base, \ | ||
15 | /* .dma = DMA_##base,*/ \ | ||
16 | } | ||
17 | |||
18 | /* 2MB large area for motherboard's peripherals static mapping */ | 1 | /* 2MB large area for motherboard's peripherals static mapping */ |
19 | #define V2M_PERIPH 0xf8000000 | 2 | #define V2M_PERIPH 0xf8000000 |
20 | 3 | ||
diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index e5abe85fefa0..c65cc3b462a5 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c | |||
@@ -92,10 +92,10 @@ static struct clcd_board ct_ca9x4_clcd_data = { | |||
92 | .remove = versatile_clcd_remove_dma, | 92 | .remove = versatile_clcd_remove_dma, |
93 | }; | 93 | }; |
94 | 94 | ||
95 | static AMBA_DEVICE(clcd, "ct:clcd", CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); | 95 | static AMBA_AHB_DEVICE(clcd, "ct:clcd", 0, CT_CA9X4_CLCDC, IRQ_CT_CA9X4_CLCDC, &ct_ca9x4_clcd_data); |
96 | static AMBA_DEVICE(dmc, "ct:dmc", CT_CA9X4_DMC, NULL); | 96 | static AMBA_APB_DEVICE(dmc, "ct:dmc", 0, CT_CA9X4_DMC, IRQ_CT_CA9X4_DMC, NULL); |
97 | static AMBA_DEVICE(smc, "ct:smc", CT_CA9X4_SMC, NULL); | 97 | static AMBA_APB_DEVICE(smc, "ct:smc", 0, CT_CA9X4_SMC, IRQ_CT_CA9X4_SMC, NULL); |
98 | static AMBA_DEVICE(gpio, "ct:gpio", CT_CA9X4_GPIO, NULL); | 98 | static AMBA_APB_DEVICE(gpio, "ct:gpio", 0, CT_CA9X4_GPIO, IRQ_CT_CA9X4_GPIO, NULL); |
99 | 99 | ||
100 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { | 100 | static struct amba_device *ct_ca9x4_amba_devs[] __initdata = { |
101 | &clcd_device, | 101 | &clcd_device, |
diff --git a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h index 2260fde86614..84acf8439d4b 100644 --- a/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h +++ b/arch/arm/mach-vexpress/include/mach/ct-ca9x4.h | |||
@@ -32,7 +32,7 @@ | |||
32 | * Interrupts. Those in {} are for AMBA devices | 32 | * Interrupts. Those in {} are for AMBA devices |
33 | */ | 33 | */ |
34 | #define IRQ_CT_CA9X4_CLCDC { 76 } | 34 | #define IRQ_CT_CA9X4_CLCDC { 76 } |
35 | #define IRQ_CT_CA9X4_DMC { -1 } | 35 | #define IRQ_CT_CA9X4_DMC { 0 } |
36 | #define IRQ_CT_CA9X4_SMC { 77, 78 } | 36 | #define IRQ_CT_CA9X4_SMC { 77, 78 } |
37 | #define IRQ_CT_CA9X4_TIMER0 80 | 37 | #define IRQ_CT_CA9X4_TIMER0 80 |
38 | #define IRQ_CT_CA9X4_TIMER1 81 | 38 | #define IRQ_CT_CA9X4_TIMER1 81 |
diff --git a/arch/arm/mach-vexpress/include/mach/entry-macro.S b/arch/arm/mach-vexpress/include/mach/entry-macro.S deleted file mode 100644 index a14f9e62ca92..000000000000 --- a/arch/arm/mach-vexpress/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | .macro disable_fiq | ||
2 | .endm | ||
3 | |||
4 | .macro arch_ret_to_user, tmp1, tmp2 | ||
5 | .endm | ||
diff --git a/arch/arm/mach-vexpress/include/mach/system.h b/arch/arm/mach-vexpress/include/mach/system.h deleted file mode 100644 index f653a8e265bd..000000000000 --- a/arch/arm/mach-vexpress/include/mach/system.h +++ /dev/null | |||
@@ -1,33 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-vexpress/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (C) 2003 ARM Limited | ||
5 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #ifndef __ASM_ARCH_SYSTEM_H | ||
22 | #define __ASM_ARCH_SYSTEM_H | ||
23 | |||
24 | static inline void arch_idle(void) | ||
25 | { | ||
26 | /* | ||
27 | * This should do all the clock switching | ||
28 | * and wait for interrupt tricks | ||
29 | */ | ||
30 | cpu_do_idle(); | ||
31 | } | ||
32 | |||
33 | #endif | ||
diff --git a/arch/arm/mach-vexpress/v2m.c b/arch/arm/mach-vexpress/v2m.c index c76f9144898a..663a98831920 100644 --- a/arch/arm/mach-vexpress/v2m.c +++ b/arch/arm/mach-vexpress/v2m.c | |||
@@ -288,16 +288,16 @@ static struct mmci_platform_data v2m_mmci_data = { | |||
288 | .status = v2m_mmci_status, | 288 | .status = v2m_mmci_status, |
289 | }; | 289 | }; |
290 | 290 | ||
291 | static AMBA_DEVICE(aaci, "mb:aaci", V2M_AACI, NULL); | 291 | static AMBA_APB_DEVICE(aaci, "mb:aaci", 0, V2M_AACI, IRQ_V2M_AACI, NULL); |
292 | static AMBA_DEVICE(mmci, "mb:mmci", V2M_MMCI, &v2m_mmci_data); | 292 | static AMBA_APB_DEVICE(mmci, "mb:mmci", 0, V2M_MMCI, IRQ_V2M_MMCI, &v2m_mmci_data); |
293 | static AMBA_DEVICE(kmi0, "mb:kmi0", V2M_KMI0, NULL); | 293 | static AMBA_APB_DEVICE(kmi0, "mb:kmi0", 0, V2M_KMI0, IRQ_V2M_KMI0, NULL); |
294 | static AMBA_DEVICE(kmi1, "mb:kmi1", V2M_KMI1, NULL); | 294 | static AMBA_APB_DEVICE(kmi1, "mb:kmi1", 0, V2M_KMI1, IRQ_V2M_KMI1, NULL); |
295 | static AMBA_DEVICE(uart0, "mb:uart0", V2M_UART0, NULL); | 295 | static AMBA_APB_DEVICE(uart0, "mb:uart0", 0, V2M_UART0, IRQ_V2M_UART0, NULL); |
296 | static AMBA_DEVICE(uart1, "mb:uart1", V2M_UART1, NULL); | 296 | static AMBA_APB_DEVICE(uart1, "mb:uart1", 0, V2M_UART1, IRQ_V2M_UART1, NULL); |
297 | static AMBA_DEVICE(uart2, "mb:uart2", V2M_UART2, NULL); | 297 | static AMBA_APB_DEVICE(uart2, "mb:uart2", 0, V2M_UART2, IRQ_V2M_UART2, NULL); |
298 | static AMBA_DEVICE(uart3, "mb:uart3", V2M_UART3, NULL); | 298 | static AMBA_APB_DEVICE(uart3, "mb:uart3", 0, V2M_UART3, IRQ_V2M_UART3, NULL); |
299 | static AMBA_DEVICE(wdt, "mb:wdt", V2M_WDT, NULL); | 299 | static AMBA_APB_DEVICE(wdt, "mb:wdt", 0, V2M_WDT, IRQ_V2M_WDT, NULL); |
300 | static AMBA_DEVICE(rtc, "mb:rtc", V2M_RTC, NULL); | 300 | static AMBA_APB_DEVICE(rtc, "mb:rtc", 0, V2M_RTC, IRQ_V2M_RTC, NULL); |
301 | 301 | ||
302 | static struct amba_device *v2m_amba_devs[] __initdata = { | 302 | static struct amba_device *v2m_amba_devs[] __initdata = { |
303 | &aaci_device, | 303 | &aaci_device, |
diff --git a/arch/arm/mach-vt8500/include/mach/entry-macro.S b/arch/arm/mach-vt8500/include/mach/entry-macro.S index 92684c7eaed3..367d1b55fb9a 100644 --- a/arch/arm/mach-vt8500/include/mach/entry-macro.S +++ b/arch/arm/mach-vt8500/include/mach/entry-macro.S | |||
@@ -8,18 +8,12 @@ | |||
8 | * warranty of any kind, whether express or implied. | 8 | * warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | .macro disable_fiq | ||
12 | .endm | ||
13 | |||
14 | .macro get_irqnr_preamble, base, tmp | 11 | .macro get_irqnr_preamble, base, tmp |
15 | @ physical 0xd8140000 is virtual 0xf8140000 | 12 | @ physical 0xd8140000 is virtual 0xf8140000 |
16 | mov \base, #0xf8000000 | 13 | mov \base, #0xf8000000 |
17 | orr \base, \base, #0x00140000 | 14 | orr \base, \base, #0x00140000 |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro arch_ret_to_user, tmp1, tmp2 | ||
21 | .endm | ||
22 | |||
23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 17 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
24 | ldr \irqnr, [\base] | 18 | ldr \irqnr, [\base] |
25 | cmp \irqnr, #63 @ may be false positive, check interrupt status | 19 | cmp \irqnr, #63 @ may be false positive, check interrupt status |
diff --git a/arch/arm/mach-vt8500/include/mach/system.h b/arch/arm/mach-vt8500/include/mach/system.h index d6c757eaf26b..58fa8010ee61 100644 --- a/arch/arm/mach-vt8500/include/mach/system.h +++ b/arch/arm/mach-vt8500/include/mach/system.h | |||
@@ -7,11 +7,6 @@ | |||
7 | /* PM Software Reset request register */ | 7 | /* PM Software Reset request register */ |
8 | #define VT8500_PMSR_VIRT 0xf8130060 | 8 | #define VT8500_PMSR_VIRT 0xf8130060 |
9 | 9 | ||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | static inline void arch_reset(char mode, const char *cmd) | 10 | static inline void arch_reset(char mode, const char *cmd) |
16 | { | 11 | { |
17 | writel(1, VT8500_PMSR_VIRT); | 12 | writel(1, VT8500_PMSR_VIRT); |
diff --git a/arch/arm/mach-w90x900/dev.c b/arch/arm/mach-w90x900/dev.c index 78110befb7a9..db82568a998a 100644 --- a/arch/arm/mach-w90x900/dev.c +++ b/arch/arm/mach-w90x900/dev.c | |||
@@ -530,6 +530,7 @@ static struct platform_device *nuc900_public_dev[] __initdata = { | |||
530 | 530 | ||
531 | void __init nuc900_board_init(struct platform_device **device, int size) | 531 | void __init nuc900_board_init(struct platform_device **device, int size) |
532 | { | 532 | { |
533 | disable_hlt(); | ||
533 | platform_add_devices(device, size); | 534 | platform_add_devices(device, size); |
534 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); | 535 | platform_add_devices(nuc900_public_dev, ARRAY_SIZE(nuc900_public_dev)); |
535 | spi_register_board_info(nuc900_spi_board_info, | 536 | spi_register_board_info(nuc900_spi_board_info, |
diff --git a/arch/arm/mach-w90x900/include/mach/entry-macro.S b/arch/arm/mach-w90x900/include/mach/entry-macro.S index d39aca5be9ee..e286daca6827 100644 --- a/arch/arm/mach-w90x900/include/mach/entry-macro.S +++ b/arch/arm/mach-w90x900/include/mach/entry-macro.S | |||
@@ -15,9 +15,6 @@ | |||
15 | .macro get_irqnr_preamble, base, tmp | 15 | .macro get_irqnr_preamble, base, tmp |
16 | .endm | 16 | .endm |
17 | 17 | ||
18 | .macro arch_ret_to_user, tmp1, tmp2 | ||
19 | .endm | ||
20 | |||
21 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 18 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
22 | 19 | ||
23 | mov \base, #AIC_BA | 20 | mov \base, #AIC_BA |
@@ -27,8 +24,3 @@ | |||
27 | cmp \irqnr, #0 | 24 | cmp \irqnr, #0 |
28 | 25 | ||
29 | .endm | 26 | .endm |
30 | |||
31 | /* currently don't need an disable_fiq macro */ | ||
32 | |||
33 | .macro disable_fiq | ||
34 | .endm | ||
diff --git a/arch/arm/mach-w90x900/include/mach/system.h b/arch/arm/mach-w90x900/include/mach/system.h deleted file mode 100644 index 2aaeb9311619..000000000000 --- a/arch/arm/mach-w90x900/include/mach/system.h +++ /dev/null | |||
@@ -1,19 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-w90x900/include/mach/system.h | ||
3 | * | ||
4 | * Copyright (c) 2008 Nuvoton technology corporation | ||
5 | * All rights reserved. | ||
6 | * | ||
7 | * Wan ZongShun <mcuos.com@gmail.com> | ||
8 | * | ||
9 | * Based on arch/arm/mach-s3c2410/include/mach/system.h | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify | ||
12 | * it under the terms of the GNU General Public License as published by | ||
13 | * the Free Software Foundation; either version 2 of the License, or | ||
14 | * (at your option) any later version. | ||
15 | * | ||
16 | */ | ||
17 | static void arch_idle(void) | ||
18 | { | ||
19 | } | ||
diff --git a/arch/arm/mach-zynq/include/mach/entry-macro.S b/arch/arm/mach-zynq/include/mach/entry-macro.S deleted file mode 100644 index d621fb732569..000000000000 --- a/arch/arm/mach-zynq/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,27 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-zynq/include/mach/entry-macro.S | ||
3 | * | ||
4 | * Low-level IRQ helper macros | ||
5 | * | ||
6 | * Copyright (C) 2011 Xilinx | ||
7 | * | ||
8 | * based on arch/plat-mxc/include/mach/entry-macro.S | ||
9 | * | ||
10 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
11 | * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. | ||
12 | * | ||
13 | * This software is licensed under the terms of the GNU General Public | ||
14 | * License version 2, as published by the Free Software Foundation, and | ||
15 | * may be copied, distributed, and modified under those terms. | ||
16 | * | ||
17 | * This program is distributed in the hope that it will be useful, | ||
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
20 | * GNU General Public License for more details. | ||
21 | */ | ||
22 | |||
23 | .macro disable_fiq | ||
24 | .endm | ||
25 | |||
26 | .macro arch_ret_to_user, tmp1, tmp2 | ||
27 | .endm | ||
diff --git a/arch/arm/mach-zynq/include/mach/system.h b/arch/arm/mach-zynq/include/mach/system.h deleted file mode 100644 index 8e88e0b8d2ba..000000000000 --- a/arch/arm/mach-zynq/include/mach/system.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* arch/arm/mach-zynq/include/mach/system.h | ||
2 | * | ||
3 | * Copyright (C) 2011 Xilinx | ||
4 | * | ||
5 | * This software is licensed under the terms of the GNU General Public | ||
6 | * License version 2, as published by the Free Software Foundation, and | ||
7 | * may be copied, distributed, and modified under those terms. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | */ | ||
14 | |||
15 | #ifndef __MACH_SYSTEM_H__ | ||
16 | #define __MACH_SYSTEM_H__ | ||
17 | |||
18 | static inline void arch_idle(void) | ||
19 | { | ||
20 | cpu_do_idle(); | ||
21 | } | ||
22 | |||
23 | #endif | ||
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S deleted file mode 100644 index def5d30cb67e..000000000000 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Lennert Buytenhek <buytenh@wantstofly.org> | ||
3 | * Copyright 2004-2009 Freescale Semiconductor, Inc. All Rights Reserved. | ||
4 | */ | ||
5 | |||
6 | /* | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | .macro disable_fiq | ||
13 | .endm | ||
14 | |||
15 | .macro arch_ret_to_user, tmp1, tmp2 | ||
16 | .endm | ||
diff --git a/arch/arm/plat-mxc/include/mach/system.h b/arch/arm/plat-mxc/include/mach/system.h deleted file mode 100644 index 13ad0df2e860..000000000000 --- a/arch/arm/plat-mxc/include/mach/system.h +++ /dev/null | |||
@@ -1,25 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999 ARM Limited | ||
3 | * Copyright (C) 2000 Deep Blue Solutions Ltd | ||
4 | * Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | */ | ||
16 | |||
17 | #ifndef __ASM_ARCH_MXC_SYSTEM_H__ | ||
18 | #define __ASM_ARCH_MXC_SYSTEM_H__ | ||
19 | |||
20 | static inline void arch_idle(void) | ||
21 | { | ||
22 | cpu_do_idle(); | ||
23 | } | ||
24 | |||
25 | #endif /* __ASM_ARCH_MXC_SYSTEM_H__ */ | ||
diff --git a/arch/arm/plat-omap/include/plat/system.h b/arch/arm/plat-omap/include/plat/system.h deleted file mode 100644 index 8e5ebd74b129..000000000000 --- a/arch/arm/plat-omap/include/plat/system.h +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | /* | ||
2 | * Copied from arch/arm/mach-sa1100/include/mach/system.h | ||
3 | * Copyright (c) 1999 Nicolas Pitre <nico@fluxnic.net> | ||
4 | */ | ||
5 | #ifndef __ASM_ARCH_SYSTEM_H | ||
6 | #define __ASM_ARCH_SYSTEM_H | ||
7 | |||
8 | #include <asm/proc-fns.h> | ||
9 | |||
10 | static inline void arch_idle(void) | ||
11 | { | ||
12 | cpu_do_idle(); | ||
13 | } | ||
14 | |||
15 | #endif | ||
diff --git a/arch/arm/plat-s3c24xx/cpu.c b/arch/arm/plat-s3c24xx/cpu.c index 21f1fda8b661..32a09931350c 100644 --- a/arch/arm/plat-s3c24xx/cpu.c +++ b/arch/arm/plat-s3c24xx/cpu.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | 33 | ||
34 | #include <mach/hardware.h> | 34 | #include <mach/hardware.h> |
35 | #include <mach/regs-clock.h> | ||
35 | #include <asm/irq.h> | 36 | #include <asm/irq.h> |
36 | #include <asm/cacheflush.h> | 37 | #include <asm/cacheflush.h> |
37 | 38 | ||
@@ -190,8 +191,34 @@ static unsigned long s3c24xx_read_idcode_v4(void) | |||
190 | return __raw_readl(S3C2410_GSTATUS1); | 191 | return __raw_readl(S3C2410_GSTATUS1); |
191 | } | 192 | } |
192 | 193 | ||
194 | static void s3c24xx_default_idle(void) | ||
195 | { | ||
196 | unsigned long tmp; | ||
197 | int i; | ||
198 | |||
199 | /* idle the system by using the idle mode which will wait for an | ||
200 | * interrupt to happen before restarting the system. | ||
201 | */ | ||
202 | |||
203 | /* Warning: going into idle state upsets jtag scanning */ | ||
204 | |||
205 | __raw_writel(__raw_readl(S3C2410_CLKCON) | S3C2410_CLKCON_IDLE, | ||
206 | S3C2410_CLKCON); | ||
207 | |||
208 | /* the samsung port seems to do a loop and then unset idle.. */ | ||
209 | for (i = 0; i < 50; i++) | ||
210 | tmp += __raw_readl(S3C2410_CLKCON); /* ensure loop not optimised out */ | ||
211 | |||
212 | /* this bit is not cleared on re-start... */ | ||
213 | |||
214 | __raw_writel(__raw_readl(S3C2410_CLKCON) & ~S3C2410_CLKCON_IDLE, | ||
215 | S3C2410_CLKCON); | ||
216 | } | ||
217 | |||
193 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) | 218 | void __init s3c24xx_init_io(struct map_desc *mach_desc, int size) |
194 | { | 219 | { |
220 | arm_pm_idle = s3c24xx_default_idle; | ||
221 | |||
195 | /* initialise the io descriptors we need for initialisation */ | 222 | /* initialise the io descriptors we need for initialisation */ |
196 | iotable_init(mach_desc, size); | 223 | iotable_init(mach_desc, size); |
197 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); | 224 | iotable_init(s3c_iodesc, ARRAY_SIZE(s3c_iodesc)); |
diff --git a/arch/arm/plat-spear/include/plat/system.h b/arch/arm/plat-spear/include/plat/system.h deleted file mode 100644 index 86c6f83b44cc..000000000000 --- a/arch/arm/plat-spear/include/plat/system.h +++ /dev/null | |||
@@ -1,26 +0,0 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-spear/include/plat/system.h | ||
3 | * | ||
4 | * SPEAr platform specific architecture functions | ||
5 | * | ||
6 | * Copyright (C) 2009 ST Microelectronics | ||
7 | * Viresh Kumar<viresh.kumar@st.com> | ||
8 | * | ||
9 | * This file is licensed under the terms of the GNU General Public | ||
10 | * License version 2. This program is licensed "as is" without any | ||
11 | * warranty of any kind, whether express or implied. | ||
12 | */ | ||
13 | |||
14 | #ifndef __PLAT_SYSTEM_H | ||
15 | #define __PLAT_SYSTEM_H | ||
16 | |||
17 | static inline void arch_idle(void) | ||
18 | { | ||
19 | /* | ||
20 | * This should do all the clock switching | ||
21 | * and wait for interrupt tricks | ||
22 | */ | ||
23 | cpu_do_idle(); | ||
24 | } | ||
25 | |||
26 | #endif /* __PLAT_SYSTEM_H */ | ||