diff options
author | Marc Zyngier <Marc.Zyngier@arm.com> | 2012-10-06 12:03:17 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-10-09 07:11:34 -0400 |
commit | 2a552d5e63d7fa602c9a9a0717008737f55625a6 (patch) | |
tree | 0fbd4405ee99ba35cf508f67b01a932a89d71824 /arch/arm | |
parent | 648f3b69986b4d0ade57e59504a431b973ce2875 (diff) |
ARM: 7549/1: HYP: fix boot on some ARM1136 cores
It appears that performing a "movs pc, lr" to force the kernel into
SVC mode on the OMAP2420 (ARM1136) prevents the platform from booting
correctly (change introduced in 80c59da [ARM: virt: allow the kernel
to be entered in HYP mode]).
While the reason it fails is not understood yet (the same code runs
fine on the OMAP2430, ARM1136 as well), partially revert that change
for platforms that do not enter in HYP mode, preserving the new
feature and restoring a working kernel on the OMAP2420.
Reported-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/include/asm/assembler.h | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index 683a1e6b6020..2ef95813fce0 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h | |||
@@ -254,16 +254,17 @@ | |||
254 | mov lr , \reg | 254 | mov lr , \reg |
255 | and lr , lr , #MODE_MASK | 255 | and lr , lr , #MODE_MASK |
256 | cmp lr , #HYP_MODE | 256 | cmp lr , #HYP_MODE |
257 | orr \reg , \reg , #PSR_A_BIT | PSR_I_BIT | PSR_F_BIT | 257 | orr \reg , \reg , #PSR_I_BIT | PSR_F_BIT |
258 | bic \reg , \reg , #MODE_MASK | 258 | bic \reg , \reg , #MODE_MASK |
259 | orr \reg , \reg , #SVC_MODE | 259 | orr \reg , \reg , #SVC_MODE |
260 | THUMB( orr \reg , \reg , #PSR_T_BIT ) | 260 | THUMB( orr \reg , \reg , #PSR_T_BIT ) |
261 | msr spsr_cxsf, \reg | ||
262 | adr lr, BSYM(2f) | ||
263 | bne 1f | 261 | bne 1f |
262 | orr \reg, \reg, #PSR_A_BIT | ||
263 | adr lr, BSYM(2f) | ||
264 | msr spsr_cxsf, \reg | ||
264 | __MSR_ELR_HYP(14) | 265 | __MSR_ELR_HYP(14) |
265 | __ERET | 266 | __ERET |
266 | 1: movs pc, lr | 267 | 1: msr cpsr_c, \reg |
267 | 2: | 268 | 2: |
268 | .endm | 269 | .endm |
269 | 270 | ||