Merge branch 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6

* 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (47 commits)
  OMAP clock: use debugfs_remove_recursive() for rewinding
  OMAP2/3/4 core: create omap_device layer
  OMAP: omap_hwmod: call omap_hwmod init at boot; create interconnects
  OMAP2/3/4: create omap_hwmod layer
  OMAP2/3 board-*.c files: read bootloader configuration earlier
  OMAP2/3/4 PRCM: add module IDLEST wait code
  OMAP2/3 PM: create the OMAP PM interface and add a default OMAP PM no-op layer
  OMAP3 clock: remove superfluous calls to omap2_init_clk_clkdm
  OMAP clock: associate MPU clocks with the mpu_clkdm
  OMAP3 clock: Fixed processing of bootarg 'mpurate'
  OMAP: SDRC: Add several new register definitions
  OMAP: powerdomain: Fix overflow when doing powerdomain deps lookups.
  OMAP: PM: Added suspend target state control to debugfs for OMAP3
  OMAP: PM debug: Add PRCM register dump support
  OMAP: PM debug: make powerdomains use PM-debug counters
  OMAP: PM: Add pm-debug counters
  OMAP: PM: Add closures to clkdm_for_each and pwrdm_for_each.
  OMAP: PM: Hook into PM counters
  OMAP: PM counter infrastructure.
  OMAP3: PM: fix lockdep warning caused by omap3_pm_init
  ...

99 files changed, 7631 insertions, 702 deletions

diff --git a/arch/arm/configs/n8x0_defconfig b/arch/arm/configs/n8x0_defconfig
new file mode 100644
index 000000000000..8da75dede52e
--- /dev/null
+++ b/arch/arm/configs/n8x0_defconfig
@@ -0,0 +1,1104 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.31-rc5
+# Thu Aug  6 22:17:23 2009
+#
+CONFIG_ARM=y
+CONFIG_SYS_SUPPORTS_APM_EMULATION=y
+CONFIG_GENERIC_GPIO=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
+CONFIG_TRACE_IRQFLAGS_SUPPORT=y
+CONFIG_HARDIRQS_SW_RESEND=y
+CONFIG_GENERIC_IRQ_PROBE=y
+CONFIG_RWSEM_GENERIC_SPINLOCK=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
+CONFIG_VECTORS_BASE=0xffff0000
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+CONFIG_CONSTRUCTORS=y
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+# CONFIG_CLASSIC_RCU is not set
+CONFIG_TREE_RCU=y
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_RCU_TRACE is not set
+CONFIG_RCU_FANOUT=32
+# CONFIG_RCU_FANOUT_EXACT is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_GROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
+# CONFIG_SYSFS_DEPRECATED_V2 is not set
+# CONFIG_RELAY is not set
+CONFIG_NAMESPACES=y
+# CONFIG_UTS_NS is not set
+# CONFIG_IPC_NS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_NET_NS is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+CONFIG_RD_BZIP2=y
+CONFIG_RD_LZMA=y
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
+# CONFIG_EMBEDDED is not set
+CONFIG_UID16=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_ALL is not set
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_TIMERFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_AIO=y
+
+#
+# Performance Counters
+#
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_STRIP_ASM_SYMS is not set
+CONFIG_COMPAT_BRK=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+# CONFIG_PROFILING is not set
+# CONFIG_MARKERS is not set
+CONFIG_HAVE_OPROFILE=y
+# CONFIG_KPROBES is not set
+CONFIG_HAVE_KPROBES=y
+CONFIG_HAVE_KRETPROBES=y
+CONFIG_HAVE_CLK=y
+
+#
+# GCOV-based kernel profiling
+#
+# CONFIG_SLOW_WORK is not set
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_SLABINFO=y
+CONFIG_RT_MUTEXES=y
+CONFIG_BASE_SMALL=0
+CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+CONFIG_BLOCK=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_BLK_DEV_INTEGRITY is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+# CONFIG_IOSCHED_AS is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+CONFIG_IOSCHED_CFQ=y
+# CONFIG_DEFAULT_AS is not set
+# CONFIG_DEFAULT_DEADLINE is not set
+CONFIG_DEFAULT_CFQ=y
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="cfq"
+# CONFIG_FREEZER is not set
+
+#
+# System Type
+#
+# CONFIG_ARCH_AAEC2000 is not set
+# CONFIG_ARCH_INTEGRATOR is not set
+# CONFIG_ARCH_REALVIEW is not set
+# CONFIG_ARCH_VERSATILE is not set
+# CONFIG_ARCH_AT91 is not set
+# CONFIG_ARCH_CLPS711X is not set
+# CONFIG_ARCH_GEMINI is not set
+# CONFIG_ARCH_EBSA110 is not set
+# CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_FOOTBRIDGE is not set
+# CONFIG_ARCH_MXC is not set
+# CONFIG_ARCH_STMP3XXX is not set
+# CONFIG_ARCH_NETX is not set
+# CONFIG_ARCH_H720X is not set
+# CONFIG_ARCH_IOP13XX is not set
+# CONFIG_ARCH_IOP32X is not set
+# CONFIG_ARCH_IOP33X is not set
+# CONFIG_ARCH_IXP23XX is not set
+# CONFIG_ARCH_IXP2000 is not set
+# CONFIG_ARCH_IXP4XX is not set
+# CONFIG_ARCH_L7200 is not set
+# CONFIG_ARCH_KIRKWOOD is not set
+# CONFIG_ARCH_LOKI is not set
+# CONFIG_ARCH_MV78XX0 is not set
+# CONFIG_ARCH_ORION5X is not set
+# CONFIG_ARCH_MMP is not set
+# CONFIG_ARCH_KS8695 is not set
+# CONFIG_ARCH_NS9XXX is not set
+# CONFIG_ARCH_W90X900 is not set
+# CONFIG_ARCH_PNX4008 is not set
+# CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_RPC is not set
+# CONFIG_ARCH_SA1100 is not set
+# CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
+# CONFIG_ARCH_SHARK is not set
+# CONFIG_ARCH_LH7A40X is not set
+# CONFIG_ARCH_U300 is not set
+# CONFIG_ARCH_DAVINCI is not set
+CONFIG_ARCH_OMAP=y
+
+#
+# TI OMAP Implementations
+#
+CONFIG_ARCH_OMAP_OTG=y
+# CONFIG_ARCH_OMAP1 is not set
+CONFIG_ARCH_OMAP2=y
+# CONFIG_ARCH_OMAP3 is not set
+# CONFIG_ARCH_OMAP4 is not set
+
+#
+# OMAP Feature Selections
+#
+# CONFIG_OMAP_DEBUG_POWERDOMAIN is not set
+# CONFIG_OMAP_DEBUG_CLOCKDOMAIN is not set
+CONFIG_OMAP_RESET_CLOCKS=y
+# CONFIG_OMAP_MUX is not set
+# CONFIG_OMAP_MCBSP is not set
+CONFIG_OMAP_MBOX_FWK=y
+# CONFIG_OMAP_MPU_TIMER is not set
+CONFIG_OMAP_32K_TIMER=y
+CONFIG_OMAP_32K_TIMER_HZ=128
+CONFIG_OMAP_DM_TIMER=y
+# CONFIG_OMAP_LL_DEBUG_UART1 is not set
+# CONFIG_OMAP_LL_DEBUG_UART2 is not set
+CONFIG_OMAP_LL_DEBUG_UART3=y
+# CONFIG_MACH_OMAP_GENERIC is not set
+
+#
+# OMAP Core Type
+#
+CONFIG_ARCH_OMAP24XX=y
+CONFIG_ARCH_OMAP2420=y
+# CONFIG_ARCH_OMAP2430 is not set
+
+#
+# OMAP Board Type
+#
+CONFIG_MACH_OMAP2_TUSB6010=y
+# CONFIG_MACH_OMAP_H4 is not set
+# CONFIG_MACH_OMAP_APOLLON is not set
+# CONFIG_MACH_OMAP_2430SDP is not set
+CONFIG_MACH_NOKIA_N8X0=y
+
+#
+# Processor Type
+#
+CONFIG_CPU_32=y
+CONFIG_CPU_V6=y
+# CONFIG_CPU_32v6K is not set
+CONFIG_CPU_32v6=y
+CONFIG_CPU_ABRT_EV6=y
+CONFIG_CPU_PABRT_NOIFAR=y
+CONFIG_CPU_CACHE_V6=y
+CONFIG_CPU_CACHE_VIPT=y
+CONFIG_CPU_COPY_V6=y
+CONFIG_CPU_TLB_V6=y
+CONFIG_CPU_HAS_ASID=y
+CONFIG_CPU_CP15=y
+CONFIG_CPU_CP15_MMU=y
+
+#
+# Processor Features
+#
+CONFIG_ARM_THUMB=y
+# CONFIG_CPU_ICACHE_DISABLE is not set
+# CONFIG_CPU_DCACHE_DISABLE is not set
+# CONFIG_CPU_BPREDICT_DISABLE is not set
+# CONFIG_ARM_ERRATA_411920 is not set
+CONFIG_COMMON_CLKDEV=y
+
+#
+# Bus support
+#
+# CONFIG_PCI_SYSCALL is not set
+# CONFIG_ARCH_SUPPORTS_MSI is not set
+# CONFIG_PCCARD is not set
+
+#
+# Kernel Features
+#
+# CONFIG_NO_HZ is not set
+# CONFIG_HIGH_RES_TIMERS is not set
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
+# CONFIG_PREEMPT is not set
+CONFIG_HZ=128
+CONFIG_AEABI=y
+CONFIG_OABI_COMPAT=y
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+CONFIG_PAGEFLAGS_EXTENDED=y
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
+CONFIG_VIRT_TO_BUS=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
+CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
+CONFIG_LEDS=y
+CONFIG_ALIGNMENT_TRAP=y
+# CONFIG_UACCESS_WITH_MEMCPY is not set
+
+#
+# Boot options
+#
+CONFIG_ZBOOT_ROM_TEXT=0x10C08000
+CONFIG_ZBOOT_ROM_BSS=0x10200000
+# CONFIG_ZBOOT_ROM is not set
+CONFIG_CMDLINE="root=1f03 rootfstype=jffs2 console=ttyS0,115200n8"
+# CONFIG_XIP_KERNEL is not set
+# CONFIG_KEXEC is not set
+
+#
+# CPU Power Management
+#
+# CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
+
+#
+# Floating point emulation
+#
+
+#
+# At least one emulation must be selected
+#
+CONFIG_FPE_NWFPE=y
+# CONFIG_FPE_NWFPE_XP is not set
+# CONFIG_FPE_FASTFPE is not set
+CONFIG_VFP=y
+
+#
+# Userspace binary formats
+#
+CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
+# CONFIG_BINFMT_AOUT is not set
+# CONFIG_BINFMT_MISC is not set
+
+#
+# Power management options
+#
+# CONFIG_PM is not set
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_PACKET is not set
+CONFIG_UNIX=y
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+# CONFIG_IP_MULTICAST is not set
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+# CONFIG_IP_PNP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_ARPD is not set
+# CONFIG_SYN_COOKIES is not set
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_NET_DSA is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
+# CONFIG_IEEE802154 is not set
+# CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_CAN is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+CONFIG_WIRELESS=y
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_OLD_REGULATORY is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_LIB80211 is not set
+
+#
+# CFG80211 needs to be enabled for MAC80211
+#
+CONFIG_MAC80211_DEFAULT_PS_VALUE=0
+# CONFIG_WIMAX is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+CONFIG_FW_LOADER=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_EXTRA_FIRMWARE=""
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_DEBUG_DEVRES is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_TESTS is not set
+# CONFIG_MTD_REDBOOT_PARTS is not set
+CONFIG_MTD_CMDLINE_PARTS=y
+# CONFIG_MTD_AFS_PARTS is not set
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+# CONFIG_MTD_CHAR is not set
+CONFIG_HAVE_MTD_OTP=y
+# CONFIG_MTD_BLKDEVS is not set
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+# CONFIG_MTD_CFI is not set
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+CONFIG_MTD_ONENAND=y
+# CONFIG_MTD_ONENAND_VERIFY_WRITE is not set
+# CONFIG_MTD_ONENAND_GENERIC is not set
+CONFIG_MTD_ONENAND_OMAP2=y
+CONFIG_MTD_ONENAND_OTP=y
+# CONFIG_MTD_ONENAND_2X_PROGRAM is not set
+# CONFIG_MTD_ONENAND_SIM is not set
+
+#
+# LPDDR flash memory drivers
+#
+# CONFIG_MTD_LPDDR is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_COW_COMMON is not set
+# CONFIG_BLK_DEV_LOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=4096
+# CONFIG_BLK_DEV_XIP is not set
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+# CONFIG_MG_DISK is not set
+# CONFIG_MISC_DEVICES is not set
+CONFIG_HAVE_IDE=y
+# CONFIG_IDE is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+# CONFIG_SCSI is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SCSI_NETLINK is not set
+# CONFIG_ATA is not set
+# CONFIG_MD is not set
+# CONFIG_NETDEVICES is not set
+# CONFIG_ISDN is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+CONFIG_SERIO=y
+CONFIG_SERIO_SERPORT=y
+# CONFIG_SERIO_RAW is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_CONSOLE_TRANSLATIONS=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+# CONFIG_SERIAL_MAX3100 is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
+# CONFIG_LEGACY_PTYS is not set
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_R3964 is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+# CONFIG_I2C is not set
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+# CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
+CONFIG_SPI_OMAP24XX=y
+
+#
+# SPI Protocol Masters
+#
+# CONFIG_SPI_SPIDEV is not set
+# CONFIG_SPI_TLE62X0 is not set
+CONFIG_ARCH_REQUIRE_GPIOLIB=y
+CONFIG_GPIOLIB=y
+# CONFIG_DEBUG_GPIO is not set
+# CONFIG_GPIO_SYSFS is not set
+
+#
+# Memory mapped GPIO expanders:
+#
+
+#
+# I2C GPIO expanders:
+#
+
+#
+# PCI GPIO expanders:
+#
+
+#
+# SPI GPIO expanders:
+#
+# CONFIG_GPIO_MAX7301 is not set
+# CONFIG_GPIO_MCP23S08 is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+# CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
+# CONFIG_WATCHDOG is not set
+CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_CORE is not set
+# CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
+# CONFIG_HTC_EGPIO is not set
+# CONFIG_HTC_PASIC3 is not set
+# CONFIG_MFD_TMIO is not set
+# CONFIG_MFD_T7L66XB is not set
+# CONFIG_MFD_TC6387XB is not set
+# CONFIG_MFD_TC6393XB is not set
+# CONFIG_EZX_PCAP is not set
+# CONFIG_MEDIA_SUPPORT is not set
+
+#
+# Graphics support
+#
+# CONFIG_VGASTATE is not set
+# CONFIG_VIDEO_OUTPUT_CONTROL is not set
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+# CONFIG_VGA_CONSOLE is not set
+CONFIG_DUMMY_CONSOLE=y
+# CONFIG_SOUND is not set
+# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+# CONFIG_USB_MON is not set
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_TUSB6010=y
+# CONFIG_USB_MUSB_HOST is not set
+CONFIG_USB_MUSB_PERIPHERAL=y
+# CONFIG_USB_MUSB_OTG is not set
+CONFIG_USB_GADGET_MUSB_HDRC=y
+# CONFIG_MUSB_PIO_ONLY is not set
+# CONFIG_USB_INVENTRA_DMA is not set
+# CONFIG_USB_TI_CPPI_DMA is not set
+CONFIG_USB_TUSB_OMAP_DMA=y
+CONFIG_USB_MUSB_DEBUG=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C_HSOTG is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LANGWELL is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+CONFIG_USB_ETH=y
+# CONFIG_USB_ETH_RNDIS is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+CONFIG_NOP_USB_XCEIV=y
+# CONFIG_MMC is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
+# CONFIG_NEW_LEDS is not set
+CONFIG_RTC_LIB=y
+# CONFIG_RTC_CLASS is not set
+# CONFIG_DMADEVICES is not set
+# CONFIG_AUXDISPLAY is not set
+# CONFIG_REGULATOR is not set
+# CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# File systems
+#
+# CONFIG_EXT2_FS is not set
+# CONFIG_EXT3_FS is not set
+# CONFIG_EXT4_FS is not set
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
+CONFIG_FILE_LOCKING=y
+CONFIG_FSNOTIFY=y
+CONFIG_DNOTIFY=y
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+CONFIG_MISC_FILESYSTEMS=y
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+CONFIG_JFFS2_FS=y
+CONFIG_JFFS2_FS_DEBUG=0
+CONFIG_JFFS2_FS_WRITEBUFFER=y
+# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
+CONFIG_JFFS2_SUMMARY=y
+# CONFIG_JFFS2_FS_XATTR is not set
+CONFIG_JFFS2_COMPRESSION_OPTIONS=y
+CONFIG_JFFS2_ZLIB=y
+CONFIG_JFFS2_LZO=y
+CONFIG_JFFS2_RTIME=y
+# CONFIG_JFFS2_RUBIN is not set
+# CONFIG_JFFS2_CMODE_NONE is not set
+CONFIG_JFFS2_CMODE_PRIORITY=y
+# CONFIG_JFFS2_CMODE_SIZE is not set
+# CONFIG_JFFS2_CMODE_FAVOURLZO is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_OMFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_ROMFS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+# CONFIG_NFS_FS is not set
+# CONFIG_NFSD is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+# CONFIG_PARTITION_ADVANCED is not set
+CONFIG_MSDOS_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_DEFAULT="iso8859-1"
+# CONFIG_NLS_CODEPAGE_437 is not set
+# CONFIG_NLS_CODEPAGE_737 is not set
+# CONFIG_NLS_CODEPAGE_775 is not set
+# CONFIG_NLS_CODEPAGE_850 is not set
+# CONFIG_NLS_CODEPAGE_852 is not set
+# CONFIG_NLS_CODEPAGE_855 is not set
+# CONFIG_NLS_CODEPAGE_857 is not set
+# CONFIG_NLS_CODEPAGE_860 is not set
+# CONFIG_NLS_CODEPAGE_861 is not set
+# CONFIG_NLS_CODEPAGE_862 is not set
+# CONFIG_NLS_CODEPAGE_863 is not set
+# CONFIG_NLS_CODEPAGE_864 is not set
+# CONFIG_NLS_CODEPAGE_865 is not set
+# CONFIG_NLS_CODEPAGE_866 is not set
+# CONFIG_NLS_CODEPAGE_869 is not set
+# CONFIG_NLS_CODEPAGE_936 is not set
+# CONFIG_NLS_CODEPAGE_950 is not set
+# CONFIG_NLS_CODEPAGE_932 is not set
+# CONFIG_NLS_CODEPAGE_949 is not set
+# CONFIG_NLS_CODEPAGE_874 is not set
+# CONFIG_NLS_ISO8859_8 is not set
+# CONFIG_NLS_CODEPAGE_1250 is not set
+# CONFIG_NLS_CODEPAGE_1251 is not set
+# CONFIG_NLS_ASCII is not set
+# CONFIG_NLS_ISO8859_1 is not set
+# CONFIG_NLS_ISO8859_2 is not set
+# CONFIG_NLS_ISO8859_3 is not set
+# CONFIG_NLS_ISO8859_4 is not set
+# CONFIG_NLS_ISO8859_5 is not set
+# CONFIG_NLS_ISO8859_6 is not set
+# CONFIG_NLS_ISO8859_7 is not set
+# CONFIG_NLS_ISO8859_9 is not set
+# CONFIG_NLS_ISO8859_13 is not set
+# CONFIG_NLS_ISO8859_14 is not set
+# CONFIG_NLS_ISO8859_15 is not set
+# CONFIG_NLS_KOI8_R is not set
+# CONFIG_NLS_KOI8_U is not set
+# CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+CONFIG_DEBUG_KERNEL=y
+# CONFIG_DEBUG_SHIRQ is not set
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
+CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
+CONFIG_SCHED_DEBUG=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+# CONFIG_SLUB_STATS is not set
+# CONFIG_DEBUG_KMEMLEAK is not set
+# CONFIG_DEBUG_RT_MUTEXES is not set
+# CONFIG_RT_MUTEX_TESTER is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_LOCK_ALLOC is not set
+# CONFIG_PROVE_LOCKING is not set
+# CONFIG_LOCK_STAT is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
+CONFIG_DEBUG_MEMORY_INIT=y
+# CONFIG_DEBUG_LIST is not set
+# CONFIG_DEBUG_SG is not set
+# CONFIG_DEBUG_NOTIFIERS is not set
+# CONFIG_BOOT_PRINTK_DELAY is not set
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+# CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
+# CONFIG_FAULT_INJECTION is not set
+# CONFIG_LATENCYTOP is not set
+# CONFIG_SYSCTL_SYSCALL_CHECK is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+CONFIG_FTRACE=y
+# CONFIG_FUNCTION_TRACER is not set
+# CONFIG_IRQSOFF_TRACER is not set
+# CONFIG_SCHED_TRACER is not set
+# CONFIG_ENABLE_DEFAULT_TRACERS is not set
+# CONFIG_BOOT_TRACER is not set
+CONFIG_BRANCH_PROFILE_NONE=y
+# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
+# CONFIG_PROFILE_ALL_BRANCHES is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_SAMPLES is not set
+CONFIG_HAVE_ARCH_KGDB=y
+# CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
+CONFIG_DEBUG_USER=y
+CONFIG_DEBUG_ERRORS=y
+# CONFIG_DEBUG_STACK_USAGE is not set
+# CONFIG_DEBUG_LL is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_BINARY_PRINTF is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+CONFIG_GENERIC_FIND_LAST_BIT=y
+CONFIG_CRC_CCITT=y
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_T10DIF is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_ZLIB_INFLATE=y
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+CONFIG_DECOMPRESS_GZIP=y
+CONFIG_DECOMPRESS_BZIP2=y
+CONFIG_DECOMPRESS_LZMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/omap3_beagle_defconfig b/arch/arm/configs/omap3_beagle_defconfig
index 4c6fb7e959df..51c0fa8897cd 100644
--- a/arch/arm/configs/omap3_beagle_defconfig
+++ b/arch/arm/configs/omap3_beagle_defconfig
@@ -128,6 +128,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
 CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # System Type
@@ -236,6 +237,7 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 # CONFIG_OUTER_CACHE is not set
+CONFIG_COMMON_CLKDEV=y
 
 #
 # Bus support
@@ -317,7 +319,12 @@ CONFIG_BINFMT_MISC=y
 #
 # Power management options
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -713,6 +720,7 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
 
 #
 # PCI GPIO expanders:
@@ -741,6 +749,7 @@ CONFIG_SSB_POSSIBLE=y
 # CONFIG_MFD_SM501 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_UCB1400_CORE is not set
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
@@ -787,7 +796,7 @@ CONFIG_DUMMY_CONSOLE=y
 CONFIG_USB_SUPPORT=y
 CONFIG_USB_ARCH_HAS_HCD=y
 CONFIG_USB_ARCH_HAS_OHCI=y
-# CONFIG_USB_ARCH_HAS_EHCI is not set
+CONFIG_USB_ARCH_HAS_EHCI=y
 CONFIG_USB=y
 # CONFIG_USB_DEBUG is not set
 # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
@@ -798,7 +807,8 @@ CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_DEVICE_CLASS=y
 # CONFIG_USB_DYNAMIC_MINORS is not set
-# CONFIG_USB_OTG is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
 # CONFIG_USB_OTG_WHITELIST is not set
 # CONFIG_USB_OTG_BLACKLIST_HUB is not set
 CONFIG_USB_MON=y
@@ -806,6 +816,8 @@ CONFIG_USB_MON=y
 #
 # USB Host Controller Drivers
 #
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_ROOT_HUB_TT=y
 # CONFIG_USB_C67X00_HCD is not set
 # CONFIG_USB_ISP116X_HCD is not set
 # CONFIG_USB_ISP1760_HCD is not set
@@ -818,10 +830,10 @@ CONFIG_USB_MUSB_SOC=y
 #
 # OMAP 343x high speed USB support
 #
-CONFIG_USB_MUSB_HOST=y
+# CONFIG_USB_MUSB_HOST is not set
 # CONFIG_USB_MUSB_PERIPHERAL is not set
-# CONFIG_USB_MUSB_OTG is not set
-# CONFIG_USB_GADGET_MUSB_HDRC is not set
+CONFIG_USB_MUSB_OTG=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
 CONFIG_USB_MUSB_HDRC_HCD=y
 # CONFIG_MUSB_PIO_ONLY is not set
 CONFIG_USB_INVENTRA_DMA=y
@@ -887,8 +899,8 @@ CONFIG_USB_GADGET_SELECTED=y
 # CONFIG_USB_GADGET_FSL_USB2 is not set
 # CONFIG_USB_GADGET_NET2280 is not set
 # CONFIG_USB_GADGET_PXA25X is not set
-CONFIG_USB_GADGET_M66592=y
-CONFIG_USB_M66592=y
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_M66592 is not set
 # CONFIG_USB_GADGET_PXA27X is not set
 # CONFIG_USB_GADGET_GOKU is not set
 # CONFIG_USB_GADGET_LH7A40X is not set
@@ -906,6 +918,15 @@ CONFIG_USB_ETH_RNDIS=y
 # CONFIG_USB_MIDI_GADGET is not set
 # CONFIG_USB_G_PRINTER is not set
 # CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_ISP1301_OMAP is not set
+CONFIG_TWL4030_USB=y
+# CONFIG_NOP_USB_XCEIV is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
@@ -923,6 +944,7 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 #
 # CONFIG_MMC_SDHCI is not set
 # CONFIG_MMC_OMAP is not set
+CONFIG_MMC_OMAP_HS=y
 # CONFIG_MEMSTICK is not set
 # CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
@@ -981,10 +1003,11 @@ CONFIG_RTC_INTF_DEV=y
 #
 # Voltage and Current regulators
 #
-# CONFIG_REGULATOR is not set
+CONFIG_REGULATOR=y
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_BQ24022 is not set
+CONFIG_REGULATOR_TWL4030=y
 # CONFIG_UIO is not set
 
 #
diff --git a/arch/arm/configs/omap_3430sdp_defconfig b/arch/arm/configs/omap_3430sdp_defconfig
index 8fb918d9ba65..9a510eab75a6 100644
--- a/arch/arm/configs/omap_3430sdp_defconfig
+++ b/arch/arm/configs/omap_3430sdp_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.29-rc8
-# Fri Mar 13 14:17:01 2009
+# Linux kernel version: 2.6.30-omap1
+# Tue Jun 23 10:36:45 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -197,9 +197,9 @@ CONFIG_OMAP_MCBSP=y
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_32K_TIMER_HZ=128
 CONFIG_OMAP_DM_TIMER=y
-# CONFIG_OMAP_LL_DEBUG_UART1 is not set
+CONFIG_OMAP_LL_DEBUG_UART1=y
 # CONFIG_OMAP_LL_DEBUG_UART2 is not set
-CONFIG_OMAP_LL_DEBUG_UART3=y
+# CONFIG_OMAP_LL_DEBUG_UART3 is not set
 CONFIG_OMAP_SERIAL_WAKE=y
 CONFIG_ARCH_OMAP34XX=y
 CONFIG_ARCH_OMAP3430=y
@@ -207,10 +207,10 @@ CONFIG_ARCH_OMAP3430=y
 #
 # OMAP Board Type
 #
-CONFIG_MACH_OMAP3_BEAGLE=y
-CONFIG_MACH_OMAP_LDP=y
-CONFIG_MACH_OVERO=y
-CONFIG_MACH_OMAP3_PANDORA=y
+# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_OMAP_LDP is not set
+# CONFIG_MACH_OVERO is not set
+# CONFIG_MACH_OMAP3_PANDORA is not set
 CONFIG_MACH_OMAP_3430SDP=y
 
 #
@@ -950,7 +950,7 @@ CONFIG_SPI_OMAP24XX=y
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
 CONFIG_GPIOLIB=y
-CONFIG_DEBUG_GPIO=y
+# CONFIG_DEBUG_GPIO is not set
 CONFIG_GPIO_SYSFS=y
 
 #
@@ -1370,7 +1370,7 @@ CONFIG_SND_OMAP_SOC=y
 CONFIG_SND_OMAP_SOC_MCBSP=y
 # CONFIG_SND_OMAP_SOC_OVERO is not set
 CONFIG_SND_OMAP_SOC_SDP3430=y
-CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=y
+# CONFIG_SND_OMAP_SOC_OMAP3_PANDORA is not set
 CONFIG_SND_SOC_I2C_AND_SPI=y
 # CONFIG_SND_SOC_ALL_CODECS is not set
 CONFIG_SND_SOC_TWL4030=y
diff --git a/arch/arm/configs/omap_zoom2_defconfig b/arch/arm/configs/omap_zoom2_defconfig
index 213fe9c5eaae..f1739fae7ed4 100644
--- a/arch/arm/configs/omap_zoom2_defconfig
+++ b/arch/arm/configs/omap_zoom2_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.27-rc5
-# Fri Oct 10 11:49:41 2008
+# Linux kernel version: 2.6.30-omap1
+# Fri Jun 12 17:25:46 2009
 #
 CONFIG_ARM=y
 CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
 # CONFIG_ARCH_HAS_ILOG2_U64 is not set
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
-CONFIG_ARCH_SUPPORTS_AOUT=y
-CONFIG_ZONE_DMA=y
 CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
 CONFIG_VECTORS_BASE=0xffff0000
 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@@ -39,44 +37,61 @@ CONFIG_LOCALVERSION_AUTO=y
 CONFIG_SWAP=y
 CONFIG_SYSVIPC=y
 CONFIG_SYSVIPC_SYSCTL=y
+# CONFIG_POSIX_MQUEUE is not set
 CONFIG_BSD_PROCESS_ACCT=y
 # CONFIG_BSD_PROCESS_ACCT_V3 is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_AUDIT is not set
+
+#
+# RCU Subsystem
+#
+CONFIG_CLASSIC_RCU=y
+# CONFIG_TREE_RCU is not set
+# CONFIG_PREEMPT_RCU is not set
+# CONFIG_TREE_RCU_TRACE is not set
+# CONFIG_PREEMPT_RCU_TRACE is not set
 # CONFIG_IKCONFIG is not set
 CONFIG_LOG_BUF_SHIFT=14
-# CONFIG_CGROUPS is not set
 CONFIG_GROUP_SCHED=y
 CONFIG_FAIR_GROUP_SCHED=y
 # CONFIG_RT_GROUP_SCHED is not set
 CONFIG_USER_SCHED=y
 # CONFIG_CGROUP_SCHED is not set
+# CONFIG_CGROUPS is not set
 CONFIG_SYSFS_DEPRECATED=y
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_RELAY is not set
 # CONFIG_NAMESPACES is not set
 CONFIG_BLK_DEV_INITRD=y
 CONFIG_INITRAMFS_SOURCE=""
+CONFIG_RD_GZIP=y
+# CONFIG_RD_BZIP2 is not set
+# CONFIG_RD_LZMA is not set
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
 CONFIG_SYSCTL=y
+CONFIG_ANON_INODES=y
 CONFIG_EMBEDDED=y
 CONFIG_UID16=y
 # CONFIG_SYSCTL_SYSCALL is not set
 CONFIG_KALLSYMS=y
 # CONFIG_KALLSYMS_ALL is not set
 CONFIG_KALLSYMS_EXTRA_PASS=y
+# CONFIG_STRIP_ASM_SYMS is not set
 CONFIG_HOTPLUG=y
 CONFIG_PRINTK=y
 CONFIG_BUG=y
 CONFIG_ELF_CORE=y
-CONFIG_COMPAT_BRK=y
 CONFIG_BASE_FULL=y
 CONFIG_FUTEX=y
-CONFIG_ANON_INODES=y
 CONFIG_EPOLL=y
 CONFIG_SIGNALFD=y
 CONFIG_TIMERFD=y
 CONFIG_EVENTFD=y
 CONFIG_SHMEM=y
+CONFIG_AIO=y
 CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_COMPAT_BRK=y
 CONFIG_SLAB=y
 # CONFIG_SLUB is not set
 # CONFIG_SLOB is not set
@@ -84,19 +99,13 @@ CONFIG_SLAB=y
 # CONFIG_MARKERS is not set
 CONFIG_HAVE_OPROFILE=y
 # CONFIG_KPROBES is not set
-# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
-# CONFIG_HAVE_IOREMAP_PROT is not set
 CONFIG_HAVE_KPROBES=y
 CONFIG_HAVE_KRETPROBES=y
-# CONFIG_HAVE_ARCH_TRACEHOOK is not set
-# CONFIG_HAVE_DMA_ATTRS is not set
-# CONFIG_USE_GENERIC_SMP_HELPERS is not set
 CONFIG_HAVE_CLK=y
-CONFIG_PROC_PAGE_MONITOR=y
+# CONFIG_SLOW_WORK is not set
 CONFIG_HAVE_GENERIC_DMA_COHERENT=y
 CONFIG_SLABINFO=y
 CONFIG_RT_MUTEXES=y
-# CONFIG_TINY_SHMEM is not set
 CONFIG_BASE_SMALL=0
 CONFIG_MODULES=y
 # CONFIG_MODULE_FORCE_LOAD is not set
@@ -104,11 +113,8 @@ CONFIG_MODULE_UNLOAD=y
 # CONFIG_MODULE_FORCE_UNLOAD is not set
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_KMOD=y
 CONFIG_BLOCK=y
 # CONFIG_LBD is not set
-# CONFIG_BLK_DEV_IO_TRACE is not set
-# CONFIG_LSF is not set
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_BLK_DEV_INTEGRITY is not set
 
@@ -124,7 +130,7 @@ CONFIG_DEFAULT_AS=y
 # CONFIG_DEFAULT_CFQ is not set
 # CONFIG_DEFAULT_NOOP is not set
 CONFIG_DEFAULT_IOSCHED="anticipatory"
-CONFIG_CLASSIC_RCU=y
+CONFIG_FREEZER=y
 
 #
 # System Type
@@ -134,10 +140,10 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_REALVIEW is not set
 # CONFIG_ARCH_VERSATILE is not set
 # CONFIG_ARCH_AT91 is not set
-# CONFIG_ARCH_CLPS7500 is not set
 # CONFIG_ARCH_CLPS711X is not set
 # CONFIG_ARCH_EBSA110 is not set
 # CONFIG_ARCH_EP93XX is not set
+# CONFIG_ARCH_GEMINI is not set
 # CONFIG_ARCH_FOOTBRIDGE is not set
 # CONFIG_ARCH_NETX is not set
 # CONFIG_ARCH_H720X is not set
@@ -158,14 +164,17 @@ CONFIG_CLASSIC_RCU=y
 # CONFIG_ARCH_ORION5X is not set
 # CONFIG_ARCH_PNX4008 is not set
 # CONFIG_ARCH_PXA is not set
+# CONFIG_ARCH_MMP is not set
 # CONFIG_ARCH_RPC is not set
 # CONFIG_ARCH_SA1100 is not set
 # CONFIG_ARCH_S3C2410 is not set
+# CONFIG_ARCH_S3C64XX is not set
 # CONFIG_ARCH_SHARK is not set
 # CONFIG_ARCH_LH7A40X is not set
 # CONFIG_ARCH_DAVINCI is not set
 CONFIG_ARCH_OMAP=y
-# CONFIG_ARCH_MSM7X00A is not set
+# CONFIG_ARCH_MSM is not set
+# CONFIG_ARCH_W90X900 is not set
 
 #
 # TI OMAP Implementations
@@ -174,6 +183,7 @@ CONFIG_ARCH_OMAP_OTG=y
 # CONFIG_ARCH_OMAP1 is not set
 # CONFIG_ARCH_OMAP2 is not set
 CONFIG_ARCH_OMAP3=y
+# CONFIG_ARCH_OMAP4 is not set
 
 #
 # OMAP Feature Selections
@@ -185,6 +195,7 @@ CONFIG_OMAP_MUX=y
 CONFIG_OMAP_MUX_DEBUG=y
 CONFIG_OMAP_MUX_WARNINGS=y
 CONFIG_OMAP_MCBSP=y
+# CONFIG_OMAP_MBOX_FWK is not set
 # CONFIG_OMAP_MPU_TIMER is not set
 CONFIG_OMAP_32K_TIMER=y
 CONFIG_OMAP_32K_TIMER_HZ=128
@@ -192,25 +203,20 @@ CONFIG_OMAP_DM_TIMER=y
 # CONFIG_OMAP_LL_DEBUG_UART1 is not set
 # CONFIG_OMAP_LL_DEBUG_UART2 is not set
 CONFIG_OMAP_LL_DEBUG_UART3=y
-CONFIG_OMAP_SERIAL_WAKE=y
 CONFIG_ARCH_OMAP34XX=y
 CONFIG_ARCH_OMAP3430=y
 
 #
 # OMAP Board Type
 #
-# CONFIG_MACH_OMAP3_BEAGLE is not set
+# CONFIG_MACH_NOKIA_RX51 is not set
 # CONFIG_MACH_OMAP_LDP is not set
-CONFIG_MACH_OMAP_ZOOM2=y
+# CONFIG_MACH_OMAP_3430SDP is not set
+# CONFIG_MACH_OMAP3EVM is not set
+# CONFIG_MACH_OMAP3_BEAGLE is not set
 # CONFIG_MACH_OVERO is not set
-
-#
-# Boot options
-#
-
-#
-# Power management
-#
+# CONFIG_MACH_OMAP3_PANDORA is not set
+CONFIG_MACH_OMAP_ZOOM2=y
 
 #
 # Processor Type
@@ -239,6 +245,10 @@ CONFIG_ARM_THUMB=y
 # CONFIG_CPU_BPREDICT_DISABLE is not set
 CONFIG_HAS_TLS_REG=y
 # CONFIG_OUTER_CACHE is not set
+# CONFIG_ARM_ERRATA_430973 is not set
+# CONFIG_ARM_ERRATA_458693 is not set
+# CONFIG_ARM_ERRATA_460075 is not set
+CONFIG_COMMON_CLKDEV=y
 
 #
 # Bus support
@@ -254,26 +264,32 @@ CONFIG_TICK_ONESHOT=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+CONFIG_VMSPLIT_3G=y
+# CONFIG_VMSPLIT_2G is not set
+# CONFIG_VMSPLIT_1G is not set
+CONFIG_PAGE_OFFSET=0xC0000000
 # CONFIG_PREEMPT is not set
 CONFIG_HZ=128
 CONFIG_AEABI=y
 CONFIG_OABI_COMPAT=y
-CONFIG_ARCH_FLATMEM_HAS_HOLES=y
-# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
+# CONFIG_ARCH_HAS_HOLES_MEMORYMODEL is not set
+# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
+# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
+# CONFIG_HIGHMEM is not set
 CONFIG_SELECT_MEMORY_MODEL=y
 CONFIG_FLATMEM_MANUAL=y
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 # CONFIG_SPARSEMEM_MANUAL is not set
 CONFIG_FLATMEM=y
 CONFIG_FLAT_NODE_MEM_MAP=y
-# CONFIG_SPARSEMEM_STATIC is not set
-# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
 CONFIG_PAGEFLAGS_EXTENDED=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
-# CONFIG_RESOURCES_64BIT is not set
-CONFIG_ZONE_DMA_FLAG=1
-CONFIG_BOUNCE=y
+# CONFIG_PHYS_ADDR_T_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=0
 CONFIG_VIRT_TO_BUS=y
+CONFIG_UNEVICTABLE_LRU=y
+CONFIG_HAVE_MLOCK=y
+CONFIG_HAVE_MLOCKED_PAGE_BIT=y
 # CONFIG_LEDS is not set
 CONFIG_ALIGNMENT_TRAP=y
 
@@ -287,9 +303,10 @@ CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.16
 # CONFIG_KEXEC is not set
 
 #
-# CPU Frequency scaling
+# CPU Power Management
 #
 # CONFIG_CPU_FREQ is not set
+# CONFIG_CPU_IDLE is not set
 
 #
 # Floating point emulation
@@ -309,13 +326,23 @@ CONFIG_VFPv3=y
 # Userspace binary formats
 #
 CONFIG_BINFMT_ELF=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_HAVE_AOUT=y
 # CONFIG_BINFMT_AOUT is not set
 CONFIG_BINFMT_MISC=y
 
 #
 # Power management options
 #
-# CONFIG_PM is not set
+CONFIG_PM=y
+CONFIG_PM_DEBUG=y
+CONFIG_PM_VERBOSE=y
+CONFIG_CAN_PM_TRACE=y
+CONFIG_PM_SLEEP=y
+CONFIG_SUSPEND=y
+# CONFIG_PM_TEST_SUSPEND is not set
+CONFIG_SUSPEND_FREEZER=y
+# CONFIG_APM_EMULATION is not set
 CONFIG_ARCH_SUSPEND_POSSIBLE=y
 CONFIG_NET=y
 
@@ -378,7 +405,9 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_LAPB is not set
 # CONFIG_ECONET is not set
 # CONFIG_WAN_ROUTER is not set
+# CONFIG_PHONET is not set
 # CONFIG_NET_SCHED is not set
+# CONFIG_DCB is not set
 
 #
 # Network testing
@@ -389,8 +418,8 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
 # CONFIG_IRDA is not set
 # CONFIG_BT is not set
 # CONFIG_AF_RXRPC is not set
-# CONFIG_PHONET is not set
 # CONFIG_WIRELESS is not set
+# CONFIG_WIMAX is not set
 # CONFIG_RFKILL is not set
 # CONFIG_NET_9P is not set
 
@@ -416,14 +445,28 @@ CONFIG_BLK_DEV=y
 # CONFIG_BLK_DEV_COW_COMMON is not set
 CONFIG_BLK_DEV_LOOP=y
 # CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_UB is not set
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=16
 CONFIG_BLK_DEV_RAM_SIZE=16384
 # CONFIG_BLK_DEV_XIP is not set
 # CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
 CONFIG_MISC_DEVICES=y
-# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_ICS932S401 is not set
+# CONFIG_OMAP_STI is not set
 # CONFIG_ENCLOSURE_SERVICES is not set
+# CONFIG_ISL29003 is not set
+# CONFIG_C2PORT is not set
+
+#
+# EEPROM support
+#
+# CONFIG_EEPROM_AT24 is not set
+# CONFIG_EEPROM_AT25 is not set
+# CONFIG_EEPROM_LEGACY is not set
+# CONFIG_EEPROM_93CX6 is not set
 CONFIG_HAVE_IDE=y
 # CONFIG_IDE is not set
 
@@ -461,14 +504,20 @@ CONFIG_SCSI_WAIT_SCAN=m
 #
 # CONFIG_SCSI_SPI_ATTRS is not set
 # CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
 # CONFIG_SCSI_SAS_LIBSAS is not set
 # CONFIG_SCSI_SRP_ATTRS is not set
 CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_LIBFC is not set
+# CONFIG_LIBFCOE is not set
 # CONFIG_SCSI_DEBUG is not set
 # CONFIG_SCSI_DH is not set
+# CONFIG_SCSI_OSD_INITIATOR is not set
 # CONFIG_ATA is not set
 # CONFIG_MD is not set
 CONFIG_NETDEVICES=y
+CONFIG_COMPAT_NET_DEV_OPS=y
 # CONFIG_DUMMY is not set
 # CONFIG_BONDING is not set
 # CONFIG_MACVLAN is not set
@@ -501,8 +550,10 @@ CONFIG_MII=y
 # CONFIG_SMC91X is not set
 # CONFIG_DM9000 is not set
 # CONFIG_ENC28J60 is not set
+# CONFIG_ETHOC is not set
 # CONFIG_SMC911X is not set
 CONFIG_SMSC911X=y
+# CONFIG_DNET is not set
 # CONFIG_IBM_NEW_EMAC_ZMII is not set
 # CONFIG_IBM_NEW_EMAC_RGMII is not set
 # CONFIG_IBM_NEW_EMAC_TAH is not set
@@ -519,7 +570,10 @@ CONFIG_NETDEV_10000=y
 #
 # CONFIG_WLAN_PRE80211 is not set
 # CONFIG_WLAN_80211 is not set
-# CONFIG_IWLWIFI_LEDS is not set
+
+#
+# Enable WiMAX (Networking options) to see the WiMAX drivers
+#
 
 #
 # USB Network Adapters
@@ -561,17 +615,25 @@ CONFIG_INPUT_EVDEV=y
 # CONFIG_INPUT_TABLET is not set
 CONFIG_INPUT_TOUCHSCREEN=y
 CONFIG_TOUCHSCREEN_ADS7846=y
+# CONFIG_TOUCHSCREEN_AD7877 is not set
+# CONFIG_TOUCHSCREEN_AD7879_I2C is not set
+# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
+# CONFIG_TOUCHSCREEN_AD7879 is not set
 # CONFIG_TOUCHSCREEN_FUJITSU is not set
 # CONFIG_TOUCHSCREEN_GUNZE is not set
 # CONFIG_TOUCHSCREEN_ELO is not set
+# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
 # CONFIG_TOUCHSCREEN_MTOUCH is not set
 # CONFIG_TOUCHSCREEN_INEXIO is not set
 # CONFIG_TOUCHSCREEN_MK712 is not set
 # CONFIG_TOUCHSCREEN_PENMOUNT is not set
 # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
 # CONFIG_TOUCHSCREEN_TOUCHWIN is not set
-# CONFIG_TOUCHSCREEN_UCB1400 is not set
+# CONFIG_TOUCHSCREEN_TSC2005 is not set
+# CONFIG_TOUCHSCREEN_TSC210X is not set
+# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
 # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
+# CONFIG_TOUCHSCREEN_TSC2007 is not set
 # CONFIG_INPUT_MISC is not set
 
 #
@@ -607,13 +669,15 @@ CONFIG_SERIAL_8250_RSA=y
 #
 # Non-8250 serial port support
 #
+# CONFIG_SERIAL_MAX3100 is not set
 CONFIG_SERIAL_CORE=y
 CONFIG_SERIAL_CORE_CONSOLE=y
 CONFIG_UNIX98_PTYS=y
+# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_IPMI_HANDLER is not set
 CONFIG_HW_RANDOM=y
-# CONFIG_NVRAM is not set
+# CONFIG_HW_RANDOM_TIMERIOMEM is not set
 # CONFIG_R3964 is not set
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_TCG_TPM is not set
@@ -639,6 +703,7 @@ CONFIG_I2C_OMAP=y
 #
 # CONFIG_I2C_PARPORT_LIGHT is not set
 # CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
 
 #
 # Other I2C/SMBus bus drivers
@@ -650,14 +715,11 @@ CONFIG_I2C_OMAP=y
 # Miscellaneous I2C Chip support
 #
 # CONFIG_DS1682 is not set
-# CONFIG_EEPROM_AT24 is not set
-# CONFIG_EEPROM_LEGACY is not set
 # CONFIG_SENSORS_PCF8574 is not set
 # CONFIG_PCF8575 is not set
 # CONFIG_SENSORS_PCA9539 is not set
-# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_ISP1301_OMAP is not set
-# CONFIG_TPS65010 is not set
+# CONFIG_TWL4030_MADC is not set
+# CONFIG_TWL4030_POWEROFF is not set
 # CONFIG_SENSORS_MAX6875 is not set
 # CONFIG_SENSORS_TSL2550 is not set
 # CONFIG_I2C_DEBUG_CORE is not set
@@ -672,12 +734,12 @@ CONFIG_SPI_MASTER=y
 # SPI Master Controller Drivers
 #
 # CONFIG_SPI_BITBANG is not set
+# CONFIG_SPI_GPIO is not set
 CONFIG_SPI_OMAP24XX=y
 
 #
 # SPI Protocol Masters
 #
-# CONFIG_EEPROM_AT25 is not set
 # CONFIG_SPI_SPIDEV is not set
 # CONFIG_SPI_TLE62X0 is not set
 CONFIG_ARCH_REQUIRE_GPIOLIB=y
@@ -686,11 +748,16 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_SYSFS is not set
 
 #
+# Memory mapped GPIO expanders:
+#
+
+#
 # I2C GPIO expanders:
 #
 # CONFIG_GPIO_MAX732X is not set
 # CONFIG_GPIO_PCA953X is not set
 # CONFIG_GPIO_PCF857X is not set
+CONFIG_GPIO_TWL4030=y
 
 #
 # PCI GPIO expanders:
@@ -702,26 +769,34 @@ CONFIG_GPIOLIB=y
 # CONFIG_GPIO_MAX7301 is not set
 # CONFIG_GPIO_MCP23S08 is not set
 CONFIG_W1=y
+CONFIG_W1_CON=y
 
 #
 # 1-wire Bus Masters
 #
+# CONFIG_W1_MASTER_DS2490 is not set
 # CONFIG_W1_MASTER_DS2482 is not set
 # CONFIG_W1_MASTER_DS1WM is not set
 # CONFIG_W1_MASTER_GPIO is not set
+# CONFIG_HDQ_MASTER_OMAP is not set
 
 #
 # 1-wire Slaves
 #
 # CONFIG_W1_SLAVE_THERM is not set
 # CONFIG_W1_SLAVE_SMEM is not set
+# CONFIG_W1_SLAVE_DS2431 is not set
 # CONFIG_W1_SLAVE_DS2433 is not set
 # CONFIG_W1_SLAVE_DS2760 is not set
+# CONFIG_W1_SLAVE_BQ27000 is not set
 CONFIG_POWER_SUPPLY=y
 # CONFIG_POWER_SUPPLY_DEBUG is not set
 # CONFIG_PDA_POWER is not set
 # CONFIG_BATTERY_DS2760 is not set
+# CONFIG_BATTERY_BQ27x00 is not set
 # CONFIG_HWMON is not set
+# CONFIG_THERMAL is not set
+# CONFIG_THERMAL_HWMON is not set
 CONFIG_WATCHDOG=y
 CONFIG_WATCHDOG_NOWAYOUT=y
 
@@ -729,11 +804,17 @@ CONFIG_WATCHDOG_NOWAYOUT=y
 # Watchdog Device Drivers
 #
 # CONFIG_SOFT_WATCHDOG is not set
+# CONFIG_OMAP_WATCHDOG is not set
 
 #
-# Sonics Silicon Backplane
+# USB-based Watchdog Cards
 #
+# CONFIG_USBPCWATCHDOG is not set
 CONFIG_SSB_POSSIBLE=y
+
+#
+# Sonics Silicon Backplane
+#
 # CONFIG_SSB is not set
 
 #
@@ -741,12 +822,19 @@ CONFIG_SSB_POSSIBLE=y
 #
 # CONFIG_MFD_CORE is not set
 # CONFIG_MFD_SM501 is not set
+# CONFIG_MFD_ASIC3 is not set
 # CONFIG_HTC_EGPIO is not set
 # CONFIG_HTC_PASIC3 is not set
+# CONFIG_TPS65010 is not set
+CONFIG_TWL4030_CORE=y
 # CONFIG_MFD_TMIO is not set
 # CONFIG_MFD_T7L66XB is not set
 # CONFIG_MFD_TC6387XB is not set
 # CONFIG_MFD_TC6393XB is not set
+# CONFIG_PMIC_DA903X is not set
+# CONFIG_MFD_WM8400 is not set
+# CONFIG_MFD_WM8350_I2C is not set
+# CONFIG_MFD_PCF50633 is not set
 
 #
 # Multimedia devices
@@ -756,12 +844,14 @@ CONFIG_SSB_POSSIBLE=y
 # Multimedia core support
 #
 # CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
 # CONFIG_VIDEO_MEDIA is not set
 
 #
 # Multimedia drivers
 #
 CONFIG_DAB=y
+# CONFIG_USB_DABUSB is not set
 
 #
 # Graphics support
@@ -782,10 +872,12 @@ CONFIG_VIDEO_OUTPUT_CONTROL=m
 # CONFIG_VGA_CONSOLE is not set
 CONFIG_DUMMY_CONSOLE=y
 CONFIG_SOUND=y
+# CONFIG_SOUND_OSS_CORE is not set
 CONFIG_SND=y
 # CONFIG_SND_SEQUENCER is not set
 # CONFIG_SND_MIXER_OSS is not set
 # CONFIG_SND_PCM_OSS is not set
+# CONFIG_SND_HRTIMER is not set
 # CONFIG_SND_DYNAMIC_MINORS is not set
 CONFIG_SND_SUPPORT_OLD_API=y
 CONFIG_SND_VERBOSE_PROCFS=y
@@ -798,19 +890,197 @@ CONFIG_SND_DRIVERS=y
 # CONFIG_SND_MPU401 is not set
 CONFIG_SND_ARM=y
 CONFIG_SND_SPI=y
+CONFIG_SND_USB=y
+# CONFIG_SND_USB_AUDIO is not set
+# CONFIG_SND_USB_CAIAQ is not set
 # CONFIG_SND_SOC is not set
 # CONFIG_SOUND_PRIME is not set
 CONFIG_HID_SUPPORT=y
 CONFIG_HID=y
 # CONFIG_HID_DEBUG is not set
 # CONFIG_HIDRAW is not set
-# CONFIG_USB_SUPPORT is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_HID_PID is not set
+# CONFIG_USB_HIDDEV is not set
+
+#
+# Special HID drivers
+#
+# CONFIG_HID_A4TECH is not set
+# CONFIG_HID_APPLE is not set
+# CONFIG_HID_BELKIN is not set
+# CONFIG_HID_CHERRY is not set
+# CONFIG_HID_CHICONY is not set
+# CONFIG_HID_CYPRESS is not set
+# CONFIG_DRAGONRISE_FF is not set
+# CONFIG_HID_EZKEY is not set
+# CONFIG_HID_KYE is not set
+# CONFIG_HID_GYRATION is not set
+# CONFIG_HID_KENSINGTON is not set
+# CONFIG_HID_LOGITECH is not set
+# CONFIG_HID_MICROSOFT is not set
+# CONFIG_HID_MONTEREY is not set
+# CONFIG_HID_NTRIG is not set
+# CONFIG_HID_PANTHERLORD is not set
+# CONFIG_HID_PETALYNX is not set
+# CONFIG_HID_SAMSUNG is not set
+# CONFIG_HID_SONY is not set
+# CONFIG_HID_SUNPLUS is not set
+# CONFIG_GREENASIA_FF is not set
+# CONFIG_HID_TOPSEED is not set
+# CONFIG_THRUSTMASTER_FF is not set
+# CONFIG_ZEROPLUS_FF is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+CONFIG_USB_DEBUG=y
+CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
+
+#
+# Miscellaneous USB options
+#
+# CONFIG_USB_DEVICEFS is not set
+CONFIG_USB_DEVICE_CLASS=y
+# CONFIG_USB_DYNAMIC_MINORS is not set
+CONFIG_USB_SUSPEND=y
+CONFIG_USB_OTG=y
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
+CONFIG_USB_MON=y
+# CONFIG_USB_WUSB is not set
+# CONFIG_USB_WUSB_CBAF is not set
+
+#
+# USB Host Controller Drivers
+#
+# CONFIG_USB_C67X00_HCD is not set
+# CONFIG_USB_EHCI_HCD is not set
+# CONFIG_USB_OXU210HP_HCD is not set
+# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
+# CONFIG_USB_OHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+# CONFIG_USB_HWA_HCD is not set
+CONFIG_USB_MUSB_HDRC=y
+CONFIG_USB_MUSB_SOC=y
+
+#
+# OMAP 343x high speed USB support
+#
+# CONFIG_USB_MUSB_HOST is not set
+# CONFIG_USB_MUSB_PERIPHERAL is not set
+CONFIG_USB_MUSB_OTG=y
+CONFIG_USB_GADGET_MUSB_HDRC=y
+CONFIG_USB_MUSB_HDRC_HCD=y
+# CONFIG_MUSB_PIO_ONLY is not set
+CONFIG_USB_INVENTRA_DMA=y
+# CONFIG_USB_TI_CPPI_DMA is not set
+CONFIG_USB_MUSB_DEBUG=y
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
+# CONFIG_USB_TMC is not set
+
+#
+# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
+#
+
+#
+# also be needed; see USB_STORAGE Help for more info
+#
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB port drivers
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_SEVSEG is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_ISIGHTFW is not set
+# CONFIG_USB_VST is not set
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DEBUG=y
+CONFIG_USB_GADGET_DEBUG_FILES=y
+CONFIG_USB_GADGET_VBUS_DRAW=2
+CONFIG_USB_GADGET_SELECTED=y
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_ATMEL_USBA is not set
+# CONFIG_USB_GADGET_FSL_USB2 is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_PXA25X is not set
+# CONFIG_USB_GADGET_PXA27X is not set
+# CONFIG_USB_GADGET_S3C2410 is not set
+# CONFIG_USB_GADGET_IMX is not set
+# CONFIG_USB_GADGET_M66592 is not set
+# CONFIG_USB_GADGET_AMD5536UDC is not set
+# CONFIG_USB_GADGET_FSL_QE is not set
+# CONFIG_USB_GADGET_CI13XXX is not set
+# CONFIG_USB_GADGET_NET2280 is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+CONFIG_USB_ZERO=y
+# CONFIG_USB_ZERO_HNPTEST is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+
+#
+# OTG and related infrastructure
+#
+CONFIG_USB_OTG_UTILS=y
+# CONFIG_USB_GPIO_VBUS is not set
+# CONFIG_ISP1301_OMAP is not set
+CONFIG_TWL4030_USB=y
+# CONFIG_NOP_USB_XCEIV is not set
 CONFIG_MMC=y
 # CONFIG_MMC_DEBUG is not set
 # CONFIG_MMC_UNSAFE_RESUME is not set
 
 #
-# MMC/SD Card Drivers
+# MMC/SD/SDIO Card Drivers
 #
 CONFIG_MMC_BLOCK=y
 CONFIG_MMC_BLOCK_BOUNCE=y
@@ -818,11 +1088,13 @@ CONFIG_MMC_BLOCK_BOUNCE=y
 # CONFIG_MMC_TEST is not set
 
 #
-# MMC/SD Host Controller Drivers
+# MMC/SD/SDIO Host Controller Drivers
 #
 # CONFIG_MMC_SDHCI is not set
-# CONFIG_MMC_OMAP is not set
+CONFIG_MMC_OMAP_HS=y
 # CONFIG_MMC_SPI is not set
+# CONFIG_MEMSTICK is not set
+# CONFIG_ACCESSIBILITY is not set
 # CONFIG_NEW_LEDS is not set
 CONFIG_RTC_LIB=y
 CONFIG_RTC_CLASS=y
@@ -852,43 +1124,55 @@ CONFIG_RTC_INTF_DEV=y
 # CONFIG_RTC_DRV_PCF8563 is not set
 # CONFIG_RTC_DRV_PCF8583 is not set
 # CONFIG_RTC_DRV_M41T80 is not set
+# CONFIG_RTC_DRV_TWL4030 is not set
 # CONFIG_RTC_DRV_S35390A is not set
 # CONFIG_RTC_DRV_FM3130 is not set
+# CONFIG_RTC_DRV_RX8581 is not set
 
 #
 # SPI RTC drivers
 #
 # CONFIG_RTC_DRV_M41T94 is not set
 # CONFIG_RTC_DRV_DS1305 is not set
+# CONFIG_RTC_DRV_DS1390 is not set
 # CONFIG_RTC_DRV_MAX6902 is not set
 # CONFIG_RTC_DRV_R9701 is not set
 # CONFIG_RTC_DRV_RS5C348 is not set
+# CONFIG_RTC_DRV_DS3234 is not set
 
 #
 # Platform RTC drivers
 #
 # CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1286 is not set
 # CONFIG_RTC_DRV_DS1511 is not set
 # CONFIG_RTC_DRV_DS1553 is not set
 # CONFIG_RTC_DRV_DS1742 is not set
 # CONFIG_RTC_DRV_STK17TA8 is not set
 # CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T35 is not set
 # CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_BQ4802 is not set
 # CONFIG_RTC_DRV_V3020 is not set
 
 #
 # on-CPU RTC drivers
 #
 # CONFIG_DMADEVICES is not set
-
-#
-# Voltage and Current regulators
-#
-# CONFIG_REGULATOR is not set
+# CONFIG_AUXDISPLAY is not set
+CONFIG_REGULATOR=y
+# CONFIG_REGULATOR_DEBUG is not set
 # CONFIG_REGULATOR_FIXED_VOLTAGE is not set
 # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
 # CONFIG_REGULATOR_BQ24022 is not set
+CONFIG_REGULATOR_TWL4030=y
 # CONFIG_UIO is not set
+# CONFIG_STAGING is not set
+
+#
+# CBUS support
+#
+# CONFIG_CBUS is not set
 
 #
 # File systems
@@ -897,18 +1181,24 @@ CONFIG_EXT2_FS=y
 # CONFIG_EXT2_FS_XATTR is not set
 # CONFIG_EXT2_FS_XIP is not set
 CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
-# CONFIG_EXT4DEV_FS is not set
+# CONFIG_EXT4_FS is not set
 CONFIG_JBD=y
 # CONFIG_REISERFS_FS is not set
 # CONFIG_JFS_FS is not set
-# CONFIG_FS_POSIX_ACL is not set
+CONFIG_FS_POSIX_ACL=y
+CONFIG_FILE_LOCKING=y
 # CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_BTRFS_FS is not set
 CONFIG_DNOTIFY=y
 CONFIG_INOTIFY=y
 CONFIG_INOTIFY_USER=y
 CONFIG_QUOTA=y
+# CONFIG_QUOTA_NETLINK_INTERFACE is not set
 CONFIG_PRINT_QUOTA_WARNING=y
+CONFIG_QUOTA_TREE=y
 # CONFIG_QFMT_V1 is not set
 CONFIG_QFMT_V2=y
 CONFIG_QUOTACTL=y
@@ -917,6 +1207,11 @@ CONFIG_QUOTACTL=y
 # CONFIG_FUSE_FS is not set
 
 #
+# Caches
+#
+# CONFIG_FSCACHE is not set
+
+#
 # CD-ROM/DVD Filesystems
 #
 # CONFIG_ISO9660_FS is not set
@@ -937,15 +1232,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
 #
 CONFIG_PROC_FS=y
 CONFIG_PROC_SYSCTL=y
+CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_SYSFS=y
 CONFIG_TMPFS=y
 # CONFIG_TMPFS_POSIX_ACL is not set
 # CONFIG_HUGETLB_PAGE is not set
 # CONFIG_CONFIGFS_FS is not set
-
-#
-# Miscellaneous filesystems
-#
+CONFIG_MISC_FILESYSTEMS=y
 # CONFIG_ADFS_FS is not set
 # CONFIG_AFFS_FS is not set
 # CONFIG_HFS_FS is not set
@@ -954,6 +1247,7 @@ CONFIG_TMPFS=y
 # CONFIG_BFS_FS is not set
 # CONFIG_EFS_FS is not set
 # CONFIG_CRAMFS is not set
+# CONFIG_SQUASHFS is not set
 # CONFIG_VXFS_FS is not set
 # CONFIG_MINIX_FS is not set
 # CONFIG_OMFS_FS is not set
@@ -962,6 +1256,7 @@ CONFIG_TMPFS=y
 # CONFIG_ROMFS_FS is not set
 # CONFIG_SYSV_FS is not set
 # CONFIG_UFS_FS is not set
+# CONFIG_NILFS2_FS is not set
 CONFIG_NETWORK_FILESYSTEMS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
@@ -975,7 +1270,6 @@ CONFIG_NFS_ACL_SUPPORT=y
 CONFIG_NFS_COMMON=y
 CONFIG_SUNRPC=y
 CONFIG_SUNRPC_GSS=y
-# CONFIG_SUNRPC_REGISTER_V4 is not set
 CONFIG_RPCSEC_GSS_KRB5=y
 # CONFIG_RPCSEC_GSS_SPKM3 is not set
 # CONFIG_SMB_FS is not set
@@ -1045,6 +1339,7 @@ CONFIG_NLS_ISO8859_1=y
 # CONFIG_NLS_KOI8_R is not set
 # CONFIG_NLS_KOI8_U is not set
 # CONFIG_NLS_UTF8 is not set
+# CONFIG_DLM is not set
 
 #
 # Kernel hacking
@@ -1062,6 +1357,9 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_SOFTLOCKUP=y
 # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
 CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
+CONFIG_DETECT_HUNG_TASK=y
+# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
+CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
 CONFIG_SCHED_DEBUG=y
 # CONFIG_SCHEDSTATS is not set
 # CONFIG_TIMER_STATS is not set
@@ -1084,21 +1382,36 @@ CONFIG_DEBUG_INFO=y
 # CONFIG_DEBUG_MEMORY_INIT is not set
 # CONFIG_DEBUG_LIST is not set
 # CONFIG_DEBUG_SG is not set
-CONFIG_FRAME_POINTER=y
+# CONFIG_DEBUG_NOTIFIERS is not set
 # CONFIG_BOOT_PRINTK_DELAY is not set
 # CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 # CONFIG_BACKTRACE_SELF_TEST is not set
+# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
 # CONFIG_FAULT_INJECTION is not set
 # CONFIG_LATENCYTOP is not set
-CONFIG_HAVE_FTRACE=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-# CONFIG_FTRACE is not set
+# CONFIG_PAGE_POISONING is not set
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_TRACING_SUPPORT=y
+
+#
+# Tracers
+#
+# CONFIG_FUNCTION_TRACER is not set
 # CONFIG_IRQSOFF_TRACER is not set
 # CONFIG_SCHED_TRACER is not set
 # CONFIG_CONTEXT_SWITCH_TRACER is not set
+# CONFIG_EVENT_TRACER is not set
+# CONFIG_BOOT_TRACER is not set
+# CONFIG_TRACE_BRANCH_PROFILING is not set
+# CONFIG_STACK_TRACER is not set
+# CONFIG_KMEMTRACE is not set
+# CONFIG_WORKQUEUE_TRACER is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
 # CONFIG_SAMPLES is not set
 CONFIG_HAVE_ARCH_KGDB=y
 # CONFIG_KGDB is not set
+CONFIG_ARM_UNWIND=y
 # CONFIG_DEBUG_USER is not set
 # CONFIG_DEBUG_ERRORS is not set
 # CONFIG_DEBUG_STACK_USAGE is not set
@@ -1110,17 +1423,28 @@ CONFIG_DEBUG_LL=y
 #
 # CONFIG_KEYS is not set
 # CONFIG_SECURITY is not set
+# CONFIG_SECURITYFS is not set
 # CONFIG_SECURITY_FILE_CAPABILITIES is not set
 CONFIG_CRYPTO=y
 
 #
 # Crypto core or helper
 #
+# CONFIG_CRYPTO_FIPS is not set
 CONFIG_CRYPTO_ALGAPI=y
+CONFIG_CRYPTO_ALGAPI2=y
+CONFIG_CRYPTO_AEAD2=y
 CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_BLKCIPHER2=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_PCOMP=y
 CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
 # CONFIG_CRYPTO_GF128MUL is not set
 # CONFIG_CRYPTO_NULL is not set
+CONFIG_CRYPTO_WORKQUEUE=y
 # CONFIG_CRYPTO_CRYPTD is not set
 # CONFIG_CRYPTO_AUTHENC is not set
 # CONFIG_CRYPTO_TEST is not set
@@ -1152,7 +1476,7 @@ CONFIG_CRYPTO_PCBC=m
 #
 # Digest
 #
-# CONFIG_CRYPTO_CRC32C is not set
+CONFIG_CRYPTO_CRC32C=y
 # CONFIG_CRYPTO_MD4 is not set
 CONFIG_CRYPTO_MD5=y
 # CONFIG_CRYPTO_MICHAEL_MIC is not set
@@ -1189,15 +1513,21 @@ CONFIG_CRYPTO_DES=y
 # Compression
 #
 # CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_ZLIB is not set
 # CONFIG_CRYPTO_LZO is not set
+
+#
+# Random Number Generation
+#
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_HW=y
+# CONFIG_BINARY_PRINTF is not set
 
 #
 # Library routines
 #
 CONFIG_BITREVERSE=y
-# CONFIG_GENERIC_FIND_FIRST_BIT is not set
-# CONFIG_GENERIC_FIND_NEXT_BIT is not set
+CONFIG_GENERIC_FIND_LAST_BIT=y
 CONFIG_CRC_CCITT=y
 # CONFIG_CRC16 is not set
 CONFIG_CRC_T10DIF=y
@@ -1205,7 +1535,9 @@ CONFIG_CRC_T10DIF=y
 CONFIG_CRC32=y
 # CONFIG_CRC7 is not set
 CONFIG_LIBCRC32C=y
-CONFIG_PLIST=y
+CONFIG_ZLIB_INFLATE=y
+CONFIG_DECOMPRESS_GZIP=y
 CONFIG_HAS_IOMEM=y
 CONFIG_HAS_IOPORT=y
 CONFIG_HAS_DMA=y
+CONFIG_NLATTR=y
diff --git a/arch/arm/configs/rx51_defconfig b/arch/arm/configs/rx51_defconfig
index f238df66efd4..e7e31332c62a 100644
--- a/arch/arm/configs/rx51_defconfig
+++ b/arch/arm/configs/rx51_defconfig
@@ -1006,6 +1006,7 @@ CONFIG_WATCHDOG=y
 #
 # CONFIG_SOFT_WATCHDOG is not set
 CONFIG_OMAP_WATCHDOG=m
+CONFIG_TWL4030_WATCHDOG=m
 
 #
 # USB-based Watchdog Cards
diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c
index 8b40aace9db4..42920f9c1a11 100644
--- a/arch/arm/mach-omap1/board-ams-delta.c
+++ b/arch/arm/mach-omap1/board-ams-delta.c
@@ -15,8 +15,11 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/input.h>
+#include <linux/interrupt.h>
 #include <linux/platform_device.h>
+#include <linux/serial_8250.h>
 
+#include <asm/serial.h>
 #include <mach/hardware.h>
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
@@ -162,10 +165,6 @@ static struct omap_lcd_config ams_delta_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config ams_delta_uart_config __initdata = {
-        .enabled_uarts = 1,
-};
-
 static struct omap_usb_config ams_delta_usb_config __initdata = {
         .register_host  = 1,
         .hmc_mode       = 16,
@@ -174,7 +173,6 @@ static struct omap_usb_config ams_delta_usb_config __initdata = {
 
 static struct omap_board_config_kernel ams_delta_config[] = {
         { OMAP_TAG_LCD,         &ams_delta_lcd_config },
-        { OMAP_TAG_UART,        &ams_delta_uart_config },
 };
 
 static struct resource ams_delta_kp_resources[] = {
@@ -235,6 +233,41 @@ static void __init ams_delta_init(void)
         platform_add_devices(ams_delta_devices, ARRAY_SIZE(ams_delta_devices));
 }
 
+static struct plat_serial8250_port ams_delta_modem_ports[] = {
+        {
+                .membase        = (void *) AMS_DELTA_MODEM_VIRT,
+                .mapbase        = AMS_DELTA_MODEM_PHYS,
+                .irq            = -EINVAL, /* changed later */
+                .flags          = UPF_BOOT_AUTOCONF,
+                .irqflags       = IRQF_TRIGGER_RISING,
+                .iotype         = UPIO_MEM,
+                .regshift       = 1,
+                .uartclk        = BASE_BAUD * 16,
+        },
+        { },
+};
+
+static struct platform_device ams_delta_modem_device = {
+        .name   = "serial8250",
+        .id     = PLAT8250_DEV_PLATFORM1,
+        .dev            = {
+                .platform_data = ams_delta_modem_ports,
+        },
+};
+
+static int __init ams_delta_modem_init(void)
+{
+        omap_cfg_reg(M14_1510_GPIO2);
+        ams_delta_modem_ports[0].irq = gpio_to_irq(2);
+
+        ams_delta_latch2_write(
+                AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC,
+                AMS_DELTA_LATCH2_MODEM_NRESET | AMS_DELTA_LATCH2_MODEM_CODEC);
+
+        return platform_device_register(&ams_delta_modem_device);
+}
+arch_initcall(ams_delta_modem_init);
+
 static void __init ams_delta_map_io(void)
 {
         omap1_map_common_io();
diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c
index 19e0e9232336..a7ead1b93226 100644
--- a/arch/arm/mach-omap1/board-fsample.c
+++ b/arch/arm/mach-omap1/board-fsample.c
@@ -240,16 +240,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
-static struct omap_uart_config fsample_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1)),
-};
-
 static struct omap_lcd_config fsample_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel fsample_config[] = {
-        { OMAP_TAG_UART,        &fsample_uart_config },
         { OMAP_TAG_LCD,         &fsample_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c
index e724940e86f2..fb47239da72f 100644
--- a/arch/arm/mach-omap1/board-generic.c
+++ b/arch/arm/mach-omap1/board-generic.c
@@ -57,12 +57,7 @@ static struct omap_usb_config generic1610_usb_config __initdata = {
 };
 #endif
 
-static struct omap_uart_config generic_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel generic_config[] __initdata = {
-        { OMAP_TAG_UART,        &generic_uart_config },
 };
 
 static void __init omap_generic_init(void)
diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c
index f695aa053ac8..aab860307dca 100644
--- a/arch/arm/mach-omap1/board-h2.c
+++ b/arch/arm/mach-omap1/board-h2.c
@@ -360,16 +360,11 @@ static struct omap_usb_config h2_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_uart_config h2_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h2_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel h2_config[] __initdata = {
-        { OMAP_TAG_UART,        &h2_uart_config },
         { OMAP_TAG_LCD,         &h2_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c
index f597968733b4..89586b80b8d5 100644
--- a/arch/arm/mach-omap1/board-h3.c
+++ b/arch/arm/mach-omap1/board-h3.c
@@ -313,16 +313,11 @@ static struct omap_usb_config h3_usb_config __initdata = {
         .pins[1]        = 3,
 };
 
-static struct omap_uart_config h3_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h3_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel h3_config[] __initdata = {
-        { OMAP_TAG_UART,        &h3_uart_config },
         { OMAP_TAG_LCD,         &h3_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c
index 2fd98260ea49..cc2abbb2d0f4 100644
--- a/arch/arm/mach-omap1/board-innovator.c
+++ b/arch/arm/mach-omap1/board-innovator.c
@@ -368,13 +368,8 @@ static inline void innovator_mmc_init(void)
 }
 #endif
 
-static struct omap_uart_config innovator_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel innovator_config[] = {
         { OMAP_TAG_LCD,         NULL },
-        { OMAP_TAG_UART,        &innovator_uart_config },
 };
 
 static void __init innovator_init(void)
diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c
index cf3247b15f87..ed891b8a6b15 100644
--- a/arch/arm/mach-omap1/board-osk.c
+++ b/arch/arm/mach-omap1/board-osk.c
@@ -293,10 +293,6 @@ static struct omap_usb_config osk_usb_config __initdata = {
         .pins[0]        = 2,
 };
 
-static struct omap_uart_config osk_uart_config __initdata = {
-        .enabled_uarts = (1 << 0),
-};
-
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
 static struct omap_lcd_config osk_lcd_config __initdata = {
         .ctrl_name      = "internal",
@@ -304,7 +300,6 @@ static struct omap_lcd_config osk_lcd_config __initdata = {
 #endif
 
 static struct omap_board_config_kernel osk_config[] __initdata = {
-        { OMAP_TAG_UART,                &osk_uart_config },
 #ifdef  CONFIG_OMAP_OSK_MISTRAL
         { OMAP_TAG_LCD,                 &osk_lcd_config },
 #endif
diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c
index 886b4c0569bd..90dd0431b0dc 100644
--- a/arch/arm/mach-omap1/board-palmte.c
+++ b/arch/arm/mach-omap1/board-palmte.c
@@ -212,10 +212,6 @@ static struct omap_lcd_config palmte_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config palmte_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 #ifdef CONFIG_APM
 /*
  * Values measured in 10 minute intervals averaged over 10 samples.
@@ -302,7 +298,6 @@ static void palmte_get_power_status(struct apm_power_info *info, int *battery)
 
 static struct omap_board_config_kernel palmte_config[] __initdata = {
         { OMAP_TAG_LCD,         &palmte_lcd_config },
-        { OMAP_TAG_UART,        &palmte_uart_config },
 };
 
 static struct spi_board_info palmte_spi_info[] __initdata = {
diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c
index 4f1b44831d37..8256139891ff 100644
--- a/arch/arm/mach-omap1/board-palmtt.c
+++ b/arch/arm/mach-omap1/board-palmtt.c
@@ -274,13 +274,8 @@ static struct omap_lcd_config palmtt_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
-static struct omap_uart_config palmtt_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 static struct omap_board_config_kernel palmtt_config[] __initdata = {
         { OMAP_TAG_LCD,         &palmtt_lcd_config      },
-        { OMAP_TAG_UART,        &palmtt_uart_config     },
 };
 
 static void __init omap_mpu_wdt_mode(int mode) {
diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c
index 9a55c3c58218..81b6bde1c5a3 100644
--- a/arch/arm/mach-omap1/board-palmz71.c
+++ b/arch/arm/mach-omap1/board-palmz71.c
@@ -244,13 +244,8 @@ static struct omap_lcd_config palmz71_lcd_config __initdata = {
         .ctrl_name = "internal",
 };
 
-static struct omap_uart_config palmz71_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2),
-};
-
 static struct omap_board_config_kernel palmz71_config[] __initdata = {
         {OMAP_TAG_LCD,  &palmz71_lcd_config},
-        {OMAP_TAG_UART, &palmz71_uart_config},
 };
 
 static irqreturn_t
diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c
index 3b9f907aa899..83406699f310 100644
--- a/arch/arm/mach-omap1/board-perseus2.c
+++ b/arch/arm/mach-omap1/board-perseus2.c
@@ -208,16 +208,11 @@ static int nand_dev_ready(struct omap_nand_platform_data *data)
         return gpio_get_value(P2_NAND_RB_GPIO_PIN);
 }
 
-static struct omap_uart_config perseus2_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1)),
-};
-
 static struct omap_lcd_config perseus2_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel perseus2_config[] __initdata = {
-        { OMAP_TAG_UART,        &perseus2_uart_config },
         { OMAP_TAG_LCD,         &perseus2_lcd_config },
 };
 
diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c
index c096577695fe..02c85ca2e1df 100644
--- a/arch/arm/mach-omap1/board-sx1.c
+++ b/arch/arm/mach-omap1/board-sx1.c
@@ -369,13 +369,8 @@ static struct platform_device *sx1_devices[] __initdata = {
 };
 /*-----------------------------------------*/
 
-static struct omap_uart_config sx1_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel sx1_config[] __initdata = {
         { OMAP_TAG_LCD, &sx1_lcd_config },
-        { OMAP_TAG_UART,        &sx1_uart_config },
 };
 
 /*-----------------------------------------*/
diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c
index 98275e03dad1..c06e7a553472 100644
--- a/arch/arm/mach-omap1/board-voiceblue.c
+++ b/arch/arm/mach-omap1/board-voiceblue.c
@@ -140,12 +140,7 @@ static struct omap_usb_config voiceblue_usb_config __initdata = {
         .pins[2]        = 6,
 };
 
-static struct omap_uart_config voiceblue_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_board_config_kernel voiceblue_config[] = {
-        { OMAP_TAG_UART, &voiceblue_uart_config },
 };
 
 static void __init voiceblue_init_irq(void)
diff --git a/arch/arm/mach-omap1/devices.c b/arch/arm/mach-omap1/devices.c
index bbbaeb0abcd3..06808434ea04 100644
--- a/arch/arm/mach-omap1/devices.c
+++ b/arch/arm/mach-omap1/devices.c
@@ -71,7 +71,7 @@ static inline void omap_init_rtc(void) {}
 #  define INT_DSP_MAILBOX1      INT_1610_DSP_MAILBOX1
 #endif
 
-#define OMAP1_MBOX_BASE         IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
+#define OMAP1_MBOX_BASE         OMAP1_IO_ADDRESS(OMAP16XX_MAILBOX_BASE)
 
 static struct resource mbox_resources[] = {
         {
diff --git a/arch/arm/mach-omap1/io.c b/arch/arm/mach-omap1/io.c
index 3afe540149f7..7030f9281ea1 100644
--- a/arch/arm/mach-omap1/io.c
+++ b/arch/arm/mach-omap1/io.c
@@ -29,9 +29,9 @@ extern void omapfb_reserve_sdram(void);
  */
 static struct map_desc omap_io_desc[] __initdata = {
         {
-                .virtual        = IO_VIRT,
-                .pfn            = __phys_to_pfn(IO_PHYS),
-                .length         = IO_SIZE,
+                .virtual        = OMAP1_IO_VIRT,
+                .pfn            = __phys_to_pfn(OMAP1_IO_PHYS),
+                .length         = OMAP1_IO_SIZE,
                 .type           = MT_DEVICE
         }
 };
diff --git a/arch/arm/mach-omap1/pm.h b/arch/arm/mach-omap1/pm.h
index 9ed5e2c1de4d..c4f05bdcf8a6 100644
--- a/arch/arm/mach-omap1/pm.h
+++ b/arch/arm/mach-omap1/pm.h
@@ -39,11 +39,11 @@
  * Register and offset definitions to be used in PM assembler code
  * ----------------------------------------------------------------------------
  */
-#define CLKGEN_REG_ASM_BASE             IO_ADDRESS(0xfffece00)
+#define CLKGEN_REG_ASM_BASE             OMAP1_IO_ADDRESS(0xfffece00)
 #define ARM_IDLECT1_ASM_OFFSET          0x04
 #define ARM_IDLECT2_ASM_OFFSET          0x08
 
-#define TCMIF_ASM_BASE                  IO_ADDRESS(0xfffecc00)
+#define TCMIF_ASM_BASE                  OMAP1_IO_ADDRESS(0xfffecc00)
 #define EMIFS_CONFIG_ASM_OFFSET         0x0c
 #define EMIFF_SDRAM_CONFIG_ASM_OFFSET   0x20
 
diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c
index f754cee4f3c3..d496e50fec40 100644
--- a/arch/arm/mach-omap1/serial.c
+++ b/arch/arm/mach-omap1/serial.c
@@ -64,7 +64,7 @@ static void __init omap_serial_reset(struct plat_serial8250_port *p)
 
 static struct plat_serial8250_port serial_platform_data[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART1_BASE),
                 .mapbase        = OMAP_UART1_BASE,
                 .irq            = INT_UART1,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -73,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART2_BASE),
                 .mapbase        = OMAP_UART2_BASE,
                 .irq            = INT_UART2,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -82,7 +82,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .uartclk        = OMAP16XX_BASE_BAUD * 16,
         },
         {
-                .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+                .membase        = OMAP1_IO_ADDRESS(OMAP_UART3_BASE),
                 .mapbase        = OMAP_UART3_BASE,
                 .irq            = INT_UART3,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -109,7 +109,6 @@ static struct platform_device serial_device = {
 void __init omap_serial_init(void)
 {
         int i;
-        const struct omap_uart_config *info;
 
         if (cpu_is_omap730()) {
                 serial_platform_data[0].regshift = 0;
@@ -131,19 +130,9 @@ void __init omap_serial_init(void)
                 serial_platform_data[2].uartclk = OMAP1510_BASE_BAUD * 16;
         }
 
-        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        if (info == NULL)
-                return;
-
         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                 unsigned char reg;
 
-                if (!((1 << i) & info->enabled_uarts)) {
-                        serial_platform_data[i].membase = NULL;
-                        serial_platform_data[i].mapbase = 0;
-                        continue;
-                }
-
                 switch (i) {
                 case 0:
                         uart1_ck = clk_get(NULL, "uart1_ck");
diff --git a/arch/arm/mach-omap1/sram.S b/arch/arm/mach-omap1/sram.S
index 261cdc48228b..7724e520d07c 100644
--- a/arch/arm/mach-omap1/sram.S
+++ b/arch/arm/mach-omap1/sram.S
@@ -21,13 +21,13 @@
 ENTRY(omap1_sram_reprogram_clock)
         stmfd   sp!, {r0 - r12, lr}             @ save registers on stack
 
-        mov     r2, #IO_ADDRESS(DPLL_CTL) & 0xff000000
-        orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x00ff0000
-        orr     r2, r2, #IO_ADDRESS(DPLL_CTL) & 0x0000ff00
+        mov     r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
+        orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
+        orr     r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
 
-        mov     r3, #IO_ADDRESS(ARM_CKCTL) & 0xff000000
-        orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
-        orr     r3, r3, #IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
+        mov     r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
+        orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
+        orr     r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
 
         tst     r0, #1 << 4                     @ want lock mode?
         beq     newck                           @ nope
diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index 4d56408d3cff..1be6a214d88d 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -62,8 +62,8 @@ typedef struct {
         u32 read_tim;                   /* READ_TIM,   R */
 } omap_mpu_timer_regs_t;
 
-#define omap_mpu_timer_base(n)                                          \
-((volatile omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +      \
+#define omap_mpu_timer_base(n)                                                  \
+((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +        \
                                  (n)*OMAP_MPU_TIMER_OFFSET))
 
 static inline unsigned long omap_mpu_timer_read(int nr)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index a755eb5e2361..75b1c7efae7e 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -31,6 +31,11 @@ config MACH_OMAP_GENERIC
         bool "Generic OMAP board"
         depends on ARCH_OMAP2 && ARCH_OMAP24XX
 
+config MACH_OMAP2_TUSB6010
+        bool
+        depends on ARCH_OMAP2 && ARCH_OMAP2420
+        default y if MACH_NOKIA_N8X0
+
 config MACH_OMAP_H4
         bool "OMAP 2420 H4 board"
         depends on ARCH_OMAP2 && ARCH_OMAP24XX
@@ -68,6 +73,10 @@ config MACH_OMAP_3430SDP
         bool "OMAP 3430 SDP board"
         depends on ARCH_OMAP3 && ARCH_OMAP34XX
 
+config MACH_NOKIA_N8X0
+        bool "Nokia N800/N810"
+        depends on ARCH_OMAP2420
+
 config MACH_NOKIA_RX51
         bool "Nokia RX-51 board"
         depends on ARCH_OMAP3 && ARCH_OMAP34XX
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 735bae5b0dec..8cb16777661a 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -5,7 +5,7 @@
 # Common support
 obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o
 
-omap-2-3-common                         = irq.o sdrc.o
+omap-2-3-common                         = irq.o sdrc.o omap_hwmod.o
 prcm-common                             = prcm.o powerdomain.o
 clock-common                            = clock.o clockdomain.o
 
@@ -35,6 +35,11 @@ obj-$(CONFIG_ARCH_OMAP3)		+= pm34xx.o sleep34xx.o
 obj-$(CONFIG_PM_DEBUG)                  += pm-debug.o
 endif
 
+# PRCM
+obj-$(CONFIG_ARCH_OMAP2)                += cm.o
+obj-$(CONFIG_ARCH_OMAP3)                += cm.o
+obj-$(CONFIG_ARCH_OMAP4)                += cm4xxx.o
+
 # Clock framework
 obj-$(CONFIG_ARCH_OMAP2)                += clock24xx.o
 obj-$(CONFIG_ARCH_OMAP3)                += clock34xx.o
@@ -62,7 +67,7 @@ obj-$(CONFIG_MACH_OMAP3_PANDORA)	+= board-omap3pandora.o \
                                            mmc-twl4030.o
 obj-$(CONFIG_MACH_OMAP_3430SDP)         += board-3430sdp.o \
                                            mmc-twl4030.o
-
+obj-$(CONFIG_MACH_NOKIA_N8X0)           += board-n8x0.o
 obj-$(CONFIG_MACH_NOKIA_RX51)           += board-rx51.o \
                                            board-rx51-peripherals.o \
                                            mmc-twl4030.o
@@ -74,6 +79,7 @@ obj-$(CONFIG_MACH_OMAP_4430SDP)		+= board-4430sdp.o
 
 # Platform specific device init code
 obj-y                                   += usb-musb.o
+obj-$(CONFIG_MACH_OMAP2_TUSB6010)       += usb-tusb6010.o
 
 onenand-$(CONFIG_MTD_ONENAND_OMAP2)     := gpmc-onenand.o
 obj-y                                   += $(onenand-m) $(onenand-y)
diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c
index 8ec2a132904d..42217b32f835 100644
--- a/arch/arm/mach-omap2/board-2430sdp.c
+++ b/arch/arm/mach-omap2/board-2430sdp.c
@@ -139,23 +139,19 @@ static inline void board_smc91x_init(void)
 
 #endif
 
+static struct omap_board_config_kernel sdp2430_config[] = {
+        {OMAP_TAG_LCD, &sdp2430_lcd_config},
+};
+
 static void __init omap_2430sdp_init_irq(void)
 {
+        omap_board_config = sdp2430_config;
+        omap_board_config_size = ARRAY_SIZE(sdp2430_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
         omap_gpio_init();
 }
 
-static struct omap_uart_config sdp2430_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
-static struct omap_board_config_kernel sdp2430_config[] = {
-        {OMAP_TAG_UART, &sdp2430_uart_config},
-        {OMAP_TAG_LCD, &sdp2430_lcd_config},
-};
-
-
 static struct twl4030_gpio_platform_data sdp2430_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
@@ -205,8 +201,6 @@ static void __init omap_2430sdp_init(void)
         omap2430_i2c_init();
 
         platform_add_devices(sdp2430_devices, ARRAY_SIZE(sdp2430_devices));
-        omap_board_config = sdp2430_config;
-        omap_board_config_size = ARRAY_SIZE(sdp2430_config);
         omap_serial_init();
         twl4030_mmc_init(mmc);
         usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c
index ac262cd74503..bd57ec76dc5e 100644
--- a/arch/arm/mach-omap2/board-3430sdp.c
+++ b/arch/arm/mach-omap2/board-3430sdp.c
@@ -167,26 +167,23 @@ static struct platform_device *sdp3430_devices[] __initdata = {
         &sdp3430_lcd_device,
 };
 
-static void __init omap_3430sdp_init_irq(void)
-{
-        omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
-static struct omap_uart_config sdp3430_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config sdp3430_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
 
 static struct omap_board_config_kernel sdp3430_config[] __initdata = {
-        { OMAP_TAG_UART,        &sdp3430_uart_config },
         { OMAP_TAG_LCD,         &sdp3430_lcd_config },
 };
 
+static void __init omap_3430sdp_init_irq(void)
+{
+        omap_board_config = sdp3430_config;
+        omap_board_config_size = ARRAY_SIZE(sdp3430_config);
+        omap2_init_common_hw(hyb18m512160af6_sdrc_params, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static int sdp3430_batt_table[] = {
 /* 0 C*/
 30800, 29500, 28300, 27100,
@@ -478,12 +475,15 @@ static inline void board_smc91x_init(void)
 
 #endif
 
+static void enable_board_wakeup_source(void)
+{
+        omap_cfg_reg(AF26_34XX_SYS_NIRQ); /* T2 interrupt line (keypad) */
+}
+
 static void __init omap_3430sdp_init(void)
 {
         omap3430_i2c_init();
         platform_add_devices(sdp3430_devices, ARRAY_SIZE(sdp3430_devices));
-        omap_board_config = sdp3430_config;
-        omap_board_config_size = ARRAY_SIZE(sdp3430_config);
         if (omap_rev() > OMAP3430_REV_ES1_0)
                 ts_gpio = SDP3430_TS_GPIO_IRQ_SDPV2;
         else
@@ -495,6 +495,7 @@ static void __init omap_3430sdp_init(void)
         omap_serial_init();
         usb_musb_init();
         board_smc91x_init();
+        enable_board_wakeup_source();
 }
 
 static void __init omap_3430sdp_map_io(void)
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index 1b223076ceb7..eb37c40ea83a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -47,14 +47,13 @@ static struct omap_lcd_config sdp4430_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel sdp4430_config[] __initdata = {
-        { OMAP_TAG_UART,        &sdp4430_uart_config },
         { OMAP_TAG_LCD,         &sdp4430_lcd_config },
 };
 
 static void __init gic_init_irq(void)
 {
-        gic_dist_init(0, IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
-        gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+        gic_dist_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_DIST_BASE), 29);
+        gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
 }
 
 static void __init omap_4430sdp_init_irq(void)
diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c
index dcfc20d03894..7a2b54c7291a 100644
--- a/arch/arm/mach-omap2/board-apollon.c
+++ b/arch/arm/mach-omap2/board-apollon.c
@@ -248,18 +248,6 @@ out:
         clk_put(gpmc_fck);
 }
 
-static void __init omap_apollon_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        apollon_init_smc91x();
-}
-
-static struct omap_uart_config apollon_uart_config __initdata = {
-        .enabled_uarts = (1 << 0) | (0 << 1) | (0 << 2),
-};
-
 static struct omap_usb_config apollon_usb_config __initdata = {
         .register_dev   = 1,
         .hmc_mode       = 0x14, /* 0:dev 1:host1 2:disable */
@@ -272,10 +260,19 @@ static struct omap_lcd_config apollon_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel apollon_config[] = {
-        { OMAP_TAG_UART,        &apollon_uart_config },
         { OMAP_TAG_LCD,         &apollon_lcd_config },
 };
 
+static void __init omap_apollon_init_irq(void)
+{
+        omap_board_config = apollon_config;
+        omap_board_config_size = ARRAY_SIZE(apollon_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        apollon_init_smc91x();
+}
+
 static void __init apollon_led_init(void)
 {
         /* LED0 - AA10 */
@@ -324,8 +321,6 @@ static void __init omap_apollon_init(void)
          * if not needed.
          */
         platform_add_devices(apollon_devices, ARRAY_SIZE(apollon_devices));
-        omap_board_config = apollon_config;
-        omap_board_config_size = ARRAY_SIZE(apollon_config);
         omap_serial_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index fd00aa03690c..2e09a1c444cb 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -31,24 +31,19 @@
 #include <mach/board.h>
 #include <mach/common.h>
 
+static struct omap_board_config_kernel generic_config[] = {
+};
+
 static void __init omap_generic_init_irq(void)
 {
+        omap_board_config = generic_config;
+        omap_board_config_size = ARRAY_SIZE(generic_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
 }
 
-static struct omap_uart_config generic_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
-static struct omap_board_config_kernel generic_config[] = {
-        { OMAP_TAG_UART,        &generic_uart_config },
-};
-
 static void __init omap_generic_init(void)
 {
-        omap_board_config = generic_config;
-        omap_board_config_size = ARRAY_SIZE(generic_config);
         omap_serial_init();
 }
 
diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c
index 7b1d61d5bb2c..eaa02d012c5c 100644
--- a/arch/arm/mach-omap2/board-h4.c
+++ b/arch/arm/mach-omap2/board-h4.c
@@ -268,18 +268,6 @@ static void __init h4_init_flash(void)
         h4_flash_resource.end   = base + SZ_64M - 1;
 }
 
-static void __init omap_h4_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        h4_init_flash();
-}
-
-static struct omap_uart_config h4_uart_config __initdata = {
-        .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config h4_lcd_config __initdata = {
         .ctrl_name      = "internal",
 };
@@ -318,10 +306,19 @@ static struct omap_usb_config h4_usb_config __initdata = {
 };
 
 static struct omap_board_config_kernel h4_config[] = {
-        { OMAP_TAG_UART,        &h4_uart_config },
         { OMAP_TAG_LCD,         &h4_lcd_config },
 };
 
+static void __init omap_h4_init_irq(void)
+{
+        omap_board_config = h4_config;
+        omap_board_config_size = ARRAY_SIZE(h4_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        h4_init_flash();
+}
+
 static struct at24_platform_data m24c01 = {
         .byte_len       = SZ_1K / 8,
         .page_size      = 16,
@@ -366,8 +363,6 @@ static void __init omap_h4_init(void)
                         ARRAY_SIZE(h4_i2c_board_info));
 
         platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices));
-        omap_board_config = h4_config;
-        omap_board_config_size = ARRAY_SIZE(h4_config);
         omap_usb_init(&h4_usb_config);
         omap_serial_init();
 }
diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c
index ea383f88cb1b..ec6854cbdd9f 100644
--- a/arch/arm/mach-omap2/board-ldp.c
+++ b/arch/arm/mach-omap2/board-ldp.c
@@ -268,18 +268,6 @@ static inline void __init ldp_init_smsc911x(void)
         gpio_direction_input(eth_gpio);
 }
 
-static void __init omap_ldp_init_irq(void)
-{
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
-        ldp_init_smsc911x();
-}
-
-static struct omap_uart_config ldp_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct platform_device ldp_lcd_device = {
         .name           = "ldp_lcd",
         .id             = -1,
@@ -290,10 +278,19 @@ static struct omap_lcd_config ldp_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel ldp_config[] __initdata = {
-        { OMAP_TAG_UART,        &ldp_uart_config },
         { OMAP_TAG_LCD,         &ldp_lcd_config },
 };
 
+static void __init omap_ldp_init_irq(void)
+{
+        omap_board_config = ldp_config;
+        omap_board_config_size = ARRAY_SIZE(ldp_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+        ldp_init_smsc911x();
+}
+
 static struct twl4030_usb_data ldp_usb_data = {
         .usb_mode       = T2_USB_MODE_ULPI,
 };
@@ -377,8 +374,6 @@ static void __init omap_ldp_init(void)
 {
         omap_i2c_init();
         platform_add_devices(ldp_devices, ARRAY_SIZE(ldp_devices));
-        omap_board_config = ldp_config;
-        omap_board_config_size = ARRAY_SIZE(ldp_config);
         ts_gpio = 54;
         ldp_spi_board_info[0].irq = gpio_to_irq(ts_gpio);
         spi_register_board_info(ldp_spi_board_info,
diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c
new file mode 100644
index 000000000000..8341632d260b
--- /dev/null
+++ b/arch/arm/mach-omap2/board-n8x0.c
@@ -0,0 +1,150 @@
+/*
+ * linux/arch/arm/mach-omap2/board-n8x0.c
+ *
+ * Copyright (C) 2005-2009 Nokia Corporation
+ * Author: Juha Yrjola <juha.yrjola@nokia.com>
+ *
+ * Modified from mach-omap2/board-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/stddef.h>
+#include <linux/spi/spi.h>
+#include <linux/usb/musb.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach-types.h>
+
+#include <mach/board.h>
+#include <mach/common.h>
+#include <mach/irqs.h>
+#include <mach/mcspi.h>
+#include <mach/onenand.h>
+#include <mach/serial.h>
+
+static struct omap2_mcspi_device_config p54spi_mcspi_config = {
+        .turbo_mode     = 0,
+        .single_channel = 1,
+};
+
+static struct spi_board_info n800_spi_board_info[] __initdata = {
+        {
+                .modalias       = "p54spi",
+                .bus_num        = 2,
+                .chip_select    = 0,
+                .max_speed_hz   = 48000000,
+                .controller_data = &p54spi_mcspi_config,
+        },
+};
+
+#if defined(CONFIG_MTD_ONENAND_OMAP2) || \
+        defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
+
+static struct mtd_partition onenand_partitions[] = {
+        {
+                .name           = "bootloader",
+                .offset         = 0,
+                .size           = 0x20000,
+                .mask_flags     = MTD_WRITEABLE,        /* Force read-only */
+        },
+        {
+                .name           = "config",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x60000,
+        },
+        {
+                .name           = "kernel",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x200000,
+        },
+        {
+                .name           = "initfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = 0x400000,
+        },
+        {
+                .name           = "rootfs",
+                .offset         = MTDPART_OFS_APPEND,
+                .size           = MTDPART_SIZ_FULL,
+        },
+};
+
+static struct omap_onenand_platform_data board_onenand_data = {
+        .cs             = 0,
+        .gpio_irq       = 26,
+        .parts          = onenand_partitions,
+        .nr_parts       = ARRAY_SIZE(onenand_partitions),
+        .flags          = ONENAND_SYNC_READ,
+};
+
+static void __init n8x0_onenand_init(void)
+{
+        gpmc_onenand_init(&board_onenand_data);
+}
+
+#else
+
+static void __init n8x0_onenand_init(void) {}
+
+#endif
+
+static void __init n8x0_map_io(void)
+{
+        omap2_set_globals_242x();
+        omap2_map_common_io();
+}
+
+static void __init n8x0_init_irq(void)
+{
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
+static void __init n8x0_init_machine(void)
+{
+        /* FIXME: add n810 spi devices */
+        spi_register_board_info(n800_spi_board_info,
+                                ARRAY_SIZE(n800_spi_board_info));
+
+        omap_serial_init();
+        n8x0_onenand_init();
+}
+
+MACHINE_START(NOKIA_N800, "Nokia N800")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
+
+MACHINE_START(NOKIA_N810, "Nokia N810")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
+
+MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
+        .phys_io        = 0x48000000,
+        .io_pg_offst    = ((0xd8000000) >> 18) & 0xfffc,
+        .boot_params    = 0x80000100,
+        .map_io         = n8x0_map_io,
+        .init_irq       = n8x0_init_irq,
+        .init_machine   = n8x0_init_machine,
+        .timer          = &omap_timer,
+MACHINE_END
diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c
index e00ba128cece..500c9956876d 100644
--- a/arch/arm/mach-omap2/board-omap3beagle.c
+++ b/arch/arm/mach-omap2/board-omap3beagle.c
@@ -108,10 +108,6 @@ static struct platform_device omap3beagle_nand_device = {
 
 #include "sdram-micron-mt46h32m32lf-6.h"
 
-static struct omap_uart_config omap3_beagle_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct twl4030_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -249,11 +245,16 @@ static struct regulator_init_data beagle_vpll2 = {
         .consumer_supplies      = &beagle_vdvi_supply,
 };
 
+static struct twl4030_usb_data beagle_usb_data = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
 static struct twl4030_platform_data beagle_twldata = {
         .irq_base       = TWL4030_IRQ_BASE,
         .irq_end        = TWL4030_IRQ_END,
 
         /* platform_data for children goes here */
+        .usb            = &beagle_usb_data,
         .gpio           = &beagle_gpio_data,
         .vmmc1          = &beagle_vmmc1,
         .vsim           = &beagle_vsim,
@@ -280,17 +281,6 @@ static int __init omap3_beagle_i2c_init(void)
         return 0;
 }
 
-static void __init omap3_beagle_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-#ifdef CONFIG_OMAP_32K_TIMER
-        omap2_gp_clockevent_set_gptimer(12);
-#endif
-        omap_gpio_init();
-}
-
 static struct gpio_led gpio_leds[] = {
         {
                 .name                   = "beagleboard::usr0",
@@ -345,10 +335,22 @@ static struct platform_device keys_gpio = {
 };
 
 static struct omap_board_config_kernel omap3_beagle_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3_beagle_uart_config },
         { OMAP_TAG_LCD,         &omap3_beagle_lcd_config },
 };
 
+static void __init omap3_beagle_init_irq(void)
+{
+        omap_board_config = omap3_beagle_config;
+        omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+#ifdef CONFIG_OMAP_32K_TIMER
+        omap2_gp_clockevent_set_gptimer(12);
+#endif
+        omap_gpio_init();
+}
+
 static struct platform_device *omap3_beagle_devices[] __initdata = {
         &omap3_beagle_lcd_device,
         &leds_gpio,
@@ -398,8 +400,6 @@ static void __init omap3_beagle_init(void)
         omap3_beagle_i2c_init();
         platform_add_devices(omap3_beagle_devices,
                         ARRAY_SIZE(omap3_beagle_devices));
-        omap_board_config = omap3_beagle_config;
-        omap_board_config_size = ARRAY_SIZE(omap3_beagle_config);
         omap_serial_init();
 
         omap_cfg_reg(J25_34XX_GPIO170);
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c
index c4b144647dc5..d50b9be90580 100644
--- a/arch/arm/mach-omap2/board-omap3evm.c
+++ b/arch/arm/mach-omap2/board-omap3evm.c
@@ -92,10 +92,6 @@ static inline void __init omap3evm_init_smc911x(void)
         gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ);
 }
 
-static struct omap_uart_config omap3_evm_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct twl4030_hsmmc_info mmc[] = {
         {
                 .mmc            = 1,
@@ -278,19 +274,20 @@ struct spi_board_info omap3evm_spi_board_info[] = {
         },
 };
 
+static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
+        { OMAP_TAG_LCD,         &omap3_evm_lcd_config },
+};
+
 static void __init omap3_evm_init_irq(void)
 {
+        omap_board_config = omap3_evm_config;
+        omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
         omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL);
         omap_init_irq();
         omap_gpio_init();
         omap3evm_init_smc911x();
 }
 
-static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3_evm_uart_config },
-        { OMAP_TAG_LCD,         &omap3_evm_lcd_config },
-};
-
 static struct platform_device *omap3_evm_devices[] __initdata = {
         &omap3_evm_lcd_device,
         &omap3evm_smc911x_device,
@@ -301,8 +298,6 @@ static void __init omap3_evm_init(void)
         omap3_evm_i2c_init();
 
         platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
-        omap_board_config = omap3_evm_config;
-        omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
 
         spi_register_board_info(omap3evm_spi_board_info,
                                 ARRAY_SIZE(omap3evm_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c
index 864ee3d021f7..b43f6e36b6d9 100644
--- a/arch/arm/mach-omap2/board-omap3pandora.c
+++ b/arch/arm/mach-omap2/board-omap3pandora.c
@@ -213,10 +213,6 @@ static struct twl4030_hsmmc_info omap3pandora_mmc[] = {
         {}      /* Terminator */
 };
 
-static struct omap_uart_config omap3pandora_uart_config __initdata = {
-        .enabled_uarts  = (1 << 2), /* UART3 */
-};
-
 static struct regulator_consumer_supply pandora_vmmc1_supply = {
         .supply                 = "vmmc",
 };
@@ -309,14 +305,6 @@ static int __init omap3pandora_i2c_init(void)
         return 0;
 }
 
-static void __init omap3pandora_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
 static void __init omap3pandora_ads7846_init(void)
 {
         int gpio = OMAP3_PANDORA_TS_GPIO;
@@ -376,10 +364,19 @@ static struct omap_lcd_config omap3pandora_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel omap3pandora_config[] __initdata = {
-        { OMAP_TAG_UART,        &omap3pandora_uart_config },
         { OMAP_TAG_LCD,         &omap3pandora_lcd_config },
 };
 
+static void __init omap3pandora_init_irq(void)
+{
+        omap_board_config = omap3pandora_config;
+        omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct platform_device *omap3pandora_devices[] __initdata = {
         &omap3pandora_lcd_device,
         &pandora_leds_gpio,
@@ -391,8 +388,6 @@ static void __init omap3pandora_init(void)
         omap3pandora_i2c_init();
         platform_add_devices(omap3pandora_devices,
                         ARRAY_SIZE(omap3pandora_devices));
-        omap_board_config = omap3pandora_config;
-        omap_board_config_size = ARRAY_SIZE(omap3pandora_config);
         omap_serial_init();
         spi_register_board_info(omap3pandora_spi_board_info,
                         ARRAY_SIZE(omap3pandora_spi_board_info));
diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c
index 6bce23004aa4..9917d2fddc2f 100644
--- a/arch/arm/mach-omap2/board-overo.c
+++ b/arch/arm/mach-omap2/board-overo.c
@@ -271,9 +271,6 @@ static void __init overo_flash_init(void)
                         printk(KERN_ERR "Unable to register NAND device\n");
         }
 }
-static struct omap_uart_config overo_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
 
 static struct twl4030_hsmmc_info mmc[] = {
         {
@@ -360,14 +357,6 @@ static int __init overo_i2c_init(void)
         return 0;
 }
 
-static void __init overo_init_irq(void)
-{
-        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
-                             mt46h32m32lf6_sdrc_params);
-        omap_init_irq();
-        omap_gpio_init();
-}
-
 static struct platform_device overo_lcd_device = {
         .name           = "overo_lcd",
         .id             = -1,
@@ -378,10 +367,19 @@ static struct omap_lcd_config overo_lcd_config __initdata = {
 };
 
 static struct omap_board_config_kernel overo_config[] __initdata = {
-        { OMAP_TAG_UART,        &overo_uart_config },
         { OMAP_TAG_LCD,         &overo_lcd_config },
 };
 
+static void __init overo_init_irq(void)
+{
+        omap_board_config = overo_config;
+        omap_board_config_size = ARRAY_SIZE(overo_config);
+        omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
+                             mt46h32m32lf6_sdrc_params);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct platform_device *overo_devices[] __initdata = {
         &overo_lcd_device,
 };
@@ -390,8 +388,6 @@ static void __init overo_init(void)
 {
         overo_i2c_init();
         platform_add_devices(overo_devices, ARRAY_SIZE(overo_devices));
-        omap_board_config = overo_config;
-        omap_board_config_size = ARRAY_SIZE(overo_config);
         omap_serial_init();
         overo_flash_init();
         usb_musb_init();
diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c
index 1c9e07fe8266..f9196c3b1a7b 100644
--- a/arch/arm/mach-omap2/board-rx51.c
+++ b/arch/arm/mach-omap2/board-rx51.c
@@ -31,10 +31,6 @@
 #include <mach/gpmc.h>
 #include <mach/usb.h>
 
-static struct omap_uart_config rx51_uart_config = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
-};
-
 static struct omap_lcd_config rx51_lcd_config = {
         .ctrl_name      = "internal",
 };
@@ -52,7 +48,6 @@ static struct omap_fbmem_config rx51_fbmem2_config = {
 };
 
 static struct omap_board_config_kernel rx51_config[] = {
-        { OMAP_TAG_UART,        &rx51_uart_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem0_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem1_config },
         { OMAP_TAG_FBMEM,       &rx51_fbmem2_config },
@@ -61,6 +56,8 @@ static struct omap_board_config_kernel rx51_config[] = {
 
 static void __init rx51_init_irq(void)
 {
+        omap_board_config = rx51_config;
+        omap_board_config_size = ARRAY_SIZE(rx51_config);
         omap2_init_common_hw(NULL, NULL);
         omap_init_irq();
         omap_gpio_init();
@@ -70,8 +67,6 @@ extern void __init rx51_peripherals_init(void);
 
 static void __init rx51_init(void)
 {
-        omap_board_config = rx51_config;
-        omap_board_config_size = ARRAY_SIZE(rx51_config);
         omap_serial_init();
         usb_musb_init();
         rx51_peripherals_init();
diff --git a/arch/arm/mach-omap2/board-zoom-debugboard.c b/arch/arm/mach-omap2/board-zoom-debugboard.c
index bac5c4321ff7..1f13e2a1f322 100644
--- a/arch/arm/mach-omap2/board-zoom-debugboard.c
+++ b/arch/arm/mach-omap2/board-zoom-debugboard.c
@@ -12,6 +12,7 @@
 #include <linux/gpio.h>
 #include <linux/serial_8250.h>
 #include <linux/smsc911x.h>
+#include <linux/interrupt.h>
 
 #include <mach/gpmc.h>
 
@@ -84,6 +85,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
                 .mapbase        = 0x10000000,
                 .irq            = OMAP_GPIO_IRQ(102),
                 .flags          = UPF_BOOT_AUTOCONF|UPF_IOREMAP|UPF_SHARE_IRQ,
+                .irqflags       = IRQF_SHARED | IRQF_TRIGGER_RISING,
                 .iotype         = UPIO_MEM,
                 .regshift       = 1,
                 .uartclk        = QUART_CLK,
@@ -94,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
 
 static struct platform_device zoom2_debugboard_serial_device = {
         .name                   = "serial8250",
-        .id                     = PLAT8250_DEV_PLATFORM1,
+        .id                     = 3,
         .dev                    = {
                 .platform_data  = serial_platform_data,
         },
@@ -127,6 +129,7 @@ static inline void __init zoom2_init_quaduart(void)
 static inline int omap_zoom2_debugboard_detect(void)
 {
         int debug_board_detect = 0;
+        int ret = 1;
 
         debug_board_detect = ZOOM2_SMSC911X_GPIO;
 
@@ -138,10 +141,10 @@ static inline int omap_zoom2_debugboard_detect(void)
         gpio_direction_input(debug_board_detect);
 
         if (!gpio_get_value(debug_board_detect)) {
-                gpio_free(debug_board_detect);
-                return 0;
+                ret = 0;
         }
-        return 1;
+        gpio_free(debug_board_detect);
+        return ret;
 }
 
 static struct platform_device *zoom2_devices[] __initdata = {
diff --git a/arch/arm/mach-omap2/board-zoom2.c b/arch/arm/mach-omap2/board-zoom2.c
index 427b7b8b1237..324009edbd53 100644
--- a/arch/arm/mach-omap2/board-zoom2.c
+++ b/arch/arm/mach-omap2/board-zoom2.c
@@ -12,36 +12,217 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/platform_device.h>
+#include <linux/input.h>
 #include <linux/gpio.h>
 #include <linux/i2c/twl4030.h>
+#include <linux/regulator/machine.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/arch.h>
 
 #include <mach/common.h>
 #include <mach/usb.h>
+#include <mach/keypad.h>
 
 #include "mmc-twl4030.h"
 
-static void __init omap_zoom2_init_irq(void)
+/* Zoom2 has Qwerty keyboard*/
+static int zoom2_twl4030_keymap[] = {
+        KEY(0, 0, KEY_E),
+        KEY(1, 0, KEY_R),
+        KEY(2, 0, KEY_T),
+        KEY(3, 0, KEY_HOME),
+        KEY(6, 0, KEY_I),
+        KEY(7, 0, KEY_LEFTSHIFT),
+        KEY(0, 1, KEY_D),
+        KEY(1, 1, KEY_F),
+        KEY(2, 1, KEY_G),
+        KEY(3, 1, KEY_SEND),
+        KEY(6, 1, KEY_K),
+        KEY(7, 1, KEY_ENTER),
+        KEY(0, 2, KEY_X),
+        KEY(1, 2, KEY_C),
+        KEY(2, 2, KEY_V),
+        KEY(3, 2, KEY_END),
+        KEY(6, 2, KEY_DOT),
+        KEY(7, 2, KEY_CAPSLOCK),
+        KEY(0, 3, KEY_Z),
+        KEY(1, 3, KEY_KPPLUS),
+        KEY(2, 3, KEY_B),
+        KEY(3, 3, KEY_F1),
+        KEY(6, 3, KEY_O),
+        KEY(7, 3, KEY_SPACE),
+        KEY(0, 4, KEY_W),
+        KEY(1, 4, KEY_Y),
+        KEY(2, 4, KEY_U),
+        KEY(3, 4, KEY_F2),
+        KEY(4, 4, KEY_VOLUMEUP),
+        KEY(6, 4, KEY_L),
+        KEY(7, 4, KEY_LEFT),
+        KEY(0, 5, KEY_S),
+        KEY(1, 5, KEY_H),
+        KEY(2, 5, KEY_J),
+        KEY(3, 5, KEY_F3),
+        KEY(5, 5, KEY_VOLUMEDOWN),
+        KEY(6, 5, KEY_M),
+        KEY(4, 5, KEY_ENTER),
+        KEY(7, 5, KEY_RIGHT),
+        KEY(0, 6, KEY_Q),
+        KEY(1, 6, KEY_A),
+        KEY(2, 6, KEY_N),
+        KEY(3, 6, KEY_BACKSPACE),
+        KEY(6, 6, KEY_P),
+        KEY(7, 6, KEY_UP),
+        KEY(6, 7, KEY_SELECT),
+        KEY(7, 7, KEY_DOWN),
+        KEY(0, 7, KEY_PROG1),   /*MACRO 1 <User defined> */
+        KEY(1, 7, KEY_PROG2),   /*MACRO 2 <User defined> */
+        KEY(2, 7, KEY_PROG3),   /*MACRO 3 <User defined> */
+        KEY(3, 7, KEY_PROG4),   /*MACRO 4 <User defined> */
+        0
+};
+
+static struct twl4030_keypad_data zoom2_kp_twl4030_data = {
+        .rows           = 8,
+        .cols           = 8,
+        .keymap         = zoom2_twl4030_keymap,
+        .keymapsize     = ARRAY_SIZE(zoom2_twl4030_keymap),
+        .rep            = 1,
+};
+
+static struct omap_board_config_kernel zoom2_config[] __initdata = {
+};
+
+static struct regulator_consumer_supply zoom2_vmmc1_supply = {
+        .supply         = "vmmc",
+};
+
+static struct regulator_consumer_supply zoom2_vsim_supply = {
+        .supply         = "vmmc_aux",
+};
+
+static struct regulator_consumer_supply zoom2_vmmc2_supply = {
+        .supply         = "vmmc",
+};
+
+/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
+static struct regulator_init_data zoom2_vmmc1 = {
+        .constraints = {
+                .min_uV                 = 1850000,
+                .max_uV                 = 3150000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vmmc1_supply,
+};
+
+/* VMMC2 for MMC2 card */
+static struct regulator_init_data zoom2_vmmc2 = {
+        .constraints = {
+                .min_uV                 = 1850000,
+                .max_uV                 = 1850000,
+                .apply_uV               = true,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vmmc2_supply,
+};
+
+/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
+static struct regulator_init_data zoom2_vsim = {
+        .constraints = {
+                .min_uV                 = 1800000,
+                .max_uV                 = 3000000,
+                .valid_modes_mask       = REGULATOR_MODE_NORMAL
+                                        | REGULATOR_MODE_STANDBY,
+                .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
+                                        | REGULATOR_CHANGE_MODE
+                                        | REGULATOR_CHANGE_STATUS,
+        },
+        .num_consumer_supplies  = 1,
+        .consumer_supplies      = &zoom2_vsim_supply,
+};
+
+static struct twl4030_hsmmc_info mmc[] __initdata = {
+        {
+                .mmc            = 1,
+                .wires          = 4,
+                .gpio_wp        = -EINVAL,
+        },
+        {
+                .mmc            = 2,
+                .wires          = 4,
+                .gpio_wp        = -EINVAL,
+        },
+        {}      /* Terminator */
+};
+
+static int zoom2_twl_gpio_setup(struct device *dev,
+                unsigned gpio, unsigned ngpio)
 {
-        omap2_init_common_hw(NULL, NULL);
-        omap_init_irq();
-        omap_gpio_init();
+        /* gpio + 0 is "mmc0_cd" (input/IRQ),
+         * gpio + 1 is "mmc1_cd" (input/IRQ)
+         */
+        mmc[0].gpio_cd = gpio + 0;
+        mmc[1].gpio_cd = gpio + 1;
+        twl4030_mmc_init(mmc);
+
+        /* link regulators to MMC adapters ... we "know" the
+         * regulators will be set up only *after* we return.
+        */
+        zoom2_vmmc1_supply.dev = mmc[0].dev;
+        zoom2_vsim_supply.dev = mmc[0].dev;
+        zoom2_vmmc2_supply.dev = mmc[1].dev;
+
+        return 0;
 }
 
-static struct omap_uart_config zoom2_uart_config __initdata = {
-        .enabled_uarts  = ((1 << 0) | (1 << 1) | (1 << 2)),
+
+static int zoom2_batt_table[] = {
+/* 0 C*/
+30800, 29500, 28300, 27100,
+26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
+17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
+11600, 11200, 10800, 10400, 10000, 9630,  9280,  8950,  8620,  8310,
+8020,  7730,  7460,  7200,  6950,  6710,  6470,  6250,  6040,  5830,
+5640,  5450,  5260,  5090,  4920,  4760,  4600,  4450,  4310,  4170,
+4040,  3910,  3790,  3670,  3550
 };
 
-static struct omap_board_config_kernel zoom2_config[] __initdata = {
-        { OMAP_TAG_UART,        &zoom2_uart_config },
+static struct twl4030_bci_platform_data zoom2_bci_data = {
+        .battery_tmp_tbl        = zoom2_batt_table,
+        .tblsize                = ARRAY_SIZE(zoom2_batt_table),
 };
 
+static struct twl4030_usb_data zoom2_usb_data = {
+        .usb_mode       = T2_USB_MODE_ULPI,
+};
+
+static void __init omap_zoom2_init_irq(void)
+{
+        omap_board_config = zoom2_config;
+        omap_board_config_size = ARRAY_SIZE(zoom2_config);
+        omap2_init_common_hw(NULL, NULL);
+        omap_init_irq();
+        omap_gpio_init();
+}
+
 static struct twl4030_gpio_platform_data zoom2_gpio_data = {
         .gpio_base      = OMAP_MAX_GPIO_LINES,
         .irq_base       = TWL4030_GPIO_IRQ_BASE,
         .irq_end        = TWL4030_GPIO_IRQ_END,
+        .setup          = zoom2_twl_gpio_setup,
+};
+
+static struct twl4030_madc_platform_data zoom2_madc_data = {
+        .irq_line       = 1,
 };
 
 static struct twl4030_platform_data zoom2_twldata = {
@@ -49,7 +230,15 @@ static struct twl4030_platform_data zoom2_twldata = {
         .irq_end        = TWL4030_IRQ_END,
 
         /* platform_data for children goes here */
+        .bci            = &zoom2_bci_data,
+        .madc           = &zoom2_madc_data,
+        .usb            = &zoom2_usb_data,
         .gpio           = &zoom2_gpio_data,
+        .keypad         = &zoom2_kp_twl4030_data,
+        .vmmc1          = &zoom2_vmmc1,
+        .vmmc2          = &zoom2_vmmc2,
+        .vsim           = &zoom2_vsim,
+
 };
 
 static struct i2c_board_info __initdata zoom2_i2c_boardinfo[] = {
@@ -70,26 +259,13 @@ static int __init omap_i2c_init(void)
         return 0;
 }
 
-static struct twl4030_hsmmc_info mmc[] __initdata = {
-        {
-                .mmc            = 1,
-                .wires          = 4,
-                .gpio_cd        = -EINVAL,
-                .gpio_wp        = -EINVAL,
-        },
-        {}      /* Terminator */
-};
-
 extern int __init omap_zoom2_debugboard_init(void);
 
 static void __init omap_zoom2_init(void)
 {
         omap_i2c_init();
-        omap_board_config = zoom2_config;
-        omap_board_config_size = ARRAY_SIZE(zoom2_config);
         omap_serial_init();
         omap_zoom2_debugboard_init();
-        twl4030_mmc_init(mmc);
         usb_musb_init();
 }
 
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 456e2ad5f621..f2a92d614f0f 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -1043,5 +1043,7 @@ void omap2_clk_disable_unused(struct clk *clk)
                 omap2_clk_disable(clk);
         } else
                 _omap2_clk_disable(clk);
+        if (clk->clkdm != NULL)
+                pwrdm_clkdm_state_switch(clk->clkdm);
 }
 #endif
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c
index cd7819cc0c9e..fafcd32e6907 100644
--- a/arch/arm/mach-omap2/clock34xx.c
+++ b/arch/arm/mach-omap2/clock34xx.c
@@ -27,6 +27,7 @@
 #include <linux/limits.h>
 #include <linux/bitops.h>
 
+#include <mach/cpu.h>
 #include <mach/clock.h>
 #include <mach/sram.h>
 #include <asm/div64.h>
@@ -1067,17 +1068,17 @@ static int __init omap2_clk_arch_init(void)
                 return -EINVAL;
 
         /* REVISIT: not yet ready for 343x */
-#if 0
-        if (clk_set_rate(&virt_prcm_set, mpurate))
-                printk(KERN_ERR "Could not find matching MPU rate\n");
-#endif
+        if (clk_set_rate(&dpll1_ck, mpurate))
+                printk(KERN_ERR "*** Unable to set MPU rate\n");
 
         recalculate_root_clocks();
 
-        printk(KERN_INFO "Switched to new clocking rate (Crystal/DPLL3/MPU): "
+        printk(KERN_INFO "Switched to new clocking rate (Crystal/Core/MPU): "
                "%ld.%01ld/%ld/%ld MHz\n",
-               (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
-               (core_ck.rate / 1000000), (dpll1_fck.rate / 1000000)) ;
+               (osc_sys_ck.rate / 1000000), ((osc_sys_ck.rate / 100000) % 10),
+               (core_ck.rate / 1000000), (arm_fck.rate / 1000000)) ;
+
+        calibrate_delay();
 
         return 0;
 }
@@ -1136,7 +1137,7 @@ int __init omap2_clk_init(void)
 
         recalculate_root_clocks();
 
-        printk(KERN_INFO "Clocking rate (Crystal/DPLL/ARM core): "
+        printk(KERN_INFO "Clocking rate (Crystal/Core/MPU): "
                "%ld.%01ld/%ld/%ld MHz\n",
                (osc_sys_ck.rate / 1000000), (osc_sys_ck.rate / 100000) % 10,
                (core_ck.rate / 1000000), (arm_fck.rate / 1000000));
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 57cc2725b923..c8119781e00a 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1020,6 +1020,7 @@ static struct clk arm_fck = {
         .clksel_reg     = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
         .clksel_mask    = OMAP3430_ST_MPU_CLK_MASK,
         .clksel         = arm_fck_clksel,
+        .clkdm_name     = "mpu_clkdm",
         .recalc         = &omap2_clksel_recalc,
 };
 
@@ -1155,7 +1156,6 @@ static struct clk gfx_cg1_ck = {
         .name           = "gfx_cg1_ck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &gfx_l3_fck, /* REVISIT: correct? */
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES1_EN_2D_SHIFT,
         .clkdm_name     = "gfx_3430es1_clkdm",
@@ -1166,7 +1166,6 @@ static struct clk gfx_cg2_ck = {
         .name           = "gfx_cg2_ck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &gfx_l3_fck, /* REVISIT: correct? */
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES1_EN_3D_SHIFT,
         .clkdm_name     = "gfx_3430es1_clkdm",
@@ -1210,7 +1209,6 @@ static struct clk sgx_ick = {
         .name           = "sgx_ick",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &l3_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
         .clkdm_name     = "sgx_clkdm",
@@ -1223,7 +1221,6 @@ static struct clk d2d_26m_fck = {
         .name           = "d2d_26m_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430ES1_EN_D2D_SHIFT,
         .clkdm_name     = "d2d_clkdm",
@@ -1234,7 +1231,6 @@ static struct clk modem_fck = {
         .name           = "modem_fck",
         .ops            = &clkops_omap2_dflt_wait,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
         .enable_bit     = OMAP3430_EN_MODEM_SHIFT,
         .clkdm_name     = "d2d_clkdm",
@@ -1622,7 +1618,6 @@ static struct clk core_l3_ick = {
         .name           = "core_l3_ick",
         .ops            = &clkops_null,
         .parent         = &l3_ick,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "core_l3_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -1691,7 +1686,6 @@ static struct clk core_l4_ick = {
         .name           = "core_l4_ick",
         .ops            = &clkops_null,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "core_l4_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -2089,7 +2083,6 @@ static struct clk dss_tv_fck = {
         .name           = "dss_tv_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &omap_54m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_TV_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2100,7 +2093,6 @@ static struct clk dss_96m_fck = {
         .name           = "dss_96m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &omap_96m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_TV_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2111,7 +2103,6 @@ static struct clk dss2_alwon_fck = {
         .name           = "dss2_alwon_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &sys_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_DSS2_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2123,7 +2114,6 @@ static struct clk dss_ick_3430es1 = {
         .name           = "dss_ick",
         .ops            = &clkops_omap2_dflt,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2135,7 +2125,6 @@ static struct clk dss_ick_3430es2 = {
         .name           = "dss_ick",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
         .clkdm_name     = "dss_clkdm",
@@ -2159,7 +2148,6 @@ static struct clk cam_ick = {
         .name           = "cam_ick",
         .ops            = &clkops_omap2_dflt,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430_EN_CAM_SHIFT,
         .clkdm_name     = "cam_clkdm",
@@ -2170,7 +2158,6 @@ static struct clk csi2_96m_fck = {
         .name           = "csi2_96m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &core_96m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430_EN_CSI2_SHIFT,
         .clkdm_name     = "cam_clkdm",
@@ -2183,7 +2170,6 @@ static struct clk usbhost_120m_fck = {
         .name           = "usbhost_120m_fck",
         .ops            = &clkops_omap2_dflt,
         .parent         = &dpll5_m2_ck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST2_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2194,7 +2180,6 @@ static struct clk usbhost_48m_fck = {
         .name           = "usbhost_48m_fck",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &omap_48m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST1_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2206,7 +2191,6 @@ static struct clk usbhost_ick = {
         .name           = "usbhost_ick",
         .ops            = &clkops_omap3430es2_dss_usbhost_wait,
         .parent         = &l4_ick,
-        .init           = &omap2_init_clk_clkdm,
         .enable_reg     = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
         .enable_bit     = OMAP3430ES2_EN_USBHOST_SHIFT,
         .clkdm_name     = "usbhost_clkdm",
@@ -2268,7 +2252,6 @@ static struct clk gpt1_fck = {
 static struct clk wkup_32k_fck = {
         .name           = "wkup_32k_fck",
         .ops            = &clkops_null,
-        .init           = &omap2_init_clk_clkdm,
         .parent         = &omap_32k_fck,
         .clkdm_name     = "wkup_clkdm",
         .recalc         = &followparent_recalc,
@@ -2383,7 +2366,6 @@ static struct clk per_96m_fck = {
         .name           = "per_96m_fck",
         .ops            = &clkops_null,
         .parent         = &omap_96m_alwon_fck,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "per_clkdm",
         .recalc         = &followparent_recalc,
 };
@@ -2392,7 +2374,6 @@ static struct clk per_48m_fck = {
         .name           = "per_48m_fck",
         .ops            = &clkops_null,
         .parent         = &omap_48m_fck,
-        .init           = &omap2_init_clk_clkdm,
         .clkdm_name     = "per_clkdm",
         .recalc         = &followparent_recalc,
 };
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c
index 0e7d501865b6..4ef7b4f5474e 100644
--- a/arch/arm/mach-omap2/clockdomain.c
+++ b/arch/arm/mach-omap2/clockdomain.c
@@ -299,7 +299,8 @@ struct clockdomain *clkdm_lookup(const char *name)
  * anything else to indicate failure; or -EINVAL if the function pointer
  * is null.
  */
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+                        void *user)
 {
         struct clockdomain *clkdm;
         int ret = 0;
@@ -309,7 +310,7 @@ int clkdm_for_each(int (*fn)(struct clockdomain *clkdm))
 
         mutex_lock(&clkdm_mutex);
         list_for_each_entry(clkdm, &clkdm_list, node) {
-                ret = (*fn)(clkdm);
+                ret = (*fn)(clkdm, user);
                 if (ret)
                         break;
         }
@@ -484,6 +485,8 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm)
                             v << __ffs(clkdm->clktrctrl_mask),
                             clkdm->pwrdm.ptr->prcm_offs,
                             CM_CLKSTCTRL);
+
+        pwrdm_clkdm_state_switch(clkdm);
 }
 
 /**
@@ -572,6 +575,7 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk)
                 omap2_clkdm_wakeup(clkdm);
 
         pwrdm_wait_transition(clkdm->pwrdm.ptr);
+        pwrdm_clkdm_state_switch(clkdm);
 
         return 0;
 }
@@ -624,6 +628,8 @@ int omap2_clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk)
         else
                 omap2_clkdm_sleep(clkdm);
 
+        pwrdm_clkdm_state_switch(clkdm);
+
         return 0;
 }
 
diff --git a/arch/arm/mach-omap2/cm.c b/arch/arm/mach-omap2/cm.c
new file mode 100644
index 000000000000..8eb2dab8c7db
--- /dev/null
+++ b/arch/arm/mach-omap2/cm.c
@@ -0,0 +1,70 @@
+/*
+ * OMAP2/3 CM module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <asm/atomic.h>
+
+#include "cm.h"
+#include "cm-regbits-24xx.h"
+#include "cm-regbits-34xx.h"
+
+/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
+#define MAX_MODULE_READY_TIME           20000
+
+static const u8 cm_idlest_offs[] = {
+        CM_IDLEST1, CM_IDLEST2, OMAP2430_CM_IDLEST3
+};
+
+/**
+ * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset
+ * @idlest_id: CM_IDLESTx register ID (i.e., x = 1, 2, 3)
+ * @idlest_shift: shift of the bit in the CM_IDLEST* register to check
+ *
+ * XXX document
+ */
+int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id, u8 idlest_shift)
+{
+        int ena = 0, i = 0;
+        u8 cm_idlest_reg;
+        u32 mask;
+
+        if (!idlest_id || (idlest_id > ARRAY_SIZE(cm_idlest_offs)))
+                return -EINVAL;
+
+        cm_idlest_reg = cm_idlest_offs[idlest_id - 1];
+
+        if (cpu_is_omap24xx())
+                ena = idlest_shift;
+        else if (cpu_is_omap34xx())
+                ena = 0;
+        else
+                BUG();
+
+        mask = 1 << idlest_shift;
+
+        /* XXX should be OMAP2 CM */
+        while (((cm_read_mod_reg(prcm_mod, cm_idlest_reg) & mask) != ena) &&
+               (i++ < MAX_MODULE_READY_TIME))
+                udelay(1);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index f3c91a1ca391..cfd0b726ba44 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2420_CM_BASE + (module) + (reg))
 #define OMAP2430_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2430_CM_BASE + (module) + (reg))
 #define OMAP34XX_CM_REGADDR(module, reg)                                \
-                        IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP3430_CM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global CM registers
@@ -98,6 +98,10 @@ extern u32 cm_read_mod_reg(s16 module, u16 idx);
 extern void cm_write_mod_reg(u32 val, s16 module, u16 idx);
 extern u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx);
 
+extern int omap2_cm_wait_module_ready(s16 prcm_mod, u8 idlest_id,
+                                      u8 idlest_shift);
+extern int omap4_cm_wait_module_ready(u32 prcm_mod, u8 prcm_dev_offs);
+
 static inline u32 cm_set_mod_reg_bits(u32 bits, s16 module, s16 idx)
 {
         return cm_rmw_mod_reg_bits(bits, bits, module, idx);
diff --git a/arch/arm/mach-omap2/cm4xxx.c b/arch/arm/mach-omap2/cm4xxx.c
new file mode 100644
index 000000000000..e4ebd6d53135
--- /dev/null
+++ b/arch/arm/mach-omap2/cm4xxx.c
@@ -0,0 +1,68 @@
+/*
+ * OMAP4 CM module functions
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/delay.h>
+#include <linux/spinlock.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <asm/atomic.h>
+
+#include "cm.h"
+#include "cm-regbits-4xxx.h"
+
+/* XXX move this to cm.h */
+/* MAX_MODULE_READY_TIME: max milliseconds for module to leave idle */
+#define MAX_MODULE_READY_TIME                   20000
+
+/*
+ * OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK: isolates the IDLEST field in the
+ * CM_CLKCTRL register.
+ */
+#define OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK       (0x2 << 16)
+
+/*
+ * OMAP4 prcm_mod u32 fields contain packed data: the CM ID in bit 16 and
+ * the PRCM module offset address (from the CM module base) in bits 15-0.
+ */
+#define OMAP4_PRCM_MOD_CM_ID_SHIFT              16
+#define OMAP4_PRCM_MOD_OFFS_MASK                0xffff
+
+/**
+ * omap4_cm_wait_idlest_ready - wait for a module to leave idle or standby
+ * @prcm_mod: PRCM module offset (XXX example)
+ * @prcm_dev_offs: PRCM device offset (e.g. MCASP XXX example)
+ *
+ * XXX document
+ */
+int omap4_cm_wait_idlest_ready(u32 prcm_mod, u8 prcm_dev_offs)
+{
+        int i = 0;
+        u8 cm_id;
+        u16 prcm_mod_offs;
+        u32 mask = OMAP4_PRCM_CM_CLKCTRL_IDLEST_MASK;
+
+        cm_id = prcm_mod >> OMAP4_PRCM_MOD_CM_ID_SHIFT;
+        prcm_mod_offs = prcm_mod & OMAP4_PRCM_MOD_OFFS_MASK;
+
+        while (((omap4_cm_read_mod_reg(cm_id, prcm_mod_offs, prcm_dev_offs,
+                                       OMAP4_CM_CLKCTRL_DREG) & mask) != 0) &&
+               (i++ < MAX_MODULE_READY_TIME))
+                udelay(1);
+
+        return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY;
+}
+
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index 894cc355818a..a2e915639b72 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -513,6 +513,47 @@ static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
                 }
         }
+
+        if (cpu_is_omap3430()) {
+                if (controller_nr == 0) {
+                        omap_cfg_reg(N28_3430_MMC1_CLK);
+                        omap_cfg_reg(M27_3430_MMC1_CMD);
+                        omap_cfg_reg(N27_3430_MMC1_DAT0);
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(N26_3430_MMC1_DAT1);
+                                omap_cfg_reg(N25_3430_MMC1_DAT2);
+                                omap_cfg_reg(P28_3430_MMC1_DAT3);
+                        }
+                        if (mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(P27_3430_MMC1_DAT4);
+                                omap_cfg_reg(P26_3430_MMC1_DAT5);
+                                omap_cfg_reg(R27_3430_MMC1_DAT6);
+                                omap_cfg_reg(R25_3430_MMC1_DAT7);
+                        }
+                }
+                if (controller_nr == 1) {
+                        /* MMC2 */
+                        omap_cfg_reg(AE2_3430_MMC2_CLK);
+                        omap_cfg_reg(AG5_3430_MMC2_CMD);
+                        omap_cfg_reg(AH5_3430_MMC2_DAT0);
+
+                        /*
+                         * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
+                         * in the board-*.c files
+                         */
+                        if (mmc_controller->slots[0].wires == 4 ||
+                                mmc_controller->slots[0].wires == 8) {
+                                omap_cfg_reg(AH4_3430_MMC2_DAT1);
+                                omap_cfg_reg(AG4_3430_MMC2_DAT2);
+                                omap_cfg_reg(AF4_3430_MMC2_DAT3);
+                        }
+                }
+
+                /*
+                 * For MMC3 the pins need to be muxed in the board-*.c files
+                 */
+        }
 }
 
 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e9b9bcb19b4e..7574b6f20e8e 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -32,17 +32,23 @@
 #include <mach/sram.h>
 #include <mach/sdrc.h>
 #include <mach/gpmc.h>
+#include <mach/serial.h>
 
 #ifndef CONFIG_ARCH_OMAP4       /* FIXME: Remove this once clkdev is ready */
 #include "clock.h"
 
+#include <mach/omap-pm.h>
 #include <mach/powerdomain.h>
-
 #include "powerdomains.h"
 
 #include <mach/clockdomain.h>
 #include "clockdomains.h"
 #endif
+#include <mach/omap_hwmod.h>
+#include "omap_hwmod_2420.h"
+#include "omap_hwmod_2430.h"
+#include "omap_hwmod_34xx.h"
+
 /*
  * The machine specific code may provide the extra mapping besides the
  * default mapping provided here.
@@ -279,11 +285,26 @@ static int __init _omap2_init_reprogram_sdrc(void)
 void __init omap2_init_common_hw(struct omap_sdrc_params *sdrc_cs0,
                                  struct omap_sdrc_params *sdrc_cs1)
 {
+        struct omap_hwmod **hwmods = NULL;
+
+        if (cpu_is_omap2420())
+                hwmods = omap2420_hwmods;
+        else if (cpu_is_omap2430())
+                hwmods = omap2430_hwmods;
+        else if (cpu_is_omap34xx())
+                hwmods = omap34xx_hwmods;
+
+        omap_hwmod_init(hwmods);
         omap2_mux_init();
 #ifndef CONFIG_ARCH_OMAP4 /* FIXME: Remove this once the clkdev is ready */
+        /* The OPP tables have to be registered before a clk init */
+        omap_pm_if_early_init(mpu_opps, dsp_opps, l3_opps);
         pwrdm_init(powerdomains_omap);
         clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps);
         omap2_clk_init();
+        omap_serial_early_init();
+        omap_hwmod_late_init();
+        omap_pm_if_init();
         omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
         _omap2_init_reprogram_sdrc();
 #endif
diff --git a/arch/arm/mach-omap2/iommu2.c b/arch/arm/mach-omap2/iommu2.c
index 015f22a53ead..2d9b5cc981cd 100644
--- a/arch/arm/mach-omap2/iommu2.c
+++ b/arch/arm/mach-omap2/iommu2.c
@@ -217,10 +217,19 @@ static ssize_t omap2_dump_cr(struct iommu *obj, struct cr_regs *cr, char *buf)
 }
 
 #define pr_reg(name)                                                    \
-        p += sprintf(p, "%20s: %08x\n",                                 \
-                     __stringify(name), iommu_read_reg(obj, MMU_##name));
-
-static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf)
+        do {                                                            \
+                ssize_t bytes;                                          \
+                const char *str = "%20s: %08x\n";                       \
+                const int maxcol = 32;                                  \
+                bytes = snprintf(p, maxcol, str, __stringify(name),     \
+                                 iommu_read_reg(obj, MMU_##name));      \
+                p += bytes;                                             \
+                len -= bytes;                                           \
+                if (len < maxcol)                                       \
+                        goto out;                                       \
+        } while (0)
+
+static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len)
 {
         char *p = buf;
 
@@ -242,7 +251,7 @@ static ssize_t omap2_iommu_dump_ctx(struct iommu *obj, char *buf)
         pr_reg(READ_CAM);
         pr_reg(READ_RAM);
         pr_reg(EMU_FAULT_AD);
-
+out:
         return p - buf;
 }
 
diff --git a/arch/arm/mach-omap2/mux.c b/arch/arm/mach-omap2/mux.c
index 43d6b92b65f2..2daa595aaff4 100644
--- a/arch/arm/mach-omap2/mux.c
+++ b/arch/arm/mach-omap2/mux.c
@@ -492,6 +492,61 @@ MUX_CFG_34XX("H16_34XX_SDRC_CKE0", 0x262,
                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
 MUX_CFG_34XX("H17_34XX_SDRC_CKE1", 0x264,
                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_OUTPUT)
+
+/* MMC1 */
+MUX_CFG_34XX("N28_3430_MMC1_CLK", 0x144,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("M27_3430_MMC1_CMD", 0x146,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N27_3430_MMC1_DAT0", 0x148,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N26_3430_MMC1_DAT1", 0x14a,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("N25_3430_MMC1_DAT2", 0x14c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P28_3430_MMC1_DAT3", 0x14e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P27_3430_MMC1_DAT4", 0x150,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("P26_3430_MMC1_DAT5", 0x152,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R27_3430_MMC1_DAT6", 0x154,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("R25_3430_MMC1_DAT7", 0x156,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC2 */
+MUX_CFG_34XX("AE2_3430_MMC2_CLK", 0x158,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG5_3430_MMC2_CMD", 0x15A,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH5_3430_MMC2_DAT0", 0x15c,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH4_3430_MMC2_DAT1", 0x15e,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AG4_3430_MMC2_DAT2", 0x160,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF4_3430_MMC2_DAT3", 0x162,
+                OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* MMC3 */
+MUX_CFG_34XX("AF10_3430_MMC3_CLK", 0x5d8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AC3_3430_MMC3_CMD", 0x1d0,
+                OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AE11_3430_MMC3_DAT0", 0x5e4,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AH9_3430_MMC3_DAT1", 0x5e6,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT2", 0x5e8,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+MUX_CFG_34XX("AF13_3430_MMC3_DAT3", 0x5e2,
+                OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLUP)
+
+/* SYS_NIRQ T2 INT1 */
+MUX_CFG_34XX("AF26_34XX_SYS_NIRQ", 0x1E0,
+                OMAP3_WAKEUP_EN | OMAP34XX_PIN_INPUT_PULLUP |
+                OMAP34XX_MUX_MODE0)
 };
 
 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c
index 8fe8d230f21b..48ee295db275 100644
--- a/arch/arm/mach-omap2/omap-smp.c
+++ b/arch/arm/mach-omap2/omap-smp.c
@@ -54,7 +54,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
          * for us: do so
          */
 
-        gic_cpu_init(0, IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
+        gic_cpu_init(0, OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE));
 
         /*
          * Synchronise with the boot thread.
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
new file mode 100644
index 000000000000..d2e0f1c95961
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -0,0 +1,1554 @@
+/*
+ * omap_hwmod implementation for OMAP2/3/4
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ * With fixes and testing from Kevin Hilman
+ *
+ * Created in collaboration with (alphabetical order): Benoit Cousson,
+ * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
+ * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This code manages "OMAP modules" (on-chip devices) and their
+ * integration with Linux device driver and bus code.
+ *
+ * References:
+ * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
+ * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
+ * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
+ * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
+ * - Open Core Protocol Specification 2.2
+ *
+ * To do:
+ * - pin mux handling
+ * - handle IO mapping
+ * - bus throughput & module latency measurement code
+ *
+ * XXX add tests at the beginning of each function to ensure the hwmod is
+ * in the appropriate state
+ * XXX error return values should be checked to ensure that they are
+ * appropriate
+ */
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/bootmem.h>
+
+#include <mach/cpu.h>
+#include <mach/clockdomain.h>
+#include <mach/powerdomain.h>
+#include <mach/clock.h>
+#include <mach/omap_hwmod.h>
+
+#include "cm.h"
+
+/* Maximum microseconds to wait for OMAP module to reset */
+#define MAX_MODULE_RESET_WAIT           10000
+
+/* Name of the OMAP hwmod for the MPU */
+#define MPU_INITIATOR_NAME              "mpu_hwmod"
+
+/* omap_hwmod_list contains all registered struct omap_hwmods */
+static LIST_HEAD(omap_hwmod_list);
+
+static DEFINE_MUTEX(omap_hwmod_mutex);
+
+/* mpu_oh: used to add/remove MPU initiator from sleepdep list */
+static struct omap_hwmod *mpu_oh;
+
+/* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
+static u8 inited;
+
+
+/* Private functions */
+
+/**
+ * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
+ * @oh: struct omap_hwmod *
+ *
+ * Load the current value of the hwmod OCP_SYSCONFIG register into the
+ * struct omap_hwmod for later use.  Returns -EINVAL if the hwmod has no
+ * OCP_SYSCONFIG register or 0 upon success.
+ */
+static int _update_sysc_cache(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig) {
+                WARN(!oh->sysconfig, "omap_hwmod: %s: cannot read "
+                     "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
+                return -EINVAL;
+        }
+
+        /* XXX ensure module interface clock is up */
+
+        oh->_sysc_cache = omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
+
+        oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
+
+        return 0;
+}
+
+/**
+ * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
+ * @v: OCP_SYSCONFIG value to write
+ * @oh: struct omap_hwmod *
+ *
+ * Write @v into the module OCP_SYSCONFIG register, if it has one.  No
+ * return value.
+ */
+static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig) {
+                WARN(!oh->sysconfig, "omap_hwmod: %s: cannot write "
+                     "OCP_SYSCONFIG: not defined on hwmod\n", oh->name);
+                return;
+        }
+
+        /* XXX ensure module interface clock is up */
+
+        if (oh->_sysc_cache != v) {
+                oh->_sysc_cache = v;
+                omap_hwmod_writel(v, oh, oh->sysconfig->sysc_offs);
+        }
+}
+
+/**
+ * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
+ * @oh: struct omap_hwmod *
+ * @standbymode: MIDLEMODE field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the master standby mode bits in @v to be @standbymode for
+ * the @oh hwmod.  Does not write to the hardware.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
+                                   u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE))
+                return -EINVAL;
+
+        *v &= ~SYSC_MIDLEMODE_MASK;
+        *v |= __ffs(standbymode) << SYSC_MIDLEMODE_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
+ * @oh: struct omap_hwmod *
+ * @idlemode: SIDLEMODE field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the slave idle mode bits in @v to be @idlemode for the @oh
+ * hwmod.  Does not write to the hardware.  Returns -EINVAL upon error
+ * or 0 upon success.
+ */
+static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE))
+                return -EINVAL;
+
+        *v &= ~SYSC_SIDLEMODE_MASK;
+        *v |= __ffs(idlemode) << SYSC_SIDLEMODE_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * @oh: struct omap_hwmod *
+ * @clockact: CLOCKACTIVITY field bits
+ * @v: pointer to register contents to modify
+ *
+ * Update the clockactivity mode bits in @v to be @clockact for the
+ * @oh hwmod.  Used for additional powersaving on some modules.  Does
+ * not write to the hardware.  Returns -EINVAL upon error or 0 upon
+ * success.
+ */
+static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
+                return -EINVAL;
+
+        *v &= ~SYSC_CLOCKACTIVITY_MASK;
+        *v |= clockact << SYSC_CLOCKACTIVITY_SHIFT;
+
+        return 0;
+}
+
+/**
+ * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
+ * @oh: struct omap_hwmod *
+ * @v: pointer to register contents to modify
+ *
+ * Set the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
+ * error or 0 upon success.
+ */
+static int _set_softreset(struct omap_hwmod *oh, u32 *v)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET))
+                return -EINVAL;
+
+        *v |= SYSC_SOFTRESET_MASK;
+
+        return 0;
+}
+
+/**
+ * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
+ * @oh: struct omap_hwmod *
+ *
+ * Allow the hardware module @oh to send wakeups.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _enable_wakeup(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        v = oh->_sysc_cache;
+        v |= SYSC_ENAWAKEUP_MASK;
+        _write_sysconfig(v, oh);
+
+        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
+
+        oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
+
+        return 0;
+}
+
+/**
+ * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
+ * @oh: struct omap_hwmod *
+ *
+ * Prevent the hardware module @oh to send wakeups.  Returns -EINVAL
+ * upon error or 0 upon success.
+ */
+static int _disable_wakeup(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        v = oh->_sysc_cache;
+        v &= ~SYSC_ENAWAKEUP_MASK;
+        _write_sysconfig(v, oh);
+
+        /* XXX test pwrdm_get_wken for this hwmod's subsystem */
+
+        oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
+
+        return 0;
+}
+
+/**
+ * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
+ * @oh: struct omap_hwmod *
+ *
+ * Prevent the hardware module @oh from entering idle while the
+ * hardare module initiator @init_oh is active.  Useful when a module
+ * will be accessed by a particular initiator (e.g., if a module will
+ * be accessed by the IVA, there should be a sleepdep between the IVA
+ * initiator and the module).  Only applies to modules in smart-idle
+ * mode.  Returns -EINVAL upon error or passes along
+ * pwrdm_add_sleepdep() value upon success.
+ */
+static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
+{
+        if (!oh->_clk)
+                return -EINVAL;
+
+        return pwrdm_add_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
+                                  init_oh->_clk->clkdm->pwrdm.ptr);
+}
+
+/**
+ * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
+ * @oh: struct omap_hwmod *
+ *
+ * Allow the hardware module @oh to enter idle while the hardare
+ * module initiator @init_oh is active.  Useful when a module will not
+ * be accessed by a particular initiator (e.g., if a module will not
+ * be accessed by the IVA, there should be no sleepdep between the IVA
+ * initiator and the module).  Only applies to modules in smart-idle
+ * mode.  Returns -EINVAL upon error or passes along
+ * pwrdm_add_sleepdep() value upon success.
+ */
+static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
+{
+        if (!oh->_clk)
+                return -EINVAL;
+
+        return pwrdm_del_sleepdep(oh->_clk->clkdm->pwrdm.ptr,
+                                  init_oh->_clk->clkdm->pwrdm.ptr);
+}
+
+/**
+ * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh _clk (main
+ * functional clock pointer) if a main_clk is present.  Returns 0 on
+ * success or -EINVAL on error.
+ */
+static int _init_main_clk(struct omap_hwmod *oh)
+{
+        struct clk *c;
+        int ret = 0;
+
+        if (!oh->clkdev_con_id)
+                return 0;
+
+        c = clk_get_sys(oh->clkdev_dev_id, oh->clkdev_con_id);
+        WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get main_clk %s.%s\n",
+             oh->name, oh->clkdev_dev_id, oh->clkdev_con_id);
+        if (IS_ERR(c))
+                ret = -EINVAL;
+        oh->_clk = c;
+
+        return ret;
+}
+
+/**
+ * _init_interface_clk - get a struct clk * for the the hwmod's interface clks
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh OCP slave interface
+ * clock pointers.  Returns 0 on success or -EINVAL on error.
+ */
+static int _init_interface_clks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        struct clk *c;
+        int i;
+        int ret = 0;
+
+        if (oh->slaves_cnt == 0)
+                return 0;
+
+        for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                if (!os->clkdev_con_id)
+                        continue;
+
+                c = clk_get_sys(os->clkdev_dev_id, os->clkdev_con_id);
+                WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get "
+                     "interface_clk %s.%s\n", oh->name,
+                     os->clkdev_dev_id, os->clkdev_con_id);
+                if (IS_ERR(c))
+                        ret = -EINVAL;
+                os->_clk = c;
+        }
+
+        return ret;
+}
+
+/**
+ * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Called from _init_clocks().  Populates the @oh omap_hwmod_opt_clk
+ * clock pointers.  Returns 0 on success or -EINVAL on error.
+ */
+static int _init_opt_clks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_opt_clk *oc;
+        struct clk *c;
+        int i;
+        int ret = 0;
+
+        for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
+                c = clk_get_sys(oc->clkdev_dev_id, oc->clkdev_con_id);
+                WARN(IS_ERR(c), "omap_hwmod: %s: cannot clk_get opt_clk "
+                     "%s.%s\n", oh->name, oc->clkdev_dev_id,
+                     oc->clkdev_con_id);
+                if (IS_ERR(c))
+                        ret = -EINVAL;
+                oc->_clk = c;
+        }
+
+        return ret;
+}
+
+/**
+ * _enable_clocks - enable hwmod main clock and interface clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Enables all clocks necessary for register reads and writes to succeed
+ * on the hwmod @oh.  Returns 0.
+ */
+static int _enable_clocks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
+
+        if (oh->_clk && !IS_ERR(oh->_clk))
+                clk_enable(oh->_clk);
+
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+                                clk_enable(c);
+                }
+        }
+
+        /* The opt clocks are controlled by the device driver. */
+
+        return 0;
+}
+
+/**
+ * _disable_clocks - disable hwmod main clock and interface clocks
+ * @oh: struct omap_hwmod *
+ *
+ * Disables the hwmod @oh main functional and interface clocks.  Returns 0.
+ */
+static int _disable_clocks(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
+
+        if (oh->_clk && !IS_ERR(oh->_clk))
+                clk_disable(oh->_clk);
+
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (c && !IS_ERR(c) && (os->flags & OCPIF_SWSUP_IDLE))
+                                clk_disable(c);
+                }
+        }
+
+        /* The opt clocks are controlled by the device driver. */
+
+        return 0;
+}
+
+/**
+ * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
+ * @oh: struct omap_hwmod *
+ *
+ * Returns the array index of the OCP slave port that the MPU
+ * addresses the device on, or -EINVAL upon error or not found.
+ */
+static int _find_mpu_port_index(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+        int found = 0;
+
+        if (!oh || oh->slaves_cnt == 0)
+                return -EINVAL;
+
+        for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                if (os->user & OCP_USER_MPU) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        if (found)
+                pr_debug("omap_hwmod: %s: MPU OCP slave port ID  %d\n",
+                         oh->name, i);
+        else
+                pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
+                         oh->name);
+
+        return (found) ? i : -EINVAL;
+}
+
+/**
+ * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
+ * @oh: struct omap_hwmod *
+ *
+ * Return the virtual address of the base of the register target of
+ * device @oh, or NULL on error.
+ */
+static void __iomem *_find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
+{
+        struct omap_hwmod_ocp_if *os;
+        struct omap_hwmod_addr_space *mem;
+        int i;
+        int found = 0;
+
+        if (!oh || oh->slaves_cnt == 0)
+                return NULL;
+
+        os = *oh->slaves + index;
+
+        for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
+                if (mem->flags & ADDR_TYPE_RT) {
+                        found = 1;
+                        break;
+                }
+        }
+
+        /* XXX use ioremap() instead? */
+
+        if (found)
+                pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
+                         oh->name, OMAP2_IO_ADDRESS(mem->pa_start));
+        else
+                pr_debug("omap_hwmod: %s: no MPU register target found\n",
+                         oh->name);
+
+        return (found) ? OMAP2_IO_ADDRESS(mem->pa_start) : NULL;
+}
+
+/**
+ * _sysc_enable - try to bring a module out of idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * If module is marked as SWSUP_SIDLE, force the module out of slave
+ * idle; otherwise, configure it for smart-idle.  If module is marked
+ * as SWSUP_MSUSPEND, force the module out of master standby;
+ * otherwise, configure it for smart-standby.  No return value.
+ */
+static void _sysc_enable(struct omap_hwmod *oh)
+{
+        u8 idlemode;
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
+                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                _set_slave_idlemode(oh, idlemode, &v);
+        }
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
+                        HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
+                _set_master_standbymode(oh, idlemode, &v);
+        }
+
+        /* XXX OCP AUTOIDLE bit? */
+
+        if (oh->flags & HWMOD_SET_DEFAULT_CLOCKACT &&
+            oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY)
+                _set_clockactivity(oh, oh->sysconfig->clockact, &v);
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _sysc_idle - try to put a module into idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * If module is marked as SWSUP_SIDLE, force the module into slave
+ * idle; otherwise, configure it for smart-idle.  If module is marked
+ * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
+ * configure it for smart-standby.  No return value.
+ */
+static void _sysc_idle(struct omap_hwmod *oh)
+{
+        u8 idlemode;
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
+                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                _set_slave_idlemode(oh, idlemode, &v);
+        }
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE) {
+                idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
+                        HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
+                _set_master_standbymode(oh, idlemode, &v);
+        }
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _sysc_shutdown - force a module into idle via OCP_SYSCONFIG
+ * @oh: struct omap_hwmod *
+ *
+ * Force the module into slave idle and master suspend. No return
+ * value.
+ */
+static void _sysc_shutdown(struct omap_hwmod *oh)
+{
+        u32 v;
+
+        if (!oh->sysconfig)
+                return;
+
+        v = oh->_sysc_cache;
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_SIDLEMODE)
+                _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
+
+        if (oh->sysconfig->sysc_flags & SYSC_HAS_MIDLEMODE)
+                _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
+
+        /* XXX clear OCP AUTOIDLE bit? */
+
+        _write_sysconfig(v, oh);
+}
+
+/**
+ * _lookup - find an omap_hwmod by name
+ * @name: find an omap_hwmod by name
+ *
+ * Return a pointer to an omap_hwmod by name, or NULL if not found.
+ * Caller must hold omap_hwmod_mutex.
+ */
+static struct omap_hwmod *_lookup(const char *name)
+{
+        struct omap_hwmod *oh, *temp_oh;
+
+        oh = NULL;
+
+        list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
+                if (!strcmp(name, temp_oh->name)) {
+                        oh = temp_oh;
+                        break;
+                }
+        }
+
+        return oh;
+}
+
+/**
+ * _init_clocks - clk_get() all clocks associated with this hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Called by omap_hwmod_late_init() (after omap2_clk_init()).
+ * Resolves all clock names embedded in the hwmod.  Must be called
+ * with omap_hwmod_mutex held.  Returns -EINVAL if the omap_hwmod
+ * has not yet been registered or if the clocks have already been
+ * initialized, 0 on success, or a non-zero error on failure.
+ */
+static int _init_clocks(struct omap_hwmod *oh)
+{
+        int ret = 0;
+
+        if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
+                return -EINVAL;
+
+        pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
+
+        ret |= _init_main_clk(oh);
+        ret |= _init_interface_clks(oh);
+        ret |= _init_opt_clks(oh);
+
+        oh->_state = _HWMOD_STATE_CLKS_INITED;
+
+        return ret;
+}
+
+/**
+ * _wait_target_ready - wait for a module to leave slave idle
+ * @oh: struct omap_hwmod *
+ *
+ * Wait for a module @oh to leave slave idle.  Returns 0 if the module
+ * does not have an IDLEST bit or if the module successfully leaves
+ * slave idle; otherwise, pass along the return value of the
+ * appropriate *_cm_wait_module_ready() function.
+ */
+static int _wait_target_ready(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int ret;
+
+        if (!oh)
+                return -EINVAL;
+
+        if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
+                return 0;
+
+        os = *oh->slaves + oh->_mpu_port_index;
+
+        if (!(os->flags & OCPIF_HAS_IDLEST))
+                return 0;
+
+        /* XXX check module SIDLEMODE */
+
+        /* XXX check clock enable states */
+
+        if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
+                ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
+                                                 oh->prcm.omap2.idlest_reg_id,
+                                                 oh->prcm.omap2.idlest_idle_bit);
+#if 0
+        } else if (cpu_is_omap44xx()) {
+                ret = omap4_cm_wait_module_ready(oh->prcm.omap4.module_offs,
+                                                 oh->prcm.omap4.device_offs);
+#endif
+        } else {
+                BUG();
+        };
+
+        return ret;
+}
+
+/**
+ * _reset - reset an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be
+ * enabled for this to work.  Must be called with omap_hwmod_mutex
+ * held.  Returns -EINVAL if the hwmod cannot be reset this way or if
+ * the hwmod is in the wrong state, -ETIMEDOUT if the module did not
+ * reset in time, or 0 upon success.
+ */
+static int _reset(struct omap_hwmod *oh)
+{
+        u32 r, v;
+        int c;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_SOFTRESET) ||
+            (oh->sysconfig->sysc_flags & SYSS_MISSING))
+                return -EINVAL;
+
+        /* clocks must be on for this operation */
+        if (oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: reset can only be entered from "
+                     "enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: resetting\n", oh->name);
+
+        v = oh->_sysc_cache;
+        r = _set_softreset(oh, &v);
+        if (r)
+                return r;
+        _write_sysconfig(v, oh);
+
+        c = 0;
+        while (c < MAX_MODULE_RESET_WAIT &&
+               !(omap_hwmod_readl(oh, oh->sysconfig->syss_offs) &
+                 SYSS_RESETDONE_MASK)) {
+                udelay(1);
+                c++;
+        }
+
+        if (c == MAX_MODULE_RESET_WAIT)
+                WARN(1, "omap_hwmod: %s: failed to reset in %d usec\n",
+                     oh->name, MAX_MODULE_RESET_WAIT);
+        else
+                pr_debug("omap_hwmod: %s: reset in %d usec\n", oh->name, c);
+
+        /*
+         * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
+         * _wait_target_ready() or _reset()
+         */
+
+        return (c == MAX_MODULE_RESET_WAIT) ? -ETIMEDOUT : 0;
+}
+
+/**
+ * _enable - enable an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
+ * register target.  Must be called with omap_hwmod_mutex held.
+ * Returns -EINVAL if the hwmod is in the wrong state or passes along
+ * the return value of _wait_target_ready().
+ */
+static int _enable(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (oh->_state != _HWMOD_STATE_INITIALIZED &&
+            oh->_state != _HWMOD_STATE_IDLE &&
+            oh->_state != _HWMOD_STATE_DISABLED) {
+                WARN(1, "omap_hwmod: %s: enabled state can only be entered "
+                     "from initialized, idle, or disabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: enabling\n", oh->name);
+
+        /* XXX mux balls */
+
+        _add_initiator_dep(oh, mpu_oh);
+        _enable_clocks(oh);
+
+        if (oh->sysconfig) {
+                if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
+                        _update_sysc_cache(oh);
+                _sysc_enable(oh);
+        }
+
+        r = _wait_target_ready(oh);
+        if (!r)
+                oh->_state = _HWMOD_STATE_ENABLED;
+
+        return r;
+}
+
+/**
+ * _idle - idle an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Idles an omap_hwmod @oh.  This should be called once the hwmod has
+ * no further work.  Returns -EINVAL if the hwmod is in the wrong
+ * state or returns 0.
+ */
+static int _idle(struct omap_hwmod *oh)
+{
+        if (oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: idle state can only be entered from "
+                     "enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: idling\n", oh->name);
+
+        if (oh->sysconfig)
+                _sysc_idle(oh);
+        _del_initiator_dep(oh, mpu_oh);
+        _disable_clocks(oh);
+
+        oh->_state = _HWMOD_STATE_IDLE;
+
+        return 0;
+}
+
+/**
+ * _shutdown - shutdown an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Shut down an omap_hwmod @oh.  This should be called when the driver
+ * used for the hwmod is removed or unloaded or if the driver is not
+ * used by the system.  Returns -EINVAL if the hwmod is in the wrong
+ * state or returns 0.
+ */
+static int _shutdown(struct omap_hwmod *oh)
+{
+        if (oh->_state != _HWMOD_STATE_IDLE &&
+            oh->_state != _HWMOD_STATE_ENABLED) {
+                WARN(1, "omap_hwmod: %s: disabled state can only be entered "
+                     "from idle, or enabled state\n", oh->name);
+                return -EINVAL;
+        }
+
+        pr_debug("omap_hwmod: %s: disabling\n", oh->name);
+
+        if (oh->sysconfig)
+                _sysc_shutdown(oh);
+        _del_initiator_dep(oh, mpu_oh);
+        /* XXX what about the other system initiators here? DMA, tesla, d2d */
+        _disable_clocks(oh);
+        /* XXX Should this code also force-disable the optional clocks? */
+
+        /* XXX mux any associated balls to safe mode */
+
+        oh->_state = _HWMOD_STATE_DISABLED;
+
+        return 0;
+}
+
+/**
+ * _write_clockact_lock - set the module's clockactivity bits
+ * @oh: struct omap_hwmod *
+ * @clockact: CLOCKACTIVITY field bits
+ *
+ * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
+ * OCP_SYSCONFIG register.  Returns -EINVAL if the hwmod is in the
+ * wrong state or returns 0.
+ */
+static int _write_clockact_lock(struct omap_hwmod *oh, u8 clockact)
+{
+        u32 v;
+
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        v = oh->_sysc_cache;
+        _set_clockactivity(oh, clockact, &v);
+        _write_sysconfig(v, oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+
+/**
+ * _setup - do initial configuration of omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
+ * OCP_SYSCONFIG register.  Must be called with omap_hwmod_mutex
+ * held.  Returns -EINVAL if the hwmod is in the wrong state or returns
+ * 0.
+ */
+static int _setup(struct omap_hwmod *oh)
+{
+        struct omap_hwmod_ocp_if *os;
+        int i;
+
+        if (!oh)
+                return -EINVAL;
+
+        /* Set iclk autoidle mode */
+        if (oh->slaves_cnt > 0) {
+                for (i = 0, os = *oh->slaves; i < oh->slaves_cnt; i++, os++) {
+                        struct clk *c = os->_clk;
+
+                        if (!c || IS_ERR(c))
+                                continue;
+
+                        if (os->flags & OCPIF_SWSUP_IDLE) {
+                                /* XXX omap_iclk_deny_idle(c); */
+                        } else {
+                                /* XXX omap_iclk_allow_idle(c); */
+                                clk_enable(c);
+                        }
+                }
+        }
+
+        oh->_state = _HWMOD_STATE_INITIALIZED;
+
+        _enable(oh);
+
+        if (!(oh->flags & HWMOD_INIT_NO_RESET))
+                _reset(oh);
+
+        /* XXX OCP AUTOIDLE bit? */
+        /* XXX OCP ENAWAKEUP bit? */
+
+        if (!(oh->flags & HWMOD_INIT_NO_IDLE))
+                _idle(oh);
+
+        return 0;
+}
+
+
+
+/* Public functions */
+
+u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs)
+{
+        return __raw_readl(oh->_rt_va + reg_offs);
+}
+
+void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs)
+{
+        __raw_writel(v, oh->_rt_va + reg_offs);
+}
+
+/**
+ * omap_hwmod_register - register a struct omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Registers the omap_hwmod @oh.  Returns -EEXIST if an omap_hwmod already
+ * has been registered by the same name; -EINVAL if the omap_hwmod is in the
+ * wrong state, or 0 on success.
+ *
+ * XXX The data should be copied into bootmem, so the original data
+ * should be marked __initdata and freed after init.  This would allow
+ * unneeded omap_hwmods to be freed on multi-OMAP configurations.  Note
+ * that the copy process would be relatively complex due to the large number
+ * of substructures.
+ */
+int omap_hwmod_register(struct omap_hwmod *oh)
+{
+        int ret, ms_id;
+
+        if (!oh || (oh->_state != _HWMOD_STATE_UNKNOWN))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+
+        pr_debug("omap_hwmod: %s: registering\n", oh->name);
+
+        if (_lookup(oh->name)) {
+                ret = -EEXIST;
+                goto ohr_unlock;
+        }
+
+        ms_id = _find_mpu_port_index(oh);
+        if (!IS_ERR_VALUE(ms_id)) {
+                oh->_mpu_port_index = ms_id;
+                oh->_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
+        } else {
+                oh->_int_flags |= _HWMOD_NO_MPU_PORT;
+        }
+
+        list_add_tail(&oh->node, &omap_hwmod_list);
+
+        oh->_state = _HWMOD_STATE_REGISTERED;
+
+        ret = 0;
+
+ohr_unlock:
+        mutex_unlock(&omap_hwmod_mutex);
+        return ret;
+}
+
+/**
+ * omap_hwmod_lookup - look up a registered omap_hwmod by name
+ * @name: name of the omap_hwmod to look up
+ *
+ * Given a @name of an omap_hwmod, return a pointer to the registered
+ * struct omap_hwmod *, or NULL upon error.
+ */
+struct omap_hwmod *omap_hwmod_lookup(const char *name)
+{
+        struct omap_hwmod *oh;
+
+        if (!name)
+                return NULL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        oh = _lookup(name);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return oh;
+}
+
+/**
+ * omap_hwmod_for_each - call function for each registered omap_hwmod
+ * @fn: pointer to a callback function
+ *
+ * Call @fn for each registered omap_hwmod, passing @data to each
+ * function.  @fn must return 0 for success or any other value for
+ * failure.  If @fn returns non-zero, the iteration across omap_hwmods
+ * will stop and the non-zero return value will be passed to the
+ * caller of omap_hwmod_for_each().  @fn is called with
+ * omap_hwmod_for_each() held.
+ */
+int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh))
+{
+        struct omap_hwmod *temp_oh;
+        int ret;
+
+        if (!fn)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
+                ret = (*fn)(temp_oh);
+                if (ret)
+                        break;
+        }
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return ret;
+}
+
+
+/**
+ * omap_hwmod_init - init omap_hwmod code and register hwmods
+ * @ohs: pointer to an array of omap_hwmods to register
+ *
+ * Intended to be called early in boot before the clock framework is
+ * initialized.  If @ohs is not null, will register all omap_hwmods
+ * listed in @ohs that are valid for this chip.  Returns -EINVAL if
+ * omap_hwmod_init() has already been called or 0 otherwise.
+ */
+int omap_hwmod_init(struct omap_hwmod **ohs)
+{
+        struct omap_hwmod *oh;
+        int r;
+
+        if (inited)
+                return -EINVAL;
+
+        inited = 1;
+
+        if (!ohs)
+                return 0;
+
+        oh = *ohs;
+        while (oh) {
+                if (omap_chip_is(oh->omap_chip)) {
+                        r = omap_hwmod_register(oh);
+                        WARN(r, "omap_hwmod: %s: omap_hwmod_register returned "
+                             "%d\n", oh->name, r);
+                }
+                oh = *++ohs;
+        }
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_late_init - do some post-clock framework initialization
+ *
+ * Must be called after omap2_clk_init().  Resolves the struct clk names
+ * to struct clk pointers for each registered omap_hwmod.  Also calls
+ * _setup() on each hwmod.  Returns 0.
+ */
+int omap_hwmod_late_init(void)
+{
+        int r;
+
+        /* XXX check return value */
+        r = omap_hwmod_for_each(_init_clocks);
+        WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
+
+        mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
+        WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
+             MPU_INITIATOR_NAME);
+
+        omap_hwmod_for_each(_setup);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_unregister - unregister an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Unregisters a previously-registered omap_hwmod @oh.  There's probably
+ * no use case for this, so it is likely to be removed in a later version.
+ *
+ * XXX Free all of the bootmem-allocated structures here when that is
+ * implemented.  Make it clear that core code is the only code that is
+ * expected to unregister modules.
+ */
+int omap_hwmod_unregister(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        pr_debug("omap_hwmod: %s: unregistering\n", oh->name);
+
+        mutex_lock(&omap_hwmod_mutex);
+        list_del(&oh->node);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_enable - enable an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Enable an omap_hwomd @oh.  Intended to be called by omap_device_enable().
+ * Returns -EINVAL on error or passes along the return value from _enable().
+ */
+int omap_hwmod_enable(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        r = _enable(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return r;
+}
+
+/**
+ * omap_hwmod_idle - idle an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Idle an omap_hwomd @oh.  Intended to be called by omap_device_idle().
+ * Returns -EINVAL on error or passes along the return value from _idle().
+ */
+int omap_hwmod_idle(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _idle(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_shutdown - shutdown an omap_hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Shutdown an omap_hwomd @oh.  Intended to be called by
+ * omap_device_shutdown().  Returns -EINVAL on error or passes along
+ * the return value from _shutdown().
+ */
+int omap_hwmod_shutdown(struct omap_hwmod *oh)
+{
+        if (!oh)
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _shutdown(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by the omap_device code.
+ */
+int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
+{
+        mutex_lock(&omap_hwmod_mutex);
+        _enable_clocks(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by the omap_device code.
+ */
+int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
+{
+        mutex_lock(&omap_hwmod_mutex);
+        _disable_clocks(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
+ * @oh: struct omap_hwmod *oh
+ *
+ * Intended to be called by drivers and core code when all posted
+ * writes to a device must complete before continuing further
+ * execution (for example, after clearing some device IRQSTATUS
+ * register bits)
+ *
+ * XXX what about targets with multiple OCP threads?
+ */
+void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
+{
+        BUG_ON(!oh);
+
+        if (!oh->sysconfig || !oh->sysconfig->sysc_flags) {
+                WARN(1, "omap_device: %s: OCP barrier impossible due to "
+                      "device configuration\n", oh->name);
+                return;
+        }
+
+        /*
+         * Forces posted writes to complete on the OCP thread handling
+         * register writes
+         */
+        omap_hwmod_readl(oh, oh->sysconfig->sysc_offs);
+}
+
+/**
+ * omap_hwmod_reset - reset the hwmod
+ * @oh: struct omap_hwmod *
+ *
+ * Under some conditions, a driver may wish to reset the entire device.
+ * Called from omap_device code.  Returns -EINVAL on error or passes along
+ * the return value from _reset()/_enable().
+ */
+int omap_hwmod_reset(struct omap_hwmod *oh)
+{
+        int r;
+
+        if (!oh || !(oh->_state & _HWMOD_STATE_ENABLED))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        r = _reset(oh);
+        if (!r)
+                r = _enable(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return r;
+}
+
+/**
+ * omap_hwmod_count_resources - count number of struct resources needed by hwmod
+ * @oh: struct omap_hwmod *
+ * @res: pointer to the first element of an array of struct resource to fill
+ *
+ * Count the number of struct resource array elements necessary to
+ * contain omap_hwmod @oh resources.  Intended to be called by code
+ * that registers omap_devices.  Intended to be used to determine the
+ * size of a dynamically-allocated struct resource array, before
+ * calling omap_hwmod_fill_resources().  Returns the number of struct
+ * resource array elements needed.
+ *
+ * XXX This code is not optimized.  It could attempt to merge adjacent
+ * resource IDs.
+ *
+ */
+int omap_hwmod_count_resources(struct omap_hwmod *oh)
+{
+        int ret, i;
+
+        ret = oh->mpu_irqs_cnt + oh->sdma_chs_cnt;
+
+        for (i = 0; i < oh->slaves_cnt; i++)
+                ret += (*oh->slaves + i)->addr_cnt;
+
+        return ret;
+}
+
+/**
+ * omap_hwmod_fill_resources - fill struct resource array with hwmod data
+ * @oh: struct omap_hwmod *
+ * @res: pointer to the first element of an array of struct resource to fill
+ *
+ * Fill the struct resource array @res with resource data from the
+ * omap_hwmod @oh.  Intended to be called by code that registers
+ * omap_devices.  See also omap_hwmod_count_resources().  Returns the
+ * number of array elements filled.
+ */
+int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
+{
+        int i, j;
+        int r = 0;
+
+        /* For each IRQ, DMA, memory area, fill in array.*/
+
+        for (i = 0; i < oh->mpu_irqs_cnt; i++) {
+                (res + r)->start = *(oh->mpu_irqs + i);
+                (res + r)->end = *(oh->mpu_irqs + i);
+                (res + r)->flags = IORESOURCE_IRQ;
+                r++;
+        }
+
+        for (i = 0; i < oh->sdma_chs_cnt; i++) {
+                (res + r)->name = (oh->sdma_chs + i)->name;
+                (res + r)->start = (oh->sdma_chs + i)->dma_ch;
+                (res + r)->end = (oh->sdma_chs + i)->dma_ch;
+                (res + r)->flags = IORESOURCE_DMA;
+                r++;
+        }
+
+        for (i = 0; i < oh->slaves_cnt; i++) {
+                struct omap_hwmod_ocp_if *os;
+
+                os = *oh->slaves + i;
+
+                for (j = 0; j < os->addr_cnt; j++) {
+                        (res + r)->start = (os->addr + j)->pa_start;
+                        (res + r)->end = (os->addr + j)->pa_end;
+                        (res + r)->flags = IORESOURCE_MEM;
+                        r++;
+                }
+        }
+
+        return r;
+}
+
+/**
+ * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
+ * @oh: struct omap_hwmod *
+ *
+ * Return the powerdomain pointer associated with the OMAP module
+ * @oh's main clock.  If @oh does not have a main clk, return the
+ * powerdomain associated with the interface clock associated with the
+ * module's MPU port. (XXX Perhaps this should use the SDMA port
+ * instead?)  Returns NULL on error, or a struct powerdomain * on
+ * success.
+ */
+struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
+{
+        struct clk *c;
+
+        if (!oh)
+                return NULL;
+
+        if (oh->_clk) {
+                c = oh->_clk;
+        } else {
+                if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
+                        return NULL;
+                c = oh->slaves[oh->_mpu_port_index]->_clk;
+        }
+
+        return c->clkdm->pwrdm.ptr;
+
+}
+
+/**
+ * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
+ * @oh: struct omap_hwmod *
+ * @init_oh: struct omap_hwmod * (initiator)
+ *
+ * Add a sleep dependency between the initiator @init_oh and @oh.
+ * Intended to be called by DSP/Bridge code via platform_data for the
+ * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
+ * code needs to add/del initiator dependencies dynamically
+ * before/after accessing a device.  Returns the return value from
+ * _add_initiator_dep().
+ *
+ * XXX Keep a usecount in the clockdomain code
+ */
+int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh)
+{
+        return _add_initiator_dep(oh, init_oh);
+}
+
+/*
+ * XXX what about functions for drivers to save/restore ocp_sysconfig
+ * for context save/restore operations?
+ */
+
+/**
+ * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
+ * @oh: struct omap_hwmod *
+ * @init_oh: struct omap_hwmod * (initiator)
+ *
+ * Remove a sleep dependency between the initiator @init_oh and @oh.
+ * Intended to be called by DSP/Bridge code via platform_data for the
+ * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
+ * code needs to add/del initiator dependencies dynamically
+ * before/after accessing a device.  Returns the return value from
+ * _del_initiator_dep().
+ *
+ * XXX Keep a usecount in the clockdomain code
+ */
+int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh)
+{
+        return _del_initiator_dep(oh, init_oh);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to BOTH
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_both(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_BOTH);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to MAIN
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_main(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_MAIN);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to ICLK
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_ICLK);
+}
+
+/**
+ * omap_hwmod_set_clockact_none - set clockactivity test to NONE
+ * @oh: struct omap_hwmod *
+ *
+ * On some modules, this function can affect the wakeup latency vs.
+ * power consumption balance.  Intended to be called by the
+ * omap_device layer.  Passes along the return value from
+ * _write_clockact_lock().
+ */
+int omap_hwmod_set_clockact_none(struct omap_hwmod *oh)
+{
+        return _write_clockact_lock(oh, CLOCKACT_TEST_NONE);
+}
+
+/**
+ * omap_hwmod_enable_wakeup - allow device to wake up the system
+ * @oh: struct omap_hwmod *
+ *
+ * Sets the module OCP socket ENAWAKEUP bit to allow the module to
+ * send wakeups to the PRCM.  Eventually this should sets PRCM wakeup
+ * registers to cause the PRCM to receive wakeup events from the
+ * module.  Does not set any wakeup routing registers beyond this
+ * point - if the module is to wake up any other module or subsystem,
+ * that must be set separately.  Called by omap_device code.  Returns
+ * -EINVAL on error or 0 upon success.
+ */
+int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _enable_wakeup(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
+
+/**
+ * omap_hwmod_disable_wakeup - prevent device from waking the system
+ * @oh: struct omap_hwmod *
+ *
+ * Clears the module OCP socket ENAWAKEUP bit to prevent the module
+ * from sending wakeups to the PRCM.  Eventually this should clear
+ * PRCM wakeup registers to cause the PRCM to ignore wakeup events
+ * from the module.  Does not set any wakeup routing registers beyond
+ * this point - if the module is to wake up any other module or
+ * subsystem, that must be set separately.  Called by omap_device
+ * code.  Returns -EINVAL on error or 0 upon success.
+ */
+int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
+{
+        if (!oh->sysconfig ||
+            !(oh->sysconfig->sysc_flags & SYSC_HAS_ENAWAKEUP))
+                return -EINVAL;
+
+        mutex_lock(&omap_hwmod_mutex);
+        _disable_wakeup(oh);
+        mutex_unlock(&omap_hwmod_mutex);
+
+        return 0;
+}
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420.h b/arch/arm/mach-omap2/omap_hwmod_2420.h
new file mode 100644
index 000000000000..767e4965ac4e
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2420.h
@@ -0,0 +1,141 @@
+/*
+ * omap_hwmod_2420.h - hardware modules present on the OMAP2420 chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2420_H
+
+#ifdef CONFIG_ARCH_OMAP2420
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-24xx.h"
+
+static struct omap_hwmod omap2420_mpu_hwmod;
+static struct omap_hwmod omap2420_l3_hwmod;
+static struct omap_hwmod omap2420_l4_core_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap2420_l3__l4_core = {
+        .master = &omap2420_l3_hwmod,
+        .slave  = &omap2420_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap2420_mpu__l3 = {
+        .master = &omap2420_mpu_hwmod,
+        .slave  = &omap2420_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l3_slaves[] = {
+        &omap2420_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l3_masters[] = {
+        &omap2420_l3__l4_core,
+};
+
+/* L3 */
+static struct omap_hwmod omap2420_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap2420_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l3_masters),
+        .slaves         = omap2420_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+static struct omap_hwmod omap2420_l4_wkup_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = {
+        .master = &omap2420_l4_core_hwmod,
+        .slave  = &omap2420_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_core_slaves[] = {
+        &omap2420_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_core_masters[] = {
+        &omap2420_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap2420_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap2420_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l4_core_masters),
+        .slaves         = omap2420_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_wkup_slaves[] = {
+        &omap2420_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2420_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap2420_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap2420_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_l4_wkup_masters),
+        .slaves         = omap2420_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2420_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap2420_mpu_masters[] = {
+        &omap2420_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap2420_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "mpu_ck",
+        .masters        = omap2420_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2420_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2420),
+};
+
+static __initdata struct omap_hwmod *omap2420_hwmods[] = {
+        &omap2420_l3_hwmod,
+        &omap2420_l4_core_hwmod,
+        &omap2420_l4_wkup_hwmod,
+        &omap2420_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap2420_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_2430.h b/arch/arm/mach-omap2/omap_hwmod_2430.h
new file mode 100644
index 000000000000..a412be6420ec
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_2430.h
@@ -0,0 +1,143 @@
+/*
+ * omap_hwmod_2430.h - hardware modules present on the OMAP2430 chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * XXX handle crossbar/shared link difference for L3?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD2430_H
+
+#ifdef CONFIG_ARCH_OMAP2430
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-24xx.h"
+
+static struct omap_hwmod omap2430_mpu_hwmod;
+static struct omap_hwmod omap2430_l3_hwmod;
+static struct omap_hwmod omap2430_l4_core_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap2430_l3__l4_core = {
+        .master = &omap2430_l3_hwmod,
+        .slave  = &omap2430_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap2430_mpu__l3 = {
+        .master = &omap2430_mpu_hwmod,
+        .slave  = &omap2430_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l3_slaves[] = {
+        &omap2430_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l3_masters[] = {
+        &omap2430_l3__l4_core,
+};
+
+/* L3 */
+static struct omap_hwmod omap2430_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap2430_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l3_masters),
+        .slaves         = omap2430_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+static struct omap_hwmod omap2430_l4_wkup_hwmod;
+static struct omap_hwmod omap2430_mmc1_hwmod;
+static struct omap_hwmod omap2430_mmc2_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = {
+        .master = &omap2430_l4_core_hwmod,
+        .slave  = &omap2430_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
+        &omap2430_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = {
+        &omap2430_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap2430_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap2430_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l4_core_masters),
+        .slaves         = omap2430_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = {
+        &omap2430_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap2430_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap2430_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_l4_wkup_masters),
+        .slaves         = omap2430_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap2430_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = {
+        &omap2430_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap2430_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "mpu_ck",
+        .masters        = omap2430_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap2430_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
+};
+
+static __initdata struct omap_hwmod *omap2430_hwmods[] = {
+        &omap2430_l3_hwmod,
+        &omap2430_l4_core_hwmod,
+        &omap2430_l4_wkup_hwmod,
+        &omap2430_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap2430_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/omap_hwmod_34xx.h b/arch/arm/mach-omap2/omap_hwmod_34xx.h
new file mode 100644
index 000000000000..1e069f831575
--- /dev/null
+++ b/arch/arm/mach-omap2/omap_hwmod_34xx.h
@@ -0,0 +1,168 @@
+/*
+ * omap_hwmod_34xx.h - hardware modules present on the OMAP34xx chips
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD34XX_H
+
+#ifdef CONFIG_ARCH_OMAP34XX
+
+#include <mach/omap_hwmod.h>
+#include <mach/irqs.h>
+#include <mach/cpu.h>
+#include <mach/dma.h>
+
+#include "prm-regbits-34xx.h"
+
+static struct omap_hwmod omap34xx_mpu_hwmod;
+static struct omap_hwmod omap34xx_l3_hwmod;
+static struct omap_hwmod omap34xx_l4_core_hwmod;
+static struct omap_hwmod omap34xx_l4_per_hwmod;
+
+/* L3 -> L4_CORE interface */
+static struct omap_hwmod_ocp_if omap34xx_l3__l4_core = {
+        .master = &omap34xx_l3_hwmod,
+        .slave  = &omap34xx_l4_core_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* L3 -> L4_PER interface */
+static struct omap_hwmod_ocp_if omap34xx_l3__l4_per = {
+        .master = &omap34xx_l3_hwmod,
+        .slave  = &omap34xx_l4_per_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* MPU -> L3 interface */
+static struct omap_hwmod_ocp_if omap34xx_mpu__l3 = {
+        .master = &omap34xx_mpu_hwmod,
+        .slave  = &omap34xx_l3_hwmod,
+        .user   = OCP_USER_MPU,
+};
+
+/* Slave interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l3_slaves[] = {
+        &omap34xx_mpu__l3,
+};
+
+/* Master interfaces on the L3 interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l3_masters[] = {
+        &omap34xx_l3__l4_core,
+        &omap34xx_l3__l4_per,
+};
+
+/* L3 */
+static struct omap_hwmod omap34xx_l3_hwmod = {
+        .name           = "l3_hwmod",
+        .masters        = omap34xx_l3_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l3_masters),
+        .slaves         = omap34xx_l3_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l3_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+static struct omap_hwmod omap34xx_l4_wkup_hwmod;
+
+/* L4_CORE -> L4_WKUP interface */
+static struct omap_hwmod_ocp_if omap34xx_l4_core__l4_wkup = {
+        .master = &omap34xx_l4_core_hwmod,
+        .slave  = &omap34xx_l4_wkup_hwmod,
+        .user   = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
+/* Slave interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_core_slaves[] = {
+        &omap34xx_l3__l4_core,
+};
+
+/* Master interfaces on the L4_CORE interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_core_masters[] = {
+        &omap34xx_l4_core__l4_wkup,
+};
+
+/* L4 CORE */
+static struct omap_hwmod omap34xx_l4_core_hwmod = {
+        .name           = "l4_core_hwmod",
+        .masters        = omap34xx_l4_core_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_core_masters),
+        .slaves         = omap34xx_l4_core_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_core_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Slave interfaces on the L4_PER interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_per_slaves[] = {
+        &omap34xx_l3__l4_per,
+};
+
+/* Master interfaces on the L4_PER interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_per_masters[] = {
+};
+
+/* L4 PER */
+static struct omap_hwmod omap34xx_l4_per_hwmod = {
+        .name           = "l4_per_hwmod",
+        .masters        = omap34xx_l4_per_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_per_masters),
+        .slaves         = omap34xx_l4_per_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_per_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Slave interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_slaves[] = {
+        &omap34xx_l4_core__l4_wkup,
+};
+
+/* Master interfaces on the L4_WKUP interconnect */
+static struct omap_hwmod_ocp_if *omap34xx_l4_wkup_masters[] = {
+};
+
+/* L4 WKUP */
+static struct omap_hwmod omap34xx_l4_wkup_hwmod = {
+        .name           = "l4_wkup_hwmod",
+        .masters        = omap34xx_l4_wkup_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_l4_wkup_masters),
+        .slaves         = omap34xx_l4_wkup_slaves,
+        .slaves_cnt     = ARRAY_SIZE(omap34xx_l4_wkup_slaves),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
+};
+
+/* Master interfaces on the MPU device */
+static struct omap_hwmod_ocp_if *omap34xx_mpu_masters[] = {
+        &omap34xx_mpu__l3,
+};
+
+/* MPU */
+static struct omap_hwmod omap34xx_mpu_hwmod = {
+        .name           = "mpu_hwmod",
+        .clkdev_dev_id  = NULL,
+        .clkdev_con_id  = "arm_fck",
+        .masters        = omap34xx_mpu_masters,
+        .masters_cnt    = ARRAY_SIZE(omap34xx_mpu_masters),
+        .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
+};
+
+static __initdata struct omap_hwmod *omap34xx_hwmods[] = {
+        &omap34xx_l3_hwmod,
+        &omap34xx_l4_core_hwmod,
+        &omap34xx_l4_per_hwmod,
+        &omap34xx_l4_wkup_hwmod,
+        &omap34xx_mpu_hwmod,
+        NULL,
+};
+
+#else
+# define omap34xx_hwmods                0
+#endif
+
+#endif
+
+
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 6cc375a275be..1b4c1600f8d8 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -20,13 +20,16 @@
  */
 
 #include <linux/kernel.h>
-#include <linux/timer.h>
+#include <linux/sched.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/module.h>
 
 #include <mach/clock.h>
 #include <mach/board.h>
+#include <mach/powerdomain.h>
+#include <mach/clockdomain.h>
 
 #include "prm.h"
 #include "cm.h"
@@ -48,7 +51,9 @@ int omap2_pm_debug;
         regs[reg_count++].val = __raw_readl(reg)
 #define DUMP_INTC_REG(reg, off) \
         regs[reg_count].name = #reg; \
-        regs[reg_count++].val = __raw_readl(IO_ADDRESS(0x480fe000 + (off)))
+        regs[reg_count++].val = __raw_readl(OMAP2_IO_ADDRESS(0x480fe000 + (off)))
+
+static int __init pm_dbg_init(void);
 
 void omap2_pm_dump(int mode, int resume, unsigned int us)
 {
@@ -150,3 +155,425 @@ void omap2_pm_dump(int mode, int resume, unsigned int us)
         for (i = 0; i < reg_count; i++)
                 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val);
 }
+
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+
+static void pm_dbg_regset_store(u32 *ptr);
+
+struct dentry *pm_dbg_dir;
+
+static int pm_dbg_init_done;
+
+enum {
+        DEBUG_FILE_COUNTERS = 0,
+        DEBUG_FILE_TIMERS,
+};
+
+struct pm_module_def {
+        char name[8]; /* Name of the module */
+        short type; /* CM or PRM */
+        unsigned short offset;
+        int low; /* First register address on this module */
+        int high; /* Last register address on this module */
+};
+
+#define MOD_CM 0
+#define MOD_PRM 1
+
+static const struct pm_module_def *pm_dbg_reg_modules;
+static const struct pm_module_def omap3_pm_reg_modules[] = {
+        { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c },
+        { "OCP", MOD_CM, OCP_MOD, 0, 0x10 },
+        { "MPU", MOD_CM, MPU_MOD, 4, 0x4c },
+        { "CORE", MOD_CM, CORE_MOD, 0, 0x4c },
+        { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c },
+        { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 },
+        { "CCR", MOD_CM, PLL_MOD, 0, 0x70 },
+        { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c },
+        { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c },
+        { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c },
+        { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 },
+        { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 },
+        { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c },
+
+        { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc },
+        { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c },
+        { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 },
+        { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 },
+        { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 },
+        { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 },
+        { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 },
+        { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 },
+        { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 },
+        { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 },
+        { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 },
+        { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 },
+        { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 },
+        { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 },
+        { "", 0, 0, 0, 0 },
+};
+
+#define PM_DBG_MAX_REG_SETS 4
+
+static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS];
+
+static int pm_dbg_get_regset_size(void)
+{
+        static int regset_size;
+
+        if (regset_size == 0) {
+                int i = 0;
+
+                while (pm_dbg_reg_modules[i].name[0] != 0) {
+                        regset_size += pm_dbg_reg_modules[i].high +
+                                4 - pm_dbg_reg_modules[i].low;
+                        i++;
+                }
+        }
+        return regset_size;
+}
+
+static int pm_dbg_show_regs(struct seq_file *s, void *unused)
+{
+        int i, j;
+        unsigned long val;
+        int reg_set = (int)s->private;
+        u32 *ptr;
+        void *store = NULL;
+        int regs;
+        int linefeed;
+
+        if (reg_set == 0) {
+                store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
+                ptr = store;
+                pm_dbg_regset_store(ptr);
+        } else {
+                ptr = pm_dbg_reg_set[reg_set - 1];
+        }
+
+        i = 0;
+
+        while (pm_dbg_reg_modules[i].name[0] != 0) {
+                regs = 0;
+                linefeed = 0;
+                if (pm_dbg_reg_modules[i].type == MOD_CM)
+                        seq_printf(s, "MOD: CM_%s (%08x)\n",
+                                pm_dbg_reg_modules[i].name,
+                                (u32)(OMAP3430_CM_BASE +
+                                pm_dbg_reg_modules[i].offset));
+                else
+                        seq_printf(s, "MOD: PRM_%s (%08x)\n",
+                                pm_dbg_reg_modules[i].name,
+                                (u32)(OMAP3430_PRM_BASE +
+                                pm_dbg_reg_modules[i].offset));
+
+                for (j = pm_dbg_reg_modules[i].low;
+                        j <= pm_dbg_reg_modules[i].high; j += 4) {
+                        val = *(ptr++);
+                        if (val != 0) {
+                                regs++;
+                                if (linefeed) {
+                                        seq_printf(s, "\n");
+                                        linefeed = 0;
+                                }
+                                seq_printf(s, "  %02x => %08lx", j, val);
+                                if (regs % 4 == 0)
+                                        linefeed = 1;
+                        }
+                }
+                seq_printf(s, "\n");
+                i++;
+        }
+
+        if (store != NULL)
+                kfree(store);
+
+        return 0;
+}
+
+static void pm_dbg_regset_store(u32 *ptr)
+{
+        int i, j;
+        u32 val;
+
+        i = 0;
+
+        while (pm_dbg_reg_modules[i].name[0] != 0) {
+                for (j = pm_dbg_reg_modules[i].low;
+                        j <= pm_dbg_reg_modules[i].high; j += 4) {
+                        if (pm_dbg_reg_modules[i].type == MOD_CM)
+                                val = cm_read_mod_reg(
+                                        pm_dbg_reg_modules[i].offset, j);
+                        else
+                                val = prm_read_mod_reg(
+                                        pm_dbg_reg_modules[i].offset, j);
+                        *(ptr++) = val;
+                }
+                i++;
+        }
+}
+
+int pm_dbg_regset_save(int reg_set)
+{
+        if (pm_dbg_reg_set[reg_set-1] == NULL)
+                return -EINVAL;
+
+        pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]);
+
+        return 0;
+}
+
+static const char pwrdm_state_names[][4] = {
+        "OFF",
+        "RET",
+        "INA",
+        "ON"
+};
+
+void pm_dbg_update_time(struct powerdomain *pwrdm, int prev)
+{
+        s64 t;
+
+        if (!pm_dbg_init_done)
+                return ;
+
+        /* Update timer for previous state */
+        t = sched_clock();
+
+        pwrdm->state_timer[prev] += t - pwrdm->timer;
+
+        pwrdm->timer = t;
+}
+
+static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+
+        if (strcmp(clkdm->name, "emu_clkdm") == 0 ||
+                strcmp(clkdm->name, "wkup_clkdm") == 0 ||
+                strncmp(clkdm->name, "dpll", 4) == 0)
+                return 0;
+
+        seq_printf(s, "%s->%s (%d)", clkdm->name,
+                        clkdm->pwrdm.ptr->name,
+                        atomic_read(&clkdm->usecount));
+        seq_printf(s, "\n");
+
+        return 0;
+}
+
+static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+        int i;
+
+        if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
+                strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
+                strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        if (pwrdm->state != pwrdm_read_pwrst(pwrdm))
+                printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n",
+                        pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm));
+
+        seq_printf(s, "%s (%s)", pwrdm->name,
+                        pwrdm_state_names[pwrdm->state]);
+        for (i = 0; i < 4; i++)
+                seq_printf(s, ",%s:%d", pwrdm_state_names[i],
+                        pwrdm->state_counter[i]);
+
+        seq_printf(s, "\n");
+
+        return 0;
+}
+
+static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
+{
+        struct seq_file *s = (struct seq_file *)user;
+        int i;
+
+        if (strcmp(pwrdm->name, "emu_pwrdm") == 0 ||
+                strcmp(pwrdm->name, "wkup_pwrdm") == 0 ||
+                strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        pwrdm_state_switch(pwrdm);
+
+        seq_printf(s, "%s (%s)", pwrdm->name,
+                pwrdm_state_names[pwrdm->state]);
+
+        for (i = 0; i < 4; i++)
+                seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
+                        pwrdm->state_timer[i]);
+
+        seq_printf(s, "\n");
+        return 0;
+}
+
+static int pm_dbg_show_counters(struct seq_file *s, void *unused)
+{
+        pwrdm_for_each(pwrdm_dbg_show_counter, s);
+        clkdm_for_each(clkdm_dbg_show_counter, s);
+
+        return 0;
+}
+
+static int pm_dbg_show_timers(struct seq_file *s, void *unused)
+{
+        pwrdm_for_each(pwrdm_dbg_show_timer, s);
+        return 0;
+}
+
+static int pm_dbg_open(struct inode *inode, struct file *file)
+{
+        switch ((int)inode->i_private) {
+        case DEBUG_FILE_COUNTERS:
+                return single_open(file, pm_dbg_show_counters,
+                        &inode->i_private);
+        case DEBUG_FILE_TIMERS:
+        default:
+                return single_open(file, pm_dbg_show_timers,
+                        &inode->i_private);
+        };
+}
+
+static int pm_dbg_reg_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, pm_dbg_show_regs, inode->i_private);
+}
+
+static const struct file_operations debug_fops = {
+        .open           = pm_dbg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static const struct file_operations debug_reg_fops = {
+        .open           = pm_dbg_reg_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+int pm_dbg_regset_init(int reg_set)
+{
+        char name[2];
+
+        if (!pm_dbg_init_done)
+                pm_dbg_init();
+
+        if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS ||
+                pm_dbg_reg_set[reg_set-1] != NULL)
+                return -EINVAL;
+
+        pm_dbg_reg_set[reg_set-1] =
+                kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL);
+
+        if (pm_dbg_reg_set[reg_set-1] == NULL)
+                return -ENOMEM;
+
+        if (pm_dbg_dir != NULL) {
+                sprintf(name, "%d", reg_set);
+
+                (void) debugfs_create_file(name, S_IRUGO,
+                        pm_dbg_dir, (void *)reg_set, &debug_reg_fops);
+        }
+
+        return 0;
+}
+
+static int pwrdm_suspend_get(void *data, u64 *val)
+{
+        *val = omap3_pm_get_suspend_state((struct powerdomain *)data);
+
+        if (*val >= 0)
+                return 0;
+        return *val;
+}
+
+static int pwrdm_suspend_set(void *data, u64 val)
+{
+        return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val);
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get,
+                        pwrdm_suspend_set, "%llu\n");
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir)
+{
+        int i;
+        s64 t;
+        struct dentry *d;
+
+        t = sched_clock();
+
+        for (i = 0; i < 4; i++)
+                pwrdm->state_timer[i] = 0;
+
+        pwrdm->timer = t;
+
+        if (strncmp(pwrdm->name, "dpll", 4) == 0)
+                return 0;
+
+        d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir);
+
+        (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d,
+                        (void *)pwrdm, &pwrdm_suspend_fops);
+
+        return 0;
+}
+
+static int __init pm_dbg_init(void)
+{
+        int i;
+        struct dentry *d;
+        char name[2];
+
+        if (pm_dbg_init_done)
+                return 0;
+
+        if (cpu_is_omap34xx())
+                pm_dbg_reg_modules = omap3_pm_reg_modules;
+        else {
+                printk(KERN_ERR "%s: only OMAP3 supported\n", __func__);
+                return -ENODEV;
+        }
+                
+        d = debugfs_create_dir("pm_debug", NULL);
+        if (IS_ERR(d))
+                return PTR_ERR(d);
+
+        (void) debugfs_create_file("count", S_IRUGO,
+                d, (void *)DEBUG_FILE_COUNTERS, &debug_fops);
+        (void) debugfs_create_file("time", S_IRUGO,
+                d, (void *)DEBUG_FILE_TIMERS, &debug_fops);
+
+        pwrdm_for_each(pwrdms_setup, (void *)d);
+
+        pm_dbg_dir = debugfs_create_dir("registers", d);
+        if (IS_ERR(pm_dbg_dir))
+                return PTR_ERR(pm_dbg_dir);
+
+        (void) debugfs_create_file("current", S_IRUGO,
+                pm_dbg_dir, (void *)0, &debug_reg_fops);
+
+        for (i = 0; i < PM_DBG_MAX_REG_SETS; i++)
+                if (pm_dbg_reg_set[i] != NULL) {
+                        sprintf(name, "%d", i+1);
+                        (void) debugfs_create_file(name, S_IRUGO,
+                                pm_dbg_dir, (void *)(i+1), &debug_reg_fops);
+
+                }
+
+        pm_dbg_init_done = 1;
+
+        return 0;
+}
+arch_initcall(pm_dbg_init);
+
+#else
+void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) {}
+#endif
diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h
index 21201cd4117b..8400f5768923 100644
--- a/arch/arm/mach-omap2/pm.h
+++ b/arch/arm/mach-omap2/pm.h
@@ -11,12 +11,23 @@
 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
 #define __ARCH_ARM_MACH_OMAP2_PM_H
 
+#include <mach/powerdomain.h>
+
+extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
+extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
+
 #ifdef CONFIG_PM_DEBUG
 extern void omap2_pm_dump(int mode, int resume, unsigned int us);
 extern int omap2_pm_debug;
+extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
+extern int pm_dbg_regset_save(int reg_set);
+extern int pm_dbg_regset_init(int reg_set);
 #else
 #define omap2_pm_dump(mode, resume, us)         do {} while (0);
 #define omap2_pm_debug                          0
+#define pm_dbg_update_time(pwrdm, prev) do {} while (0);
+#define pm_dbg_regset_save(reg_set) do {} while (0);
+#define pm_dbg_regset_init(reg_set) do {} while (0);
 #endif /* CONFIG_PM_DEBUG */
 
 extern void omap24xx_idle_loop_suspend(void);
diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c
index 528dbdc26e23..bff5c4e89742 100644
--- a/arch/arm/mach-omap2/pm24xx.c
+++ b/arch/arm/mach-omap2/pm24xx.c
@@ -333,7 +333,7 @@ static struct platform_suspend_ops omap_pm_ops = {
         .valid          = suspend_valid_only_mem,
 };
 
-static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm)
+static int _pm_clkdm_enable_hwsup(struct clockdomain *clkdm, void *unused)
 {
         omap2_clkdm_allow_idle(clkdm);
         return 0;
@@ -385,7 +385,7 @@ static void __init prcm_setup_regs(void)
         omap2_clkdm_sleep(gfx_clkdm);
 
         /* Enable clockdomain hardware-supervised control for all clkdms */
-        clkdm_for_each(_pm_clkdm_enable_hwsup);
+        clkdm_for_each(_pm_clkdm_enable_hwsup, NULL);
 
         /* Enable clock autoidle for all domains */
         cm_write_mod_reg(OMAP24XX_AUTO_CAM |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c
index 488d595d8e4b..0ff5a6c53aa0 100644
--- a/arch/arm/mach-omap2/pm34xx.c
+++ b/arch/arm/mach-omap2/pm34xx.c
@@ -170,6 +170,8 @@ static void omap_sram_idle(void)
                 printk(KERN_ERR "Invalid mpu state in sram_idle\n");
                 return;
         }
+        pwrdm_pre_transition();
+
         omap2_gpio_prepare_for_retention();
         omap_uart_prepare_idle(0);
         omap_uart_prepare_idle(1);
@@ -182,6 +184,9 @@ static void omap_sram_idle(void)
         omap_uart_resume_idle(1);
         omap_uart_resume_idle(0);
         omap2_gpio_resume_after_retention();
+
+        pwrdm_post_transition();
+
 }
 
 /*
@@ -271,6 +276,7 @@ static int set_pwrdm_state(struct powerdomain *pwrdm, u32 state)
         if (sleep_switch) {
                 omap2_clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
                 pwrdm_wait_transition(pwrdm);
+                pwrdm_state_switch(pwrdm);
         }
 
 err:
@@ -658,14 +664,38 @@ static void __init prcm_setup_regs(void)
         omap3_d2d_idle();
 }
 
-static int __init pwrdms_setup(struct powerdomain *pwrdm)
+int omap3_pm_get_suspend_state(struct powerdomain *pwrdm)
+{
+        struct power_state *pwrst;
+
+        list_for_each_entry(pwrst, &pwrst_list, node) {
+                if (pwrst->pwrdm == pwrdm)
+                        return pwrst->next_state;
+        }
+        return -EINVAL;
+}
+
+int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state)
+{
+        struct power_state *pwrst;
+
+        list_for_each_entry(pwrst, &pwrst_list, node) {
+                if (pwrst->pwrdm == pwrdm) {
+                        pwrst->next_state = state;
+                        return 0;
+                }
+        }
+        return -EINVAL;
+}
+
+static int __init pwrdms_setup(struct powerdomain *pwrdm, void *unused)
 {
         struct power_state *pwrst;
 
         if (!pwrdm->pwrsts)
                 return 0;
 
-        pwrst = kmalloc(sizeof(struct power_state), GFP_KERNEL);
+        pwrst = kmalloc(sizeof(struct power_state), GFP_ATOMIC);
         if (!pwrst)
                 return -ENOMEM;
         pwrst->pwrdm = pwrdm;
@@ -683,7 +713,7 @@ static int __init pwrdms_setup(struct powerdomain *pwrdm)
  * supported. Initiate sleep transition for other clockdomains, if
  * they are not used
  */
-static int __init clkdms_setup(struct clockdomain *clkdm)
+static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
 {
         if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
                 omap2_clkdm_allow_idle(clkdm);
@@ -716,13 +746,13 @@ static int __init omap3_pm_init(void)
                 goto err1;
         }
 
-        ret = pwrdm_for_each(pwrdms_setup);
+        ret = pwrdm_for_each(pwrdms_setup, NULL);
         if (ret) {
                 printk(KERN_ERR "Failed to setup powerdomains\n");
                 goto err2;
         }
 
-        (void) clkdm_for_each(clkdms_setup);
+        (void) clkdm_for_each(clkdms_setup, NULL);
 
         mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
         if (mpu_pwrdm == NULL) {
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c
index 983f1cb676be..2594cbff3947 100644
--- a/arch/arm/mach-omap2/powerdomain.c
+++ b/arch/arm/mach-omap2/powerdomain.c
@@ -35,6 +35,13 @@
 #include <mach/powerdomain.h>
 #include <mach/clockdomain.h>
 
+#include "pm.h"
+
+enum {
+        PWRDM_STATE_NOW = 0,
+        PWRDM_STATE_PREV,
+};
+
 /* pwrdm_list contains all registered struct powerdomains */
 static LIST_HEAD(pwrdm_list);
 
@@ -83,7 +90,7 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
         if (!pwrdm || !deps || !omap_chip_is(pwrdm->omap_chip))
                 return ERR_PTR(-EINVAL);
 
-        for (pd = deps; pd; pd++) {
+        for (pd = deps; pd->pwrdm_name; pd++) {
 
                 if (!omap_chip_is(pd->omap_chip))
                         continue;
@@ -96,12 +103,71 @@ static struct powerdomain *_pwrdm_deps_lookup(struct powerdomain *pwrdm,
 
         }
 
-        if (!pd)
+        if (!pd->pwrdm_name)
                 return ERR_PTR(-ENOENT);
 
         return pd->pwrdm;
 }
 
+static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
+{
+
+        int prev;
+        int state;
+
+        if (pwrdm == NULL)
+                return -EINVAL;
+
+        state = pwrdm_read_pwrst(pwrdm);
+
+        switch (flag) {
+        case PWRDM_STATE_NOW:
+                prev = pwrdm->state;
+                break;
+        case PWRDM_STATE_PREV:
+                prev = pwrdm_read_prev_pwrst(pwrdm);
+                if (pwrdm->state != prev)
+                        pwrdm->state_counter[prev]++;
+                break;
+        default:
+                return -EINVAL;
+        }
+
+        if (state != prev)
+                pwrdm->state_counter[state]++;
+
+        pm_dbg_update_time(pwrdm, prev);
+
+        pwrdm->state = state;
+
+        return 0;
+}
+
+static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
+{
+        pwrdm_clear_all_prev_pwrst(pwrdm);
+        _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+        return 0;
+}
+
+static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
+{
+        _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
+        return 0;
+}
+
+static __init void _pwrdm_setup(struct powerdomain *pwrdm)
+{
+        int i;
+
+        for (i = 0; i < 4; i++)
+                pwrdm->state_counter[i] = 0;
+
+        pwrdm_wait_transition(pwrdm);
+        pwrdm->state = pwrdm_read_pwrst(pwrdm);
+        pwrdm->state_counter[pwrdm->state] = 1;
+
+}
 
 /* Public functions */
 
@@ -117,9 +183,12 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
 {
         struct powerdomain **p = NULL;
 
-        if (pwrdm_list)
-                for (p = pwrdm_list; *p; p++)
+        if (pwrdm_list) {
+                for (p = pwrdm_list; *p; p++) {
                         pwrdm_register(*p);
+                        _pwrdm_setup(*p);
+                }
+        }
 }
 
 /**
@@ -217,7 +286,8 @@ struct powerdomain *pwrdm_lookup(const char *name)
  * anything else to indicate failure; or -EINVAL if the function
  * pointer is null.
  */
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+                        void *user)
 {
         struct powerdomain *temp_pwrdm;
         unsigned long flags;
@@ -228,7 +298,7 @@ int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm))
 
         read_lock_irqsave(&pwrdm_rwlock, flags);
         list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
-                ret = (*fn)(temp_pwrdm);
+                ret = (*fn)(temp_pwrdm, user);
                 if (ret)
                         break;
         }
@@ -1110,4 +1180,36 @@ int pwrdm_wait_transition(struct powerdomain *pwrdm)
         return 0;
 }
 
+int pwrdm_state_switch(struct powerdomain *pwrdm)
+{
+        return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
+}
+
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
+{
+        if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
+                pwrdm_wait_transition(clkdm->pwrdm.ptr);
+                return pwrdm_state_switch(clkdm->pwrdm.ptr);
+        }
+
+        return -EINVAL;
+}
+int pwrdm_clk_state_switch(struct clk *clk)
+{
+        if (clk != NULL && clk->clkdm != NULL)
+                return pwrdm_clkdm_state_switch(clk->clkdm);
+        return -EINVAL;
+}
+
+int pwrdm_pre_transition(void)
+{
+        pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
+        return 0;
+}
+
+int pwrdm_post_transition(void)
+{
+        pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
+        return 0;
+}
 
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 9937e2814696..03c467c35f54 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -17,11 +17,11 @@
 #include "prcm-common.h"
 
 #define OMAP2420_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2420_PRM_BASE + (module) + (reg))
 #define OMAP2430_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP2430_PRM_BASE + (module) + (reg))
 #define OMAP34XX_PRM_REGADDR(module, reg)                               \
-                        IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
+                        OMAP2_IO_ADDRESS(OMAP3430_PRM_BASE + (module) + (reg))
 
 /*
  * Architecture-specific global PRM registers
diff --git a/arch/arm/mach-omap2/sdrc.h b/arch/arm/mach-omap2/sdrc.h
index 1a8bbd094066..0837eda5f2b6 100644
--- a/arch/arm/mach-omap2/sdrc.h
+++ b/arch/arm/mach-omap2/sdrc.h
@@ -48,9 +48,9 @@ static inline u32 sms_read_reg(u16 reg)
         return __raw_readl(OMAP_SMS_REGADDR(reg));
 }
 #else
-#define OMAP242X_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
-#define OMAP243X_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
-#define OMAP34XX_SDRC_REGADDR(reg)      IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
+#define OMAP242X_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP2420_SDRC_BASE + (reg))
+#define OMAP243X_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP243X_SDRC_BASE + (reg))
+#define OMAP34XX_SDRC_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP343X_SDRC_BASE + (reg))
 #endif  /* __ASSEMBLER__ */
 
 #endif
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c
index ce22344b94e7..3a529c77daa8 100644
--- a/arch/arm/mach-omap2/serial.c
+++ b/arch/arm/mach-omap2/serial.c
@@ -73,7 +73,7 @@ static LIST_HEAD(uart_list);
 
 static struct plat_serial8250_port serial_platform_data0[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART1_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART1_BASE),
                 .mapbase        = OMAP_UART1_BASE,
                 .irq            = 72,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -87,7 +87,7 @@ static struct plat_serial8250_port serial_platform_data0[] = {
 
 static struct plat_serial8250_port serial_platform_data1[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART2_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART2_BASE),
                 .mapbase        = OMAP_UART2_BASE,
                 .irq            = 73,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -101,7 +101,7 @@ static struct plat_serial8250_port serial_platform_data1[] = {
 
 static struct plat_serial8250_port serial_platform_data2[] = {
         {
-                .membase        = IO_ADDRESS(OMAP_UART3_BASE),
+                .membase        = OMAP2_IO_ADDRESS(OMAP_UART3_BASE),
                 .mapbase        = OMAP_UART3_BASE,
                 .irq            = 74,
                 .flags          = UPF_BOOT_AUTOCONF,
@@ -123,6 +123,21 @@ static struct plat_serial8250_port serial_platform_data2[] = {
         }
 };
 
+#ifdef CONFIG_ARCH_OMAP4
+static struct plat_serial8250_port serial_platform_data3[] = {
+        {
+                .membase        = IO_ADDRESS(OMAP_UART4_BASE),
+                .mapbase        = OMAP_UART4_BASE,
+                .irq            = 70,
+                .flags          = UPF_BOOT_AUTOCONF,
+                .iotype         = UPIO_MEM,
+                .regshift       = 2,
+                .uartclk        = OMAP24XX_BASE_BAUD * 16,
+        }, {
+                .flags          = 0
+        }
+};
+#endif
 static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
                                            int offset)
 {
@@ -470,7 +485,7 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
                 uart->padconf = 0;
         }
 
-        p->flags |= UPF_SHARE_IRQ;
+        p->irqflags |= IRQF_SHARED;
         ret = request_irq(p->irq, omap_uart_interrupt, IRQF_SHARED,
                           "serial idle", (void *)uart);
         WARN_ON(ret);
@@ -560,12 +575,22 @@ static struct omap_uart_state omap_uart[OMAP_MAX_NR_PORTS] = {
                         },
                 },
         },
+#ifdef CONFIG_ARCH_OMAP4
+        {
+                .pdev = {
+                        .name                   = "serial8250",
+                        .id                     = 3
+                        .dev                    = {
+                                .platform_data  = serial_platform_data3,
+                        },
+                },
+        },
+#endif
 };
 
-void __init omap_serial_init(void)
+void __init omap_serial_early_init(void)
 {
         int i;
-        const struct omap_uart_config *info;
         char name[16];
 
         /*
@@ -574,23 +599,12 @@ void __init omap_serial_init(void)
          * if not needed.
          */
 
-        info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-
-        if (info == NULL)
-                return;
-
         for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
                 struct omap_uart_state *uart = &omap_uart[i];
                 struct platform_device *pdev = &uart->pdev;
                 struct device *dev = &pdev->dev;
                 struct plat_serial8250_port *p = dev->platform_data;
 
-                if (!(info->enabled_uarts & (1 << i))) {
-                        p->membase = NULL;
-                        p->mapbase = 0;
-                        continue;
-                }
-
                 sprintf(name, "uart%d_ick", i+1);
                 uart->ick = clk_get(NULL, name);
                 if (IS_ERR(uart->ick)) {
@@ -605,8 +619,11 @@ void __init omap_serial_init(void)
                         uart->fck = NULL;
                 }
 
-                if (!uart->ick || !uart->fck)
-                        continue;
+                /* FIXME: Remove this once the clkdev is ready */
+                if (!cpu_is_omap44xx()) {
+                        if (!uart->ick || !uart->fck)
+                                continue;
+                }
 
                 uart->num = i;
                 p->private_data = uart;
@@ -617,6 +634,18 @@ void __init omap_serial_init(void)
                         p->irq += 32;
 
                 omap_uart_enable_clocks(uart);
+        }
+}
+
+void __init omap_serial_init(void)
+{
+        int i;
+
+        for (i = 0; i < OMAP_MAX_NR_PORTS; i++) {
+                struct omap_uart_state *uart = &omap_uart[i];
+                struct platform_device *pdev = &uart->pdev;
+                struct device *dev = &pdev->dev;
+
                 omap_uart_reset(uart);
                 omap_uart_idle_init(uart);
 
diff --git a/arch/arm/mach-omap2/sram242x.S b/arch/arm/mach-omap2/sram242x.S
index bb299851116d..9b62208658bc 100644
--- a/arch/arm/mach-omap2/sram242x.S
+++ b/arch/arm/mach-omap2/sram242x.S
@@ -128,7 +128,7 @@ omap242x_sdi_prcm_voltctrl:
 prcm_mask_val:
         .word 0xFFFF3FFC
 omap242x_sdi_timer_32ksynct_cr:
-        .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 ENTRY(omap242x_sram_ddr_init_sz)
         .word   . - omap242x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap242x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
         .word 0xFFFF3FFC
 omap242x_srs_timer_32ksynct:
-        .word IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2420_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap242x_sram_reprogram_sdrc_sz)
         .word   . - omap242x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/sram243x.S b/arch/arm/mach-omap2/sram243x.S
index 9955abcaeb31..df2cd9277c00 100644
--- a/arch/arm/mach-omap2/sram243x.S
+++ b/arch/arm/mach-omap2/sram243x.S
@@ -128,7 +128,7 @@ omap243x_sdi_prcm_voltctrl:
 prcm_mask_val:
         .word 0xFFFF3FFC
 omap243x_sdi_timer_32ksynct_cr:
-        .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 ENTRY(omap243x_sram_ddr_init_sz)
         .word   . - omap243x_sram_ddr_init
 
@@ -224,7 +224,7 @@ omap243x_srs_prcm_voltctrl:
 ddr_prcm_mask_val:
         .word 0xFFFF3FFC
 omap243x_srs_timer_32ksynct:
-        .word IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
+        .word OMAP2_IO_ADDRESS(OMAP2430_32KSYNCT_BASE + 0x010)
 
 ENTRY(omap243x_sram_reprogram_sdrc_sz)
         .word   . - omap243x_sram_reprogram_sdrc
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 97eeeebcb066..e2338c0aebcf 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -231,7 +231,7 @@ static void __init omap2_gp_clocksource_init(void)
 static void __init omap2_gp_timer_init(void)
 {
 #ifdef CONFIG_LOCAL_TIMERS
-        twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
+        twd_base = OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE);
 #endif
         omap_dm_timer_init();
 
diff --git a/arch/arm/mach-omap2/usb-musb.c b/arch/arm/mach-omap2/usb-musb.c
index 739e59e8025c..1145a2562b0f 100644
--- a/arch/arm/mach-omap2/usb-musb.c
+++ b/arch/arm/mach-omap2/usb-musb.c
@@ -31,15 +31,6 @@
 #include <mach/mux.h>
 #include <mach/usb.h>
 
-#define OTG_SYSCONFIG   (OMAP34XX_HSUSB_OTG_BASE + 0x404)
-
-static void __init usb_musb_pm_init(void)
-{
-        /* Ensure force-idle mode for OTG controller */
-        if (cpu_is_omap34xx())
-                omap_writel(0, OTG_SYSCONFIG);
-}
-
 #ifdef CONFIG_USB_MUSB_SOC
 
 static struct resource musb_resources[] = {
@@ -173,13 +164,10 @@ void __init usb_musb_init(void)
                 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
                 return;
         }
-
-        usb_musb_pm_init();
 }
 
 #else
 void __init usb_musb_init(void)
 {
-        usb_musb_pm_init();
 }
 #endif /* CONFIG_USB_MUSB_SOC */
diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig
index efe85d095190..64b3f52bd9b2 100644
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -120,6 +120,10 @@ config OMAP_MBOX_FWK
 config OMAP_IOMMU
         tristate
 
+config OMAP_IOMMU_DEBUG
+        depends on OMAP_IOMMU
+        tristate
+
 choice
         prompt "System timer"
         default OMAP_MPU_TIMER
@@ -183,6 +187,19 @@ config OMAP_SERIAL_WAKE
           to data on the serial RX line. This allows you to wake the
           system from serial console.
 
+choice
+        prompt "OMAP PM layer selection"
+        depends on ARCH_OMAP
+        default OMAP_PM_NOOP
+
+config OMAP_PM_NONE
+        bool "No PM layer"
+
+config OMAP_PM_NOOP
+        bool "No-op/debug PM layer"
+
+endchoice
+
 endmenu
 
 endif
diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile
index a83279523958..98f01910c2cf 100644
--- a/arch/arm/plat-omap/Makefile
+++ b/arch/arm/plat-omap/Makefile
@@ -12,8 +12,13 @@ obj-  :=
 # OCPI interconnect support for 1710, 1610 and 5912
 obj-$(CONFIG_ARCH_OMAP16XX) += ocpi.o
 
+# omap_device support (OMAP2+ only at the moment)
+obj-$(CONFIG_ARCH_OMAP2) += omap_device.o
+obj-$(CONFIG_ARCH_OMAP3) += omap_device.o
+
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o
+obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o
 
 obj-$(CONFIG_CPU_FREQ) += cpu-omap.o
 obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o
@@ -25,3 +30,4 @@ obj-y += $(i2c-omap-m) $(i2c-omap-y)
 # OMAP mailbox framework
 obj-$(CONFIG_OMAP_MBOX_FWK) += mailbox.o
 
+obj-$(CONFIG_OMAP_PM_NOOP) += omap-pm-noop.o
\ No newline at end of file
diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c
index e8c327a45a55..bf880e966d3b 100644
--- a/arch/arm/plat-omap/clock.c
+++ b/arch/arm/plat-omap/clock.c
@@ -488,7 +488,7 @@ static int __init clk_debugfs_init(void)
         }
         return 0;
 err_out:
-        debugfs_remove(clk_debugfs_root); /* REVISIT: Cleanup correctly */
+        debugfs_remove_recursive(clk_debugfs_root);
         return err;
 }
 late_initcall(clk_debugfs_init);
diff --git a/arch/arm/plat-omap/common.c b/arch/arm/plat-omap/common.c
index 95587b6c0259..3a4768d55895 100644
--- a/arch/arm/plat-omap/common.c
+++ b/arch/arm/plat-omap/common.c
@@ -54,50 +54,6 @@ static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
         struct omap_board_config_kernel *kinfo = NULL;
         int i;
 
-#ifdef CONFIG_OMAP_BOOT_TAG
-        struct omap_board_config_entry *info = NULL;
-
-        if (omap_bootloader_tag_len > 4)
-                info = (struct omap_board_config_entry *) omap_bootloader_tag;
-        while (info != NULL) {
-                u8 *next;
-
-                if (info->tag == tag) {
-                        if (skip == 0)
-                                break;
-                        skip--;
-                }
-
-                if ((info->len & 0x03) != 0) {
-                        /* We bail out to avoid an alignment fault */
-                        printk(KERN_ERR "OMAP peripheral config: Length (%d) not word-aligned (tag %04x)\n",
-                               info->len, info->tag);
-                        return NULL;
-                }
-                next = (u8 *) info + sizeof(*info) + info->len;
-                if (next >= omap_bootloader_tag + omap_bootloader_tag_len)
-                        info = NULL;
-                else
-                        info = (struct omap_board_config_entry *) next;
-        }
-        if (info != NULL) {
-                /* Check the length as a lame attempt to check for
-                 * binary inconsistency. */
-                if (len != NO_LENGTH_CHECK) {
-                        /* Word-align len */
-                        if (len & 0x03)
-                                len = (len + 3) & ~0x03;
-                        if (info->len != len) {
-                                printk(KERN_ERR "OMAP peripheral config: Length mismatch with tag %x (want %d, got %d)\n",
-                                       tag, len, info->len);
-                                return NULL;
-                        }
-                }
-                if (len_out != NULL)
-                        *len_out = info->len;
-                return info->data;
-        }
-#endif
         /* Try to find the config from the board-specific structures
          * in the kernel. */
         for (i = 0; i < omap_board_config_size; i++) {
@@ -127,50 +83,6 @@ const void *omap_get_var_config(u16 tag, size_t *len)
 }
 EXPORT_SYMBOL(omap_get_var_config);
 
-static int __init omap_add_serial_console(void)
-{
-        const struct omap_serial_console_config *con_info;
-        const struct omap_uart_config *uart_info;
-        static char speed[11], *opt = NULL;
-        int line, i, uart_idx;
-
-        uart_info = omap_get_config(OMAP_TAG_UART, struct omap_uart_config);
-        con_info = omap_get_config(OMAP_TAG_SERIAL_CONSOLE,
-                                        struct omap_serial_console_config);
-        if (uart_info == NULL || con_info == NULL)
-                return 0;
-
-        if (con_info->console_uart == 0)
-                return 0;
-
-        if (con_info->console_speed) {
-                snprintf(speed, sizeof(speed), "%u", con_info->console_speed);
-                opt = speed;
-        }
-
-        uart_idx = con_info->console_uart - 1;
-        if (uart_idx >= OMAP_MAX_NR_PORTS) {
-                printk(KERN_INFO "Console: external UART#%d. "
-                        "Not adding it as console this time.\n",
-                        uart_idx + 1);
-                return 0;
-        }
-        if (!(uart_info->enabled_uarts & (1 << uart_idx))) {
-                printk(KERN_ERR "Console: Selected UART#%d is "
-                        "not enabled for this platform\n",
-                        uart_idx + 1);
-                return -1;
-        }
-        line = 0;
-        for (i = 0; i < uart_idx; i++) {
-                if (uart_info->enabled_uarts & (1 << i))
-                        line++;
-        }
-        return add_preferred_console("ttyS", line, opt);
-}
-console_initcall(omap_add_serial_console);
-
-
 /*
  * 32KHz clocksource ... always available, on pretty most chips except
  * OMAP 730 and 1510.  Other timers could be used as clocksources, with
diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 9b00f4cbc903..fd3154ae69b1 100644
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -2347,16 +2347,16 @@ static int __init omap_init_dma(void)
         int ch, r;
 
         if (cpu_class_is_omap1()) {
-                omap_dma_base = IO_ADDRESS(OMAP1_DMA_BASE);
+                omap_dma_base = OMAP1_IO_ADDRESS(OMAP1_DMA_BASE);
                 dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap24xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP24XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP24XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap34xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP34XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP34XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else if (cpu_is_omap44xx()) {
-                omap_dma_base = IO_ADDRESS(OMAP44XX_DMA4_BASE);
+                omap_dma_base = OMAP2_IO_ADDRESS(OMAP44XX_DMA4_BASE);
                 dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
         } else {
                 pr_err("DMA init failed for unsupported omap\n");
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 7f50b6103dee..d325b54daeb5 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -774,7 +774,10 @@ int __init omap_dm_timer_init(void)
 
         for (i = 0; i < dm_timer_count; i++) {
                 timer = &dm_timers[i];
-                timer->io_base = IO_ADDRESS(timer->phys_base);
+                if (cpu_class_is_omap1())
+                        timer->io_base = OMAP1_IO_ADDRESS(timer->phys_base);
+                else
+                        timer->io_base = OMAP2_IO_ADDRESS(timer->phys_base);
 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
                                         defined(CONFIG_ARCH_OMAP4)
                 if (cpu_class_is_omap2()) {
diff --git a/arch/arm/plat-omap/gpio.c b/arch/arm/plat-omap/gpio.c
index 176c86e5531d..693839c89ad0 100644
--- a/arch/arm/plat-omap/gpio.c
+++ b/arch/arm/plat-omap/gpio.c
@@ -31,7 +31,7 @@
 /*
  * OMAP1510 GPIO registers
  */
-#define OMAP1510_GPIO_BASE              IO_ADDRESS(0xfffce000)
+#define OMAP1510_GPIO_BASE              OMAP1_IO_ADDRESS(0xfffce000)
 #define OMAP1510_GPIO_DATA_INPUT        0x00
 #define OMAP1510_GPIO_DATA_OUTPUT       0x04
 #define OMAP1510_GPIO_DIR_CONTROL       0x08
@@ -45,10 +45,10 @@
 /*
  * OMAP1610 specific GPIO registers
  */
-#define OMAP1610_GPIO1_BASE             IO_ADDRESS(0xfffbe400)
-#define OMAP1610_GPIO2_BASE             IO_ADDRESS(0xfffbec00)
-#define OMAP1610_GPIO3_BASE             IO_ADDRESS(0xfffbb400)
-#define OMAP1610_GPIO4_BASE             IO_ADDRESS(0xfffbbc00)
+#define OMAP1610_GPIO1_BASE             OMAP1_IO_ADDRESS(0xfffbe400)
+#define OMAP1610_GPIO2_BASE             OMAP1_IO_ADDRESS(0xfffbec00)
+#define OMAP1610_GPIO3_BASE             OMAP1_IO_ADDRESS(0xfffbb400)
+#define OMAP1610_GPIO4_BASE             OMAP1_IO_ADDRESS(0xfffbbc00)
 #define OMAP1610_GPIO_REVISION          0x0000
 #define OMAP1610_GPIO_SYSCONFIG         0x0010
 #define OMAP1610_GPIO_SYSSTATUS         0x0014
@@ -70,12 +70,12 @@
 /*
  * OMAP730 specific GPIO registers
  */
-#define OMAP730_GPIO1_BASE              IO_ADDRESS(0xfffbc000)
-#define OMAP730_GPIO2_BASE              IO_ADDRESS(0xfffbc800)
-#define OMAP730_GPIO3_BASE              IO_ADDRESS(0xfffbd000)
-#define OMAP730_GPIO4_BASE              IO_ADDRESS(0xfffbd800)
-#define OMAP730_GPIO5_BASE              IO_ADDRESS(0xfffbe000)
-#define OMAP730_GPIO6_BASE              IO_ADDRESS(0xfffbe800)
+#define OMAP730_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
+#define OMAP730_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
+#define OMAP730_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
+#define OMAP730_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
+#define OMAP730_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
+#define OMAP730_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
 #define OMAP730_GPIO_DATA_INPUT         0x00
 #define OMAP730_GPIO_DATA_OUTPUT        0x04
 #define OMAP730_GPIO_DIR_CONTROL        0x08
@@ -86,12 +86,12 @@
 /*
  * OMAP850 specific GPIO registers
  */
-#define OMAP850_GPIO1_BASE              IO_ADDRESS(0xfffbc000)
-#define OMAP850_GPIO2_BASE              IO_ADDRESS(0xfffbc800)
-#define OMAP850_GPIO3_BASE              IO_ADDRESS(0xfffbd000)
-#define OMAP850_GPIO4_BASE              IO_ADDRESS(0xfffbd800)
-#define OMAP850_GPIO5_BASE              IO_ADDRESS(0xfffbe000)
-#define OMAP850_GPIO6_BASE              IO_ADDRESS(0xfffbe800)
+#define OMAP850_GPIO1_BASE              OMAP1_IO_ADDRESS(0xfffbc000)
+#define OMAP850_GPIO2_BASE              OMAP1_IO_ADDRESS(0xfffbc800)
+#define OMAP850_GPIO3_BASE              OMAP1_IO_ADDRESS(0xfffbd000)
+#define OMAP850_GPIO4_BASE              OMAP1_IO_ADDRESS(0xfffbd800)
+#define OMAP850_GPIO5_BASE              OMAP1_IO_ADDRESS(0xfffbe000)
+#define OMAP850_GPIO6_BASE              OMAP1_IO_ADDRESS(0xfffbe800)
 #define OMAP850_GPIO_DATA_INPUT         0x00
 #define OMAP850_GPIO_DATA_OUTPUT        0x04
 #define OMAP850_GPIO_DIR_CONTROL        0x08
@@ -99,19 +99,21 @@
 #define OMAP850_GPIO_INT_MASK           0x10
 #define OMAP850_GPIO_INT_STATUS         0x14
 
+#define OMAP1_MPUIO_VBASE               OMAP1_IO_ADDRESS(OMAP1_MPUIO_BASE)
+
 /*
  * omap24xx specific GPIO registers
  */
-#define OMAP242X_GPIO1_BASE             IO_ADDRESS(0x48018000)
-#define OMAP242X_GPIO2_BASE             IO_ADDRESS(0x4801a000)
-#define OMAP242X_GPIO3_BASE             IO_ADDRESS(0x4801c000)
-#define OMAP242X_GPIO4_BASE             IO_ADDRESS(0x4801e000)
+#define OMAP242X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48018000)
+#define OMAP242X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4801a000)
+#define OMAP242X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x4801c000)
+#define OMAP242X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x4801e000)
 
-#define OMAP243X_GPIO1_BASE             IO_ADDRESS(0x4900C000)
-#define OMAP243X_GPIO2_BASE             IO_ADDRESS(0x4900E000)
-#define OMAP243X_GPIO3_BASE             IO_ADDRESS(0x49010000)
-#define OMAP243X_GPIO4_BASE             IO_ADDRESS(0x49012000)
-#define OMAP243X_GPIO5_BASE             IO_ADDRESS(0x480B6000)
+#define OMAP243X_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4900C000)
+#define OMAP243X_GPIO2_BASE             OMAP2_IO_ADDRESS(0x4900E000)
+#define OMAP243X_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49010000)
+#define OMAP243X_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49012000)
+#define OMAP243X_GPIO5_BASE             OMAP2_IO_ADDRESS(0x480B6000)
 
 #define OMAP24XX_GPIO_REVISION          0x0000
 #define OMAP24XX_GPIO_SYSCONFIG         0x0010
@@ -168,24 +170,22 @@
  * omap34xx specific GPIO registers
  */
 
-#define OMAP34XX_GPIO1_BASE             IO_ADDRESS(0x48310000)
-#define OMAP34XX_GPIO2_BASE             IO_ADDRESS(0x49050000)
-#define OMAP34XX_GPIO3_BASE             IO_ADDRESS(0x49052000)
-#define OMAP34XX_GPIO4_BASE             IO_ADDRESS(0x49054000)
-#define OMAP34XX_GPIO5_BASE             IO_ADDRESS(0x49056000)
-#define OMAP34XX_GPIO6_BASE             IO_ADDRESS(0x49058000)
+#define OMAP34XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x48310000)
+#define OMAP34XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x49050000)
+#define OMAP34XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x49052000)
+#define OMAP34XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x49054000)
+#define OMAP34XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x49056000)
+#define OMAP34XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x49058000)
 
 /*
  * OMAP44XX  specific GPIO registers
  */
-#define OMAP44XX_GPIO1_BASE             IO_ADDRESS(0x4a310000)
-#define OMAP44XX_GPIO2_BASE             IO_ADDRESS(0x48055000)
-#define OMAP44XX_GPIO3_BASE             IO_ADDRESS(0x48057000)
-#define OMAP44XX_GPIO4_BASE             IO_ADDRESS(0x48059000)
-#define OMAP44XX_GPIO5_BASE             IO_ADDRESS(0x4805B000)
-#define OMAP44XX_GPIO6_BASE             IO_ADDRESS(0x4805D000)
-
-#define OMAP_MPUIO_VBASE                IO_ADDRESS(OMAP_MPUIO_BASE)
+#define OMAP44XX_GPIO1_BASE             OMAP2_IO_ADDRESS(0x4a310000)
+#define OMAP44XX_GPIO2_BASE             OMAP2_IO_ADDRESS(0x48055000)
+#define OMAP44XX_GPIO3_BASE             OMAP2_IO_ADDRESS(0x48057000)
+#define OMAP44XX_GPIO4_BASE             OMAP2_IO_ADDRESS(0x48059000)
+#define OMAP44XX_GPIO5_BASE             OMAP2_IO_ADDRESS(0x4805B000)
+#define OMAP44XX_GPIO6_BASE             OMAP2_IO_ADDRESS(0x4805D000)
 
 struct gpio_bank {
         void __iomem *base;
@@ -221,7 +221,7 @@ struct gpio_bank {
 
 #ifdef CONFIG_ARCH_OMAP16XX
 static struct gpio_bank gpio_bank_1610[5] = {
-        { OMAP_MPUIO_VBASE,    INT_MPUIO,           IH_MPUIO_BASE,     METHOD_MPUIO},
+        { OMAP1_MPUIO_VBASE,    INT_MPUIO,          IH_MPUIO_BASE,     METHOD_MPUIO},
         { OMAP1610_GPIO1_BASE, INT_GPIO_BANK1,      IH_GPIO_BASE,      METHOD_GPIO_1610 },
         { OMAP1610_GPIO2_BASE, INT_1610_GPIO_BANK2, IH_GPIO_BASE + 16, METHOD_GPIO_1610 },
         { OMAP1610_GPIO3_BASE, INT_1610_GPIO_BANK3, IH_GPIO_BASE + 32, METHOD_GPIO_1610 },
@@ -231,14 +231,14 @@ static struct gpio_bank gpio_bank_1610[5] = {
 
 #ifdef CONFIG_ARCH_OMAP15XX
 static struct gpio_bank gpio_bank_1510[2] = {
-        { OMAP_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
+        { OMAP1_MPUIO_VBASE,   INT_MPUIO,      IH_MPUIO_BASE, METHOD_MPUIO },
         { OMAP1510_GPIO_BASE, INT_GPIO_BANK1, IH_GPIO_BASE,  METHOD_GPIO_1510 }
 };
 #endif
 
 #ifdef CONFIG_ARCH_OMAP730
 static struct gpio_bank gpio_bank_730[7] = {
-        { OMAP_MPUIO_VBASE,    INT_730_MPUIO,       IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP1_MPUIO_VBASE,    INT_730_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
         { OMAP730_GPIO1_BASE,  INT_730_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_730 },
         { OMAP730_GPIO2_BASE,  INT_730_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_730 },
         { OMAP730_GPIO3_BASE,  INT_730_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_730 },
@@ -250,7 +250,7 @@ static struct gpio_bank gpio_bank_730[7] = {
 
 #ifdef CONFIG_ARCH_OMAP850
 static struct gpio_bank gpio_bank_850[7] = {
-        { OMAP_MPUIO_BASE,     INT_850_MPUIO,       IH_MPUIO_BASE,      METHOD_MPUIO },
+        { OMAP1_MPUIO_BASE,     INT_850_MPUIO,      IH_MPUIO_BASE,      METHOD_MPUIO },
         { OMAP850_GPIO1_BASE,  INT_850_GPIO_BANK1,  IH_GPIO_BASE,       METHOD_GPIO_850 },
         { OMAP850_GPIO2_BASE,  INT_850_GPIO_BANK2,  IH_GPIO_BASE + 32,  METHOD_GPIO_850 },
         { OMAP850_GPIO3_BASE,  INT_850_GPIO_BANK3,  IH_GPIO_BASE + 64,  METHOD_GPIO_850 },
@@ -2032,7 +2032,7 @@ void omap2_gpio_resume_after_retention(void)
                 return;
         for (i = 0; i < gpio_bank_count; i++) {
                 struct gpio_bank *bank = &gpio_bank[i];
-                u32 l;
+                u32 l, gen, gen0, gen1;
 
                 if (!(bank->enabled_non_wakeup_gpios))
                         continue;
@@ -2056,13 +2056,32 @@ void omap2_gpio_resume_after_retention(void)
                  * this silicon bug. */
                 l ^= bank->saved_datain;
                 l &= bank->non_wakeup_gpios;
-                if (l) {
+
+                /*
+                 * No need to generate IRQs for the rising edge for gpio IRQs
+                 * configured with falling edge only; and vice versa.
+                 */
+                gen0 = l & bank->saved_fallingdetect;
+                gen0 &= bank->saved_datain;
+
+                gen1 = l & bank->saved_risingdetect;
+                gen1 &= ~(bank->saved_datain);
+
+                /* FIXME: Consider GPIO IRQs with level detections properly! */
+                gen = l & (~(bank->saved_fallingdetect) &
+                                ~(bank->saved_risingdetect));
+                /* Consider all GPIO IRQs needed to be updated */
+                gen |= gen0 | gen1;
+
+                if (gen) {
                         u32 old0, old1;
 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
                         old0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                         old1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1);
-                        __raw_writel(old0 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
-                        __raw_writel(old1 | l, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
+                        __raw_writel(old0 | gen, bank->base +
+                                        OMAP24XX_GPIO_LEVELDETECT0);
+                        __raw_writel(old1 | gen, bank->base +
+                                        OMAP24XX_GPIO_LEVELDETECT1);
                         __raw_writel(old0, bank->base + OMAP24XX_GPIO_LEVELDETECT0);
                         __raw_writel(old1, bank->base + OMAP24XX_GPIO_LEVELDETECT1);
 #endif
diff --git a/arch/arm/plat-omap/include/mach/board.h b/arch/arm/plat-omap/include/mach/board.h
index 50ea79a0efa2..8e913c322810 100644
--- a/arch/arm/plat-omap/include/mach/board.h
+++ b/arch/arm/plat-omap/include/mach/board.h
@@ -16,10 +16,8 @@
 
 /* Different peripheral ids */
 #define OMAP_TAG_CLOCK          0x4f01
-#define OMAP_TAG_SERIAL_CONSOLE 0x4f03
 #define OMAP_TAG_LCD            0x4f05
 #define OMAP_TAG_GPIO_SWITCH    0x4f06
-#define OMAP_TAG_UART           0x4f07
 #define OMAP_TAG_FBMEM          0x4f08
 #define OMAP_TAG_STI_CONSOLE    0x4f09
 #define OMAP_TAG_CAMERA_SENSOR  0x4f0a
diff --git a/arch/arm/plat-omap/include/mach/clockdomain.h b/arch/arm/plat-omap/include/mach/clockdomain.h
index b9d0dd2da89b..99ebd886f134 100644
--- a/arch/arm/plat-omap/include/mach/clockdomain.h
+++ b/arch/arm/plat-omap/include/mach/clockdomain.h
@@ -95,7 +95,8 @@ int clkdm_register(struct clockdomain *clkdm);
 int clkdm_unregister(struct clockdomain *clkdm);
 struct clockdomain *clkdm_lookup(const char *name);
 
-int clkdm_for_each(int (*fn)(struct clockdomain *clkdm));
+int clkdm_for_each(int (*fn)(struct clockdomain *clkdm, void *user),
+                        void *user);
 struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm);
 
 void omap2_clkdm_allow_idle(struct clockdomain *clkdm);
diff --git a/arch/arm/plat-omap/include/mach/control.h b/arch/arm/plat-omap/include/mach/control.h
index 8140dbccb7bc..826d317cdbec 100644
--- a/arch/arm/plat-omap/include/mach/control.h
+++ b/arch/arm/plat-omap/include/mach/control.h
@@ -20,15 +20,15 @@
 
 #ifndef __ASSEMBLY__
 #define OMAP242X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
 #define OMAP243X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
 #define OMAP343X_CTRL_REGADDR(reg)                                      \
-        IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+        OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #else
-#define OMAP242X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
-#define OMAP243X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
-#define OMAP343X_CTRL_REGADDR(reg)      IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
+#define OMAP242X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP242X_CTRL_BASE + (reg))
+#define OMAP243X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP243X_CTRL_BASE + (reg))
+#define OMAP343X_CTRL_REGADDR(reg)      OMAP2_IO_ADDRESS(OMAP343X_CTRL_BASE + (reg))
 #endif /* __ASSEMBLY__ */
 
 /*
diff --git a/arch/arm/plat-omap/include/mach/entry-macro.S b/arch/arm/plat-omap/include/mach/entry-macro.S
index 56426ed45ef4..a5592991634d 100644
--- a/arch/arm/plat-omap/include/mach/entry-macro.S
+++ b/arch/arm/plat-omap/include/mach/entry-macro.S
@@ -41,7 +41,7 @@
                 .endm
 
                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-                ldr     \base, =IO_ADDRESS(OMAP_IH1_BASE)
+                ldr     \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
                 ldr     \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
                 ldr     \tmp, [\base, #IRQ_MIR_REG_OFFSET]
                 mov     \irqstat, #0xffffffff
@@ -53,7 +53,7 @@
                 cmp     \irqnr, #0
                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
                 cmpeq   \irqnr, #INT_IH2_IRQ
-                ldreq   \base, =IO_ADDRESS(OMAP_IH2_BASE)
+                ldreq   \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
                 ldreq   \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
                 addeqs  \irqnr, \irqnr, #32
 1510:
@@ -68,9 +68,9 @@
 
 /* REVISIT: This should be set dynamically if CONFIG_MULTI_OMAP2 is selected */
 #if defined(CONFIG_ARCH_OMAP2420) || defined(CONFIG_ARCH_OMAP2430)
-#define OMAP2_VA_IC_BASE                IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP2_VA_IC_BASE                OMAP2_IO_ADDRESS(OMAP24XX_IC_BASE)
 #elif defined(CONFIG_ARCH_OMAP34XX)
-#define OMAP2_VA_IC_BASE                IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP2_VA_IC_BASE                OMAP2_IO_ADDRESS(OMAP34XX_IC_BASE)
 #endif
 #if defined(CONFIG_ARCH_OMAP4)
 #include <mach/omap44xx.h>
diff --git a/arch/arm/plat-omap/include/mach/gpio.h b/arch/arm/plat-omap/include/mach/gpio.h
index 2b22a8799bc6..633ff688b928 100644
--- a/arch/arm/plat-omap/include/mach/gpio.h
+++ b/arch/arm/plat-omap/include/mach/gpio.h
@@ -29,7 +29,7 @@
 #include <linux/io.h>
 #include <mach/irqs.h>
 
-#define OMAP_MPUIO_BASE                 0xfffb5000
+#define OMAP1_MPUIO_BASE                        0xfffb5000
 
 #if (defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850))
 
diff --git a/arch/arm/plat-omap/include/mach/io.h b/arch/arm/plat-omap/include/mach/io.h
index 21fb0efdda86..8d32df32b0b1 100644
--- a/arch/arm/plat-omap/include/mach/io.h
+++ b/arch/arm/plat-omap/include/mach/io.h
@@ -54,17 +54,33 @@
  * ----------------------------------------------------------------------------
  */
 
-#if defined(CONFIG_ARCH_OMAP1)
+#ifdef __ASSEMBLER__
+#define IOMEM(x)                (x)
+#else
+#define IOMEM(x)                ((void __force __iomem *)(x))
+#endif
+
+#define OMAP1_IO_OFFSET         0x01000000      /* Virtual IO = 0xfefb0000 */
+#define OMAP1_IO_ADDRESS(pa)    IOMEM((pa) - OMAP1_IO_OFFSET)
+
+#define OMAP2_IO_OFFSET         0x90000000
+#define OMAP2_IO_ADDRESS(pa)    IOMEM((pa) + OMAP2_IO_OFFSET) /* L3 and L4 */
+
+/*
+ * ----------------------------------------------------------------------------
+ * Omap1 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
-#define IO_PHYS                 0xFFFB0000
-#define IO_OFFSET               0x01000000      /* Virtual IO = 0xfefb0000 */
-#define IO_SIZE                 0x40000
-#define IO_VIRT                 (IO_PHYS - IO_OFFSET)
-#define __IO_ADDRESS(pa)        ((pa) - IO_OFFSET)
-#define __OMAP1_IO_ADDRESS(pa)  ((pa) - IO_OFFSET)
-#define io_v2p(va)              ((va) + IO_OFFSET)
+#define OMAP1_IO_PHYS           0xFFFB0000
+#define OMAP1_IO_SIZE           0x40000
+#define OMAP1_IO_VIRT           (OMAP1_IO_PHYS - OMAP1_IO_OFFSET)
 
-#elif defined(CONFIG_ARCH_OMAP2)
+/*
+ * ----------------------------------------------------------------------------
+ * Omap2 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
 /* We map both L3 and L4 on OMAP2 */
 #define L3_24XX_PHYS    L3_24XX_BASE    /* 0x68000000 */
@@ -87,11 +103,6 @@
 #define OMAP243X_SMS_VIRT       0xFC000000
 #define OMAP243X_SMS_SIZE       SZ_1M
 
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)      /* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)      /* Works for L3 and L4 */
-
 /* DSP */
 #define DSP_MEM_24XX_PHYS       OMAP2420_DSP_MEM_BASE   /* 0x58000000 */
 #define DSP_MEM_24XX_VIRT       0xe0000000
@@ -103,7 +114,11 @@
 #define DSP_MMU_24XX_VIRT       0xe2000000
 #define DSP_MMU_24XX_SIZE       SZ_4K
 
-#elif defined(CONFIG_ARCH_OMAP3)
+/*
+ * ----------------------------------------------------------------------------
+ * Omap3 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
 /* We map both L3 and L4 on OMAP3 */
 #define L3_34XX_PHYS            L3_34XX_BASE    /* 0x68000000 */
@@ -143,12 +158,6 @@
 #define OMAP343X_SDRC_VIRT      0xFD000000
 #define OMAP343X_SDRC_SIZE      SZ_1M
 
-
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
-
 /* DSP */
 #define DSP_MEM_34XX_PHYS       OMAP34XX_DSP_MEM_BASE   /* 0x58000000 */
 #define DSP_MEM_34XX_VIRT       0xe0000000
@@ -160,8 +169,12 @@
 #define DSP_MMU_34XX_VIRT       0xe2000000
 #define DSP_MMU_34XX_SIZE       SZ_4K
 
+/*
+ * ----------------------------------------------------------------------------
+ * Omap4 specific IO mapping
+ * ----------------------------------------------------------------------------
+ */
 
-#elif defined(CONFIG_ARCH_OMAP4)
 /* We map both L3 and L4 on OMAP4 */
 #define L3_44XX_PHYS            L3_44XX_BASE
 #define L3_44XX_VIRT            0xd4000000
@@ -189,38 +202,24 @@
 #define OMAP44XX_GPMC_SIZE      SZ_1M
 
 
-#define IO_OFFSET               0x90000000
-#define __IO_ADDRESS(pa)        ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define __OMAP2_IO_ADDRESS(pa)  ((pa) + IO_OFFSET)/* Works for L3 and L4 */
-#define io_v2p(va)              ((va) - IO_OFFSET)/* Works for L3 and L4 */
-
-#endif
-
-#define IO_ADDRESS(pa)          IOMEM(__IO_ADDRESS(pa))
-#define OMAP1_IO_ADDRESS(pa)    IOMEM(__OMAP1_IO_ADDRESS(pa))
-#define OMAP2_IO_ADDRESS(pa)    IOMEM(__OMAP2_IO_ADDRESS(pa))
+/*
+ * ----------------------------------------------------------------------------
+ * Omap specific register access
+ * ----------------------------------------------------------------------------
+ */
 
-#ifdef __ASSEMBLER__
-#define IOMEM(x)                (x)
-#else
-#define IOMEM(x)                ((void __force __iomem *)(x))
+#ifndef __ASSEMBLER__
 
 /*
- * Functions to access the OMAP IO region
- *
- * NOTE: - Use omap_read/write[bwl] for physical register addresses
- *       - Use __raw_read/write[bwl]() for virtual register addresses
- *       - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
- *       - DO NOT use hardcoded virtual addresses to allow changing the
- *         IO address space again if needed
+ * NOTE: Please use ioremap + __raw_read/write where possible instead of these
  */
-#define omap_readb(a)           __raw_readb(IO_ADDRESS(a))
-#define omap_readw(a)           __raw_readw(IO_ADDRESS(a))
-#define omap_readl(a)           __raw_readl(IO_ADDRESS(a))
 
-#define omap_writeb(v,a)        __raw_writeb(v, IO_ADDRESS(a))
-#define omap_writew(v,a)        __raw_writew(v, IO_ADDRESS(a))
-#define omap_writel(v,a)        __raw_writel(v, IO_ADDRESS(a))
+extern u8 omap_readb(u32 pa);
+extern u16 omap_readw(u32 pa);
+extern u32 omap_readl(u32 pa);
+extern void omap_writeb(u8 v, u32 pa);
+extern void omap_writew(u16 v, u32 pa);
+extern void omap_writel(u32 v, u32 pa);
 
 struct omap_sdrc_params;
 
diff --git a/arch/arm/plat-omap/include/mach/iommu.h b/arch/arm/plat-omap/include/mach/iommu.h
index 769b00b4c34a..46d41ac83dbf 100644
--- a/arch/arm/plat-omap/include/mach/iommu.h
+++ b/arch/arm/plat-omap/include/mach/iommu.h
@@ -95,7 +95,7 @@ struct iommu_functions {
 
         void (*save_ctx)(struct iommu *obj);
         void (*restore_ctx)(struct iommu *obj);
-        ssize_t (*dump_ctx)(struct iommu *obj, char *buf);
+        ssize_t (*dump_ctx)(struct iommu *obj, char *buf, ssize_t len);
 };
 
 struct iommu_platform_data {
@@ -162,7 +162,7 @@ extern void uninstall_iommu_arch(const struct iommu_functions *ops);
 extern int foreach_iommu_device(void *data,
                                 int (*fn)(struct device *, void *));
 
-extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf);
-extern size_t dump_tlb_entries(struct iommu *obj, char *buf);
+extern ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t len);
+extern size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t len);
 
 #endif /* __MACH_IOMMU_H */
diff --git a/arch/arm/plat-omap/include/mach/mtd-xip.h b/arch/arm/plat-omap/include/mach/mtd-xip.h
index 39b591ff54bb..f82a8dcaad94 100644
--- a/arch/arm/plat-omap/include/mach/mtd-xip.h
+++ b/arch/arm/plat-omap/include/mach/mtd-xip.h
@@ -25,7 +25,7 @@ typedef struct {
 } xip_omap_mpu_timer_regs_t;
 
 #define xip_omap_mpu_timer_base(n)                                      \
-((volatile xip_omap_mpu_timer_regs_t*)IO_ADDRESS(OMAP_MPU_TIMER_BASE +  \
+((volatile xip_omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +    \
         (n)*OMAP_MPU_TIMER_OFFSET))
 
 static inline unsigned long xip_omap_mpu_timer_read(int nr)
diff --git a/arch/arm/plat-omap/include/mach/mux.h b/arch/arm/plat-omap/include/mach/mux.h
index 80281c458baf..98dfab651dfc 100644
--- a/arch/arm/plat-omap/include/mach/mux.h
+++ b/arch/arm/plat-omap/include/mach/mux.h
@@ -857,6 +857,37 @@ enum omap34xx_index {
         /* OMAP3 SDRC CKE signals to SDR/DDR ram chips */
         H16_34XX_SDRC_CKE0,
         H17_34XX_SDRC_CKE1,
+
+        /* MMC1 */
+        N28_3430_MMC1_CLK,
+        M27_3430_MMC1_CMD,
+        N27_3430_MMC1_DAT0,
+        N26_3430_MMC1_DAT1,
+        N25_3430_MMC1_DAT2,
+        P28_3430_MMC1_DAT3,
+        P27_3430_MMC1_DAT4,
+        P26_3430_MMC1_DAT5,
+        R27_3430_MMC1_DAT6,
+        R25_3430_MMC1_DAT7,
+
+        /* MMC2 */
+        AE2_3430_MMC2_CLK,
+        AG5_3430_MMC2_CMD,
+        AH5_3430_MMC2_DAT0,
+        AH4_3430_MMC2_DAT1,
+        AG4_3430_MMC2_DAT2,
+        AF4_3430_MMC2_DAT3,
+
+        /* MMC3 */
+        AF10_3430_MMC3_CLK,
+        AC3_3430_MMC3_CMD,
+        AE11_3430_MMC3_DAT0,
+        AH9_3430_MMC3_DAT1,
+        AF13_3430_MMC3_DAT2,
+        AF13_3430_MMC3_DAT3,
+
+        /* SYS_NIRQ T2 INT1 */
+        AF26_34XX_SYS_NIRQ,
 };
 
 struct omap_mux_cfg {
diff --git a/arch/arm/plat-omap/include/mach/omap-pm.h b/arch/arm/plat-omap/include/mach/omap-pm.h
new file mode 100644
index 000000000000..3ee41d711492
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap-pm.h
@@ -0,0 +1,301 @@
+/*
+ * omap-pm.h - OMAP power management interface
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
+ * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
+ * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
+ * Richard Woodruff
+ */
+
+#ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
+#define ASM_ARM_ARCH_OMAP_OMAP_PM_H
+
+#include <linux/device.h>
+#include <linux/cpufreq.h>
+
+#include "powerdomain.h"
+
+/**
+ * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
+ * @rate: target clock rate
+ * @opp_id: OPP ID
+ * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
+ *
+ * Operating performance point data.  Can vary by OMAP chip and board.
+ */
+struct omap_opp {
+        unsigned long rate;
+        u8 opp_id;
+        u16 min_vdd;
+};
+
+extern struct omap_opp *mpu_opps;
+extern struct omap_opp *dsp_opps;
+extern struct omap_opp *l3_opps;
+
+/*
+ * agent_id values for use with omap_pm_set_min_bus_tput():
+ *
+ * OCP_INITIATOR_AGENT is only valid for devices that can act as
+ * initiators -- it represents the device's L3 interconnect
+ * connection.  OCP_TARGET_AGENT represents the device's L4
+ * interconnect connection.
+ */
+#define OCP_TARGET_AGENT                1
+#define OCP_INITIATOR_AGENT             2
+
+/**
+ * omap_pm_if_early_init - OMAP PM init code called before clock fw init
+ * @mpu_opp_table: array ptr to struct omap_opp for MPU
+ * @dsp_opp_table: array ptr to struct omap_opp for DSP
+ * @l3_opp_table : array ptr to struct omap_opp for CORE
+ *
+ * Initialize anything that must be configured before the clock
+ * framework starts.  The "_if_" is to avoid name collisions with the
+ * PM idle-loop code.
+ */
+int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
+                                 struct omap_opp *dsp_opp_table,
+                                 struct omap_opp *l3_opp_table);
+
+/**
+ * omap_pm_if_init - OMAP PM init code called after clock fw init
+ *
+ * The main initialization code.  OPP tables are passed in here.  The
+ * "_if_" is to avoid name collisions with the PM idle-loop code.
+ */
+int __init omap_pm_if_init(void);
+
+/**
+ * omap_pm_if_exit - OMAP PM exit code
+ *
+ * Exit code; currently unused.  The "_if_" is to avoid name
+ * collisions with the PM idle-loop code.
+ */
+void omap_pm_if_exit(void);
+
+/*
+ * Device-driver-originated constraints (via board-*.c files, platform_data)
+ */
+
+
+/**
+ * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
+ * @dev: struct device * requesting the constraint
+ * @t: maximum MPU wakeup latency in microseconds
+ *
+ * Request that the maximum interrupt latency for the MPU to be no
+ * greater than 't' microseconds. "Interrupt latency" in this case is
+ * defined as the elapsed time from the occurrence of a hardware or
+ * timer interrupt to the time when the device driver's interrupt
+ * service routine has been entered by the MPU.
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the MPU powerdomain into, and
+ * possibly the CORE powerdomain as well, since interrupt handling
+ * code currently runs from SDRAM.  Advanced PM or board*.c code may
+ * also configure interrupt controller priorities, OCP bus priorities,
+ * CPU speed(s), etc.
+ *
+ * This function will not affect device wakeup latency, e.g., time
+ * elapsed from when a device driver enables a hardware device with
+ * clk_enable(), to when the device is ready for register access or
+ * other use.  To control this device wakeup latency, use
+ * set_max_dev_wakeup_lat()
+ *
+ * Multiple calls to set_max_mpu_wakeup_lat() will replace the
+ * previous t value.  To remove the latency target for the MPU, call
+ * with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
+
+
+/**
+ * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
+ * @dev: struct device * requesting the constraint
+ * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
+ * @r: minimum throughput (in KiB/s)
+ *
+ * Request that the minimum data throughput on the OCP interconnect
+ * attached to device 'dev' interconnect agent 'tbus_id' be no less
+ * than 'r' KiB/s.
+ *
+ * It is expected that the OMAP PM or bus code will use this
+ * information to set the interconnect clock to run at the lowest
+ * possible speed that satisfies all current system users.  The PM or
+ * bus code will adjust the estimate based on its model of the bus, so
+ * device driver authors should attempt to specify an accurate
+ * quantity for their device use case, and let the PM or bus code
+ * overestimate the numbers as necessary to handle request/response
+ * latency, other competing users on the system, etc.  On OMAP2/3, if
+ * a driver requests a minimum L4 interconnect speed constraint, the
+ * code will also need to add an minimum L3 interconnect speed
+ * constraint,
+ *
+ * Multiple calls to set_min_bus_tput() will replace the previous rate
+ * value for this device.  To remove the interconnect throughput
+ * restriction for this device, call with r = 0.
+ *
+ * No return value.
+ */
+void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
+
+
+/**
+ * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
+ * @dev: struct device *
+ * @t: maximum device wakeup latency in microseconds
+ *
+ * Request that the maximum amount of time necessary for a device to
+ * become accessible after its clocks are enabled should be no greater
+ * than 't' microseconds.  Specifically, this represents the time from
+ * when a device driver enables device clocks with clk_enable(), to
+ * when the register reads and writes on the device will succeed.
+ * This function should be called before clk_disable() is called,
+ * since the power state transition decision may be made during
+ * clk_disable().
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the powerdomain enclosing this
+ * device into.
+ *
+ * Multiple calls to set_max_dev_wakeup_lat() will replace the
+ * previous wakeup latency values for this device.  To remove the wakeup
+ * latency restriction for this device, call with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
+
+
+/**
+ * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
+ * @dev: struct device *
+ * @t: maximum DMA transfer start latency in microseconds
+ *
+ * Request that the maximum system DMA transfer start latency for this
+ * device 'dev' should be no greater than 't' microseconds.  "DMA
+ * transfer start latency" here is defined as the elapsed time from
+ * when a device (e.g., McBSP) requests that a system DMA transfer
+ * start or continue, to the time at which data starts to flow into
+ * that device from the system DMA controller.
+ *
+ * It is intended that underlying PM code will use this information to
+ * determine what power state to put the CORE powerdomain into.
+ *
+ * Since system DMA transfers may not involve the MPU, this function
+ * will not affect MPU wakeup latency.  Use set_max_cpu_lat() to do
+ * so.  Similarly, this function will not affect device wakeup latency
+ * -- use set_max_dev_wakeup_lat() to affect that.
+ *
+ * Multiple calls to set_max_sdma_lat() will replace the previous t
+ * value for this device.  To remove the maximum DMA latency for this
+ * device, call with t = -1.
+ *
+ * No return value.
+ */
+void omap_pm_set_max_sdma_lat(struct device *dev, long t);
+
+
+/*
+ * DSP Bridge-specific constraints
+ */
+
+/**
+ * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
+ *
+ * Intended for use by DSPBridge.  Returns an array of OPP->DSP clock
+ * frequency entries.  The final item in the array should have .rate =
+ * .opp_id = 0.
+ */
+const struct omap_opp *omap_pm_dsp_get_opp_table(void);
+
+/**
+ * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
+ * @opp_id: target DSP OPP ID
+ *
+ * Set a minimum OPP ID for the DSP.  This is intended to be called
+ * only from the DSP Bridge MPU-side driver.  Unfortunately, the only
+ * information that code receives from the DSP/BIOS load estimator is the
+ * target OPP ID; hence, this interface.  No return value.
+ */
+void omap_pm_dsp_set_min_opp(u8 opp_id);
+
+/**
+ * omap_pm_dsp_get_opp - report the current DSP OPP ID
+ *
+ * Report the current OPP for the DSP.  Since on OMAP3, the DSP and
+ * MPU share a single voltage domain, the OPP ID returned back may
+ * represent a higher DSP speed than the OPP requested via
+ * omap_pm_dsp_set_min_opp().
+ *
+ * Returns the current VDD1 OPP ID, or 0 upon error.
+ */
+u8 omap_pm_dsp_get_opp(void);
+
+
+/*
+ * CPUFreq-originated constraint
+ *
+ * In the future, this should be handled by custom OPP clocktype
+ * functions.
+ */
+
+/**
+ * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
+ *
+ * Provide a frequency table usable by CPUFreq for the current chip/board.
+ * Returns a pointer to a struct cpufreq_frequency_table array or NULL
+ * upon error.
+ */
+struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
+
+/**
+ * omap_pm_cpu_set_freq - set the current minimum MPU frequency
+ * @f: MPU frequency in Hz
+ *
+ * Set the current minimum CPU frequency.  The actual CPU frequency
+ * used could end up higher if the DSP requested a higher OPP.
+ * Intended to be called by plat-omap/cpu_omap.c:omap_target().  No
+ * return value.
+ */
+void omap_pm_cpu_set_freq(unsigned long f);
+
+/**
+ * omap_pm_cpu_get_freq - report the current CPU frequency
+ *
+ * Returns the current MPU frequency, or 0 upon error.
+ */
+unsigned long omap_pm_cpu_get_freq(void);
+
+
+/*
+ * Device context loss tracking
+ */
+
+/**
+ * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
+ * @dev: struct device *
+ *
+ * This function returns the number of times that the device @dev has
+ * lost its internal context.  This generally occurs on a powerdomain
+ * transition to OFF.  Drivers use this as an optimization to avoid restoring
+ * context if the device hasn't lost it.  To use, drivers should initially
+ * call this in their context save functions and store the result.  Early in
+ * the driver's context restore function, the driver should call this function
+ * again, and compare the result to the stored counter.  If they differ, the
+ * driver must restore device context.   If the number of context losses
+ * exceeds the maximum positive integer, the function will wrap to 0 and
+ * continue counting.  Returns the number of context losses for this device,
+ * or -EINVAL upon error.
+ */
+int omap_pm_get_dev_context_loss_count(struct device *dev);
+
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/omap44xx.h b/arch/arm/plat-omap/include/mach/omap44xx.h
index 15dec7f1c7c0..b3ba5ac7b4a4 100644
--- a/arch/arm/plat-omap/include/mach/omap44xx.h
+++ b/arch/arm/plat-omap/include/mach/omap44xx.h
@@ -33,14 +33,14 @@
 #define IRQ_SIR_IRQ                     0x0040
 #define OMAP44XX_GIC_DIST_BASE          0x48241000
 #define OMAP44XX_GIC_CPU_BASE           0x48240100
-#define OMAP44XX_VA_GIC_CPU_BASE        IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define OMAP44XX_VA_GIC_CPU_BASE        OMAP2_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
 #define OMAP44XX_SCU_BASE               0x48240000
-#define OMAP44XX_VA_SCU_BASE            IO_ADDRESS(OMAP44XX_SCU_BASE)
+#define OMAP44XX_VA_SCU_BASE            OMAP2_IO_ADDRESS(OMAP44XX_SCU_BASE)
 #define OMAP44XX_LOCAL_TWD_BASE         0x48240600
-#define OMAP44XX_VA_LOCAL_TWD_BASE      IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
+#define OMAP44XX_VA_LOCAL_TWD_BASE      OMAP2_IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE)
 #define OMAP44XX_LOCAL_TWD_SIZE         0x00000100
 #define OMAP44XX_WKUPGEN_BASE           0x48281000
-#define OMAP44XX_VA_WKUPGEN_BASE        IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
+#define OMAP44XX_VA_WKUPGEN_BASE        OMAP2_IO_ADDRESS(OMAP44XX_WKUPGEN_BASE)
 
 #endif /* __ASM_ARCH_OMAP44XX_H */
 
diff --git a/arch/arm/plat-omap/include/mach/omap_device.h b/arch/arm/plat-omap/include/mach/omap_device.h
new file mode 100644
index 000000000000..bd0e136db337
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_device.h
@@ -0,0 +1,141 @@
+/*
+ * omap_device headers
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Developed in collaboration with (alphabetical order): Benoit
+ * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
+ * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
+ * Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Eventually this type of functionality should either be
+ * a) implemented via arch-specific pointers in platform_device
+ * or
+ * b) implemented as a proper omap_bus/omap_device in Linux, no more
+ *    platform_device
+ *
+ * omap_device differs from omap_hwmod in that it includes external
+ * (e.g., board- and system-level) integration details.  omap_hwmod
+ * stores hardware data that is invariant for a given OMAP chip.
+ *
+ * To do:
+ * - GPIO integration
+ * - regulator integration
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_DEVICE_H
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+
+#include <mach/omap_hwmod.h>
+
+/* omap_device._state values */
+#define OMAP_DEVICE_STATE_UNKNOWN       0
+#define OMAP_DEVICE_STATE_ENABLED       1
+#define OMAP_DEVICE_STATE_IDLE          2
+#define OMAP_DEVICE_STATE_SHUTDOWN      3
+
+/**
+ * struct omap_device - omap_device wrapper for platform_devices
+ * @pdev: platform_device
+ * @hwmods: (one .. many per omap_device)
+ * @hwmods_cnt: ARRAY_SIZE() of @hwmods
+ * @pm_lats: ptr to an omap_device_pm_latency table
+ * @pm_lats_cnt: ARRAY_SIZE() of what is passed to @pm_lats
+ * @pm_lat_level: array index of the last odpl entry executed - -1 if never
+ * @dev_wakeup_lat: dev wakeup latency in microseconds
+ * @_dev_wakeup_lat_limit: dev wakeup latency limit in usec - set by OMAP PM
+ * @_state: one of OMAP_DEVICE_STATE_* (see above)
+ * @flags: device flags
+ *
+ * Integrates omap_hwmod data into Linux platform_device.
+ *
+ * Field names beginning with underscores are for the internal use of
+ * the omap_device code.
+ *
+ */
+struct omap_device {
+        struct platform_device          pdev;
+        struct omap_hwmod               **hwmods;
+        struct omap_device_pm_latency   *pm_lats;
+        u32                             dev_wakeup_lat;
+        u32                             _dev_wakeup_lat_limit;
+        u8                              pm_lats_cnt;
+        s8                              pm_lat_level;
+        u8                              hwmods_cnt;
+        u8                              _state;
+};
+
+/* Device driver interface (call via platform_data fn ptrs) */
+
+int omap_device_enable(struct platform_device *pdev);
+int omap_device_idle(struct platform_device *pdev);
+int omap_device_shutdown(struct platform_device *pdev);
+
+/* Core code interface */
+
+int omap_device_count_resources(struct omap_device *od);
+int omap_device_fill_resources(struct omap_device *od, struct resource *res);
+
+struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
+                                      struct omap_hwmod *oh, void *pdata,
+                                      int pdata_len,
+                                      struct omap_device_pm_latency *pm_lats,
+                                      int pm_lats_cnt);
+
+struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
+                                         struct omap_hwmod **oh, int oh_cnt,
+                                         void *pdata, int pdata_len,
+                                         struct omap_device_pm_latency *pm_lats,
+                                         int pm_lats_cnt);
+
+int omap_device_register(struct omap_device *od);
+
+/* OMAP PM interface */
+int omap_device_align_pm_lat(struct platform_device *pdev,
+                             u32 new_wakeup_lat_limit);
+struct powerdomain *omap_device_get_pwrdm(struct omap_device *od);
+
+/* Other */
+
+int omap_device_idle_hwmods(struct omap_device *od);
+int omap_device_enable_hwmods(struct omap_device *od);
+
+int omap_device_disable_clocks(struct omap_device *od);
+int omap_device_enable_clocks(struct omap_device *od);
+
+
+/*
+ * Entries should be kept in latency order ascending
+ *
+ * deact_lat is the maximum number of microseconds required to complete
+ * deactivate_func() at the device's slowest OPP.
+ *
+ * act_lat is the maximum number of microseconds required to complete
+ * activate_func() at the device's slowest OPP.
+ *
+ * This will result in some suboptimal power management decisions at fast
+ * OPPs, but avoids having to recompute all device power management decisions
+ * if the system shifts from a fast OPP to a slow OPP (in order to meet
+ * latency requirements).
+ *
+ * XXX should deactivate_func/activate_func() take platform_device pointers
+ * rather than omap_device pointers?
+ */
+struct omap_device_pm_latency {
+        u32 deactivate_lat;
+        int (*deactivate_func)(struct omap_device *od);
+        u32 activate_lat;
+        int (*activate_func)(struct omap_device *od);
+};
+
+
+#endif
+
diff --git a/arch/arm/plat-omap/include/mach/omap_hwmod.h b/arch/arm/plat-omap/include/mach/omap_hwmod.h
new file mode 100644
index 000000000000..1f79c20e2929
--- /dev/null
+++ b/arch/arm/plat-omap/include/mach/omap_hwmod.h
@@ -0,0 +1,447 @@
+/*
+ * omap_hwmod macros, structures
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Created in collaboration with (alphabetical order): Benoit Cousson,
+ * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari
+ * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * These headers and macros are used to define OMAP on-chip module
+ * data and their integration with other OMAP modules and Linux.
+ *
+ * References:
+ * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
+ * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
+ * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
+ * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
+ * - Open Core Protocol Specification 2.2
+ *
+ * To do:
+ * - add interconnect error log structures
+ * - add pinmuxing
+ * - init_conn_id_bit (CONNID_BIT_VECTOR)
+ * - implement default hwmod SMS/SDRC flags?
+ *
+ */
+#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
+#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H
+
+#include <linux/kernel.h>
+#include <linux/ioport.h>
+
+#include <mach/cpu.h>
+
+struct omap_device;
+
+/* OCP SYSCONFIG bit shifts/masks */
+#define SYSC_MIDLEMODE_SHIFT            12
+#define SYSC_MIDLEMODE_MASK             (0x3 << SYSC_MIDLEMODE_SHIFT)
+#define SYSC_CLOCKACTIVITY_SHIFT        8
+#define SYSC_CLOCKACTIVITY_MASK         (0x3 << SYSC_CLOCKACTIVITY_SHIFT)
+#define SYSC_SIDLEMODE_SHIFT            3
+#define SYSC_SIDLEMODE_MASK             (0x3 << SYSC_SIDLEMODE_SHIFT)
+#define SYSC_ENAWAKEUP_SHIFT            2
+#define SYSC_ENAWAKEUP_MASK             (1 << SYSC_ENAWAKEUP_SHIFT)
+#define SYSC_SOFTRESET_SHIFT            1
+#define SYSC_SOFTRESET_MASK             (1 << SYSC_SOFTRESET_SHIFT)
+
+/* OCP SYSSTATUS bit shifts/masks */
+#define SYSS_RESETDONE_SHIFT            0
+#define SYSS_RESETDONE_MASK             (1 << SYSS_RESETDONE_SHIFT)
+
+/* Master standby/slave idle mode flags */
+#define HWMOD_IDLEMODE_FORCE            (1 << 0)
+#define HWMOD_IDLEMODE_NO               (1 << 1)
+#define HWMOD_IDLEMODE_SMART            (1 << 2)
+
+
+/**
+ * struct omap_hwmod_dma_info - MPU address space handled by the hwmod
+ * @name: name of the DMA channel (module local name)
+ * @dma_ch: DMA channel ID
+ *
+ * @name should be something short, e.g., "tx" or "rx".  It is for use
+ * by platform_get_resource_byname().  It is defined locally to the
+ * hwmod.
+ */
+struct omap_hwmod_dma_info {
+        const char      *name;
+        u16             dma_ch;
+};
+
+/**
+ * struct omap_hwmod_opt_clk - optional clocks used by this hwmod
+ * @role: "sys", "32k", "tv", etc -- for use in clk_get()
+ * @clkdev_dev_id: opt clock: clkdev dev_id string
+ * @clkdev_con_id: opt clock: clkdev con_id string
+ * @_clk: pointer to the struct clk (filled in at runtime)
+ *
+ * The module's interface clock and main functional clock should not
+ * be added as optional clocks.
+ */
+struct omap_hwmod_opt_clk {
+        const char      *role;
+        const char      *clkdev_dev_id;
+        const char      *clkdev_con_id;
+        struct clk      *_clk;
+};
+
+
+/* omap_hwmod_omap2_firewall.flags bits */
+#define OMAP_FIREWALL_L3                (1 << 0)
+#define OMAP_FIREWALL_L4                (1 << 1)
+
+/**
+ * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data
+ * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_*
+ * @l4_fw_region: L4 firewall region ID
+ * @l4_prot_group: L4 protection group ID
+ * @flags: (see omap_hwmod_omap2_firewall.flags macros above)
+ */
+struct omap_hwmod_omap2_firewall {
+        u8 l3_perm_bit;
+        u8 l4_fw_region;
+        u8 l4_prot_group;
+        u8 flags;
+};
+
+
+/*
+ * omap_hwmod_addr_space.flags bits
+ *
+ * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init.
+ * ADDR_TYPE_RT: Address space contains module register target data.
+ */
+#define ADDR_MAP_ON_INIT        (1 << 0)
+#define ADDR_TYPE_RT            (1 << 1)
+
+/**
+ * struct omap_hwmod_addr_space - MPU address space handled by the hwmod
+ * @pa_start: starting physical address
+ * @pa_end: ending physical address
+ * @flags: (see omap_hwmod_addr_space.flags macros above)
+ *
+ * Address space doesn't necessarily follow physical interconnect
+ * structure.  GPMC is one example.
+ */
+struct omap_hwmod_addr_space {
+        u32 pa_start;
+        u32 pa_end;
+        u8 flags;
+};
+
+
+/*
+ * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this
+ * interface to interact with the hwmod.  Used to add sleep dependencies
+ * when the module is enabled or disabled.
+ */
+#define OCP_USER_MPU                    (1 << 0)
+#define OCP_USER_SDMA                   (1 << 1)
+
+/* omap_hwmod_ocp_if.flags bits */
+#define OCPIF_HAS_IDLEST                (1 << 0)
+#define OCPIF_SWSUP_IDLE                (1 << 1)
+#define OCPIF_CAN_BURST                 (1 << 2)
+
+/**
+ * struct omap_hwmod_ocp_if - OCP interface data
+ * @master: struct omap_hwmod that initiates OCP transactions on this link
+ * @slave: struct omap_hwmod that responds to OCP transactions on this link
+ * @addr: address space associated with this link
+ * @clkdev_dev_id: interface clock: clkdev dev_id string
+ * @clkdev_con_id: interface clock: clkdev con_id string
+ * @_clk: pointer to the interface struct clk (filled in at runtime)
+ * @fw: interface firewall data
+ * @addr_cnt: ARRAY_SIZE(@addr)
+ * @width: OCP data width
+ * @thread_cnt: number of threads
+ * @max_burst_len: maximum burst length in @width sized words (0 if unlimited)
+ * @user: initiators using this interface (see OCP_USER_* macros above)
+ * @flags: OCP interface flags (see OCPIF_* macros above)
+ *
+ * It may also be useful to add a tag_cnt field for OCP2.x devices.
+ *
+ * Parameter names beginning with an underscore are managed internally by
+ * the omap_hwmod code and should not be set during initialization.
+ */
+struct omap_hwmod_ocp_if {
+        struct omap_hwmod               *master;
+        struct omap_hwmod               *slave;
+        struct omap_hwmod_addr_space    *addr;
+        const char                      *clkdev_dev_id;
+        const char                      *clkdev_con_id;
+        struct clk                      *_clk;
+        union {
+                struct omap_hwmod_omap2_firewall omap2;
+        }                               fw;
+        u8                              addr_cnt;
+        u8                              width;
+        u8                              thread_cnt;
+        u8                              max_burst_len;
+        u8                              user;
+        u8                              flags;
+};
+
+
+/* Macros for use in struct omap_hwmod_sysconfig */
+
+/* Flags for use in omap_hwmod_sysconfig.idlemodes */
+#define MASTER_STANDBY_SHIFT    2
+#define SLAVE_IDLE_SHIFT        0
+#define SIDLE_FORCE             (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT)
+#define SIDLE_NO                (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT)
+#define SIDLE_SMART             (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT)
+#define MSTANDBY_FORCE          (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT)
+#define MSTANDBY_NO             (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT)
+#define MSTANDBY_SMART          (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT)
+
+/* omap_hwmod_sysconfig.sysc_flags capability flags */
+#define SYSC_HAS_AUTOIDLE       (1 << 0)
+#define SYSC_HAS_SOFTRESET      (1 << 1)
+#define SYSC_HAS_ENAWAKEUP      (1 << 2)
+#define SYSC_HAS_EMUFREE        (1 << 3)
+#define SYSC_HAS_CLOCKACTIVITY  (1 << 4)
+#define SYSC_HAS_SIDLEMODE      (1 << 5)
+#define SYSC_HAS_MIDLEMODE      (1 << 6)
+#define SYSS_MISSING            (1 << 7)
+
+/* omap_hwmod_sysconfig.clockact flags */
+#define CLOCKACT_TEST_BOTH      0x0
+#define CLOCKACT_TEST_MAIN      0x1
+#define CLOCKACT_TEST_ICLK      0x2
+#define CLOCKACT_TEST_NONE      0x3
+
+/**
+ * struct omap_hwmod_sysconfig - hwmod OCP_SYSCONFIG/OCP_SYSSTATUS data
+ * @rev_offs: IP block revision register offset (from module base addr)
+ * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr)
+ * @syss_offs: OCP_SYSSTATUS register offset (from module base addr)
+ * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART}
+ * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported
+ * @clockact: the default value of the module CLOCKACTIVITY bits
+ *
+ * @clockact describes to the module which clocks are likely to be
+ * disabled when the PRCM issues its idle request to the module.  Some
+ * modules have separate clockdomains for the interface clock and main
+ * functional clock, and can check whether they should acknowledge the
+ * idle request based on the internal module functionality that has
+ * been associated with the clocks marked in @clockact.  This field is
+ * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below)
+ *
+ */
+struct omap_hwmod_sysconfig {
+        u16 rev_offs;
+        u16 sysc_offs;
+        u16 syss_offs;
+        u8 idlemodes;
+        u8 sysc_flags;
+        u8 clockact;
+};
+
+/**
+ * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data
+ * @module_offs: PRCM submodule offset from the start of the PRM/CM
+ * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3)
+ * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs
+ * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3)
+ * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit
+ * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit
+ *
+ * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST,
+ * WKEN, GRPSEL registers.  In an ideal world, no extra information
+ * would be needed for IDLEST information, but alas, there are some
+ * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit
+ * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST)
+ */
+struct omap_hwmod_omap2_prcm {
+        s16 module_offs;
+        u8 prcm_reg_id;
+        u8 module_bit;
+        u8 idlest_reg_id;
+        u8 idlest_idle_bit;
+        u8 idlest_stdby_bit;
+};
+
+
+/**
+ * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data
+ * @module_offs: PRCM submodule offset from the start of the PRM/CM1/CM2
+ * @device_offs: device register offset from @module_offs
+ * @submodule_wkdep_bit: bit shift of the WKDEP range
+ */
+struct omap_hwmod_omap4_prcm {
+        u32 module_offs;
+        u16 device_offs;
+        u8 submodule_wkdep_bit;
+};
+
+
+/*
+ * omap_hwmod.flags definitions
+ *
+ * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out
+ *     of idle, rather than relying on module smart-idle
+ * HWMOD_SWSUP_MSTDBY: omap_hwmod code should manually bring module in and out
+ *     of standby, rather than relying on module smart-standby
+ * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for
+ *     SDRAM controller, etc.
+ * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM
+ *     controller, etc.
+ * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup
+ */
+#define HWMOD_SWSUP_SIDLE                       (1 << 0)
+#define HWMOD_SWSUP_MSTANDBY                    (1 << 1)
+#define HWMOD_INIT_NO_RESET                     (1 << 2)
+#define HWMOD_INIT_NO_IDLE                      (1 << 3)
+#define HWMOD_SET_DEFAULT_CLOCKACT              (1 << 4)
+
+/*
+ * omap_hwmod._int_flags definitions
+ * These are for internal use only and are managed by the omap_hwmod code.
+ *
+ * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module
+ * _HWMOD_WAKEUP_ENABLED: set when the omap_hwmod code has enabled ENAWAKEUP
+ * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached
+ */
+#define _HWMOD_NO_MPU_PORT                      (1 << 0)
+#define _HWMOD_WAKEUP_ENABLED                   (1 << 1)
+#define _HWMOD_SYSCONFIG_LOADED                 (1 << 2)
+
+/*
+ * omap_hwmod._state definitions
+ *
+ * INITIALIZED: reset (optionally), initialized, enabled, disabled
+ *              (optionally)
+ *
+ *
+ */
+#define _HWMOD_STATE_UNKNOWN                    0
+#define _HWMOD_STATE_REGISTERED                 1
+#define _HWMOD_STATE_CLKS_INITED                2
+#define _HWMOD_STATE_INITIALIZED                3
+#define _HWMOD_STATE_ENABLED                    4
+#define _HWMOD_STATE_IDLE                       5
+#define _HWMOD_STATE_DISABLED                   6
+
+/**
+ * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks)
+ * @name: name of the hwmod
+ * @od: struct omap_device currently associated with this hwmod (internal use)
+ * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt)
+ * @sdma_chs: ptr to an array of SDMA channel IDs (see also sdma_chs_cnt)
+ * @prcm: PRCM data pertaining to this hwmod
+ * @clkdev_dev_id: main clock: clkdev dev_id string
+ * @clkdev_con_id: main clock: clkdev con_id string
+ * @_clk: pointer to the main struct clk (filled in at runtime)
+ * @opt_clks: other device clocks that drivers can request (0..*)
+ * @masters: ptr to array of OCP ifs that this hwmod can initiate on
+ * @slaves: ptr to array of OCP ifs that this hwmod can respond on
+ * @sysconfig: device SYSCONFIG/SYSSTATUS register data
+ * @dev_attr: arbitrary device attributes that can be passed to the driver
+ * @_sysc_cache: internal-use hwmod flags
+ * @_rt_va: cached register target start address (internal use)
+ * @_mpu_port_index: cached MPU register target slave ID (internal use)
+ * @msuspendmux_reg_id: CONTROL_MSUSPENDMUX register ID (1-6)
+ * @msuspendmux_shift: CONTROL_MSUSPENDMUX register bit shift
+ * @mpu_irqs_cnt: number of @mpu_irqs
+ * @sdma_chs_cnt: number of @sdma_chs
+ * @opt_clks_cnt: number of @opt_clks
+ * @master_cnt: number of @master entries
+ * @slaves_cnt: number of @slave entries
+ * @response_lat: device OCP response latency (in interface clock cycles)
+ * @_int_flags: internal-use hwmod flags
+ * @_state: internal-use hwmod state
+ * @flags: hwmod flags (documented below)
+ * @omap_chip: OMAP chips this hwmod is present on
+ * @node: list node for hwmod list (internal use)
+ *
+ * @clkdev_dev_id, @clkdev_con_id, and @clk all refer to this module's "main
+ * clock," which for our purposes is defined as "the functional clock needed
+ * for register accesses to complete."  Modules may not have a main clock if
+ * the interface clock also serves as a main clock.
+ *
+ * Parameter names beginning with an underscore are managed internally by
+ * the omap_hwmod code and should not be set during initialization.
+ */
+struct omap_hwmod {
+        const char                      *name;
+        struct omap_device              *od;
+        u8                              *mpu_irqs;
+        struct omap_hwmod_dma_info      *sdma_chs;
+        union {
+                struct omap_hwmod_omap2_prcm omap2;
+                struct omap_hwmod_omap4_prcm omap4;
+        }                               prcm;
+        const char                      *clkdev_dev_id;
+        const char                      *clkdev_con_id;
+        struct clk                      *_clk;
+        struct omap_hwmod_opt_clk       *opt_clks;
+        struct omap_hwmod_ocp_if        **masters; /* connect to *_IA */
+        struct omap_hwmod_ocp_if        **slaves;  /* connect to *_TA */
+        struct omap_hwmod_sysconfig     *sysconfig;
+        void                            *dev_attr;
+        u32                             _sysc_cache;
+        void __iomem                    *_rt_va;
+        struct list_head                node;
+        u16                             flags;
+        u8                              _mpu_port_index;
+        u8                              msuspendmux_reg_id;
+        u8                              msuspendmux_shift;
+        u8                              response_lat;
+        u8                              mpu_irqs_cnt;
+        u8                              sdma_chs_cnt;
+        u8                              opt_clks_cnt;
+        u8                              masters_cnt;
+        u8                              slaves_cnt;
+        u8                              hwmods_cnt;
+        u8                              _int_flags;
+        u8                              _state;
+        const struct omap_chip_id       omap_chip;
+};
+
+int omap_hwmod_init(struct omap_hwmod **ohs);
+int omap_hwmod_register(struct omap_hwmod *oh);
+int omap_hwmod_unregister(struct omap_hwmod *oh);
+struct omap_hwmod *omap_hwmod_lookup(const char *name);
+int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh));
+int omap_hwmod_late_init(void);
+
+int omap_hwmod_enable(struct omap_hwmod *oh);
+int omap_hwmod_idle(struct omap_hwmod *oh);
+int omap_hwmod_shutdown(struct omap_hwmod *oh);
+
+int omap_hwmod_enable_clocks(struct omap_hwmod *oh);
+int omap_hwmod_disable_clocks(struct omap_hwmod *oh);
+
+int omap_hwmod_reset(struct omap_hwmod *oh);
+void omap_hwmod_ocp_barrier(struct omap_hwmod *oh);
+
+void omap_hwmod_writel(u32 v, struct omap_hwmod *oh, u16 reg_offs);
+u32 omap_hwmod_readl(struct omap_hwmod *oh, u16 reg_offs);
+
+int omap_hwmod_count_resources(struct omap_hwmod *oh);
+int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res);
+
+struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh);
+
+int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh);
+int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
+                                 struct omap_hwmod *init_oh);
+
+int omap_hwmod_set_clockact_both(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_main(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_iclk(struct omap_hwmod *oh);
+int omap_hwmod_set_clockact_none(struct omap_hwmod *oh);
+
+int omap_hwmod_enable_wakeup(struct omap_hwmod *oh);
+int omap_hwmod_disable_wakeup(struct omap_hwmod *oh);
+
+#endif
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h
index 69c9e675d8ee..6271d8556a40 100644
--- a/arch/arm/plat-omap/include/mach/powerdomain.h
+++ b/arch/arm/plat-omap/include/mach/powerdomain.h
@@ -117,6 +117,13 @@ struct powerdomain {
 
         struct list_head node;
 
+        int state;
+        unsigned state_counter[4];
+
+#ifdef CONFIG_PM_DEBUG
+        s64 timer;
+        s64 state_timer[4];
+#endif
 };
 
 
@@ -126,7 +133,8 @@ int pwrdm_register(struct powerdomain *pwrdm);
 int pwrdm_unregister(struct powerdomain *pwrdm);
 struct powerdomain *pwrdm_lookup(const char *name);
 
-int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
+int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
+                        void *user);
 
 int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
 int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
@@ -164,4 +172,9 @@ bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
 
 int pwrdm_wait_transition(struct powerdomain *pwrdm);
 
+int pwrdm_state_switch(struct powerdomain *pwrdm);
+int pwrdm_clkdm_state_switch(struct clockdomain *clkdm);
+int pwrdm_pre_transition(void);
+int pwrdm_post_transition(void);
+
 #endif
diff --git a/arch/arm/plat-omap/include/mach/sdrc.h b/arch/arm/plat-omap/include/mach/sdrc.h
index 0be18e4ff182..1c09c78a48f2 100644
--- a/arch/arm/plat-omap/include/mach/sdrc.h
+++ b/arch/arm/plat-omap/include/mach/sdrc.h
@@ -21,19 +21,28 @@
 /* SDRC register offsets - read/write with sdrc_{read,write}_reg() */
 
 #define SDRC_SYSCONFIG          0x010
+#define SDRC_CS_CFG             0x040
+#define SDRC_SHARING            0x044
+#define SDRC_ERR_TYPE           0x04C
 #define SDRC_DLLA_CTRL          0x060
 #define SDRC_DLLA_STATUS        0x064
 #define SDRC_DLLB_CTRL          0x068
 #define SDRC_DLLB_STATUS        0x06C
 #define SDRC_POWER              0x070
+#define SDRC_MCFG_0             0x080
 #define SDRC_MR_0               0x084
+#define SDRC_EMR2_0             0x08c
 #define SDRC_ACTIM_CTRL_A_0     0x09c
 #define SDRC_ACTIM_CTRL_B_0     0x0a0
 #define SDRC_RFR_CTRL_0         0x0a4
+#define SDRC_MANUAL_0           0x0a8
+#define SDRC_MCFG_1             0x0B0
 #define SDRC_MR_1               0x0B4
+#define SDRC_EMR2_1             0x0BC
 #define SDRC_ACTIM_CTRL_A_1     0x0C4
 #define SDRC_ACTIM_CTRL_B_1     0x0C8
 #define SDRC_RFR_CTRL_1         0x0D4
+#define SDRC_MANUAL_1           0x0D8
 
 /*
  * These values represent the number of memory clock cycles between
@@ -71,11 +80,11 @@
  */
 
 #define OMAP242X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP2420_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP2420_SMS_BASE + reg)
 #define OMAP243X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP243X_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP243X_SMS_BASE + reg)
 #define OMAP343X_SMS_REGADDR(reg)                                       \
-                        (void __iomem *)IO_ADDRESS(OMAP343X_SMS_BASE + reg)
+                        (void __iomem *)OMAP2_IO_ADDRESS(OMAP343X_SMS_BASE + reg)
 
 /* SMS register offsets - read/write with sms_{read,write}_reg() */
 
diff --git a/arch/arm/plat-omap/include/mach/serial.h b/arch/arm/plat-omap/include/mach/serial.h
index def0529c75eb..e249186d26e2 100644
--- a/arch/arm/plat-omap/include/mach/serial.h
+++ b/arch/arm/plat-omap/include/mach/serial.h
@@ -13,6 +13,8 @@
 #ifndef __ASM_ARCH_SERIAL_H
 #define __ASM_ARCH_SERIAL_H
 
+#include <linux/init.h>
+
 #if defined(CONFIG_ARCH_OMAP1)
 /* OMAP1 serial ports */
 #define OMAP_UART1_BASE         0xfffb0000
@@ -53,6 +55,7 @@
                         })
 
 #ifndef __ASSEMBLER__
+extern void __init omap_serial_early_init(void);
 extern void omap_serial_init(void);
 extern int omap_uart_can_sleep(void);
 extern void omap_uart_check_wakeup(void);
diff --git a/arch/arm/plat-omap/io.c b/arch/arm/plat-omap/io.c
index 9b42d72d96cf..b6defa23e77e 100644
--- a/arch/arm/plat-omap/io.c
+++ b/arch/arm/plat-omap/io.c
@@ -30,8 +30,8 @@ void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
 {
 #ifdef CONFIG_ARCH_OMAP1
         if (cpu_class_is_omap1()) {
-                if (BETWEEN(p, IO_PHYS, IO_SIZE))
-                        return XLATE(p, IO_PHYS, IO_VIRT);
+                if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
+                        return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
         }
         if (cpu_is_omap730()) {
                 if (BETWEEN(p, OMAP730_DSP_BASE, OMAP730_DSP_SIZE))
@@ -132,3 +132,61 @@ void omap_iounmap(volatile void __iomem *addr)
                 __iounmap(addr);
 }
 EXPORT_SYMBOL(omap_iounmap);
+
+/*
+ * NOTE: Please use ioremap + __raw_read/write where possible instead of these
+ */
+
+u8 omap_readb(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readb(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readb(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readb);
+
+u16 omap_readw(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readw(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readw(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readw);
+
+u32 omap_readl(u32 pa)
+{
+        if (cpu_class_is_omap1())
+                return __raw_readl(OMAP1_IO_ADDRESS(pa));
+        else
+                return __raw_readl(OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_readl);
+
+void omap_writeb(u8 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writeb(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writeb(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writeb);
+
+void omap_writew(u16 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writew(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writew(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writew);
+
+void omap_writel(u32 v, u32 pa)
+{
+        if (cpu_class_is_omap1())
+                __raw_writel(v, OMAP1_IO_ADDRESS(pa));
+        else
+                __raw_writel(v, OMAP2_IO_ADDRESS(pa));
+}
+EXPORT_SYMBOL(omap_writel);
diff --git a/arch/arm/plat-omap/iommu-debug.c b/arch/arm/plat-omap/iommu-debug.c
new file mode 100644
index 000000000000..c799b3b0d709
--- /dev/null
+++ b/arch/arm/plat-omap/iommu-debug.c
@@ -0,0 +1,415 @@
+/*
+ * omap iommu: debugfs interface
+ *
+ * Copyright (C) 2008-2009 Nokia Corporation
+ *
+ * Written by Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+#include <linux/platform_device.h>
+#include <linux/debugfs.h>
+
+#include <mach/iommu.h>
+#include <mach/iovmm.h>
+
+#include "iopgtable.h"
+
+#define MAXCOLUMN 100 /* for short messages */
+
+static DEFINE_MUTEX(iommu_debug_lock);
+
+static struct dentry *iommu_debug_root;
+
+static ssize_t debug_read_ver(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        u32 ver = iommu_arch_version();
+        char buf[MAXCOLUMN], *p = buf;
+
+        p += sprintf(p, "H/W version: %d.%d\n", (ver >> 4) & 0xf , ver & 0xf);
+
+        return simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+}
+
+static ssize_t debug_read_regs(struct file *file, char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        ssize_t bytes;
+
+        buf = kmalloc(count, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        bytes = iommu_dump_ctx(obj, p, count);
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, bytes);
+
+        mutex_unlock(&iommu_debug_lock);
+        kfree(buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_tlb(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        ssize_t bytes, rest;
+
+        buf = kmalloc(count, GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        p += sprintf(p, "%8s %8s\n", "cam:", "ram:");
+        p += sprintf(p, "-----------------------------------------\n");
+        rest = count - (p - buf);
+        p += dump_tlb_entries(obj, p, rest);
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        kfree(buf);
+
+        return bytes;
+}
+
+static ssize_t debug_write_pagetable(struct file *file,
+                     const char __user *userbuf, size_t count, loff_t *ppos)
+{
+        struct iotlb_entry e;
+        struct cr_regs cr;
+        int err;
+        struct iommu *obj = file->private_data;
+        char buf[MAXCOLUMN], *p = buf;
+
+        count = min(count, sizeof(buf));
+
+        mutex_lock(&iommu_debug_lock);
+        if (copy_from_user(p, userbuf, count)) {
+                mutex_unlock(&iommu_debug_lock);
+                return -EFAULT;
+        }
+
+        sscanf(p, "%x %x", &cr.cam, &cr.ram);
+        if (!cr.cam || !cr.ram) {
+                mutex_unlock(&iommu_debug_lock);
+                return -EINVAL;
+        }
+
+        iotlb_cr_to_e(&cr, &e);
+        err = iopgtable_store_entry(obj, &e);
+        if (err)
+                dev_err(obj->dev, "%s: fail to store cr\n", __func__);
+
+        mutex_unlock(&iommu_debug_lock);
+        return count;
+}
+
+#define dump_ioptable_entry_one(lv, da, val)                    \
+        ({                                                      \
+                int __err = 0;                                  \
+                ssize_t bytes;                                  \
+                const int maxcol = 22;                          \
+                const char *str = "%d: %08x %08x\n";            \
+                bytes = snprintf(p, maxcol, str, lv, da, val);  \
+                p += bytes;                                     \
+                len -= bytes;                                   \
+                if (len < maxcol)                               \
+                        __err = -ENOMEM;                        \
+                __err;                                          \
+        })
+
+static ssize_t dump_ioptable(struct iommu *obj, char *buf, ssize_t len)
+{
+        int i;
+        u32 *iopgd;
+        char *p = buf;
+
+        spin_lock(&obj->page_table_lock);
+
+        iopgd = iopgd_offset(obj, 0);
+        for (i = 0; i < PTRS_PER_IOPGD; i++, iopgd++) {
+                int j, err;
+                u32 *iopte;
+                u32 da;
+
+                if (!*iopgd)
+                        continue;
+
+                if (!(*iopgd & IOPGD_TABLE)) {
+                        da = i << IOPGD_SHIFT;
+
+                        err = dump_ioptable_entry_one(1, da, *iopgd);
+                        if (err)
+                                goto out;
+                        continue;
+                }
+
+                iopte = iopte_offset(iopgd, 0);
+
+                for (j = 0; j < PTRS_PER_IOPTE; j++, iopte++) {
+                        if (!*iopte)
+                                continue;
+
+                        da = (i << IOPGD_SHIFT) + (j << IOPTE_SHIFT);
+                        err = dump_ioptable_entry_one(2, da, *iopgd);
+                        if (err)
+                                goto out;
+                }
+        }
+out:
+        spin_unlock(&obj->page_table_lock);
+
+        return p - buf;
+}
+
+static ssize_t debug_read_pagetable(struct file *file, char __user *userbuf,
+                                    size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        size_t bytes;
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        p += sprintf(p, "L: %8s %8s\n", "da:", "pa:");
+        p += sprintf(p, "-----------------------------------------\n");
+
+        mutex_lock(&iommu_debug_lock);
+
+        bytes = PAGE_SIZE - (p - buf);
+        p += dump_ioptable(obj, p, bytes);
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_mmap(struct file *file, char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        struct iovm_struct *tmp;
+        int uninitialized_var(i);
+        ssize_t bytes;
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        p += sprintf(p, "%-3s %-8s %-8s %6s %8s\n",
+                     "No", "start", "end", "size", "flags");
+        p += sprintf(p, "-------------------------------------------------\n");
+
+        mutex_lock(&iommu_debug_lock);
+
+        list_for_each_entry(tmp, &obj->mmap, list) {
+                size_t len;
+                const char *str = "%3d %08x-%08x %6x %8x\n";
+                const int maxcol = 39;
+
+                len = tmp->da_end - tmp->da_start;
+                p += snprintf(p, maxcol, str,
+                              i, tmp->da_start, tmp->da_end, len, tmp->flags);
+
+                if (PAGE_SIZE - (p - buf) < maxcol)
+                        break;
+                i++;
+        }
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_read_mem(struct file *file, char __user *userbuf,
+                              size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        char *p, *buf;
+        struct iovm_struct *area;
+        ssize_t bytes;
+
+        count = min_t(ssize_t, count, PAGE_SIZE);
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        area = find_iovm_area(obj, (u32)ppos);
+        if (IS_ERR(area)) {
+                bytes = -EINVAL;
+                goto err_out;
+        }
+        memcpy(p, area->va, count);
+        p += count;
+
+        bytes = simple_read_from_buffer(userbuf, count, ppos, buf, p - buf);
+err_out:
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return bytes;
+}
+
+static ssize_t debug_write_mem(struct file *file, const char __user *userbuf,
+                               size_t count, loff_t *ppos)
+{
+        struct iommu *obj = file->private_data;
+        struct iovm_struct *area;
+        char *p, *buf;
+
+        count = min_t(size_t, count, PAGE_SIZE);
+
+        buf = (char *)__get_free_page(GFP_KERNEL);
+        if (!buf)
+                return -ENOMEM;
+        p = buf;
+
+        mutex_lock(&iommu_debug_lock);
+
+        if (copy_from_user(p, userbuf, count)) {
+                count =  -EFAULT;
+                goto err_out;
+        }
+
+        area = find_iovm_area(obj, (u32)ppos);
+        if (IS_ERR(area)) {
+                count = -EINVAL;
+                goto err_out;
+        }
+        memcpy(area->va, p, count);
+err_out:
+        mutex_unlock(&iommu_debug_lock);
+        free_page((unsigned long)buf);
+
+        return count;
+}
+
+static int debug_open_generic(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+
+#define DEBUG_FOPS(name)                                                \
+        static const struct file_operations debug_##name##_fops = {     \
+                .open = debug_open_generic,                             \
+                .read = debug_read_##name,                              \
+                .write = debug_write_##name,                            \
+        };
+
+#define DEBUG_FOPS_RO(name)                                             \
+        static const struct file_operations debug_##name##_fops = {     \
+                .open = debug_open_generic,                             \
+                .read = debug_read_##name,                              \
+        };
+
+DEBUG_FOPS_RO(ver);
+DEBUG_FOPS_RO(regs);
+DEBUG_FOPS_RO(tlb);
+DEBUG_FOPS(pagetable);
+DEBUG_FOPS_RO(mmap);
+DEBUG_FOPS(mem);
+
+#define __DEBUG_ADD_FILE(attr, mode)                                    \
+        {                                                               \
+                struct dentry *dent;                                    \
+                dent = debugfs_create_file(#attr, mode, parent,         \
+                                           obj, &debug_##attr##_fops);  \
+                if (!dent)                                              \
+                        return -ENOMEM;                                 \
+        }
+
+#define DEBUG_ADD_FILE(name) __DEBUG_ADD_FILE(name, 600)
+#define DEBUG_ADD_FILE_RO(name) __DEBUG_ADD_FILE(name, 400)
+
+static int iommu_debug_register(struct device *dev, void *data)
+{
+        struct platform_device *pdev = to_platform_device(dev);
+        struct iommu *obj = platform_get_drvdata(pdev);
+        struct dentry *d, *parent;
+
+        if (!obj || !obj->dev)
+                return -EINVAL;
+
+        d = debugfs_create_dir(obj->name, iommu_debug_root);
+        if (!d)
+                return -ENOMEM;
+        parent = d;
+
+        d = debugfs_create_u8("nr_tlb_entries", 400, parent,
+                              (u8 *)&obj->nr_tlb_entries);
+        if (!d)
+                return -ENOMEM;
+
+        DEBUG_ADD_FILE_RO(ver);
+        DEBUG_ADD_FILE_RO(regs);
+        DEBUG_ADD_FILE_RO(tlb);
+        DEBUG_ADD_FILE(pagetable);
+        DEBUG_ADD_FILE_RO(mmap);
+        DEBUG_ADD_FILE(mem);
+
+        return 0;
+}
+
+static int __init iommu_debug_init(void)
+{
+        struct dentry *d;
+        int err;
+
+        d = debugfs_create_dir("iommu", NULL);
+        if (!d)
+                return -ENOMEM;
+        iommu_debug_root = d;
+
+        err = foreach_iommu_device(d, iommu_debug_register);
+        if (err)
+                goto err_out;
+        return 0;
+
+err_out:
+        debugfs_remove_recursive(iommu_debug_root);
+        return err;
+}
+module_init(iommu_debug_init)
+
+static void __exit iommu_debugfs_exit(void)
+{
+        debugfs_remove_recursive(iommu_debug_root);
+}
+module_exit(iommu_debugfs_exit)
+
+MODULE_DESCRIPTION("omap iommu: debugfs interface");
+MODULE_AUTHOR("Hiroshi DOYU <Hiroshi.DOYU@nokia.com>");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/arm/plat-omap/iommu.c b/arch/arm/plat-omap/iommu.c
index 4a0301399013..4b6012707307 100644
--- a/arch/arm/plat-omap/iommu.c
+++ b/arch/arm/plat-omap/iommu.c
@@ -351,16 +351,14 @@ EXPORT_SYMBOL_GPL(flush_iotlb_all);
 
 #if defined(CONFIG_OMAP_IOMMU_DEBUG_MODULE)
 
-ssize_t iommu_dump_ctx(struct iommu *obj, char *buf)
+ssize_t iommu_dump_ctx(struct iommu *obj, char *buf, ssize_t bytes)
 {
-        ssize_t bytes;
-
         if (!obj || !buf)
                 return -EINVAL;
 
         clk_enable(obj->clk);
 
-        bytes = arch_iommu->dump_ctx(obj, buf);
+        bytes = arch_iommu->dump_ctx(obj, buf, bytes);
 
         clk_disable(obj->clk);
 
@@ -368,7 +366,7 @@ ssize_t iommu_dump_ctx(struct iommu *obj, char *buf)
 }
 EXPORT_SYMBOL_GPL(iommu_dump_ctx);
 
-static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
+static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs, int num)
 {
         int i;
         struct iotlb_lock saved, l;
@@ -379,7 +377,7 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
         iotlb_lock_get(obj, &saved);
         memcpy(&l, &saved, sizeof(saved));
 
-        for (i = 0; i < obj->nr_tlb_entries; i++) {
+        for (i = 0; i < num; i++) {
                 struct cr_regs tmp;
 
                 iotlb_lock_get(obj, &l);
@@ -402,18 +400,21 @@ static int __dump_tlb_entries(struct iommu *obj, struct cr_regs *crs)
  * @obj:        target iommu
  * @buf:        output buffer
  **/
-size_t dump_tlb_entries(struct iommu *obj, char *buf)
+size_t dump_tlb_entries(struct iommu *obj, char *buf, ssize_t bytes)
 {
-        int i, n;
+        int i, num;
         struct cr_regs *cr;
         char *p = buf;
 
-        cr = kcalloc(obj->nr_tlb_entries, sizeof(*cr), GFP_KERNEL);
+        num = bytes / sizeof(*cr);
+        num = min(obj->nr_tlb_entries, num);
+
+        cr = kcalloc(num, sizeof(*cr), GFP_KERNEL);
         if (!cr)
                 return 0;
 
-        n = __dump_tlb_entries(obj, cr);
-        for (i = 0; i < n; i++)
+        num = __dump_tlb_entries(obj, cr, num);
+        for (i = 0; i < num; i++)
                 p += iotlb_dump_cr(obj, cr + i, p);
         kfree(cr);
 
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c
index 2fce2c151a95..6fc52fcbdc03 100644
--- a/arch/arm/plat-omap/iovmm.c
+++ b/arch/arm/plat-omap/iovmm.c
@@ -199,7 +199,7 @@ static void *vmap_sg(const struct sg_table *sgt)
                 va += bytes;
         }
 
-        flush_cache_vmap(new->addr, total);
+        flush_cache_vmap(new->addr, new->addr + total);
         return new->addr;
 
 err_out:
diff --git a/arch/arm/plat-omap/omap-pm-noop.c b/arch/arm/plat-omap/omap-pm-noop.c
new file mode 100644
index 000000000000..e98f0a2a6c26
--- /dev/null
+++ b/arch/arm/plat-omap/omap-pm-noop.c
@@ -0,0 +1,296 @@
+/*
+ * omap-pm-noop.c - OMAP power management interface - dummy version
+ *
+ * This code implements the OMAP power management interface to
+ * drivers, CPUIdle, CPUFreq, and DSP Bridge.  It is strictly for
+ * debug/demonstration use, as it does nothing but printk() whenever a
+ * function is called (when DEBUG is defined, below)
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Interface developed by (in alphabetical order):
+ * Karthik Dasu, Tony Lindgren, Rajendra Nayak, Sakari Poussa, Veeramanikandan
+ * Raju, Anand Sawant, Igor Stoppa, Paul Walmsley, Richard Woodruff
+ */
+
+#undef DEBUG
+
+#include <linux/init.h>
+#include <linux/cpufreq.h>
+#include <linux/device.h>
+
+/* Interface documentation is in mach/omap-pm.h */
+#include <mach/omap-pm.h>
+
+#include <mach/powerdomain.h>
+
+struct omap_opp *dsp_opps;
+struct omap_opp *mpu_opps;
+struct omap_opp *l3_opps;
+
+/*
+ * Device-driver-originated constraints (via board-*.c files)
+ */
+
+void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max MPU wakeup latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max MPU wakeup latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux, this needs to map the MPU to a
+         * powerdomain, then go through the list of current max lat
+         * constraints on the MPU and find the smallest.  If
+         * the latency constraint has changed, the code should
+         * recompute the state to enter for the next powerdomain
+         * state.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+}
+
+void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
+{
+        if (!dev || (agent_id != OCP_INITIATOR_AGENT &&
+            agent_id != OCP_TARGET_AGENT)) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (r == 0)
+                pr_debug("OMAP PM: remove min bus tput constraint: "
+                         "dev %s for agent_id %d\n", dev_name(dev), agent_id);
+        else
+                pr_debug("OMAP PM: add min bus tput constraint: "
+                         "dev %s for agent_id %d: rate %ld KiB\n",
+                         dev_name(dev), agent_id, r);
+
+        /*
+         * This code should model the interconnect and compute the
+         * required clock frequency, convert that to a VDD2 OPP ID, then
+         * set the VDD2 OPP appropriately.
+         *
+         * TI CDP code can call constraint_set here on the VDD2 OPP.
+         */
+}
+
+void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max device latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max device latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux, this needs to map the device to a
+         * powerdomain, then go through the list of current max lat
+         * constraints on that powerdomain and find the smallest.  If
+         * the latency constraint has changed, the code should
+         * recompute the state to enter for the next powerdomain
+         * state.  Conceivably, this code should also determine
+         * whether to actually disable the device clocks or not,
+         * depending on how long it takes to re-enable the clocks.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+}
+
+void omap_pm_set_max_sdma_lat(struct device *dev, long t)
+{
+        if (!dev || t < -1) {
+                WARN_ON(1);
+                return;
+        };
+
+        if (t == -1)
+                pr_debug("OMAP PM: remove max DMA latency constraint: "
+                         "dev %s\n", dev_name(dev));
+        else
+                pr_debug("OMAP PM: add max DMA latency constraint: "
+                         "dev %s, t = %ld usec\n", dev_name(dev), t);
+
+        /*
+         * For current Linux PM QOS params, this code should scan the
+         * list of maximum CPU and DMA latencies and select the
+         * smallest, then set cpu_dma_latency pm_qos_param
+         * accordingly.
+         *
+         * For future Linux PM QOS params, with separate CPU and DMA
+         * latency params, this code should just set the dma_latency param.
+         *
+         * TI CDP code can call constraint_set here.
+         */
+
+}
+
+
+/*
+ * DSP Bridge-specific constraints
+ */
+
+const struct omap_opp *omap_pm_dsp_get_opp_table(void)
+{
+        pr_debug("OMAP PM: DSP request for OPP table\n");
+
+        /*
+         * Return DSP frequency table here:  The final item in the
+         * array should have .rate = .opp_id = 0.
+         */
+
+        return NULL;
+}
+
+void omap_pm_dsp_set_min_opp(u8 opp_id)
+{
+        if (opp_id == 0) {
+                WARN_ON(1);
+                return;
+        }
+
+        pr_debug("OMAP PM: DSP requests minimum VDD1 OPP to be %d\n", opp_id);
+
+        /*
+         *
+         * For l-o dev tree, our VDD1 clk is keyed on OPP ID, so we
+         * can just test to see which is higher, the CPU's desired OPP
+         * ID or the DSP's desired OPP ID, and use whichever is
+         * highest.
+         *
+         * In CDP12.14+, the VDD1 OPP custom clock that controls the DSP
+         * rate is keyed on MPU speed, not the OPP ID.  So we need to
+         * map the OPP ID to the MPU speed for use with clk_set_rate()
+         * if it is higher than the current OPP clock rate.
+         *
+         */
+}
+
+
+u8 omap_pm_dsp_get_opp(void)
+{
+        pr_debug("OMAP PM: DSP requests current DSP OPP ID\n");
+
+        /*
+         * For l-o dev tree, call clk_get_rate() on VDD1 OPP clock
+         *
+         * CDP12.14+:
+         * Call clk_get_rate() on the OPP custom clock, map that to an
+         * OPP ID using the tables defined in board-*.c/chip-*.c files.
+         */
+
+        return 0;
+}
+
+/*
+ * CPUFreq-originated constraint
+ *
+ * In the future, this should be handled by custom OPP clocktype
+ * functions.
+ */
+
+struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void)
+{
+        pr_debug("OMAP PM: CPUFreq request for frequency table\n");
+
+        /*
+         * Return CPUFreq frequency table here: loop over
+         * all VDD1 clkrates, pull out the mpu_ck frequencies, build
+         * table
+         */
+
+        return NULL;
+}
+
+void omap_pm_cpu_set_freq(unsigned long f)
+{
+        if (f == 0) {
+                WARN_ON(1);
+                return;
+        }
+
+        pr_debug("OMAP PM: CPUFreq requests CPU frequency to be set to %lu\n",
+                 f);
+
+        /*
+         * For l-o dev tree, determine whether MPU freq or DSP OPP id
+         * freq is higher.  Find the OPP ID corresponding to the
+         * higher frequency.  Call clk_round_rate() and clk_set_rate()
+         * on the OPP custom clock.
+         *
+         * CDP should just be able to set the VDD1 OPP clock rate here.
+         */
+}
+
+unsigned long omap_pm_cpu_get_freq(void)
+{
+        pr_debug("OMAP PM: CPUFreq requests current CPU frequency\n");
+
+        /*
+         * Call clk_get_rate() on the mpu_ck.
+         */
+
+        return 0;
+}
+
+/*
+ * Device context loss tracking
+ */
+
+int omap_pm_get_dev_context_loss_count(struct device *dev)
+{
+        if (!dev) {
+                WARN_ON(1);
+                return -EINVAL;
+        };
+
+        pr_debug("OMAP PM: returning context loss count for dev %s\n",
+                 dev_name(dev));
+
+        /*
+         * Map the device to the powerdomain.  Return the powerdomain
+         * off counter.
+         */
+
+        return 0;
+}
+
+
+/* Should be called before clk framework init */
+int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
+                                 struct omap_opp *dsp_opp_table,
+                                 struct omap_opp *l3_opp_table)
+{
+        mpu_opps = mpu_opp_table;
+        dsp_opps = dsp_opp_table;
+        l3_opps = l3_opp_table;
+        return 0;
+}
+
+/* Must be called after clock framework is initialized */
+int __init omap_pm_if_init(void)
+{
+        return 0;
+}
+
+void omap_pm_if_exit(void)
+{
+        /* Deallocate CPUFreq frequency table here */
+}
+
diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c
new file mode 100644
index 000000000000..2c409fc6dd21
--- /dev/null
+++ b/arch/arm/plat-omap/omap_device.c
@@ -0,0 +1,687 @@
+/*
+ * omap_device implementation
+ *
+ * Copyright (C) 2009 Nokia Corporation
+ * Paul Walmsley
+ *
+ * Developed in collaboration with (alphabetical order): Benoit
+ * Cousson, Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram
+ * Pandita, Sakari Poussa, Anand Sawant, Santosh Shilimkar, Richard
+ * Woodruff
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This code provides a consistent interface for OMAP device drivers
+ * to control power management and interconnect properties of their
+ * devices.
+ *
+ * In the medium- to long-term, this code should either be
+ * a) implemented via arch-specific pointers in platform_data
+ * or
+ * b) implemented as a proper omap_bus/omap_device in Linux, no more
+ *    platform_data func pointers
+ *
+ *
+ * Guidelines for usage by driver authors:
+ *
+ * 1. These functions are intended to be used by device drivers via
+ * function pointers in struct platform_data.  As an example,
+ * omap_device_enable() should be passed to the driver as
+ *
+ * struct foo_driver_platform_data {
+ * ...
+ *      int (*device_enable)(struct platform_device *pdev);
+ * ...
+ * }
+ *
+ * Note that the generic "device_enable" name is used, rather than
+ * "omap_device_enable".  This is so other architectures can pass in their
+ * own enable/disable functions here.
+ *
+ * This should be populated during device setup:
+ *
+ * ...
+ * pdata->device_enable = omap_device_enable;
+ * ...
+ *
+ * 2. Drivers should first check to ensure the function pointer is not null
+ * before calling it, as in:
+ *
+ * if (pdata->device_enable)
+ *     pdata->device_enable(pdev);
+ *
+ * This allows other architectures that don't use similar device_enable()/
+ * device_shutdown() functions to execute normally.
+ *
+ * ...
+ *
+ * Suggested usage by device drivers:
+ *
+ * During device initialization:
+ * device_enable()
+ *
+ * During device idle:
+ * (save remaining device context if necessary)
+ * device_idle();
+ *
+ * During device resume:
+ * device_enable();
+ * (restore context if necessary)
+ *
+ * During device shutdown:
+ * device_shutdown()
+ * (device must be reinitialized at this point to use it again)
+ *
+ */
+#undef DEBUG
+
+#include <linux/kernel.h>
+#include <linux/platform_device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+
+#include <mach/omap_device.h>
+#include <mach/omap_hwmod.h>
+
+/* These parameters are passed to _omap_device_{de,}activate() */
+#define USE_WAKEUP_LAT                  0
+#define IGNORE_WAKEUP_LAT               1
+
+/* XXX this should be moved into a separate file */
+#if defined(CONFIG_ARCH_OMAP2420)
+# define OMAP_32KSYNCT_BASE             0x48004000
+#elif defined(CONFIG_ARCH_OMAP2430)
+# define OMAP_32KSYNCT_BASE             0x49020000
+#elif defined(CONFIG_ARCH_OMAP3430)
+# define OMAP_32KSYNCT_BASE             0x48320000
+#else
+# error Unknown OMAP device
+#endif
+
+/* Private functions */
+
+/**
+ * _read_32ksynct - read the OMAP 32K sync timer
+ *
+ * Returns the current value of the 32KiHz synchronization counter.
+ * XXX this should be generalized to simply read the system clocksource.
+ * XXX this should be moved to a separate synctimer32k.c file
+ */
+static u32 _read_32ksynct(void)
+{
+        if (!cpu_class_is_omap2())
+                BUG();
+
+        return __raw_readl(OMAP2_IO_ADDRESS(OMAP_32KSYNCT_BASE + 0x010));
+}
+
+/**
+ * _omap_device_activate - increase device readiness
+ * @od: struct omap_device *
+ * @ignore_lat: increase to latency target (0) or full readiness (1)?
+ *
+ * Increase readiness of omap_device @od (thus decreasing device
+ * wakeup latency, but consuming more power).  If @ignore_lat is
+ * IGNORE_WAKEUP_LAT, make the omap_device fully active.  Otherwise,
+ * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
+ * latency is greater than the requested maximum wakeup latency, step
+ * backwards in the omap_device_pm_latency table to ensure the
+ * device's maximum wakeup latency is less than or equal to the
+ * requested maximum wakeup latency.  Returns 0.
+ */
+static int _omap_device_activate(struct omap_device *od, u8 ignore_lat)
+{
+        u32 a, b;
+
+        pr_debug("omap_device: %s: activating\n", od->pdev.name);
+
+        while (od->pm_lat_level > 0) {
+                struct omap_device_pm_latency *odpl;
+                int act_lat = 0;
+
+                od->pm_lat_level--;
+
+                odpl = od->pm_lats + od->pm_lat_level;
+
+                if (!ignore_lat &&
+                    (od->dev_wakeup_lat <= od->_dev_wakeup_lat_limit))
+                        break;
+
+                a = _read_32ksynct();
+
+                /* XXX check return code */
+                odpl->activate_func(od);
+
+                b = _read_32ksynct();
+
+                act_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+
+                pr_debug("omap_device: %s: pm_lat %d: activate: elapsed time "
+                         "%d usec\n", od->pdev.name, od->pm_lat_level, act_lat);
+
+                WARN(act_lat > odpl->activate_lat, "omap_device: %s.%d: "
+                     "activate step %d took longer than expected (%d > %d)\n",
+                     od->pdev.name, od->pdev.id, od->pm_lat_level,
+                     act_lat, odpl->activate_lat);
+
+                od->dev_wakeup_lat -= odpl->activate_lat;
+        }
+
+        return 0;
+}
+
+/**
+ * _omap_device_deactivate - decrease device readiness
+ * @od: struct omap_device *
+ * @ignore_lat: decrease to latency target (0) or full inactivity (1)?
+ *
+ * Decrease readiness of omap_device @od (thus increasing device
+ * wakeup latency, but conserving power).  If @ignore_lat is
+ * IGNORE_WAKEUP_LAT, make the omap_device fully inactive.  Otherwise,
+ * if @ignore_lat is USE_WAKEUP_LAT, and the device's maximum wakeup
+ * latency is less than the requested maximum wakeup latency, step
+ * forwards in the omap_device_pm_latency table to ensure the device's
+ * maximum wakeup latency is less than or equal to the requested
+ * maximum wakeup latency.  Returns 0.
+ */
+static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat)
+{
+        u32 a, b;
+
+        pr_debug("omap_device: %s: deactivating\n", od->pdev.name);
+
+        while (od->pm_lat_level < od->pm_lats_cnt) {
+                struct omap_device_pm_latency *odpl;
+                int deact_lat = 0;
+
+                odpl = od->pm_lats + od->pm_lat_level;
+
+                if (!ignore_lat &&
+                    ((od->dev_wakeup_lat + odpl->activate_lat) >
+                     od->_dev_wakeup_lat_limit))
+                        break;
+
+                a = _read_32ksynct();
+
+                /* XXX check return code */
+                odpl->deactivate_func(od);
+
+                b = _read_32ksynct();
+
+                deact_lat = (b - a) >> 15; /* 32KiHz cycles to microseconds */
+
+                pr_debug("omap_device: %s: pm_lat %d: deactivate: elapsed time "
+                         "%d usec\n", od->pdev.name, od->pm_lat_level,
+                         deact_lat);
+
+                WARN(deact_lat > odpl->deactivate_lat, "omap_device: %s.%d: "
+                     "deactivate step %d took longer than expected (%d > %d)\n",
+                     od->pdev.name, od->pdev.id, od->pm_lat_level,
+                     deact_lat, odpl->deactivate_lat);
+
+                od->dev_wakeup_lat += odpl->activate_lat;
+
+                od->pm_lat_level++;
+        }
+
+        return 0;
+}
+
+static inline struct omap_device *_find_by_pdev(struct platform_device *pdev)
+{
+        return container_of(pdev, struct omap_device, pdev);
+}
+
+
+/* Public functions for use by core code */
+
+/**
+ * omap_device_count_resources - count number of struct resource entries needed
+ * @od: struct omap_device *
+ *
+ * Count the number of struct resource entries needed for this
+ * omap_device @od.  Used by omap_device_build_ss() to determine how
+ * much memory to allocate before calling
+ * omap_device_fill_resources().  Returns the count.
+ */
+int omap_device_count_resources(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int c = 0;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                c += omap_hwmod_count_resources(oh);
+
+        pr_debug("omap_device: %s: counted %d total resources across %d "
+                 "hwmods\n", od->pdev.name, c, od->hwmods_cnt);
+
+        return c;
+}
+
+/**
+ * omap_device_fill_resources - fill in array of struct resource
+ * @od: struct omap_device *
+ * @res: pointer to an array of struct resource to be filled in
+ *
+ * Populate one or more empty struct resource pointed to by @res with
+ * the resource data for this omap_device @od.  Used by
+ * omap_device_build_ss() after calling omap_device_count_resources().
+ * Ideally this function would not be needed at all.  If omap_device
+ * replaces platform_device, then we can specify our own
+ * get_resource()/ get_irq()/etc functions that use the underlying
+ * omap_hwmod information.  Or if platform_device is extended to use
+ * subarchitecture-specific function pointers, the various
+ * platform_device functions can simply call omap_device internal
+ * functions to get device resources.  Hacking around the existing
+ * platform_device code wastes memory.  Returns 0.
+ */
+int omap_device_fill_resources(struct omap_device *od, struct resource *res)
+{
+        struct omap_hwmod *oh;
+        int c = 0;
+        int i, r;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++) {
+                r = omap_hwmod_fill_resources(oh, res);
+                res += r;
+                c += r;
+        }
+
+        return 0;
+}
+
+/**
+ * omap_device_build - build and register an omap_device with one omap_hwmod
+ * @pdev_name: name of the platform_device driver to use
+ * @pdev_id: this platform_device's connection ID
+ * @oh: ptr to the single omap_hwmod that backs this omap_device
+ * @pdata: platform_data ptr to associate with the platform_device
+ * @pdata_len: amount of memory pointed to by @pdata
+ * @pm_lats: pointer to a omap_device_pm_latency array for this device
+ * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
+ *
+ * Convenience function for building and registering a single
+ * omap_device record, which in turn builds and registers a
+ * platform_device record.  See omap_device_build_ss() for more
+ * information.  Returns ERR_PTR(-EINVAL) if @oh is NULL; otherwise,
+ * passes along the return value of omap_device_build_ss().
+ */
+struct omap_device *omap_device_build(const char *pdev_name, int pdev_id,
+                                      struct omap_hwmod *oh, void *pdata,
+                                      int pdata_len,
+                                      struct omap_device_pm_latency *pm_lats,
+                                      int pm_lats_cnt)
+{
+        struct omap_hwmod *ohs[] = { oh };
+
+        if (!oh)
+                return ERR_PTR(-EINVAL);
+
+        return omap_device_build_ss(pdev_name, pdev_id, ohs, 1, pdata,
+                                    pdata_len, pm_lats, pm_lats_cnt);
+}
+
+/**
+ * omap_device_build_ss - build and register an omap_device with multiple hwmods
+ * @pdev_name: name of the platform_device driver to use
+ * @pdev_id: this platform_device's connection ID
+ * @oh: ptr to the single omap_hwmod that backs this omap_device
+ * @pdata: platform_data ptr to associate with the platform_device
+ * @pdata_len: amount of memory pointed to by @pdata
+ * @pm_lats: pointer to a omap_device_pm_latency array for this device
+ * @pm_lats_cnt: ARRAY_SIZE() of @pm_lats
+ *
+ * Convenience function for building and registering an omap_device
+ * subsystem record.  Subsystem records consist of multiple
+ * omap_hwmods.  This function in turn builds and registers a
+ * platform_device record.  Returns an ERR_PTR() on error, or passes
+ * along the return value of omap_device_register().
+ */
+struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id,
+                                         struct omap_hwmod **ohs, int oh_cnt,
+                                         void *pdata, int pdata_len,
+                                         struct omap_device_pm_latency *pm_lats,
+                                         int pm_lats_cnt)
+{
+        int ret = -ENOMEM;
+        struct omap_device *od;
+        char *pdev_name2;
+        struct resource *res = NULL;
+        int res_count;
+        struct omap_hwmod **hwmods;
+
+        if (!ohs || oh_cnt == 0 || !pdev_name)
+                return ERR_PTR(-EINVAL);
+
+        if (!pdata && pdata_len > 0)
+                return ERR_PTR(-EINVAL);
+
+        pr_debug("omap_device: %s: building with %d hwmods\n", pdev_name,
+                 oh_cnt);
+
+        od = kzalloc(sizeof(struct omap_device), GFP_KERNEL);
+        if (!od)
+                return ERR_PTR(-ENOMEM);
+
+        od->hwmods_cnt = oh_cnt;
+
+        hwmods = kzalloc(sizeof(struct omap_hwmod *) * oh_cnt,
+                         GFP_KERNEL);
+        if (!hwmods)
+                goto odbs_exit1;
+
+        memcpy(hwmods, ohs, sizeof(struct omap_hwmod *) * oh_cnt);
+        od->hwmods = hwmods;
+
+        pdev_name2 = kzalloc(strlen(pdev_name) + 1, GFP_KERNEL);
+        if (!pdev_name2)
+                goto odbs_exit2;
+        strcpy(pdev_name2, pdev_name);
+
+        od->pdev.name = pdev_name2;
+        od->pdev.id = pdev_id;
+
+        res_count = omap_device_count_resources(od);
+        if (res_count > 0) {
+                res = kzalloc(sizeof(struct resource) * res_count, GFP_KERNEL);
+                if (!res)
+                        goto odbs_exit3;
+        }
+        omap_device_fill_resources(od, res);
+
+        od->pdev.num_resources = res_count;
+        od->pdev.resource = res;
+
+        platform_device_add_data(&od->pdev, pdata, pdata_len);
+
+        od->pm_lats = pm_lats;
+        od->pm_lats_cnt = pm_lats_cnt;
+
+        ret = omap_device_register(od);
+        if (ret)
+                goto odbs_exit4;
+
+        return od;
+
+odbs_exit4:
+        kfree(res);
+odbs_exit3:
+        kfree(pdev_name2);
+odbs_exit2:
+        kfree(hwmods);
+odbs_exit1:
+        kfree(od);
+
+        pr_err("omap_device: %s: build failed (%d)\n", pdev_name, ret);
+
+        return ERR_PTR(ret);
+}
+
+/**
+ * omap_device_register - register an omap_device with one omap_hwmod
+ * @od: struct omap_device * to register
+ *
+ * Register the omap_device structure.  This currently just calls
+ * platform_device_register() on the underlying platform_device.
+ * Returns the return value of platform_device_register().
+ */
+int omap_device_register(struct omap_device *od)
+{
+        pr_debug("omap_device: %s: registering\n", od->pdev.name);
+
+        return platform_device_register(&od->pdev);
+}
+
+
+/* Public functions for use by device drivers through struct platform_data */
+
+/**
+ * omap_device_enable - fully activate an omap_device
+ * @od: struct omap_device * to activate
+ *
+ * Do whatever is necessary for the hwmods underlying omap_device @od
+ * to be accessible and ready to operate.  This generally involves
+ * enabling clocks, setting SYSCONFIG registers; and in the future may
+ * involve remuxing pins.  Device drivers should call this function
+ * (through platform_data function pointers) where they would normally
+ * enable clocks, etc.  Returns -EINVAL if called when the omap_device
+ * is already enabled, or passes along the return value of
+ * _omap_device_activate().
+ */
+int omap_device_enable(struct platform_device *pdev)
+{
+        int ret;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state == OMAP_DEVICE_STATE_ENABLED) {
+                WARN(1, "omap_device: %s.%d: omap_device_enable() called from "
+                     "invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        /* Enable everything if we're enabling this device from scratch */
+        if (od->_state == OMAP_DEVICE_STATE_UNKNOWN)
+                od->pm_lat_level = od->pm_lats_cnt;
+
+        ret = _omap_device_activate(od, IGNORE_WAKEUP_LAT);
+
+        od->dev_wakeup_lat = 0;
+        od->_dev_wakeup_lat_limit = INT_MAX;
+        od->_state = OMAP_DEVICE_STATE_ENABLED;
+
+        return ret;
+}
+
+/**
+ * omap_device_idle - idle an omap_device
+ * @od: struct omap_device * to idle
+ *
+ * Idle omap_device @od by calling as many .deactivate_func() entries
+ * in the omap_device's pm_lats table as is possible without exceeding
+ * the device's maximum wakeup latency limit, pm_lat_limit.  Device
+ * drivers should call this function (through platform_data function
+ * pointers) where they would normally disable clocks after operations
+ * complete, etc..  Returns -EINVAL if the omap_device is not
+ * currently enabled, or passes along the return value of
+ * _omap_device_deactivate().
+ */
+int omap_device_idle(struct platform_device *pdev)
+{
+        int ret;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state != OMAP_DEVICE_STATE_ENABLED) {
+                WARN(1, "omap_device: %s.%d: omap_device_idle() called from "
+                     "invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
+
+        od->_state = OMAP_DEVICE_STATE_IDLE;
+
+        return ret;
+}
+
+/**
+ * omap_device_shutdown - shut down an omap_device
+ * @od: struct omap_device * to shut down
+ *
+ * Shut down omap_device @od by calling all .deactivate_func() entries
+ * in the omap_device's pm_lats table and then shutting down all of
+ * the underlying omap_hwmods.  Used when a device is being "removed"
+ * or a device driver is being unloaded.  Returns -EINVAL if the
+ * omap_device is not currently enabled or idle, or passes along the
+ * return value of _omap_device_deactivate().
+ */
+int omap_device_shutdown(struct platform_device *pdev)
+{
+        int ret, i;
+        struct omap_device *od;
+        struct omap_hwmod *oh;
+
+        od = _find_by_pdev(pdev);
+
+        if (od->_state != OMAP_DEVICE_STATE_ENABLED &&
+            od->_state != OMAP_DEVICE_STATE_IDLE) {
+                WARN(1, "omap_device: %s.%d: omap_device_shutdown() called "
+                     "from invalid state\n", od->pdev.name, od->pdev.id);
+                return -EINVAL;
+        }
+
+        ret = _omap_device_deactivate(od, IGNORE_WAKEUP_LAT);
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_shutdown(oh);
+
+        od->_state = OMAP_DEVICE_STATE_SHUTDOWN;
+
+        return ret;
+}
+
+/**
+ * omap_device_align_pm_lat - activate/deactivate device to match wakeup lat lim
+ * @od: struct omap_device *
+ *
+ * When a device's maximum wakeup latency limit changes, call some of
+ * the .activate_func or .deactivate_func function pointers in the
+ * omap_device's pm_lats array to ensure that the device's maximum
+ * wakeup latency is less than or equal to the new latency limit.
+ * Intended to be called by OMAP PM code whenever a device's maximum
+ * wakeup latency limit changes (e.g., via
+ * omap_pm_set_dev_wakeup_lat()).  Returns 0 if nothing needs to be
+ * done (e.g., if the omap_device is not currently idle, or if the
+ * wakeup latency is already current with the new limit) or passes
+ * along the return value of _omap_device_deactivate() or
+ * _omap_device_activate().
+ */
+int omap_device_align_pm_lat(struct platform_device *pdev,
+                             u32 new_wakeup_lat_limit)
+{
+        int ret = -EINVAL;
+        struct omap_device *od;
+
+        od = _find_by_pdev(pdev);
+
+        if (new_wakeup_lat_limit == od->dev_wakeup_lat)
+                return 0;
+
+        od->_dev_wakeup_lat_limit = new_wakeup_lat_limit;
+
+        if (od->_state != OMAP_DEVICE_STATE_IDLE)
+                return 0;
+        else if (new_wakeup_lat_limit > od->dev_wakeup_lat)
+                ret = _omap_device_deactivate(od, USE_WAKEUP_LAT);
+        else if (new_wakeup_lat_limit < od->dev_wakeup_lat)
+                ret = _omap_device_activate(od, USE_WAKEUP_LAT);
+
+        return ret;
+}
+
+/**
+ * omap_device_get_pwrdm - return the powerdomain * associated with @od
+ * @od: struct omap_device *
+ *
+ * Return the powerdomain associated with the first underlying
+ * omap_hwmod for this omap_device.  Intended for use by core OMAP PM
+ * code.  Returns NULL on error or a struct powerdomain * upon
+ * success.
+ */
+struct powerdomain *omap_device_get_pwrdm(struct omap_device *od)
+{
+        /*
+         * XXX Assumes that all omap_hwmod powerdomains are identical.
+         * This may not necessarily be true.  There should be a sanity
+         * check in here to WARN() if any difference appears.
+         */
+        if (!od->hwmods_cnt)
+                return NULL;
+
+        return omap_hwmod_get_pwrdm(od->hwmods[0]);
+}
+
+/*
+ * Public functions intended for use in omap_device_pm_latency
+ * .activate_func and .deactivate_func function pointers
+ */
+
+/**
+ * omap_device_enable_hwmods - call omap_hwmod_enable() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Enable all underlying hwmods.  Returns 0.
+ */
+int omap_device_enable_hwmods(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_enable(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_idle_hwmods - call omap_hwmod_idle() on all hwmods
+ * @od: struct omap_device *od
+ *
+ * Idle all underlying hwmods.  Returns 0.
+ */
+int omap_device_idle_hwmods(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_idle(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_disable_clocks - disable all main and interface clocks
+ * @od: struct omap_device *od
+ *
+ * Disable the main functional clock and interface clock for all of the
+ * omap_hwmods associated with the omap_device.  Returns 0.
+ */
+int omap_device_disable_clocks(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_disable_clocks(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
+
+/**
+ * omap_device_enable_clocks - enable all main and interface clocks
+ * @od: struct omap_device *od
+ *
+ * Enable the main functional clock and interface clock for all of the
+ * omap_hwmods associated with the omap_device.  Returns 0.
+ */
+int omap_device_enable_clocks(struct omap_device *od)
+{
+        struct omap_hwmod *oh;
+        int i;
+
+        for (i = 0, oh = *od->hwmods; i < od->hwmods_cnt; i++, oh++)
+                omap_hwmod_enable_clocks(oh);
+
+        /* XXX pass along return value here? */
+        return 0;
+}
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c
index 5eae7876979c..925f64711c37 100644
--- a/arch/arm/plat-omap/sram.c
+++ b/arch/arm/plat-omap/sram.c
@@ -56,16 +56,16 @@
 #define SRAM_BOOTLOADER_SZ      0x80
 #endif
 
-#define OMAP24XX_VA_REQINFOPERM0        IO_ADDRESS(0x68005048)
-#define OMAP24XX_VA_READPERM0           IO_ADDRESS(0x68005050)
-#define OMAP24XX_VA_WRITEPERM0          IO_ADDRESS(0x68005058)
-
-#define OMAP34XX_VA_REQINFOPERM0        IO_ADDRESS(0x68012848)
-#define OMAP34XX_VA_READPERM0           IO_ADDRESS(0x68012850)
-#define OMAP34XX_VA_WRITEPERM0          IO_ADDRESS(0x68012858)
-#define OMAP34XX_VA_ADDR_MATCH2         IO_ADDRESS(0x68012880)
-#define OMAP34XX_VA_SMS_RG_ATT0         IO_ADDRESS(0x6C000048)
-#define OMAP34XX_VA_CONTROL_STAT        IO_ADDRESS(0x480022F0)
+#define OMAP24XX_VA_REQINFOPERM0        OMAP2_IO_ADDRESS(0x68005048)
+#define OMAP24XX_VA_READPERM0           OMAP2_IO_ADDRESS(0x68005050)
+#define OMAP24XX_VA_WRITEPERM0          OMAP2_IO_ADDRESS(0x68005058)
+
+#define OMAP34XX_VA_REQINFOPERM0        OMAP2_IO_ADDRESS(0x68012848)
+#define OMAP34XX_VA_READPERM0           OMAP2_IO_ADDRESS(0x68012850)
+#define OMAP34XX_VA_WRITEPERM0          OMAP2_IO_ADDRESS(0x68012858)
+#define OMAP34XX_VA_ADDR_MATCH2         OMAP2_IO_ADDRESS(0x68012880)
+#define OMAP34XX_VA_SMS_RG_ATT0         OMAP2_IO_ADDRESS(0x6C000048)
+#define OMAP34XX_VA_CONTROL_STAT        OMAP2_IO_ADDRESS(0x480022F0)
 
 #define GP_DEVICE               0x300