diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-12 09:38:08 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-10-12 09:38:08 -0400 |
commit | edc72786d208e77db94f84dcb0d166c0d23d82f7 (patch) | |
tree | 6fd32770f9cb2f1a888775514294d60aecba5245 /arch/arm | |
parent | 6a5e293f1b34920c69a932ce37b4a4714a428dc7 (diff) | |
parent | 4367216a099b4df3fa2c4f2b086cda1a1e9afc4e (diff) |
Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/kernel/time.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-integrator/pci_v3.c | 1 | ||||
-rw-r--r-- | arch/arm/mach-omap2/board-rx51-peripherals.c | 78 | ||||
-rw-r--r-- | arch/arm/mach-omap2/clock34xx.c | 35 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm-debug.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 187 | ||||
-rw-r--r-- | arch/arm/mach-omap2/powerdomain.c | 39 | ||||
-rw-r--r-- | arch/arm/mach-pxa/cpufreq-pxa2xx.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/csb726.c | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/cpu.h | 37 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/mach/powerdomain.h | 2 | ||||
-rw-r--r-- | arch/arm/plat-omap/iovmm.c | 9 | ||||
-rw-r--r-- | arch/arm/plat-omap/sram.c | 3 | ||||
-rw-r--r-- | arch/arm/plat-s3c24xx/adc.c | 1 |
14 files changed, 237 insertions, 164 deletions
diff --git a/arch/arm/kernel/time.c b/arch/arm/kernel/time.c index 4cdc4a0bd02d..d38cdf2c8276 100644 --- a/arch/arm/kernel/time.c +++ b/arch/arm/kernel/time.c | |||
@@ -21,6 +21,7 @@ | |||
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/time.h> | 22 | #include <linux/time.h> |
23 | #include <linux/init.h> | 23 | #include <linux/init.h> |
24 | #include <linux/sched.h> | ||
24 | #include <linux/smp.h> | 25 | #include <linux/smp.h> |
25 | #include <linux/timex.h> | 26 | #include <linux/timex.h> |
26 | #include <linux/errno.h> | 27 | #include <linux/errno.h> |
diff --git a/arch/arm/mach-integrator/pci_v3.c b/arch/arm/mach-integrator/pci_v3.c index 901cc205015e..148d25fc636f 100644 --- a/arch/arm/mach-integrator/pci_v3.c +++ b/arch/arm/mach-integrator/pci_v3.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include <mach/hardware.h> | 32 | #include <mach/hardware.h> |
33 | #include <asm/irq.h> | 33 | #include <asm/irq.h> |
34 | #include <asm/signal.h> | ||
34 | #include <asm/system.h> | 35 | #include <asm/system.h> |
35 | #include <asm/mach/pci.h> | 36 | #include <asm/mach/pci.h> |
36 | #include <asm/irq_regs.h> | 37 | #include <asm/irq_regs.h> |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index b45ad312c587..c1af5326e92f 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -38,49 +38,49 @@ | |||
38 | 38 | ||
39 | static int board_keymap[] = { | 39 | static int board_keymap[] = { |
40 | KEY(0, 0, KEY_Q), | 40 | KEY(0, 0, KEY_Q), |
41 | KEY(0, 1, KEY_W), | 41 | KEY(0, 1, KEY_O), |
42 | KEY(0, 2, KEY_E), | 42 | KEY(0, 2, KEY_P), |
43 | KEY(0, 3, KEY_R), | 43 | KEY(0, 3, KEY_COMMA), |
44 | KEY(0, 4, KEY_T), | 44 | KEY(0, 4, KEY_BACKSPACE), |
45 | KEY(0, 5, KEY_Y), | 45 | KEY(0, 6, KEY_A), |
46 | KEY(0, 6, KEY_U), | 46 | KEY(0, 7, KEY_S), |
47 | KEY(0, 7, KEY_I), | 47 | KEY(1, 0, KEY_W), |
48 | KEY(1, 0, KEY_O), | ||
49 | KEY(1, 1, KEY_D), | 48 | KEY(1, 1, KEY_D), |
50 | KEY(1, 2, KEY_DOT), | 49 | KEY(1, 2, KEY_F), |
51 | KEY(1, 3, KEY_V), | 50 | KEY(1, 3, KEY_G), |
52 | KEY(1, 4, KEY_DOWN), | 51 | KEY(1, 4, KEY_H), |
53 | KEY(2, 0, KEY_P), | 52 | KEY(1, 5, KEY_J), |
54 | KEY(2, 1, KEY_F), | 53 | KEY(1, 6, KEY_K), |
54 | KEY(1, 7, KEY_L), | ||
55 | KEY(2, 0, KEY_E), | ||
56 | KEY(2, 1, KEY_DOT), | ||
55 | KEY(2, 2, KEY_UP), | 57 | KEY(2, 2, KEY_UP), |
56 | KEY(2, 3, KEY_B), | 58 | KEY(2, 3, KEY_ENTER), |
57 | KEY(2, 4, KEY_RIGHT), | 59 | KEY(2, 5, KEY_Z), |
58 | KEY(3, 0, KEY_COMMA), | 60 | KEY(2, 6, KEY_X), |
59 | KEY(3, 1, KEY_G), | 61 | KEY(2, 7, KEY_C), |
60 | KEY(3, 2, KEY_ENTER), | 62 | KEY(3, 0, KEY_R), |
63 | KEY(3, 1, KEY_V), | ||
64 | KEY(3, 2, KEY_B), | ||
61 | KEY(3, 3, KEY_N), | 65 | KEY(3, 3, KEY_N), |
62 | KEY(4, 0, KEY_BACKSPACE), | 66 | KEY(3, 4, KEY_M), |
63 | KEY(4, 1, KEY_H), | 67 | KEY(3, 5, KEY_SPACE), |
64 | KEY(4, 3, KEY_M), | 68 | KEY(3, 6, KEY_SPACE), |
69 | KEY(3, 7, KEY_LEFT), | ||
70 | KEY(4, 0, KEY_T), | ||
71 | KEY(4, 1, KEY_DOWN), | ||
72 | KEY(4, 2, KEY_RIGHT), | ||
65 | KEY(4, 4, KEY_LEFTCTRL), | 73 | KEY(4, 4, KEY_LEFTCTRL), |
66 | KEY(5, 1, KEY_J), | 74 | KEY(4, 5, KEY_RIGHTALT), |
67 | KEY(5, 2, KEY_Z), | 75 | KEY(4, 6, KEY_LEFTSHIFT), |
68 | KEY(5, 3, KEY_SPACE), | 76 | KEY(5, 0, KEY_Y), |
69 | KEY(5, 4, KEY_LEFTSHIFT), | 77 | KEY(6, 0, KEY_U), |
70 | KEY(6, 0, KEY_A), | 78 | KEY(7, 0, KEY_I), |
71 | KEY(6, 1, KEY_K), | 79 | KEY(7, 1, KEY_F7), |
72 | KEY(6, 2, KEY_X), | 80 | KEY(7, 2, KEY_F8), |
73 | KEY(6, 3, KEY_SPACE), | 81 | KEY(0xff, 2, KEY_F9), |
74 | KEY(6, 4, KEY_FN), | 82 | KEY(0xff, 4, KEY_F10), |
75 | KEY(7, 0, KEY_S), | 83 | KEY(0xff, 5, KEY_F11), |
76 | KEY(7, 1, KEY_L), | ||
77 | KEY(7, 2, KEY_C), | ||
78 | KEY(7, 3, KEY_LEFT), | ||
79 | KEY(0xff, 0, KEY_F6), | ||
80 | KEY(0xff, 1, KEY_F7), | ||
81 | KEY(0xff, 2, KEY_F8), | ||
82 | KEY(0xff, 4, KEY_F9), | ||
83 | KEY(0xff, 5, KEY_F10), | ||
84 | }; | 84 | }; |
85 | 85 | ||
86 | static struct matrix_keymap_data board_map_data = { | 86 | static struct matrix_keymap_data board_map_data = { |
diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c index fafcd32e6907..489556eecbd1 100644 --- a/arch/arm/mach-omap2/clock34xx.c +++ b/arch/arm/mach-omap2/clock34xx.c | |||
@@ -338,6 +338,13 @@ static struct omap_clk omap34xx_clks[] = { | |||
338 | */ | 338 | */ |
339 | #define SDRC_MPURATE_LOOPS 96 | 339 | #define SDRC_MPURATE_LOOPS 96 |
340 | 340 | ||
341 | /* | ||
342 | * DPLL5_FREQ_FOR_USBHOST: USBHOST and USBTLL are the only clocks | ||
343 | * that are sourced by DPLL5, and both of these require this clock | ||
344 | * to be at 120 MHz for proper operation. | ||
345 | */ | ||
346 | #define DPLL5_FREQ_FOR_USBHOST 120000000 | ||
347 | |||
341 | /** | 348 | /** |
342 | * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI | 349 | * omap3430es2_clk_ssi_find_idlest - return CM_IDLEST info for SSI |
343 | * @clk: struct clk * being enabled | 350 | * @clk: struct clk * being enabled |
@@ -1056,6 +1063,28 @@ void omap2_clk_prepare_for_reboot(void) | |||
1056 | #endif | 1063 | #endif |
1057 | } | 1064 | } |
1058 | 1065 | ||
1066 | static void omap3_clk_lock_dpll5(void) | ||
1067 | { | ||
1068 | struct clk *dpll5_clk; | ||
1069 | struct clk *dpll5_m2_clk; | ||
1070 | |||
1071 | dpll5_clk = clk_get(NULL, "dpll5_ck"); | ||
1072 | clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); | ||
1073 | clk_enable(dpll5_clk); | ||
1074 | |||
1075 | /* Enable autoidle to allow it to enter low power bypass */ | ||
1076 | omap3_dpll_allow_idle(dpll5_clk); | ||
1077 | |||
1078 | /* Program dpll5_m2_clk divider for no division */ | ||
1079 | dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); | ||
1080 | clk_enable(dpll5_m2_clk); | ||
1081 | clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); | ||
1082 | |||
1083 | clk_disable(dpll5_m2_clk); | ||
1084 | clk_disable(dpll5_clk); | ||
1085 | return; | ||
1086 | } | ||
1087 | |||
1059 | /* REVISIT: Move this init stuff out into clock.c */ | 1088 | /* REVISIT: Move this init stuff out into clock.c */ |
1060 | 1089 | ||
1061 | /* | 1090 | /* |
@@ -1148,6 +1177,12 @@ int __init omap2_clk_init(void) | |||
1148 | */ | 1177 | */ |
1149 | clk_enable_init_clocks(); | 1178 | clk_enable_init_clocks(); |
1150 | 1179 | ||
1180 | /* | ||
1181 | * Lock DPLL5 and put it in autoidle. | ||
1182 | */ | ||
1183 | if (omap_rev() >= OMAP3430_REV_ES2_0) | ||
1184 | omap3_clk_lock_dpll5(); | ||
1185 | |||
1151 | /* Avoid sleeping during omap2_clk_prepare_for_reboot() */ | 1186 | /* Avoid sleeping during omap2_clk_prepare_for_reboot() */ |
1152 | /* REVISIT: not yet ready for 343x */ | 1187 | /* REVISIT: not yet ready for 343x */ |
1153 | #if 0 | 1188 | #if 0 |
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c index 1b4c1600f8d8..2fc4d6abbd0a 100644 --- a/arch/arm/mach-omap2/pm-debug.c +++ b/arch/arm/mach-omap2/pm-debug.c | |||
@@ -541,7 +541,7 @@ static int __init pm_dbg_init(void) | |||
541 | printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); | 541 | printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); |
542 | return -ENODEV; | 542 | return -ENODEV; |
543 | } | 543 | } |
544 | 544 | ||
545 | d = debugfs_create_dir("pm_debug", NULL); | 545 | d = debugfs_create_dir("pm_debug", NULL); |
546 | if (IS_ERR(d)) | 546 | if (IS_ERR(d)) |
547 | return PTR_ERR(d); | 547 | return PTR_ERR(d); |
@@ -551,7 +551,7 @@ static int __init pm_dbg_init(void) | |||
551 | (void) debugfs_create_file("time", S_IRUGO, | 551 | (void) debugfs_create_file("time", S_IRUGO, |
552 | d, (void *)DEBUG_FILE_TIMERS, &debug_fops); | 552 | d, (void *)DEBUG_FILE_TIMERS, &debug_fops); |
553 | 553 | ||
554 | pwrdm_for_each(pwrdms_setup, (void *)d); | 554 | pwrdm_for_each_nolock(pwrdms_setup, (void *)d); |
555 | 555 | ||
556 | pm_dbg_dir = debugfs_create_dir("registers", d); | 556 | pm_dbg_dir = debugfs_create_dir("registers", d); |
557 | if (IS_ERR(pm_dbg_dir)) | 557 | if (IS_ERR(pm_dbg_dir)) |
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0ff5a6c53aa0..378c2f618358 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c | |||
@@ -51,97 +51,112 @@ static void (*_omap_sram_idle)(u32 *addr, int save_state); | |||
51 | 51 | ||
52 | static struct powerdomain *mpu_pwrdm; | 52 | static struct powerdomain *mpu_pwrdm; |
53 | 53 | ||
54 | /* PRCM Interrupt Handler for wakeups */ | 54 | /* |
55 | static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) | 55 | * PRCM Interrupt Handler Helper Function |
56 | * | ||
57 | * The purpose of this function is to clear any wake-up events latched | ||
58 | * in the PRCM PM_WKST_x registers. It is possible that a wake-up event | ||
59 | * may occur whilst attempting to clear a PM_WKST_x register and thus | ||
60 | * set another bit in this register. A while loop is used to ensure | ||
61 | * that any peripheral wake-up events occurring while attempting to | ||
62 | * clear the PM_WKST_x are detected and cleared. | ||
63 | */ | ||
64 | static int prcm_clear_mod_irqs(s16 module, u8 regs) | ||
56 | { | 65 | { |
57 | u32 wkst, irqstatus_mpu; | 66 | u32 wkst, fclk, iclk, clken; |
58 | u32 fclk, iclk; | 67 | u16 wkst_off = (regs == 3) ? OMAP3430ES2_PM_WKST3 : PM_WKST1; |
59 | 68 | u16 fclk_off = (regs == 3) ? OMAP3430ES2_CM_FCLKEN3 : CM_FCLKEN1; | |
60 | /* WKUP */ | 69 | u16 iclk_off = (regs == 3) ? CM_ICLKEN3 : CM_ICLKEN1; |
61 | wkst = prm_read_mod_reg(WKUP_MOD, PM_WKST); | 70 | u16 grpsel_off = (regs == 3) ? |
71 | OMAP3430ES2_PM_MPUGRPSEL3 : OMAP3430_PM_MPUGRPSEL; | ||
72 | int c = 0; | ||
73 | |||
74 | wkst = prm_read_mod_reg(module, wkst_off); | ||
75 | wkst &= prm_read_mod_reg(module, grpsel_off); | ||
62 | if (wkst) { | 76 | if (wkst) { |
63 | iclk = cm_read_mod_reg(WKUP_MOD, CM_ICLKEN); | 77 | iclk = cm_read_mod_reg(module, iclk_off); |
64 | fclk = cm_read_mod_reg(WKUP_MOD, CM_FCLKEN); | 78 | fclk = cm_read_mod_reg(module, fclk_off); |
65 | cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_ICLKEN); | 79 | while (wkst) { |
66 | cm_set_mod_reg_bits(wkst, WKUP_MOD, CM_FCLKEN); | 80 | clken = wkst; |
67 | prm_write_mod_reg(wkst, WKUP_MOD, PM_WKST); | 81 | cm_set_mod_reg_bits(clken, module, iclk_off); |
68 | while (prm_read_mod_reg(WKUP_MOD, PM_WKST)) | 82 | /* |
69 | cpu_relax(); | 83 | * For USBHOST, we don't know whether HOST1 or |
70 | cm_write_mod_reg(iclk, WKUP_MOD, CM_ICLKEN); | 84 | * HOST2 woke us up, so enable both f-clocks |
71 | cm_write_mod_reg(fclk, WKUP_MOD, CM_FCLKEN); | 85 | */ |
86 | if (module == OMAP3430ES2_USBHOST_MOD) | ||
87 | clken |= 1 << OMAP3430ES2_EN_USBHOST2_SHIFT; | ||
88 | cm_set_mod_reg_bits(clken, module, fclk_off); | ||
89 | prm_write_mod_reg(wkst, module, wkst_off); | ||
90 | wkst = prm_read_mod_reg(module, wkst_off); | ||
91 | c++; | ||
92 | } | ||
93 | cm_write_mod_reg(iclk, module, iclk_off); | ||
94 | cm_write_mod_reg(fclk, module, fclk_off); | ||
72 | } | 95 | } |
73 | 96 | ||
74 | /* CORE */ | 97 | return c; |
75 | wkst = prm_read_mod_reg(CORE_MOD, PM_WKST1); | 98 | } |
76 | if (wkst) { | ||
77 | iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN1); | ||
78 | fclk = cm_read_mod_reg(CORE_MOD, CM_FCLKEN1); | ||
79 | cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN1); | ||
80 | cm_set_mod_reg_bits(wkst, CORE_MOD, CM_FCLKEN1); | ||
81 | prm_write_mod_reg(wkst, CORE_MOD, PM_WKST1); | ||
82 | while (prm_read_mod_reg(CORE_MOD, PM_WKST1)) | ||
83 | cpu_relax(); | ||
84 | cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN1); | ||
85 | cm_write_mod_reg(fclk, CORE_MOD, CM_FCLKEN1); | ||
86 | } | ||
87 | wkst = prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3); | ||
88 | if (wkst) { | ||
89 | iclk = cm_read_mod_reg(CORE_MOD, CM_ICLKEN3); | ||
90 | fclk = cm_read_mod_reg(CORE_MOD, OMAP3430ES2_CM_FCLKEN3); | ||
91 | cm_set_mod_reg_bits(wkst, CORE_MOD, CM_ICLKEN3); | ||
92 | cm_set_mod_reg_bits(wkst, CORE_MOD, OMAP3430ES2_CM_FCLKEN3); | ||
93 | prm_write_mod_reg(wkst, CORE_MOD, OMAP3430ES2_PM_WKST3); | ||
94 | while (prm_read_mod_reg(CORE_MOD, OMAP3430ES2_PM_WKST3)) | ||
95 | cpu_relax(); | ||
96 | cm_write_mod_reg(iclk, CORE_MOD, CM_ICLKEN3); | ||
97 | cm_write_mod_reg(fclk, CORE_MOD, OMAP3430ES2_CM_FCLKEN3); | ||
98 | } | ||
99 | 99 | ||
100 | /* PER */ | 100 | static int _prcm_int_handle_wakeup(void) |
101 | wkst = prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST); | 101 | { |
102 | if (wkst) { | 102 | int c; |
103 | iclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_ICLKEN); | ||
104 | fclk = cm_read_mod_reg(OMAP3430_PER_MOD, CM_FCLKEN); | ||
105 | cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_ICLKEN); | ||
106 | cm_set_mod_reg_bits(wkst, OMAP3430_PER_MOD, CM_FCLKEN); | ||
107 | prm_write_mod_reg(wkst, OMAP3430_PER_MOD, PM_WKST); | ||
108 | while (prm_read_mod_reg(OMAP3430_PER_MOD, PM_WKST)) | ||
109 | cpu_relax(); | ||
110 | cm_write_mod_reg(iclk, OMAP3430_PER_MOD, CM_ICLKEN); | ||
111 | cm_write_mod_reg(fclk, OMAP3430_PER_MOD, CM_FCLKEN); | ||
112 | } | ||
113 | 103 | ||
104 | c = prcm_clear_mod_irqs(WKUP_MOD, 1); | ||
105 | c += prcm_clear_mod_irqs(CORE_MOD, 1); | ||
106 | c += prcm_clear_mod_irqs(OMAP3430_PER_MOD, 1); | ||
114 | if (omap_rev() > OMAP3430_REV_ES1_0) { | 107 | if (omap_rev() > OMAP3430_REV_ES1_0) { |
115 | /* USBHOST */ | 108 | c += prcm_clear_mod_irqs(CORE_MOD, 3); |
116 | wkst = prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, PM_WKST); | 109 | c += prcm_clear_mod_irqs(OMAP3430ES2_USBHOST_MOD, 1); |
117 | if (wkst) { | ||
118 | iclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, | ||
119 | CM_ICLKEN); | ||
120 | fclk = cm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, | ||
121 | CM_FCLKEN); | ||
122 | cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD, | ||
123 | CM_ICLKEN); | ||
124 | cm_set_mod_reg_bits(wkst, OMAP3430ES2_USBHOST_MOD, | ||
125 | CM_FCLKEN); | ||
126 | prm_write_mod_reg(wkst, OMAP3430ES2_USBHOST_MOD, | ||
127 | PM_WKST); | ||
128 | while (prm_read_mod_reg(OMAP3430ES2_USBHOST_MOD, | ||
129 | PM_WKST)) | ||
130 | cpu_relax(); | ||
131 | cm_write_mod_reg(iclk, OMAP3430ES2_USBHOST_MOD, | ||
132 | CM_ICLKEN); | ||
133 | cm_write_mod_reg(fclk, OMAP3430ES2_USBHOST_MOD, | ||
134 | CM_FCLKEN); | ||
135 | } | ||
136 | } | 110 | } |
137 | 111 | ||
138 | irqstatus_mpu = prm_read_mod_reg(OCP_MOD, | 112 | return c; |
139 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | 113 | } |
140 | prm_write_mod_reg(irqstatus_mpu, OCP_MOD, | 114 | |
141 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | 115 | /* |
116 | * PRCM Interrupt Handler | ||
117 | * | ||
118 | * The PRM_IRQSTATUS_MPU register indicates if there are any pending | ||
119 | * interrupts from the PRCM for the MPU. These bits must be cleared in | ||
120 | * order to clear the PRCM interrupt. The PRCM interrupt handler is | ||
121 | * implemented to simply clear the PRM_IRQSTATUS_MPU in order to clear | ||
122 | * the PRCM interrupt. Please note that bit 0 of the PRM_IRQSTATUS_MPU | ||
123 | * register indicates that a wake-up event is pending for the MPU and | ||
124 | * this bit can only be cleared if the all the wake-up events latched | ||
125 | * in the various PM_WKST_x registers have been cleared. The interrupt | ||
126 | * handler is implemented using a do-while loop so that if a wake-up | ||
127 | * event occurred during the processing of the prcm interrupt handler | ||
128 | * (setting a bit in the corresponding PM_WKST_x register and thus | ||
129 | * preventing us from clearing bit 0 of the PRM_IRQSTATUS_MPU register) | ||
130 | * this would be handled. | ||
131 | */ | ||
132 | static irqreturn_t prcm_interrupt_handler (int irq, void *dev_id) | ||
133 | { | ||
134 | u32 irqstatus_mpu; | ||
135 | int c = 0; | ||
136 | |||
137 | do { | ||
138 | irqstatus_mpu = prm_read_mod_reg(OCP_MOD, | ||
139 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
140 | |||
141 | if (irqstatus_mpu & (OMAP3430_WKUP_ST | OMAP3430_IO_ST)) { | ||
142 | c = _prcm_int_handle_wakeup(); | ||
143 | |||
144 | /* | ||
145 | * Is the MPU PRCM interrupt handler racing with the | ||
146 | * IVA2 PRCM interrupt handler ? | ||
147 | */ | ||
148 | WARN(c == 0, "prcm: WARNING: PRCM indicated MPU wakeup " | ||
149 | "but no wakeup sources are marked\n"); | ||
150 | } else { | ||
151 | /* XXX we need to expand our PRCM interrupt handler */ | ||
152 | WARN(1, "prcm: WARNING: PRCM interrupt received, but " | ||
153 | "no code to handle it (%08x)\n", irqstatus_mpu); | ||
154 | } | ||
155 | |||
156 | prm_write_mod_reg(irqstatus_mpu, OCP_MOD, | ||
157 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
142 | 158 | ||
143 | while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET)) | 159 | } while (prm_read_mod_reg(OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET)); |
144 | cpu_relax(); | ||
145 | 160 | ||
146 | return IRQ_HANDLED; | 161 | return IRQ_HANDLED; |
147 | } | 162 | } |
@@ -624,6 +639,16 @@ static void __init prcm_setup_regs(void) | |||
624 | prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, | 639 | prm_write_mod_reg(OMAP3430_IO_EN | OMAP3430_WKUP_EN, |
625 | OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); | 640 | OCP_MOD, OMAP3_PRM_IRQENABLE_MPU_OFFSET); |
626 | 641 | ||
642 | /* Enable GPIO wakeups in PER */ | ||
643 | prm_write_mod_reg(OMAP3430_EN_GPIO2 | OMAP3430_EN_GPIO3 | | ||
644 | OMAP3430_EN_GPIO4 | OMAP3430_EN_GPIO5 | | ||
645 | OMAP3430_EN_GPIO6, OMAP3430_PER_MOD, PM_WKEN); | ||
646 | /* and allow them to wake up MPU */ | ||
647 | prm_write_mod_reg(OMAP3430_GRPSEL_GPIO2 | OMAP3430_EN_GPIO3 | | ||
648 | OMAP3430_GRPSEL_GPIO4 | OMAP3430_EN_GPIO5 | | ||
649 | OMAP3430_GRPSEL_GPIO6, | ||
650 | OMAP3430_PER_MOD, OMAP3430_PM_MPUGRPSEL); | ||
651 | |||
627 | /* Don't attach IVA interrupts */ | 652 | /* Don't attach IVA interrupts */ |
628 | prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); | 653 | prm_write_mod_reg(0, WKUP_MOD, OMAP3430_PM_IVAGRPSEL); |
629 | prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); | 654 | prm_write_mod_reg(0, CORE_MOD, OMAP3430_PM_IVAGRPSEL1); |
diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 2594cbff3947..f00289abd30f 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c | |||
@@ -273,35 +273,50 @@ struct powerdomain *pwrdm_lookup(const char *name) | |||
273 | } | 273 | } |
274 | 274 | ||
275 | /** | 275 | /** |
276 | * pwrdm_for_each - call function on each registered clockdomain | 276 | * pwrdm_for_each_nolock - call function on each registered clockdomain |
277 | * @fn: callback function * | 277 | * @fn: callback function * |
278 | * | 278 | * |
279 | * Call the supplied function for each registered powerdomain. The | 279 | * Call the supplied function for each registered powerdomain. The |
280 | * callback function can return anything but 0 to bail out early from | 280 | * callback function can return anything but 0 to bail out early from |
281 | * the iterator. The callback function is called with the pwrdm_rwlock | 281 | * the iterator. Returns the last return value of the callback function, which |
282 | * held for reading, so no powerdomain structure manipulation | 282 | * should be 0 for success or anything else to indicate failure; or -EINVAL if |
283 | * functions should be called from the callback, although hardware | 283 | * the function pointer is null. |
284 | * powerdomain control functions are fine. Returns the last return | ||
285 | * value of the callback function, which should be 0 for success or | ||
286 | * anything else to indicate failure; or -EINVAL if the function | ||
287 | * pointer is null. | ||
288 | */ | 284 | */ |
289 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), | 285 | int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), |
290 | void *user) | 286 | void *user) |
291 | { | 287 | { |
292 | struct powerdomain *temp_pwrdm; | 288 | struct powerdomain *temp_pwrdm; |
293 | unsigned long flags; | ||
294 | int ret = 0; | 289 | int ret = 0; |
295 | 290 | ||
296 | if (!fn) | 291 | if (!fn) |
297 | return -EINVAL; | 292 | return -EINVAL; |
298 | 293 | ||
299 | read_lock_irqsave(&pwrdm_rwlock, flags); | ||
300 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { | 294 | list_for_each_entry(temp_pwrdm, &pwrdm_list, node) { |
301 | ret = (*fn)(temp_pwrdm, user); | 295 | ret = (*fn)(temp_pwrdm, user); |
302 | if (ret) | 296 | if (ret) |
303 | break; | 297 | break; |
304 | } | 298 | } |
299 | |||
300 | return ret; | ||
301 | } | ||
302 | |||
303 | /** | ||
304 | * pwrdm_for_each - call function on each registered clockdomain | ||
305 | * @fn: callback function * | ||
306 | * | ||
307 | * This function is the same as 'pwrdm_for_each_nolock()', but keeps the | ||
308 | * &pwrdm_rwlock locked for reading, so no powerdomain structure manipulation | ||
309 | * functions should be called from the callback, although hardware powerdomain | ||
310 | * control functions are fine. | ||
311 | */ | ||
312 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), | ||
313 | void *user) | ||
314 | { | ||
315 | unsigned long flags; | ||
316 | int ret; | ||
317 | |||
318 | read_lock_irqsave(&pwrdm_rwlock, flags); | ||
319 | ret = pwrdm_for_each_nolock(fn, user); | ||
305 | read_unlock_irqrestore(&pwrdm_rwlock, flags); | 320 | read_unlock_irqrestore(&pwrdm_rwlock, flags); |
306 | 321 | ||
307 | return ret; | 322 | return ret; |
diff --git a/arch/arm/mach-pxa/cpufreq-pxa2xx.c b/arch/arm/mach-pxa/cpufreq-pxa2xx.c index 3a8ee2272add..983cc8c20081 100644 --- a/arch/arm/mach-pxa/cpufreq-pxa2xx.c +++ b/arch/arm/mach-pxa/cpufreq-pxa2xx.c | |||
@@ -155,7 +155,7 @@ MODULE_PARM_DESC(pxa255_turbo_table, "Selects the frequency table (0 = run table | |||
155 | 155 | ||
156 | static pxa_freqs_t pxa27x_freqs[] = { | 156 | static pxa_freqs_t pxa27x_freqs[] = { |
157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, | 157 | {104000, 104000, PXA27x_CCCR(1, 8, 2), 0, CCLKCFG2(1, 0, 1), 900000, 1705000 }, |
158 | {156000, 104000, PXA27x_CCCR(1, 8, 6), 0, CCLKCFG2(1, 1, 1), 1000000, 1705000 }, | 158 | {156000, 104000, PXA27x_CCCR(1, 8, 3), 0, CCLKCFG2(1, 0, 1), 1000000, 1705000 }, |
159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, | 159 | {208000, 208000, PXA27x_CCCR(0, 16, 2), 1, CCLKCFG2(0, 0, 1), 1180000, 1705000 }, |
160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, | 160 | {312000, 208000, PXA27x_CCCR(1, 16, 3), 1, CCLKCFG2(1, 0, 1), 1250000, 1705000 }, |
161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, | 161 | {416000, 208000, PXA27x_CCCR(1, 16, 4), 1, CCLKCFG2(1, 0, 1), 1350000, 1705000 }, |
diff --git a/arch/arm/mach-pxa/csb726.c b/arch/arm/mach-pxa/csb726.c index 79141f862728..965480eb4fe6 100644 --- a/arch/arm/mach-pxa/csb726.c +++ b/arch/arm/mach-pxa/csb726.c | |||
@@ -238,7 +238,7 @@ static struct resource csb726_lan_resources[] = { | |||
238 | }; | 238 | }; |
239 | 239 | ||
240 | struct smsc911x_platform_config csb726_lan_config = { | 240 | struct smsc911x_platform_config csb726_lan_config = { |
241 | .irq_type = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, | 241 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, | 242 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
243 | .flags = SMSC911X_USE_32BIT, | 243 | .flags = SMSC911X_USE_32BIT, |
244 | .phy_interface = PHY_INTERFACE_MODE_MII, | 244 | .phy_interface = PHY_INTERFACE_MODE_MII, |
diff --git a/arch/arm/plat-omap/include/mach/cpu.h b/arch/arm/plat-omap/include/mach/cpu.h index 11e73d9e8928..f129efb3075e 100644 --- a/arch/arm/plat-omap/include/mach/cpu.h +++ b/arch/arm/plat-omap/include/mach/cpu.h | |||
@@ -303,32 +303,21 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
303 | #define cpu_is_omap2430() 0 | 303 | #define cpu_is_omap2430() 0 |
304 | #define cpu_is_omap3430() 0 | 304 | #define cpu_is_omap3430() 0 |
305 | 305 | ||
306 | #if defined(MULTI_OMAP1) | ||
307 | # if defined(CONFIG_ARCH_OMAP730) | ||
308 | # undef cpu_is_omap730 | ||
309 | # define cpu_is_omap730() is_omap730() | ||
310 | # endif | ||
311 | # if defined(CONFIG_ARCH_OMAP850) | ||
312 | # undef cpu_is_omap850 | ||
313 | # define cpu_is_omap850() is_omap850() | ||
314 | # endif | ||
315 | #else | ||
316 | # if defined(CONFIG_ARCH_OMAP730) | ||
317 | # undef cpu_is_omap730 | ||
318 | # define cpu_is_omap730() 1 | ||
319 | # endif | ||
320 | #endif | ||
321 | #else | ||
322 | # if defined(CONFIG_ARCH_OMAP850) | ||
323 | # undef cpu_is_omap850 | ||
324 | # define cpu_is_omap850() 1 | ||
325 | # endif | ||
326 | #endif | ||
327 | |||
328 | /* | 306 | /* |
329 | * Whether we have MULTI_OMAP1 or not, we still need to distinguish | 307 | * Whether we have MULTI_OMAP1 or not, we still need to distinguish |
330 | * between 330 vs. 1510 and 1611B/5912 vs. 1710. | 308 | * between 730 vs 850, 330 vs. 1510 and 1611B/5912 vs. 1710. |
331 | */ | 309 | */ |
310 | |||
311 | #if defined(CONFIG_ARCH_OMAP730) | ||
312 | # undef cpu_is_omap730 | ||
313 | # define cpu_is_omap730() is_omap730() | ||
314 | #endif | ||
315 | |||
316 | #if defined(CONFIG_ARCH_OMAP850) | ||
317 | # undef cpu_is_omap850 | ||
318 | # define cpu_is_omap850() is_omap850() | ||
319 | #endif | ||
320 | |||
332 | #if defined(CONFIG_ARCH_OMAP15XX) | 321 | #if defined(CONFIG_ARCH_OMAP15XX) |
333 | # undef cpu_is_omap310 | 322 | # undef cpu_is_omap310 |
334 | # undef cpu_is_omap1510 | 323 | # undef cpu_is_omap1510 |
@@ -433,3 +422,5 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
433 | 422 | ||
434 | int omap_chip_is(struct omap_chip_id oci); | 423 | int omap_chip_is(struct omap_chip_id oci); |
435 | void omap2_check_revision(void); | 424 | void omap2_check_revision(void); |
425 | |||
426 | #endif | ||
diff --git a/arch/arm/plat-omap/include/mach/powerdomain.h b/arch/arm/plat-omap/include/mach/powerdomain.h index 6271d8556a40..fa6461423bd0 100644 --- a/arch/arm/plat-omap/include/mach/powerdomain.h +++ b/arch/arm/plat-omap/include/mach/powerdomain.h | |||
@@ -135,6 +135,8 @@ struct powerdomain *pwrdm_lookup(const char *name); | |||
135 | 135 | ||
136 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), | 136 | int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user), |
137 | void *user); | 137 | void *user); |
138 | int pwrdm_for_each_nolock(int (*fn)(struct powerdomain *pwrdm, void *user), | ||
139 | void *user); | ||
138 | 140 | ||
139 | int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); | 141 | int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); |
140 | int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); | 142 | int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); |
diff --git a/arch/arm/plat-omap/iovmm.c b/arch/arm/plat-omap/iovmm.c index 57f7122a0919..dc3fac3dd0ea 100644 --- a/arch/arm/plat-omap/iovmm.c +++ b/arch/arm/plat-omap/iovmm.c | |||
@@ -47,7 +47,7 @@ | |||
47 | * 'va': mpu virtual address | 47 | * 'va': mpu virtual address |
48 | * | 48 | * |
49 | * 'c': contiguous memory area | 49 | * 'c': contiguous memory area |
50 | * 'd': dicontiguous memory area | 50 | * 'd': discontiguous memory area |
51 | * 'a': anonymous memory allocation | 51 | * 'a': anonymous memory allocation |
52 | * '()': optional feature | 52 | * '()': optional feature |
53 | * | 53 | * |
@@ -363,8 +363,9 @@ void *da_to_va(struct iommu *obj, u32 da) | |||
363 | goto out; | 363 | goto out; |
364 | } | 364 | } |
365 | va = area->va; | 365 | va = area->va; |
366 | mutex_unlock(&obj->mmap_lock); | ||
367 | out: | 366 | out: |
367 | mutex_unlock(&obj->mmap_lock); | ||
368 | |||
368 | return va; | 369 | return va; |
369 | } | 370 | } |
370 | EXPORT_SYMBOL_GPL(da_to_va); | 371 | EXPORT_SYMBOL_GPL(da_to_va); |
@@ -398,7 +399,7 @@ static inline void sgtable_drain_vmalloc(struct sg_table *sgt) | |||
398 | { | 399 | { |
399 | /* | 400 | /* |
400 | * Actually this is not necessary at all, just exists for | 401 | * Actually this is not necessary at all, just exists for |
401 | * consistency of the code readibility. | 402 | * consistency of the code readability. |
402 | */ | 403 | */ |
403 | BUG_ON(!sgt); | 404 | BUG_ON(!sgt); |
404 | } | 405 | } |
@@ -434,7 +435,7 @@ static inline void sgtable_drain_kmalloc(struct sg_table *sgt) | |||
434 | { | 435 | { |
435 | /* | 436 | /* |
436 | * Actually this is not necessary at all, just exists for | 437 | * Actually this is not necessary at all, just exists for |
437 | * consistency of the code readibility | 438 | * consistency of the code readability |
438 | */ | 439 | */ |
439 | BUG_ON(!sgt); | 440 | BUG_ON(!sgt); |
440 | } | 441 | } |
diff --git a/arch/arm/plat-omap/sram.c b/arch/arm/plat-omap/sram.c index 925f64711c37..75d1f26e5b17 100644 --- a/arch/arm/plat-omap/sram.c +++ b/arch/arm/plat-omap/sram.c | |||
@@ -270,7 +270,8 @@ void * omap_sram_push(void * start, unsigned long size) | |||
270 | omap_sram_ceil -= size; | 270 | omap_sram_ceil -= size; |
271 | omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *)); | 271 | omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *)); |
272 | memcpy((void *)omap_sram_ceil, start, size); | 272 | memcpy((void *)omap_sram_ceil, start, size); |
273 | flush_icache_range((unsigned long)start, (unsigned long)(start + size)); | 273 | flush_icache_range((unsigned long)omap_sram_ceil, |
274 | (unsigned long)(omap_sram_ceil + size)); | ||
274 | 275 | ||
275 | return (void *)omap_sram_ceil; | 276 | return (void *)omap_sram_ceil; |
276 | } | 277 | } |
diff --git a/arch/arm/plat-s3c24xx/adc.c b/arch/arm/plat-s3c24xx/adc.c index 11117a7ba911..4d36b784fb8b 100644 --- a/arch/arm/plat-s3c24xx/adc.c +++ b/arch/arm/plat-s3c24xx/adc.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/module.h> | 14 | #include <linux/module.h> |
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
17 | #include <linux/sched.h> | ||
17 | #include <linux/list.h> | 18 | #include <linux/list.h> |
18 | #include <linux/err.h> | 19 | #include <linux/err.h> |
19 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |