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authorSyed Mohammed, Khasim <x0khasim@ti.com>2007-06-26 01:55:39 -0400
committerTony Lindgren <tony@atomide.com>2008-02-08 13:38:00 -0500
commitce2df9ca41997f38cdfb9bee0db08763487222ae (patch)
treeb6ef06d7259b78db78decfd8a930caf0f35197b8 /arch/arm
parent471b3aa70c2ba00e1a8c8399f848cbc04fd0beae (diff)
ARM: OMAP: Add dmtimer support for OMAP3
Add DM timer support for OMAP3. Fixed source clocks for 3430 by Paul Walmsley <paul@pwsan.com>. Signed-off-by: Syed Mohammed Khasim <x0khasim@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/plat-omap/dmtimer.c51
1 files changed, 47 insertions, 4 deletions
diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c
index 0b5689edf2f2..e719d0eeb5c8 100644
--- a/arch/arm/plat-omap/dmtimer.c
+++ b/arch/arm/plat-omap/dmtimer.c
@@ -70,7 +70,7 @@
70struct omap_dm_timer { 70struct omap_dm_timer {
71 unsigned long phys_base; 71 unsigned long phys_base;
72 int irq; 72 int irq;
73#ifdef CONFIG_ARCH_OMAP2 73#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
74 struct clk *iclk, *fclk; 74 struct clk *iclk, *fclk;
75#endif 75#endif
76 void __iomem *io_base; 76 void __iomem *io_base;
@@ -85,6 +85,9 @@ struct omap_dm_timer {
85#define omap2_dm_timers NULL 85#define omap2_dm_timers NULL
86#define omap2_dm_source_names NULL 86#define omap2_dm_source_names NULL
87#define omap2_dm_source_clocks NULL 87#define omap2_dm_source_clocks NULL
88#define omap3_dm_timers NULL
89#define omap3_dm_source_names NULL
90#define omap3_dm_source_clocks NULL
88 91
89static struct omap_dm_timer omap1_dm_timers[] = { 92static struct omap_dm_timer omap1_dm_timers[] = {
90 { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 }, 93 { .phys_base = 0xfffb1400, .irq = INT_1610_GPTIMER1 },
@@ -104,6 +107,9 @@ static const int dm_timer_count = ARRAY_SIZE(omap1_dm_timers);
104#define omap_dm_clk_enable(x) clk_enable(x) 107#define omap_dm_clk_enable(x) clk_enable(x)
105#define omap_dm_clk_disable(x) clk_disable(x) 108#define omap_dm_clk_disable(x) clk_disable(x)
106#define omap1_dm_timers NULL 109#define omap1_dm_timers NULL
110#define omap3_dm_timers NULL
111#define omap3_dm_source_names NULL
112#define omap3_dm_source_clocks NULL
107 113
108static struct omap_dm_timer omap2_dm_timers[] = { 114static struct omap_dm_timer omap2_dm_timers[] = {
109 { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 }, 115 { .phys_base = 0x48028000, .irq = INT_24XX_GPTIMER1 },
@@ -130,6 +136,39 @@ static const char *omap2_dm_source_names[] __initdata = {
130static struct clk **omap2_dm_source_clocks[3]; 136static struct clk **omap2_dm_source_clocks[3];
131static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers); 137static const int dm_timer_count = ARRAY_SIZE(omap2_dm_timers);
132 138
139#elif defined(CONFIG_ARCH_OMAP3)
140
141#define omap_dm_clk_enable(x) clk_enable(x)
142#define omap_dm_clk_disable(x) clk_disable(x)
143#define omap1_dm_timers NULL
144#define omap2_dm_timers NULL
145#define omap2_dm_source_names NULL
146#define omap2_dm_source_clocks NULL
147
148static struct omap_dm_timer omap3_dm_timers[] = {
149 { .phys_base = 0x48318000, .irq = INT_24XX_GPTIMER1 },
150 { .phys_base = 0x49032000, .irq = INT_24XX_GPTIMER2 },
151 { .phys_base = 0x49034000, .irq = INT_24XX_GPTIMER3 },
152 { .phys_base = 0x49036000, .irq = INT_24XX_GPTIMER4 },
153 { .phys_base = 0x49038000, .irq = INT_24XX_GPTIMER5 },
154 { .phys_base = 0x4903A000, .irq = INT_24XX_GPTIMER6 },
155 { .phys_base = 0x4903C000, .irq = INT_24XX_GPTIMER7 },
156 { .phys_base = 0x4903E000, .irq = INT_24XX_GPTIMER8 },
157 { .phys_base = 0x49040000, .irq = INT_24XX_GPTIMER9 },
158 { .phys_base = 0x48086000, .irq = INT_24XX_GPTIMER10 },
159 { .phys_base = 0x48088000, .irq = INT_24XX_GPTIMER11 },
160 { .phys_base = 0x48304000, .irq = INT_24XX_GPTIMER12 },
161};
162
163static const char *omap3_dm_source_names[] __initdata = {
164 "sys_ck",
165 "omap_32k_fck",
166 NULL
167};
168
169static struct clk **omap3_dm_source_clocks[2];
170static const int dm_timer_count = ARRAY_SIZE(omap3_dm_timers);
171
133#else 172#else
134 173
135#error OMAP architecture not supported! 174#error OMAP architecture not supported!
@@ -310,7 +349,7 @@ __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
310 return inputmask; 349 return inputmask;
311} 350}
312 351
313#elif defined(CONFIG_ARCH_OMAP2) 352#elif defined(CONFIG_ARCH_OMAP2) || defined (CONFIG_ARCH_OMAP3)
314 353
315struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer) 354struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
316{ 355{
@@ -502,7 +541,7 @@ int __init omap_dm_timer_init(void)
502 struct omap_dm_timer *timer; 541 struct omap_dm_timer *timer;
503 int i; 542 int i;
504 543
505 if (!(cpu_is_omap16xx() || cpu_is_omap24xx())) 544 if (!(cpu_is_omap16xx() || cpu_class_is_omap2()))
506 return -ENODEV; 545 return -ENODEV;
507 546
508 spin_lock_init(&dm_timer_lock); 547 spin_lock_init(&dm_timer_lock);
@@ -513,6 +552,10 @@ int __init omap_dm_timer_init(void)
513 dm_timers = omap2_dm_timers; 552 dm_timers = omap2_dm_timers;
514 dm_source_names = (char **)omap2_dm_source_names; 553 dm_source_names = (char **)omap2_dm_source_names;
515 dm_source_clocks = (struct clk **)omap2_dm_source_clocks; 554 dm_source_clocks = (struct clk **)omap2_dm_source_clocks;
555 } else if (cpu_is_omap34xx()) {
556 dm_timers = omap3_dm_timers;
557 dm_source_names = (char **)omap3_dm_source_names;
558 dm_source_clocks = (struct clk **)omap3_dm_source_clocks;
516 } 559 }
517 560
518 if (cpu_class_is_omap2()) 561 if (cpu_class_is_omap2())
@@ -525,7 +568,7 @@ int __init omap_dm_timer_init(void)
525 for (i = 0; i < dm_timer_count; i++) { 568 for (i = 0; i < dm_timer_count; i++) {
526 timer = &dm_timers[i]; 569 timer = &dm_timers[i];
527 timer->io_base = (void __iomem *)io_p2v(timer->phys_base); 570 timer->io_base = (void __iomem *)io_p2v(timer->phys_base);
528#ifdef CONFIG_ARCH_OMAP2 571#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
529 if (cpu_class_is_omap2()) { 572 if (cpu_class_is_omap2()) {
530 char clk_name[16]; 573 char clk_name[16];
531 sprintf(clk_name, "gpt%d_ick", i + 1); 574 sprintf(clk_name, "gpt%d_ick", i + 1);