diff options
author | Chen Gang <gang.chen@asianux.com> | 2013-04-19 07:24:37 -0400 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2013-04-19 08:57:46 -0400 |
commit | 12f883989cf91afa8509c547feebbc3acbc04497 (patch) | |
tree | 8007ca9f1a341e79ca8c80a44e5e87ad365b3d5a /arch/arm64 | |
parent | 3325732f3b223812e54ac67dbb0a8ea7c99cf519 (diff) |
arm64: Define readq and writeq for driver module using
when compiling with allmodconfig, CONFIG_64BIT=y the file
drivers/base/regmap/regmap-mmio.c will use readq and writeq so we need
implement these functions.
Signed-off-by: Chen Gang <gang.chen@asianux.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/include/asm/io.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/io.h b/arch/arm64/include/asm/io.h index 57f12c991de2..2e12258aa7e4 100644 --- a/arch/arm64/include/asm/io.h +++ b/arch/arm64/include/asm/io.h | |||
@@ -92,10 +92,12 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) | |||
92 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; }) | 92 | #define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; }) |
93 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; }) | 93 | #define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; }) |
94 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; }) | 94 | #define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; }) |
95 | #define readq_relaxed(c) ({ u64 __v = le64_to_cpu((__force __le64)__raw_readq(c)); __v; }) | ||
95 | 96 | ||
96 | #define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c))) | 97 | #define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c))) |
97 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) | 98 | #define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c))) |
98 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) | 99 | #define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c))) |
100 | #define writeq_relaxed(v,c) ((void)__raw_writeq((__force u64)cpu_to_le64(v),(c))) | ||
99 | 101 | ||
100 | /* | 102 | /* |
101 | * I/O memory access primitives. Reads are ordered relative to any | 103 | * I/O memory access primitives. Reads are ordered relative to any |
@@ -105,10 +107,12 @@ static inline u64 __raw_readq(const volatile void __iomem *addr) | |||
105 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) | 107 | #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; }) |
106 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) | 108 | #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; }) |
107 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) | 109 | #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; }) |
110 | #define readq(c) ({ u64 __v = readq_relaxed(c); __iormb(); __v; }) | ||
108 | 111 | ||
109 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); }) | 112 | #define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); }) |
110 | #define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); }) | 113 | #define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); }) |
111 | #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) | 114 | #define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); }) |
115 | #define writeq(v,c) ({ __iowmb(); writeq_relaxed((v),(c)); }) | ||
112 | 116 | ||
113 | /* | 117 | /* |
114 | * I/O port access primitives. | 118 | * I/O port access primitives. |