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authorCatalin Marinas <catalin.marinas@arm.com>2013-05-01 11:34:22 -0400
committerCatalin Marinas <catalin.marinas@arm.com>2013-06-07 12:58:29 -0400
commit7249b79f6b4cc3c2aa9138dca52e535a4c789107 (patch)
treeaf9de4d98b35a9d5d2e0c9e1925ca5c6b18213d6 /arch/arm64/mm
parentb5b6c9e9149d8a7c3f1d7b9d0c046c6184e1dd17 (diff)
arm64: Do not flush the D-cache for anonymous pages
The D-cache on AArch64 is VIPT non-aliasing, so there is no need to flush it for anonymous pages. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Reported-by: Will Deacon <will.deacon@arm.com> Acked-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r--arch/arm64/mm/flush.c8
-rw-r--r--arch/arm64/mm/mmu.c1
2 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c
index b9cd7a4deeca..7c716634a671 100644
--- a/arch/arm64/mm/flush.c
+++ b/arch/arm64/mm/flush.c
@@ -77,14 +77,12 @@ void __flush_dcache_page(struct page *page)
77 77
78void __sync_icache_dcache(pte_t pte, unsigned long addr) 78void __sync_icache_dcache(pte_t pte, unsigned long addr)
79{ 79{
80 unsigned long pfn; 80 struct page *page = pte_page(pte);
81 struct page *page;
82 81
83 pfn = pte_pfn(pte); 82 /* no flushing needed for anonymous pages */
84 if (!pfn_valid(pfn)) 83 if (!page_mapping(page))
85 return; 84 return;
86 85
87 page = pfn_to_page(pfn);
88 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) { 86 if (!test_and_set_bit(PG_dcache_clean, &page->flags)) {
89 __flush_dcache_page(page); 87 __flush_dcache_page(page);
90 __flush_icache_all(); 88 __flush_icache_all();
diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
index eeecc9c8ed68..80a369eab637 100644
--- a/arch/arm64/mm/mmu.c
+++ b/arch/arm64/mm/mmu.c
@@ -339,7 +339,6 @@ void __init paging_init(void)
339 bootmem_init(); 339 bootmem_init();
340 340
341 empty_zero_page = virt_to_page(zero_page); 341 empty_zero_page = virt_to_page(zero_page);
342 __flush_dcache_page(empty_zero_page);
343 342
344 /* 343 /*
345 * TTBR0 is only used for the identity mapping at this stage. Make it 344 * TTBR0 is only used for the identity mapping at this stage. Make it