Merge branch 'master' into for-3.19

Pull in to receive 54ef6df3f3f1 ("rcu: Provide counterpart to
rcu_dereference() for non-RCU situations").

Signed-off-by: Tejun Heo <tj@kernel.org>

3 files changed, 25 insertions, 9 deletions

diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 619b1dd7bcde..d18a44940968 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -54,18 +54,17 @@ ENTRY(efi_stub_entry)
         b.eq    efi_load_fail
 
         /*
-         * efi_entry() will have relocated the kernel image if necessary
-         * and we return here with device tree address in x0 and the kernel
-         * entry point stored at *image_addr. Save those values in registers
-         * which are callee preserved.
+         * efi_entry() will have copied the kernel image if necessary and we
+         * return here with device tree address in x0 and the kernel entry
+         * point stored at *image_addr. Save those values in registers which
+         * are callee preserved.
          */
         mov     x20, x0         // DTB address
         ldr     x0, [sp, #16]   // relocated _text address
         mov     x21, x0
 
         /*
-         * Flush dcache covering current runtime addresses
-         * of kernel text/data. Then flush all of icache.
+         * Calculate size of the kernel Image (same for original and copy).
          */
         adrp    x1, _text
         add     x1, x1, #:lo12:_text
@@ -73,9 +72,24 @@ ENTRY(efi_stub_entry)
         add     x2, x2, #:lo12:_edata
         sub     x1, x2, x1
 
+        /*
+         * Flush the copied Image to the PoC, and ensure it is not shadowed by
+         * stale icache entries from before relocation.
+         */
         bl      __flush_dcache_area
         ic      ialluis
 
+        /*
+         * Ensure that the rest of this function (in the original Image) is
+         * visible when the caches are disabled. The I-cache can't have stale
+         * entries for the VA range of the current image, so no maintenance is
+         * necessary.
+         */
+        adr     x0, efi_stub_entry
+        adr     x1, efi_stub_entry_end
+        sub     x1, x1, x0
+        bl      __flush_dcache_area
+
         /* Turn off Dcache and MMU */
         mrs     x0, CurrentEL
         cmp     x0, #CurrentEL_EL2
@@ -105,4 +119,5 @@ efi_load_fail:
         ldp     x29, x30, [sp], #32
         ret
 
+efi_stub_entry_end:
 ENDPROC(efi_stub_entry)
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index e007714ded04..8cd27fedc8b6 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -163,9 +163,10 @@ static int __kprobes aarch64_insn_patch_text_cb(void *arg)
                  * which ends with "dsb; isb" pair guaranteeing global
                  * visibility.
                  */
-                atomic_set(&pp->cpu_count, -1);
+                /* Notify other processors with an additional increment. */
+                atomic_inc(&pp->cpu_count);
         } else {
-                while (atomic_read(&pp->cpu_count) != -1)
+                while (atomic_read(&pp->cpu_count) <= num_online_cpus())
                         cpu_relax();
                 isb();
         }
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index d56394b6dc99..3425f311c49e 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -528,7 +528,7 @@ static int __maybe_unused cpu_psci_cpu_suspend(unsigned long index)
         if (WARN_ON_ONCE(!index))
                 return -EINVAL;
 
-        if (state->type == PSCI_POWER_STATE_TYPE_STANDBY)
+        if (state[index - 1].type == PSCI_POWER_STATE_TYPE_STANDBY)
                 ret = psci_ops.cpu_suspend(state[index - 1], 0);
         else
                 ret = __cpu_suspend(index, psci_suspend_finisher);