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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-16 14:58:29 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-16 14:58:29 -0400 |
commit | 714d8e7e27197dd39b2550e762a6a6fcf397a471 (patch) | |
tree | bc989a2a0e14f21912943e56d0002a26a2b7793e /arch/arm64/kernel/cpufeature.c | |
parent | d19d5efd8c8840aa4f38a6dfbfe500d8cc27de46 (diff) | |
parent | 6d1966dfd6e0ad2f8aa4b664ae1a62e33abe1998 (diff) |
Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull arm64 updates from Will Deacon:
"Here are the core arm64 updates for 4.1.
Highlights include a significant rework to head.S (allowing us to boot
on machines with physical memory at a really high address), an AES
performance boost on Cortex-A57 and the ability to run a 32-bit
userspace with 64k pages (although this requires said userspace to be
built with a recent binutils).
The head.S rework spilt over into KVM, so there are some changes under
arch/arm/ which have been acked by Marc Zyngier (KVM co-maintainer).
In particular, the linker script changes caused us some issues in
-next, so there are a few merge commits where we had to apply fixes on
top of a stable branch.
Other changes include:
- AES performance boost for Cortex-A57
- AArch32 (compat) userspace with 64k pages
- Cortex-A53 erratum workaround for #845719
- defconfig updates (new platforms, PCI, ...)"
* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (39 commits)
arm64: fix midr range for Cortex-A57 erratum 832075
arm64: errata: add workaround for cortex-a53 erratum #845719
arm64: Use bool function return values of true/false not 1/0
arm64: defconfig: updates for 4.1
arm64: Extract feature parsing code from cpu_errata.c
arm64: alternative: Allow immediate branch as alternative instruction
arm64: insn: Add aarch64_insn_decode_immediate
ARM: kvm: round HYP section to page size instead of log2 upper bound
ARM: kvm: assert on HYP section boundaries not actual code size
arm64: head.S: ensure idmap_t0sz is visible
arm64: pmu: add support for interrupt-affinity property
dt: pmu: extend ARM PMU binding to allow for explicit interrupt affinity
arm64: head.S: ensure visibility of page tables
arm64: KVM: use ID map with increased VA range if required
arm64: mm: increase VA range of identity map
ARM: kvm: implement replacement for ld's LOG2CEIL()
arm64: proc: remove unused cpu_get_pgd macro
arm64: enforce x1|x2|x3 == 0 upon kernel entry as per boot protocol
arm64: remove __calc_phys_offset
arm64: merge __enable_mmu and __turn_mmu_on
...
Diffstat (limited to 'arch/arm64/kernel/cpufeature.c')
-rw-r--r-- | arch/arm64/kernel/cpufeature.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c new file mode 100644 index 000000000000..3d9967e43d89 --- /dev/null +++ b/arch/arm64/kernel/cpufeature.c | |||
@@ -0,0 +1,47 @@ | |||
1 | /* | ||
2 | * Contains CPU feature definitions | ||
3 | * | ||
4 | * Copyright (C) 2015 ARM Ltd. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
17 | */ | ||
18 | |||
19 | #define pr_fmt(fmt) "alternatives: " fmt | ||
20 | |||
21 | #include <linux/types.h> | ||
22 | #include <asm/cpu.h> | ||
23 | #include <asm/cpufeature.h> | ||
24 | |||
25 | static const struct arm64_cpu_capabilities arm64_features[] = { | ||
26 | {}, | ||
27 | }; | ||
28 | |||
29 | void check_cpu_capabilities(const struct arm64_cpu_capabilities *caps, | ||
30 | const char *info) | ||
31 | { | ||
32 | int i; | ||
33 | |||
34 | for (i = 0; caps[i].desc; i++) { | ||
35 | if (!caps[i].matches(&caps[i])) | ||
36 | continue; | ||
37 | |||
38 | if (!cpus_have_cap(caps[i].capability)) | ||
39 | pr_info("%s %s\n", info, caps[i].desc); | ||
40 | cpus_set_cap(caps[i].capability); | ||
41 | } | ||
42 | } | ||
43 | |||
44 | void check_local_cpu_features(void) | ||
45 | { | ||
46 | check_cpu_capabilities(arm64_features, "detected feature"); | ||
47 | } | ||