diff options
author | Jiang Liu <liuj97@gmail.com> | 2014-01-07 09:17:10 -0500 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-01-08 10:21:29 -0500 |
commit | c84fced8d990dd86c523233d38b4685a52a4fc3f (patch) | |
tree | 436b20c25726810b4701e23928f786e550a60d1e /arch/arm64/include | |
parent | ae16480785de1da84f21d1698f304a52f9790c49 (diff) |
arm64: move encode_insn_immediate() from module.c to insn.c
Function encode_insn_immediate() will be used by other instruction
manipulate related functions, so move it into insn.c and rename it
as aarch64_insn_encode_immediate().
Reviewed-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Jiang Liu <liuj97@gmail.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/include')
-rw-r--r-- | arch/arm64/include/asm/insn.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h index bf8085fdc140..fb4466022bd0 100644 --- a/arch/arm64/include/asm/insn.h +++ b/arch/arm64/include/asm/insn.h | |||
@@ -55,6 +55,17 @@ enum aarch64_insn_hint_op { | |||
55 | AARCH64_INSN_HINT_SEVL = 0x5 << 5, | 55 | AARCH64_INSN_HINT_SEVL = 0x5 << 5, |
56 | }; | 56 | }; |
57 | 57 | ||
58 | enum aarch64_insn_imm_type { | ||
59 | AARCH64_INSN_IMM_ADR, | ||
60 | AARCH64_INSN_IMM_26, | ||
61 | AARCH64_INSN_IMM_19, | ||
62 | AARCH64_INSN_IMM_16, | ||
63 | AARCH64_INSN_IMM_14, | ||
64 | AARCH64_INSN_IMM_12, | ||
65 | AARCH64_INSN_IMM_9, | ||
66 | AARCH64_INSN_IMM_MAX | ||
67 | }; | ||
68 | |||
58 | #define __AARCH64_INSN_FUNCS(abbr, mask, val) \ | 69 | #define __AARCH64_INSN_FUNCS(abbr, mask, val) \ |
59 | static __always_inline bool aarch64_insn_is_##abbr(u32 code) \ | 70 | static __always_inline bool aarch64_insn_is_##abbr(u32 code) \ |
60 | { return (code & (mask)) == (val); } \ | 71 | { return (code & (mask)) == (val); } \ |
@@ -76,6 +87,8 @@ bool aarch64_insn_is_nop(u32 insn); | |||
76 | int aarch64_insn_read(void *addr, u32 *insnp); | 87 | int aarch64_insn_read(void *addr, u32 *insnp); |
77 | int aarch64_insn_write(void *addr, u32 insn); | 88 | int aarch64_insn_write(void *addr, u32 insn); |
78 | enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn); | 89 | enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn); |
90 | u32 aarch64_insn_encode_immediate(enum aarch64_insn_imm_type type, | ||
91 | u32 insn, u64 imm); | ||
79 | bool aarch64_insn_hotpatch_safe(u32 old_insn, u32 new_insn); | 92 | bool aarch64_insn_hotpatch_safe(u32 old_insn, u32 new_insn); |
80 | 93 | ||
81 | int aarch64_insn_patch_text_nosync(void *addr, u32 insn); | 94 | int aarch64_insn_patch_text_nosync(void *addr, u32 insn); |