diff options
author | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-15 11:35:38 -0400 |
---|---|---|
committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-07-23 10:27:51 -0400 |
commit | 6b4fee241dd7c4b11cae4432bfa899a386d71f26 (patch) | |
tree | 6f49796ecbc00a9a25bd53b1885eeecd1dd6e730 /arch/arm64/include/asm/pgtable-hwdef.h | |
parent | abe669d7e1a8f9163eb7e8e153e7257d38c1ba3e (diff) |
arm64: Remove asm/pgtable-*level-hwdef.h files
The macros in these files can easily be computed based on PAGE_SHIFT and
VA_BITS, so just remove them and add the corresponding macros to
asm/pgtable-hwdef.h
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
Diffstat (limited to 'arch/arm64/include/asm/pgtable-hwdef.h')
-rw-r--r-- | arch/arm64/include/asm/pgtable-hwdef.h | 42 |
1 files changed, 36 insertions, 6 deletions
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/asm/pgtable-hwdef.h index d453e8bfef06..88174e0bfafe 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h | |||
@@ -16,15 +16,45 @@ | |||
16 | #ifndef __ASM_PGTABLE_HWDEF_H | 16 | #ifndef __ASM_PGTABLE_HWDEF_H |
17 | #define __ASM_PGTABLE_HWDEF_H | 17 | #define __ASM_PGTABLE_HWDEF_H |
18 | 18 | ||
19 | #if CONFIG_ARM64_PGTABLE_LEVELS == 2 | 19 | #define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3)) |
20 | #include <asm/pgtable-2level-hwdef.h> | 20 | |
21 | #elif CONFIG_ARM64_PGTABLE_LEVELS == 3 | 21 | /* |
22 | #include <asm/pgtable-3level-hwdef.h> | 22 | * PMD_SHIFT determines the size a level 2 page table entry can map. |
23 | #else | 23 | */ |
24 | #include <asm/pgtable-4level-hwdef.h> | 24 | #if CONFIG_ARM64_PGTABLE_LEVELS > 2 |
25 | #define PMD_SHIFT ((PAGE_SHIFT - 3) * 2 + 3) | ||
26 | #define PMD_SIZE (_AC(1, UL) << PMD_SHIFT) | ||
27 | #define PMD_MASK (~(PMD_SIZE-1)) | ||
28 | #define PTRS_PER_PMD PTRS_PER_PTE | ||
29 | #endif | ||
30 | |||
31 | /* | ||
32 | * PUD_SHIFT determines the size a level 1 page table entry can map. | ||
33 | */ | ||
34 | #if CONFIG_ARM64_PGTABLE_LEVELS > 3 | ||
35 | #define PUD_SHIFT ((PAGE_SHIFT - 3) * 3 + 3) | ||
36 | #define PUD_SIZE (_AC(1, UL) << PUD_SHIFT) | ||
37 | #define PUD_MASK (~(PUD_SIZE-1)) | ||
38 | #define PTRS_PER_PUD PTRS_PER_PTE | ||
25 | #endif | 39 | #endif |
26 | 40 | ||
27 | /* | 41 | /* |
42 | * PGDIR_SHIFT determines the size a top-level page table entry can map | ||
43 | * (depending on the configuration, this level can be 0, 1 or 2). | ||
44 | */ | ||
45 | #define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_ARM64_PGTABLE_LEVELS + 3) | ||
46 | #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT) | ||
47 | #define PGDIR_MASK (~(PGDIR_SIZE-1)) | ||
48 | #define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT)) | ||
49 | |||
50 | /* | ||
51 | * Section address mask and size definitions. | ||
52 | */ | ||
53 | #define SECTION_SHIFT PMD_SHIFT | ||
54 | #define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT) | ||
55 | #define SECTION_MASK (~(SECTION_SIZE-1)) | ||
56 | |||
57 | /* | ||
28 | * Hardware page table definitions. | 58 | * Hardware page table definitions. |
29 | * | 59 | * |
30 | * Level 1 descriptor (PUD). | 60 | * Level 1 descriptor (PUD). |