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authorCatalin Marinas <catalin.marinas@arm.com>2008-08-28 06:22:32 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2008-09-01 07:06:34 -0400
commit93ed3970114983543bbebd195bef65db84444ea2 (patch)
tree9df88b61a2a7b3cc493c6cfc5f4848448250f6b5 /arch/arm/vfp
parent8d5796d2ec6b5a4e7a52861144e63af438d6f8f7 (diff)
[ARM] 5227/1: Add the ENDPROC declarations to the .S files
This declaration specifies the "function" type and size for various assembly functions, mainly needed for generating the correct branch instructions in Thumb-2. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/vfp')
-rw-r--r--arch/arm/vfp/entry.S8
-rw-r--r--arch/arm/vfp/vfphw.S25
2 files changed, 16 insertions, 17 deletions
diff --git a/arch/arm/vfp/entry.S b/arch/arm/vfp/entry.S
index 806ce26d5243..ba592a9e6fb3 100644
--- a/arch/arm/vfp/entry.S
+++ b/arch/arm/vfp/entry.S
@@ -21,13 +21,13 @@
21#include <asm/assembler.h> 21#include <asm/assembler.h>
22#include <asm/vfpmacros.h> 22#include <asm/vfpmacros.h>
23 23
24 .globl do_vfp 24ENTRY(do_vfp)
25do_vfp:
26 enable_irq 25 enable_irq
27 ldr r4, .LCvfp 26 ldr r4, .LCvfp
28 ldr r11, [r10, #TI_CPU] @ CPU number 27 ldr r11, [r10, #TI_CPU] @ CPU number
29 add r10, r10, #TI_VFPSTATE @ r10 = workspace 28 add r10, r10, #TI_VFPSTATE @ r10 = workspace
30 ldr pc, [r4] @ call VFP entry point 29 ldr pc, [r4] @ call VFP entry point
30ENDPROC(do_vfp)
31 31
32ENTRY(vfp_null_entry) 32ENTRY(vfp_null_entry)
33 mov pc, lr 33 mov pc, lr
@@ -40,11 +40,11 @@ ENDPROC(vfp_null_entry)
40@ failure to the VFP initialisation code. 40@ failure to the VFP initialisation code.
41 41
42 __INIT 42 __INIT
43 .globl vfp_testing_entry 43ENTRY(vfp_testing_entry)
44vfp_testing_entry:
45 ldr r0, VFP_arch_address 44 ldr r0, VFP_arch_address
46 str r5, [r0] @ known non-zero value 45 str r5, [r0] @ known non-zero value
47 mov pc, r9 @ we have handled the fault 46 mov pc, r9 @ we have handled the fault
47ENDPROC(vfp_testing_entry)
48 48
49VFP_arch_address: 49VFP_arch_address:
50 .word VFP_arch 50 .word VFP_arch
diff --git a/arch/arm/vfp/vfphw.S b/arch/arm/vfp/vfphw.S
index 353f9e5c7919..a62dcf7098ba 100644
--- a/arch/arm/vfp/vfphw.S
+++ b/arch/arm/vfp/vfphw.S
@@ -68,8 +68,7 @@
68@ r11 = CPU number 68@ r11 = CPU number
69@ lr = failure return 69@ lr = failure return
70 70
71 .globl vfp_support_entry 71ENTRY(vfp_support_entry)
72vfp_support_entry:
73 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10 72 DBGSTR3 "instr %08x pc %08x state %p", r0, r2, r10
74 73
75 VFPFMRX r1, FPEXC @ Is the VFP enabled? 74 VFPFMRX r1, FPEXC @ Is the VFP enabled?
@@ -165,11 +164,10 @@ process_exception:
165 @ code will raise an exception if 164 @ code will raise an exception if
166 @ required. If not, the user code will 165 @ required. If not, the user code will
167 @ retry the faulted instruction 166 @ retry the faulted instruction
167ENDPROC(vfp_support_entry)
168 168
169#ifdef CONFIG_SMP 169#ifdef CONFIG_SMP
170 .globl vfp_save_state 170ENTRY(vfp_save_state)
171 .type vfp_save_state, %function
172vfp_save_state:
173 @ Save the current VFP state 171 @ Save the current VFP state
174 @ r0 - save location 172 @ r0 - save location
175 @ r1 - FPEXC 173 @ r1 - FPEXC
@@ -182,13 +180,13 @@ vfp_save_state:
182 VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present) 180 VFPFMRX r12, FPINST2, NE @ FPINST2 if needed (and present)
183 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2 181 stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
184 mov pc, lr 182 mov pc, lr
183ENDPROC(vfp_save_state)
185#endif 184#endif
186 185
187last_VFP_context_address: 186last_VFP_context_address:
188 .word last_VFP_context 187 .word last_VFP_context
189 188
190 .globl vfp_get_float 189ENTRY(vfp_get_float)
191vfp_get_float:
192 add pc, pc, r0, lsl #3 190 add pc, pc, r0, lsl #3
193 mov r0, r0 191 mov r0, r0
194 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 192 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -197,9 +195,9 @@ vfp_get_float:
197 mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1 195 mrc p10, 0, r0, c\dr, c0, 4 @ fmrs r0, s1
198 mov pc, lr 196 mov pc, lr
199 .endr 197 .endr
198ENDPROC(vfp_get_float)
200 199
201 .globl vfp_put_float 200ENTRY(vfp_put_float)
202vfp_put_float:
203 add pc, pc, r1, lsl #3 201 add pc, pc, r1, lsl #3
204 mov r0, r0 202 mov r0, r0
205 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 203 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -208,9 +206,9 @@ vfp_put_float:
208 mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1 206 mcr p10, 0, r0, c\dr, c0, 4 @ fmsr r0, s1
209 mov pc, lr 207 mov pc, lr
210 .endr 208 .endr
209ENDPROC(vfp_put_float)
211 210
212 .globl vfp_get_double 211ENTRY(vfp_get_double)
213vfp_get_double:
214 add pc, pc, r0, lsl #3 212 add pc, pc, r0, lsl #3
215 mov r0, r0 213 mov r0, r0
216 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 214 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -229,9 +227,9 @@ vfp_get_double:
229 mov r0, #0 227 mov r0, #0
230 mov r1, #0 228 mov r1, #0
231 mov pc, lr 229 mov pc, lr
230ENDPROC(vfp_get_double)
232 231
233 .globl vfp_put_double 232ENTRY(vfp_put_double)
234vfp_put_double:
235 add pc, pc, r2, lsl #3 233 add pc, pc, r2, lsl #3
236 mov r0, r0 234 mov r0, r0
237 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 235 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
@@ -245,3 +243,4 @@ vfp_put_double:
245 mov pc, lr 243 mov pc, lr
246 .endr 244 .endr
247#endif 245#endif
246ENDPROC(vfp_put_double)