[ARM] 3473/1: Use numbers 0-15 for the VFP double registers

Patch from Catalin Marinas

This patch changes the double registers numbering to 0-15 from even 0-30,
in preparation for future VFP extensions. It also fixes the VFP_REG_ZERO
bug (value 16 actually represents the 8th double register with the original
numbering).

The original mcrr/mrrc on CP10 were generating FMRRS/FMSRR instead of
FMRRD/FMDRR. The patch changes to CP11 for the correct instructions.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

1 files changed, 8 insertions, 12 deletions

diff --git a/arch/arm/vfp/vfpdouble.c b/arch/arm/vfp/vfpdouble.c
index 2418d12e7fb5..febd115dba28 100644
--- a/arch/arm/vfp/vfpdouble.c
+++ b/arch/arm/vfp/vfpdouble.c
@@ -1127,9 +1127,9 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
 {
         u32 op = inst & FOP_MASK;
         u32 exceptions = 0;
-        unsigned int dd = vfp_get_sd(inst);
-        unsigned int dn = vfp_get_sn(inst);
-        unsigned int dm = vfp_get_sm(inst);
+        unsigned int dd = vfp_get_dd(inst);
+        unsigned int dn = vfp_get_dn(inst);
+        unsigned int dm = vfp_get_dm(inst);
         unsigned int vecitr, veclen, vecstride;
         u32 (*fop)(int, int, s32, u32);
 
@@ -1146,7 +1146,7 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
         pr_debug("VFP: vecstride=%u veclen=%u\n", vecstride,
                  (veclen >> FPSCR_LENGTH_BIT) + 1);
 
-        fop = (op == FOP_EXT) ? fop_extfns[dn] : fop_fns[FOP_TO_IDX(op)];
+        fop = (op == FOP_EXT) ? fop_extfns[FEXT_TO_IDX(inst)] : fop_fns[FOP_TO_IDX(op)];
         if (!fop)
                 goto invalid;
 
@@ -1154,17 +1154,13 @@ u32 vfp_double_cpdo(u32 inst, u32 fpscr)
                 u32 except;
 
                 if (op == FOP_EXT)
-                        pr_debug("VFP: itr%d (d%u.%u) = op[%u] (d%u.%u)\n",
+                        pr_debug("VFP: itr%d (d%u) = op[%u] (d%u)\n",
                                  vecitr >> FPSCR_LENGTH_BIT,
-                                 dd >> 1, dd & 1, dn,
-                                 dm >> 1, dm & 1);
+                                 dd, dn, dm);
                 else
-                        pr_debug("VFP: itr%d (d%u.%u) = (d%u.%u) op[%u] (d%u.%u)\n",
+                        pr_debug("VFP: itr%d (d%u) = (d%u) op[%u] (d%u)\n",
                                  vecitr >> FPSCR_LENGTH_BIT,
-                                 dd >> 1, dd & 1,
-                                 dn >> 1, dn & 1,
-                                 FOP_TO_IDX(op),
-                                 dm >> 1, dm & 1);
+                                 dd, dn, FOP_TO_IDX(op), dm);
 
                 except = fop(dd, dn, dm, fpscr);
                 pr_debug("VFP: itr%d: exceptions=%08x\n",