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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-01-15 13:19:56 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-02 04:35:35 -0400
commit4ce1755275c13eb0de90fe23c950bce5e81e680f (patch)
treec6ee385d4d3ee92e36ec2e7ec0fa0e2245435217 /arch/arm/plat-versatile
parentfe8e1a57f0ccdaede41618ca9ced7d746b6298d3 (diff)
ARM: Realview/Versatile: don't use magic numbers for timer frequency
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-versatile')
-rw-r--r--arch/arm/plat-versatile/timer-sp.c12
1 files changed, 5 insertions, 7 deletions
diff --git a/arch/arm/plat-versatile/timer-sp.c b/arch/arm/plat-versatile/timer-sp.c
index d1dbef5b17b1..fb0d1c299718 100644
--- a/arch/arm/plat-versatile/timer-sp.c
+++ b/arch/arm/plat-versatile/timer-sp.c
@@ -26,15 +26,13 @@
26 26
27#include <asm/hardware/arm_timer.h> 27#include <asm/hardware/arm_timer.h>
28 28
29#include <mach/platform.h>
30
31#include <plat/timer-sp.h> 29#include <plat/timer-sp.h>
32 30
33/* 31/*
34 * How long is the timer interval? 32 * These timers are currently always setup to be clocked at 1MHz.
35 */ 33 */
36#define TIMER_RELOAD (TICKS_PER_uSEC * mSEC_10) 34#define TIMER_FREQ_KHZ (1000)
37 35#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
38 36
39static void __iomem *clksrc_base; 37static void __iomem *clksrc_base;
40 38
@@ -65,7 +63,7 @@ void __init sp804_clocksource_init(void __iomem *base)
65 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, 63 writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
66 clksrc_base + TIMER_CTRL); 64 clksrc_base + TIMER_CTRL);
67 65
68 cs->mult = clocksource_khz2mult(1000, cs->shift); 66 cs->mult = clocksource_khz2mult(TIMER_FREQ_KHZ, cs->shift);
69 clocksource_register(cs); 67 clocksource_register(cs);
70} 68}
71 69
@@ -149,7 +147,7 @@ void __init sp804_clockevents_init(void __iomem *base, unsigned int timer_irq)
149 clkevt_base = base; 147 clkevt_base = base;
150 148
151 evt->irq = timer_irq; 149 evt->irq = timer_irq;
152 evt->mult = div_sc(1000000, NSEC_PER_SEC, evt->shift); 150 evt->mult = div_sc(TIMER_FREQ_KHZ, NSEC_PER_MSEC, evt->shift);
153 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt); 151 evt->max_delta_ns = clockevent_delta2ns(0xffffffff, evt);
154 evt->min_delta_ns = clockevent_delta2ns(0xf, evt); 152 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
155 153