diff options
author | dmitry pervushin <dpervushin@embeddedalley.com> | 2009-04-23 07:24:13 -0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-04-27 05:28:08 -0400 |
commit | 5cccd37ea15970846a93b4b01fafd6e043bafe8e (patch) | |
tree | 4ab99b59f91964028fbba128d8ae086f60bd8c82 /arch/arm/plat-stmp3xxx/irq.c | |
parent | e317872ac532fd845c597e55ceb5a9bceee878c1 (diff) |
[ARM] 5477/1: Freescale STMP platform support [6/10]
Sources: common STMP3xxx platform support
Signed-off-by: dmitry pervushin <dpervushin@embeddedalley.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/plat-stmp3xxx/irq.c')
-rw-r--r-- | arch/arm/plat-stmp3xxx/irq.c | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/arm/plat-stmp3xxx/irq.c b/arch/arm/plat-stmp3xxx/irq.c new file mode 100644 index 000000000000..cb3659096681 --- /dev/null +++ b/arch/arm/plat-stmp3xxx/irq.c | |||
@@ -0,0 +1,59 @@ | |||
1 | /* | ||
2 | * Freescale STMP37XX/STMP378X common interrupt handling code | ||
3 | * | ||
4 | * Author: Vladislav Buzov <vbuzov@embeddedalley.com> | ||
5 | * | ||
6 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
7 | * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. | ||
8 | */ | ||
9 | |||
10 | /* | ||
11 | * The code contained herein is licensed under the GNU General Public | ||
12 | * License. You may obtain a copy of the GNU General Public License | ||
13 | * Version 2 or later at the following locations: | ||
14 | * | ||
15 | * http://www.opensource.org/licenses/gpl-license.html | ||
16 | * http://www.gnu.org/copyleft/gpl.html | ||
17 | */ | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/irq.h> | ||
22 | #include <linux/sysdev.h> | ||
23 | |||
24 | #include <mach/stmp3xxx.h> | ||
25 | #include <mach/regs-icoll.h> | ||
26 | |||
27 | void __init stmp3xxx_init_irq(struct irq_chip *chip) | ||
28 | { | ||
29 | unsigned int i; | ||
30 | |||
31 | /* Reset the interrupt controller */ | ||
32 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_CLKGATE); | ||
33 | udelay(10); | ||
34 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST); | ||
35 | udelay(10); | ||
36 | HW_ICOLL_CTRL_SET(BM_ICOLL_CTRL_SFTRST); | ||
37 | while (!(HW_ICOLL_CTRL_RD() & BM_ICOLL_CTRL_CLKGATE)) | ||
38 | continue; | ||
39 | HW_ICOLL_CTRL_CLR(BM_ICOLL_CTRL_SFTRST | BM_ICOLL_CTRL_CLKGATE); | ||
40 | |||
41 | /* Disable all interrupts initially */ | ||
42 | for (i = 0; i < NR_REAL_IRQS; i++) { | ||
43 | chip->mask(i); | ||
44 | set_irq_chip(i, chip); | ||
45 | set_irq_handler(i, handle_level_irq); | ||
46 | set_irq_flags(i, IRQF_VALID | IRQF_PROBE); | ||
47 | } | ||
48 | |||
49 | /* Ensure vector is cleared */ | ||
50 | HW_ICOLL_LEVELACK_WR(1); | ||
51 | HW_ICOLL_LEVELACK_WR(2); | ||
52 | HW_ICOLL_LEVELACK_WR(4); | ||
53 | HW_ICOLL_LEVELACK_WR(8); | ||
54 | |||
55 | HW_ICOLL_VECTOR_WR(0); | ||
56 | /* Barrier */ | ||
57 | (void) HW_ICOLL_STAT_RD(); | ||
58 | } | ||
59 | |||