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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-05-18 06:23:36 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-19 05:15:02 -0400
commit838c6d499b780c42fccbbdfecc0f5dcc471d0ef3 (patch)
tree8dbbe6ad6f940c390ea62c273470480ebdde2d63 /arch/arm/plat-samsung
parent14b8a0f92b309ff452a8c339abd9a096d00b210f (diff)
ARM: SAMSUNG: move driver strength gpio configuration helper to common dir
Driver strength parameter can be changed not only on S5PC100 but also on S5PV210/S5PC110 platforms, so move the helper functions to the common plat-samsung directory. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/Kconfig12
-rw-r--r--arch/arm/plat-samsung/gpio-config.c48
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h30
3 files changed, 84 insertions, 6 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index c91c21ac5fcb..711d5a4cce58 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -90,12 +90,6 @@ config S3C_GPIO_CFG_S3C64XX
90 Internal configuration to enable S3C64XX style GPIO configuration 90 Internal configuration to enable S3C64XX style GPIO configuration
91 functions. 91 functions.
92 92
93config S5P_GPIO_CFG_S5PC1XX
94 bool
95 help
96 Internal configuration to enable S5PC1XX style GPIO configuration
97 functions.
98
99config S3C_GPIO_PULL_UPDOWN 93config S3C_GPIO_PULL_UPDOWN
100 bool 94 bool
101 help 95 help
@@ -111,6 +105,12 @@ config S3C_GPIO_PULL_UP
111 help 105 help
112 Internal configuration to enable the correct GPIO pull helper 106 Internal configuration to enable the correct GPIO pull helper
113 107
108config S5P_GPIO_DRVSTR
109 bool
110 help
111 Internal configuration to get and set correct GPIO driver strength
112 helper
113
114config SAMSUNG_GPIO_EXTRA 114config SAMSUNG_GPIO_EXTRA
115 int "Number of additional GPIO pins" 115 int "Number of additional GPIO pins"
116 default 0 116 default 0
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index a76eef533392..57b68a50f45e 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -261,3 +261,51 @@ s3c_gpio_pull_t s3c_gpio_getpull_1up(struct s3c_gpio_chip *chip,
261} 261}
262#endif /* CONFIG_S3C_GPIO_PULL_UP */ 262#endif /* CONFIG_S3C_GPIO_PULL_UP */
263 263
264#ifdef CONFIG_S5P_GPIO_DRVSTR
265s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin)
266{
267 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
268 unsigned int off;
269 void __iomem *reg;
270 int shift;
271 u32 drvstr;
272
273 if (!chip)
274 return -EINVAL;
275
276 off = chip->chip.base - pin;
277 shift = off * 2;
278 reg = chip->base + 0x0C;
279
280 drvstr = __raw_readl(reg);
281 drvstr = 0xffff & (0x3 << shift);
282 drvstr = drvstr >> shift;
283
284 return (__force s5p_gpio_drvstr_t)drvstr;
285}
286EXPORT_SYMBOL(s5p_gpio_get_drvstr);
287
288int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr)
289{
290 struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin);
291 unsigned int off;
292 void __iomem *reg;
293 int shift;
294 u32 tmp;
295
296 if (!chip)
297 return -EINVAL;
298
299 off = chip->chip.base - pin;
300 shift = off * 2;
301 reg = chip->base + 0x0C;
302
303 tmp = __raw_readl(reg);
304 tmp |= drvstr << shift;
305
306 __raw_writel(tmp, reg);
307
308 return 0;
309}
310EXPORT_SYMBOL(s5p_gpio_set_drvstr);
311#endif /* CONFIG_S5P_GPIO_DRVSTR */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 8d01e853df39..34efdd2b032c 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -25,6 +25,7 @@
25#define __PLAT_GPIO_CFG_H __FILE__ 25#define __PLAT_GPIO_CFG_H __FILE__
26 26
27typedef unsigned int __bitwise__ s3c_gpio_pull_t; 27typedef unsigned int __bitwise__ s3c_gpio_pull_t;
28typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
28 29
29/* forward declaration if gpio-core.h hasn't been included */ 30/* forward declaration if gpio-core.h hasn't been included */
30struct s3c_gpio_chip; 31struct s3c_gpio_chip;
@@ -118,4 +119,33 @@ extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
118*/ 119*/
119extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin); 120extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
120 121
122/* Define values for the drvstr available for each gpio pin.
123 *
124 * These values control the value of the output signal driver strength,
125 * configurable on most pins on the S5C series.
126 */
127#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x00)
128#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x01)
129#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x10)
130#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x11)
131
132/**
133 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
134 * @pin: The pin number to get the settings for
135 *
136 * Read the driver streght value for the specified pin.
137*/
138extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
139
140/**
141 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
142 * @pin: The pin number to configure the driver streght value
143 * @drvstr: The new value of the driver strength
144 *
145 * This function sets the driver strength value for the specified pin.
146 * It will return 0 if successfull, or a negative error code if the pin
147 * cannot support the requested setting.
148*/
149extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
150
121#endif /* __PLAT_GPIO_CFG_H */ 151#endif /* __PLAT_GPIO_CFG_H */