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authorLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:31:45 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2013-05-02 12:31:45 -0400
commit97b1007a2924aaa9126398623f6755a8c3c6a616 (patch)
treeb65c6edb631256e64bb3c72f083fa1be048de097 /arch/arm/plat-samsung
parentdfab34aa61a0f8c14a67d7b4c1dae28e57ba592d (diff)
parente0d20b69d3fa74a21ec363989612bddd58b930b8 (diff)
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson: "This branch contains part 1 of the platform updates for 3.10. Among the highlights: - Support for the new Atmel Cortex-A5 based platforms (SAMA5D3) - New support for CSR SiRFatlas6 SoCs - A handful of updates for NVidia T114 (a.k.a. Tegra 4) - A bunch of updates for the shmobile platforms - A handful of updates for davinci - A few updates for Qualcomm MSM - Plus a handful of other patches, defconfig updates, etc." * tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (135 commits) ARM: tegra: pm: fix build error w/o PM_SLEEP ARM: davinci: ensure global variables are declared ARM: davinci: sram.c: fix incorrect type in assignment ARM: davinci: da8xx dt: make file local symbols static ARM: davinci: da8xx: add remoteproc support ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries ARM: socfpga: Add clock entries into device tree ARM: socfpga: Enable soft reset ARM: EXYNOS: replace cpumask by the corresponding macro ARM: EXYNOS: handle properly the return values ARM: EXYNOS: factor out the idle states ARM: OMAP4: Enable fix for Cortex-A9 erratas ARM: OMAP2+: Export SoC information to userspace ARM: OMAP2+: SoC name and revision unification ARM: OMAP2+: Move common part of late init into common function ARM: tegra: pm: remove duplicated include from pm.c ARM: davinci: da850: override mmc DT node device name ARM: davinci: da850: add mmc DT entries mmc: davinci_mmc: add DT support ARM: SAMSUNG: check processor type before cache restoration in resume ...
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/s5p-sleep.S9
-rw-r--r--arch/arm/plat-samsung/setup-mipiphy.c3
2 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S
index bdf6dadf8790..a030e7301da8 100644
--- a/arch/arm/plat-samsung/s5p-sleep.S
+++ b/arch/arm/plat-samsung/s5p-sleep.S
@@ -25,6 +25,9 @@
25#include <asm/asm-offsets.h> 25#include <asm/asm-offsets.h>
26#include <asm/hardware/cache-l2x0.h> 26#include <asm/hardware/cache-l2x0.h>
27 27
28#define CPU_MASK 0xff0ffff0
29#define CPU_CORTEX_A9 0x410fc090
30
28/* 31/*
29 * The following code is located into the .data section. This is to 32 * The following code is located into the .data section. This is to
30 * allow l2x0_regs_phys to be accessed with a relative load while we 33 * allow l2x0_regs_phys to be accessed with a relative load while we
@@ -51,6 +54,12 @@
51 54
52ENTRY(s3c_cpu_resume) 55ENTRY(s3c_cpu_resume)
53#ifdef CONFIG_CACHE_L2X0 56#ifdef CONFIG_CACHE_L2X0
57 mrc p15, 0, r0, c0, c0, 0
58 ldr r1, =CPU_MASK
59 and r0, r0, r1
60 ldr r1, =CPU_CORTEX_A9
61 cmp r0, r1
62 bne resume_l2on
54 adr r0, l2x0_regs_phys 63 adr r0, l2x0_regs_phys
55 ldr r0, [r0] 64 ldr r0, [r0]
56 ldr r1, [r0, #L2X0_R_PHY_BASE] 65 ldr r1, [r0, #L2X0_R_PHY_BASE]
diff --git a/arch/arm/plat-samsung/setup-mipiphy.c b/arch/arm/plat-samsung/setup-mipiphy.c
index 147459327601..66df315990a7 100644
--- a/arch/arm/plat-samsung/setup-mipiphy.c
+++ b/arch/arm/plat-samsung/setup-mipiphy.c
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/export.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13#include <linux/io.h> 14#include <linux/io.h>
@@ -50,8 +51,10 @@ int s5p_csis_phy_enable(int id, bool on)
50{ 51{
51 return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN); 52 return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
52} 53}
54EXPORT_SYMBOL(s5p_csis_phy_enable);
53 55
54int s5p_dsim_phy_enable(struct platform_device *pdev, bool on) 56int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
55{ 57{
56 return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN); 58 return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
57} 59}
60EXPORT_SYMBOL(s5p_dsim_phy_enable);