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authorTomasz Figa <t.figa@samsung.com>2014-07-02 13:40:44 -0400
committerKukjin Kim <kgene.kim@samsung.com>2014-07-18 15:32:18 -0400
commitd78c16ccde96eddf42942c093b241b5e5135b777 (patch)
tree3bedb6c54ec937d57d8d9e3f473739a78c1ae5ad /arch/arm/plat-samsung
parent09ee2dac4c07016c6bc7577152822996c9a7c122 (diff)
ARM: SAMSUNG: Remove remaining legacy code
After refactoring suspend/resume, which was last part with dependencies on legacy code, all Kconfig symbols related to Samsung ATAGS support can be deselected and more unused code removed. This includes most of s5p-* code as well, as s5pv210 was their last user. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/Kconfig125
-rw-r--r--arch/arm/plat-samsung/Makefile9
-rw-r--r--arch/arm/plat-samsung/cpu.c1
-rw-r--r--arch/arm/plat-samsung/devs.c330
-rw-r--r--arch/arm/plat-samsung/include/plat/camport.h28
-rw-r--r--arch/arm/plat-samsung/include/plat/cpu.h12
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h42
-rw-r--r--arch/arm/plat-samsung/include/plat/fb-core.h15
-rw-r--r--arch/arm/plat-samsung/include/plat/fb.h22
-rw-r--r--arch/arm/plat-samsung/include/plat/fimc-core.h51
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h64
-rw-r--r--arch/arm/plat-samsung/include/plat/hdmi.h16
-rw-r--r--arch/arm/plat-samsung/include/plat/irqs.h72
-rw-r--r--arch/arm/plat-samsung/include/plat/mfc.h35
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h47
-rw-r--r--arch/arm/plat-samsung/include/plat/tv-core.h44
-rw-r--r--arch/arm/plat-samsung/pm-gpio.c4
-rw-r--r--arch/arm/plat-samsung/s5p-dev-mfc.c81
-rw-r--r--arch/arm/plat-samsung/s5p-dev-uart.c88
-rw-r--r--arch/arm/plat-samsung/s5p-irq-eint.c221
-rw-r--r--arch/arm/plat-samsung/s5p-irq-gpioint.c218
-rw-r--r--arch/arm/plat-samsung/s5p-irq-pm.c92
-rw-r--r--arch/arm/plat-samsung/s5p-irq.c31
-rw-r--r--arch/arm/plat-samsung/s5p-pm.c40
-rw-r--r--arch/arm/plat-samsung/s5p-sleep.S45
25 files changed, 13 insertions, 1720 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index f8185b542218..1091b0a3729a 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -6,29 +6,16 @@
6 6
7config PLAT_SAMSUNG 7config PLAT_SAMSUNG
8 bool 8 bool
9 depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P || ARCH_EXYNOS 9 depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210
10 default y 10 default y
11 select GENERIC_IRQ_CHIP 11 select GENERIC_IRQ_CHIP
12 select NO_IOPORT_MAP 12 select NO_IOPORT_MAP
13 help 13 help
14 Base platform code for all Samsung SoC based systems 14 Base platform code for all Samsung SoC based systems
15 15
16config PLAT_S5P
17 bool
18 depends on ARCH_S5PV210
19 default y
20 select ARCH_REQUIRE_GPIOLIB
21 select ARM_VIC
22 select NO_IOPORT_MAP
23 select PLAT_SAMSUNG
24 select S3C_GPIO_TRACK
25 select S5P_GPIO_DRVSTR
26 help
27 Base platform code for Samsung's S5P series SoC.
28
29config SAMSUNG_PM 16config SAMSUNG_PM
30 bool 17 bool
31 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || S5P_PM) 18 depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX)
32 default y 19 default y
33 help 20 help
34 Base platform power management code for samsung code 21 Base platform power management code for samsung code
@@ -64,31 +51,6 @@ config SAMSUNG_ATAGS
64 51
65if SAMSUNG_ATAGS 52if SAMSUNG_ATAGS
66 53
67# options for IRQ support
68
69config S5P_IRQ
70 def_bool ARCH_S5PV210
71 help
72 Support common interrupt part for ARCH_S5P SoCs
73
74config S5P_EXT_INT
75 bool
76 help
77 Use the external interrupts (other than GPIO interrupts.)
78
79config S5P_GPIO_INT
80 bool
81 help
82 Common code for the GPIO interrupts (other than external interrupts.)
83
84# options for gpio configuration support
85
86config S5P_GPIO_DRVSTR
87 bool
88 help
89 Internal configuration to get and set correct GPIO driver strength
90 helper
91
92config SAMSUNG_GPIO_EXTRA 54config SAMSUNG_GPIO_EXTRA
93 int "Number of additional GPIO pins" 55 int "Number of additional GPIO pins"
94 default 128 if SAMSUNG_GPIO_EXTRA128 56 default 128 if SAMSUNG_GPIO_EXTRA128
@@ -120,12 +82,6 @@ config S3C_GPIO_TRACK
120 Internal configuration option to enable the s3c specific gpio 82 Internal configuration option to enable the s3c specific gpio
121 chip tracking if the platform requires it. 83 chip tracking if the platform requires it.
122 84
123# uart options
124
125config S5P_DEV_UART
126 def_bool y
127 depends on ARCH_S5PV210
128
129# ADC driver 85# ADC driver
130 86
131config S3C_ADC 87config S3C_ADC
@@ -283,66 +239,6 @@ config SAMSUNG_DEV_BACKLIGHT
283 help 239 help
284 Compile in platform device definition LCD backlight with PWM Timer 240 Compile in platform device definition LCD backlight with PWM Timer
285 241
286config S5P_DEV_CSIS0
287 bool
288 help
289 Compile in platform device definitions for MIPI-CSIS channel 0
290
291config S5P_DEV_CSIS1
292 bool
293 help
294 Compile in platform device definitions for MIPI-CSIS channel 1
295
296config S5P_DEV_FIMC0
297 bool
298 help
299 Compile in platform device definitions for FIMC controller 0
300
301config S5P_DEV_FIMC1
302 bool
303 help
304 Compile in platform device definitions for FIMC controller 1
305
306config S5P_DEV_FIMC2
307 bool
308 help
309 Compile in platform device definitions for FIMC controller 2
310
311config S5P_DEV_FIMC3
312 bool
313 help
314 Compile in platform device definitions for FIMC controller 3
315
316config S5P_DEV_FIMD0
317 bool
318 help
319 Compile in platform device definitions for FIMD controller 0
320
321config S5P_DEV_G2D
322 bool
323 help
324 Compile in platform device definitions for G2D device
325
326config S5P_DEV_I2C_HDMIPHY
327 bool
328 help
329 Compile in platform device definitions for I2C HDMIPHY controller
330
331config S5P_DEV_JPEG
332 bool
333 help
334 Compile in platform device definitions for JPEG codec
335
336config S5P_DEV_ONENAND
337 bool
338 help
339 Compile in platform device definition for OneNAND controller
340
341config S5P_DEV_TV
342 bool
343 help
344 Compile in platform device definition for TV interface
345
346config S3C24XX_PWM 242config S3C24XX_PWM
347 bool "PWM device support" 243 bool "PWM device support"
348 select PWM 244 select PWM
@@ -363,12 +259,6 @@ config S3C_DMA
363 help 259 help
364 Internal configuration for S3C DMA core 260 Internal configuration for S3C DMA core
365 261
366config S5P_IRQ_PM
367 bool
368 default y if S5P_PM
369 help
370 Legacy IRQ power management for S5P platforms
371
372config SAMSUNG_PM_GPIO 262config SAMSUNG_PM_GPIO
373 bool 263 bool
374 default y if GPIO_SAMSUNG && PM 264 default y if GPIO_SAMSUNG && PM
@@ -451,17 +341,6 @@ config SAMSUNG_WDT_RESET
451 Compile support for system restart by triggering watchdog reset. 341 Compile support for system restart by triggering watchdog reset.
452 Used on SoCs that do not provide dedicated reset control. 342 Used on SoCs that do not provide dedicated reset control.
453 343
454config S5P_PM
455 bool
456 help
457 Common code for power management support on S5P and newer SoCs
458
459config S5P_SLEEP
460 bool
461 help
462 Internal config node to apply common S5P sleep management code.
463 Can be selected by S5P and newer SoCs with similar sleep procedure.
464
465config DEBUG_S3C_UART 344config DEBUG_S3C_UART
466 depends on PLAT_SAMSUNG 345 depends on PLAT_SAMSUNG
467 int 346 int
diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile
index 97fc15ecc4ae..5fe175017f07 100644
--- a/arch/arm/plat-samsung/Makefile
+++ b/arch/arm/plat-samsung/Makefile
@@ -15,10 +15,6 @@ obj- :=
15 15
16obj-y += init.o cpu.o 16obj-y += init.o cpu.o
17 17
18obj-$(CONFIG_S5P_IRQ) += s5p-irq.o
19obj-$(CONFIG_S5P_EXT_INT) += s5p-irq-eint.o
20obj-$(CONFIG_S5P_GPIO_INT) += s5p-irq-gpioint.o
21
22# ADC 18# ADC
23 19
24obj-$(CONFIG_S3C_ADC) += adc.o 20obj-$(CONFIG_S3C_ADC) += adc.o
@@ -30,7 +26,6 @@ obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o
30obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o 26obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o
31obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o 27obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o
32obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o 28obj-$(CONFIG_S5P_DEV_MFC) += s5p-dev-mfc.o
33obj-$(CONFIG_S5P_DEV_UART) += s5p-dev-uart.o
34 29
35obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o 30obj-$(CONFIG_SAMSUNG_DEV_BACKLIGHT) += dev-backlight.o
36 31
@@ -52,7 +47,3 @@ obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o
52 47
53obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o 48obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o
54obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o 49obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o
55
56obj-$(CONFIG_S5P_PM) += s5p-pm.o
57obj-$(CONFIG_S5P_IRQ_PM) += s5p-irq-pm.o
58obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o
diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c
index 945fc3f5b7a2..360618ee39e5 100644
--- a/arch/arm/plat-samsung/cpu.c
+++ b/arch/arm/plat-samsung/cpu.c
@@ -15,7 +15,6 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17 17
18
19#include <plat/map-base.h> 18#include <plat/map-base.h>
20#include <plat/cpu.h> 19#include <plat/cpu.h>
21 20
diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c
index ead4f1c94058..83c7d154bde0 100644
--- a/arch/arm/plat-samsung/devs.c
+++ b/arch/arm/plat-samsung/devs.c
@@ -53,7 +53,6 @@
53#include <linux/platform_data/ata-samsung_cf.h> 53#include <linux/platform_data/ata-samsung_cf.h>
54#include <plat/fb.h> 54#include <plat/fb.h>
55#include <plat/fb-s3c2410.h> 55#include <plat/fb-s3c2410.h>
56#include <plat/hdmi.h>
57#include <linux/platform_data/hwmon-s3c.h> 56#include <linux/platform_data/hwmon-s3c.h>
58#include <linux/platform_data/i2c-s3c2410.h> 57#include <linux/platform_data/i2c-s3c2410.h>
59#include <plat/keypad.h> 58#include <plat/keypad.h>
@@ -145,23 +144,6 @@ struct platform_device s3c_device_camif = {
145}; 144};
146#endif /* CONFIG_CPU_S3C2440 */ 145#endif /* CONFIG_CPU_S3C2440 */
147 146
148/* ASOC DMA */
149
150#ifdef CONFIG_PLAT_S5P
151static struct resource samsung_asoc_idma_resource = DEFINE_RES_IRQ(IRQ_I2S0);
152
153struct platform_device samsung_asoc_idma = {
154 .name = "samsung-idma",
155 .id = -1,
156 .num_resources = 1,
157 .resource = &samsung_asoc_idma_resource,
158 .dev = {
159 .dma_mask = &samsung_device_dma_mask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
161 }
162};
163#endif
164
165/* FB */ 147/* FB */
166 148
167#ifdef CONFIG_S3C_DEV_FB 149#ifdef CONFIG_S3C_DEV_FB
@@ -190,151 +172,6 @@ void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
190} 172}
191#endif /* CONFIG_S3C_DEV_FB */ 173#endif /* CONFIG_S3C_DEV_FB */
192 174
193/* FIMC */
194
195#ifdef CONFIG_S5P_DEV_FIMC0
196static struct resource s5p_fimc0_resource[] = {
197 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
198 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
199};
200
201struct platform_device s5p_device_fimc0 = {
202 .name = "s5p-fimc",
203 .id = 0,
204 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
205 .resource = s5p_fimc0_resource,
206 .dev = {
207 .dma_mask = &samsung_device_dma_mask,
208 .coherent_dma_mask = DMA_BIT_MASK(32),
209 },
210};
211
212struct platform_device s5p_device_fimc_md = {
213 .name = "s5p-fimc-md",
214 .id = -1,
215};
216#endif /* CONFIG_S5P_DEV_FIMC0 */
217
218#ifdef CONFIG_S5P_DEV_FIMC1
219static struct resource s5p_fimc1_resource[] = {
220 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
221 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
222};
223
224struct platform_device s5p_device_fimc1 = {
225 .name = "s5p-fimc",
226 .id = 1,
227 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
228 .resource = s5p_fimc1_resource,
229 .dev = {
230 .dma_mask = &samsung_device_dma_mask,
231 .coherent_dma_mask = DMA_BIT_MASK(32),
232 },
233};
234#endif /* CONFIG_S5P_DEV_FIMC1 */
235
236#ifdef CONFIG_S5P_DEV_FIMC2
237static struct resource s5p_fimc2_resource[] = {
238 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
239 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
240};
241
242struct platform_device s5p_device_fimc2 = {
243 .name = "s5p-fimc",
244 .id = 2,
245 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
246 .resource = s5p_fimc2_resource,
247 .dev = {
248 .dma_mask = &samsung_device_dma_mask,
249 .coherent_dma_mask = DMA_BIT_MASK(32),
250 },
251};
252#endif /* CONFIG_S5P_DEV_FIMC2 */
253
254#ifdef CONFIG_S5P_DEV_FIMC3
255static struct resource s5p_fimc3_resource[] = {
256 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
257 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
258};
259
260struct platform_device s5p_device_fimc3 = {
261 .name = "s5p-fimc",
262 .id = 3,
263 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
264 .resource = s5p_fimc3_resource,
265 .dev = {
266 .dma_mask = &samsung_device_dma_mask,
267 .coherent_dma_mask = DMA_BIT_MASK(32),
268 },
269};
270#endif /* CONFIG_S5P_DEV_FIMC3 */
271
272/* G2D */
273
274#ifdef CONFIG_S5P_DEV_G2D
275static struct resource s5p_g2d_resource[] = {
276 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
277 [1] = DEFINE_RES_IRQ(IRQ_2D),
278};
279
280struct platform_device s5p_device_g2d = {
281 .name = "s5p-g2d",
282 .id = 0,
283 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
284 .resource = s5p_g2d_resource,
285 .dev = {
286 .dma_mask = &samsung_device_dma_mask,
287 .coherent_dma_mask = DMA_BIT_MASK(32),
288 },
289};
290#endif /* CONFIG_S5P_DEV_G2D */
291
292#ifdef CONFIG_S5P_DEV_JPEG
293static struct resource s5p_jpeg_resource[] = {
294 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
295 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
296};
297
298struct platform_device s5p_device_jpeg = {
299 .name = "s5p-jpeg",
300 .id = 0,
301 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
302 .resource = s5p_jpeg_resource,
303 .dev = {
304 .dma_mask = &samsung_device_dma_mask,
305 .coherent_dma_mask = DMA_BIT_MASK(32),
306 },
307};
308#endif /* CONFIG_S5P_DEV_JPEG */
309
310/* FIMD0 */
311
312#ifdef CONFIG_S5P_DEV_FIMD0
313static struct resource s5p_fimd0_resource[] = {
314 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
315 [1] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_VSYNC, "vsync"),
316 [2] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_FIFO, "fifo"),
317 [3] = DEFINE_RES_IRQ_NAMED(IRQ_FIMD0_SYSTEM, "lcd_sys"),
318};
319
320struct platform_device s5p_device_fimd0 = {
321 .name = "s5p-fb",
322 .id = 0,
323 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
324 .resource = s5p_fimd0_resource,
325 .dev = {
326 .dma_mask = &samsung_device_dma_mask,
327 .coherent_dma_mask = DMA_BIT_MASK(32),
328 },
329};
330
331void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
332{
333 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
334 &s5p_device_fimd0);
335}
336#endif /* CONFIG_S5P_DEV_FIMD0 */
337
338/* HWMON */ 175/* HWMON */
339 176
340#ifdef CONFIG_S3C_DEV_HWMON 177#ifdef CONFIG_S3C_DEV_HWMON
@@ -722,60 +559,6 @@ void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
722} 559}
723#endif /* CONFIG_S3C_DEV_I2C7 */ 560#endif /* CONFIG_S3C_DEV_I2C7 */
724 561
725/* I2C HDMIPHY */
726
727#ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
728static struct resource s5p_i2c_resource[] = {
729 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
730 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
731};
732
733struct platform_device s5p_device_i2c_hdmiphy = {
734 .name = "s3c2440-hdmiphy-i2c",
735 .id = -1,
736 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
737 .resource = s5p_i2c_resource,
738};
739
740void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
741{
742 struct s3c2410_platform_i2c *npd;
743
744 if (!pd) {
745 pd = &default_i2c_data;
746
747 if (soc_is_s5pv210())
748 pd->bus_num = 3;
749 else
750 pd->bus_num = 0;
751 }
752
753 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
754 &s5p_device_i2c_hdmiphy);
755}
756
757static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
758
759void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
760 struct i2c_board_info *mhl_info, int mhl_bus)
761{
762 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
763
764 if (soc_is_s5pv210())
765 pd->hdmiphy_bus = 3;
766 else
767 pd->hdmiphy_bus = 0;
768
769 pd->hdmiphy_info = hdmiphy_info;
770 pd->mhl_info = mhl_info;
771 pd->mhl_bus = mhl_bus;
772
773 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
774 &s5p_device_hdmi);
775}
776
777#endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
778
779/* I2S */ 562/* I2S */
780 563
781#ifdef CONFIG_PLAT_S3C24XX 564#ifdef CONFIG_PLAT_S3C24XX
@@ -879,36 +662,6 @@ void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
879} 662}
880#endif /* CONFIG_PLAT_S3C24XX */ 663#endif /* CONFIG_PLAT_S3C24XX */
881 664
882/* MIPI CSIS */
883
884#ifdef CONFIG_S5P_DEV_CSIS0
885static struct resource s5p_mipi_csis0_resource[] = {
886 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
887 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
888};
889
890struct platform_device s5p_device_mipi_csis0 = {
891 .name = "s5p-mipi-csis",
892 .id = 0,
893 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
894 .resource = s5p_mipi_csis0_resource,
895};
896#endif /* CONFIG_S5P_DEV_CSIS0 */
897
898#ifdef CONFIG_S5P_DEV_CSIS1
899static struct resource s5p_mipi_csis1_resource[] = {
900 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
901 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
902};
903
904struct platform_device s5p_device_mipi_csis1 = {
905 .name = "s5p-mipi-csis",
906 .id = 1,
907 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
908 .resource = s5p_mipi_csis1_resource,
909};
910#endif
911
912/* NAND */ 665/* NAND */
913 666
914#ifdef CONFIG_S3C_DEV_NAND 667#ifdef CONFIG_S3C_DEV_NAND
@@ -1052,43 +805,6 @@ void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1052} 805}
1053#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ 806#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1054 807
1055#ifdef CONFIG_S5P_DEV_ONENAND
1056static struct resource s5p_onenand_resources[] = {
1057 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1058 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1059 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1060};
1061
1062struct platform_device s5p_device_onenand = {
1063 .name = "s5pc110-onenand",
1064 .id = -1,
1065 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1066 .resource = s5p_onenand_resources,
1067};
1068#endif /* CONFIG_S5P_DEV_ONENAND */
1069
1070/* PMU */
1071
1072#if defined(CONFIG_PLAT_S5P) && !defined(CONFIG_ARCH_EXYNOS)
1073static struct resource s5p_pmu_resource[] = {
1074 DEFINE_RES_IRQ(IRQ_PMU)
1075};
1076
1077static struct platform_device s5p_device_pmu = {
1078 .name = "arm-pmu",
1079 .id = -1,
1080 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1081 .resource = s5p_pmu_resource,
1082};
1083
1084static int __init s5p_pmu_init(void)
1085{
1086 platform_device_register(&s5p_device_pmu);
1087 return 0;
1088}
1089arch_initcall(s5p_pmu_init);
1090#endif /* CONFIG_PLAT_S5P */
1091
1092/* PWM Timer */ 808/* PWM Timer */
1093 809
1094#ifdef CONFIG_SAMSUNG_DEV_PWM 810#ifdef CONFIG_SAMSUNG_DEV_PWM
@@ -1251,52 +967,6 @@ void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1251} 967}
1252#endif /* CONFIG_SAMSUNG_DEV_TS */ 968#endif /* CONFIG_SAMSUNG_DEV_TS */
1253 969
1254/* TV */
1255
1256#ifdef CONFIG_S5P_DEV_TV
1257
1258static struct resource s5p_hdmi_resources[] = {
1259 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1260 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1261};
1262
1263struct platform_device s5p_device_hdmi = {
1264 .name = "s5p-hdmi",
1265 .id = -1,
1266 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1267 .resource = s5p_hdmi_resources,
1268};
1269
1270static struct resource s5p_sdo_resources[] = {
1271 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1272 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1273};
1274
1275struct platform_device s5p_device_sdo = {
1276 .name = "s5p-sdo",
1277 .id = -1,
1278 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1279 .resource = s5p_sdo_resources,
1280};
1281
1282static struct resource s5p_mixer_resources[] = {
1283 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1284 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1285 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1286};
1287
1288struct platform_device s5p_device_mixer = {
1289 .name = "s5p-mixer",
1290 .id = -1,
1291 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1292 .resource = s5p_mixer_resources,
1293 .dev = {
1294 .dma_mask = &samsung_device_dma_mask,
1295 .coherent_dma_mask = DMA_BIT_MASK(32),
1296 }
1297};
1298#endif /* CONFIG_S5P_DEV_TV */
1299
1300/* USB */ 970/* USB */
1301 971
1302#ifdef CONFIG_S3C_DEV_USB_HOST 972#ifdef CONFIG_S3C_DEV_USB_HOST
diff --git a/arch/arm/plat-samsung/include/plat/camport.h b/arch/arm/plat-samsung/include/plat/camport.h
deleted file mode 100644
index a5708bf84b3a..000000000000
--- a/arch/arm/plat-samsung/include/plat/camport.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series camera interface helper functions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __PLAT_SAMSUNG_CAMPORT_H_
12#define __PLAT_SAMSUNG_CAMPORT_H_ __FILE__
13
14enum s5p_camport_id {
15 S5P_CAMPORT_A,
16 S5P_CAMPORT_B,
17};
18
19/*
20 * The helper functions to configure GPIO for the camera parallel bus.
21 * The camera port can be multiplexed with any FIMC entity, even multiple
22 * FIMC entities are allowed to be attached to a single port simultaneously.
23 * These functions are to be used in the board setup code.
24 */
25int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
26int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
27
28#endif /* __PLAT_SAMSUNG_CAMPORT_H */
diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index 995e56eadc0f..61d14f3a0426 100644
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -47,7 +47,6 @@ IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK)
47IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) 47IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK)
48IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) 48IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK)
49IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) 49IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK)
50IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
51 50
52#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ 51#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
53 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ 52 defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -76,12 +75,6 @@ IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
76# define soc_is_s3c64xx() 0 75# define soc_is_s3c64xx() 0
77#endif 76#endif
78 77
79#if defined(CONFIG_CPU_S5PV210)
80# define soc_is_s5pv210() is_samsung_s5pv210()
81#else
82# define soc_is_s5pv210() 0
83#endif
84
85#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } 78#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE }
86 79
87#ifndef KHZ 80#ifndef KHZ
@@ -117,12 +110,9 @@ extern void s3c_init_cpu(unsigned long idcode,
117 110
118/* core initialisation functions */ 111/* core initialisation functions */
119 112
120extern void s5p_init_irq(u32 *vic, u32 num_vic);
121
122extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); 113extern void s3c24xx_init_io(struct map_desc *mach_desc, int size);
123 114
124extern void s3c64xx_init_cpu(void); 115extern void s3c64xx_init_cpu(void);
125extern void s5p_init_cpu(void __iomem *cpuid_addr);
126 116
127extern unsigned int samsung_rev(void); 117extern unsigned int samsung_rev(void);
128 118
@@ -150,6 +140,4 @@ extern struct bus_type s3c2442_subsys;
150extern struct bus_type s3c2443_subsys; 140extern struct bus_type s3c2443_subsys;
151extern struct bus_type s3c6410_subsys; 141extern struct bus_type s3c6410_subsys;
152 142
153extern void (*s5pc1xx_idle)(void);
154
155#endif 143#endif
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5f5a28d08c2e..e23fed311e5f 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -25,9 +25,6 @@ struct s3c24xx_uart_resources {
25 25
26extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; 26extern struct s3c24xx_uart_resources s3c2410_uart_resources[];
27extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; 27extern struct s3c24xx_uart_resources s3c64xx_uart_resources[];
28extern struct s3c24xx_uart_resources s5p_uart_resources[];
29extern struct s3c24xx_uart_resources exynos4_uart_resources[];
30extern struct s3c24xx_uart_resources exynos5_uart_resources[];
31 28
32extern struct platform_device *s3c24xx_uart_devs[]; 29extern struct platform_device *s3c24xx_uart_devs[];
33extern struct platform_device *s3c24xx_uart_src[]; 30extern struct platform_device *s3c24xx_uart_src[];
@@ -75,45 +72,6 @@ extern struct platform_device s3c_device_usb_hsotg;
75extern struct platform_device s3c_device_usb_hsudc; 72extern struct platform_device s3c_device_usb_hsudc;
76extern struct platform_device s3c_device_wdt; 73extern struct platform_device s3c_device_wdt;
77 74
78extern struct platform_device s5p_device_fimc0;
79extern struct platform_device s5p_device_fimc1;
80extern struct platform_device s5p_device_fimc2;
81extern struct platform_device s5p_device_fimc3;
82extern struct platform_device s5p_device_fimc_md;
83extern struct platform_device s5p_device_jpeg;
84extern struct platform_device s5p_device_g2d;
85extern struct platform_device s5p_device_fimd0;
86extern struct platform_device s5p_device_hdmi;
87extern struct platform_device s5p_device_i2c_hdmiphy;
88extern struct platform_device s5p_device_mfc;
89extern struct platform_device s5p_device_mfc_l;
90extern struct platform_device s5p_device_mfc_r;
91extern struct platform_device s5p_device_mipi_csis0;
92extern struct platform_device s5p_device_mipi_csis1;
93extern struct platform_device s5p_device_mixer;
94extern struct platform_device s5p_device_onenand;
95extern struct platform_device s5p_device_sdo;
96
97extern struct platform_device s5pv210_device_ac97;
98extern struct platform_device s5pv210_device_iis0;
99extern struct platform_device s5pv210_device_iis1;
100extern struct platform_device s5pv210_device_iis2;
101extern struct platform_device s5pv210_device_pcm0;
102extern struct platform_device s5pv210_device_pcm1;
103extern struct platform_device s5pv210_device_pcm2;
104extern struct platform_device s5pv210_device_spdif;
105
106extern struct platform_device exynos4_device_ac97;
107extern struct platform_device exynos4_device_ahci;
108extern struct platform_device exynos4_device_i2s0;
109extern struct platform_device exynos4_device_i2s1;
110extern struct platform_device exynos4_device_i2s2;
111extern struct platform_device exynos4_device_ohci;
112extern struct platform_device exynos4_device_pcm0;
113extern struct platform_device exynos4_device_pcm1;
114extern struct platform_device exynos4_device_pcm2;
115extern struct platform_device exynos4_device_spdif;
116
117extern struct platform_device samsung_asoc_idma; 75extern struct platform_device samsung_asoc_idma;
118extern struct platform_device samsung_device_keypad; 76extern struct platform_device samsung_device_keypad;
119extern struct platform_device samsung_device_pwm; 77extern struct platform_device samsung_device_pwm;
diff --git a/arch/arm/plat-samsung/include/plat/fb-core.h b/arch/arm/plat-samsung/include/plat/fb-core.h
index 6abcbf139cee..bca383efcf6d 100644
--- a/arch/arm/plat-samsung/include/plat/fb-core.h
+++ b/arch/arm/plat-samsung/include/plat/fb-core.h
@@ -26,19 +26,4 @@ static inline void s3c_fb_setname(char *name)
26#endif 26#endif
27} 27}
28 28
29/* Re-define device name depending on support. */
30static inline void s5p_fb_setname(int id, char *name)
31{
32 switch (id) {
33#ifdef CONFIG_S5P_DEV_FIMD0
34 case 0:
35 s5p_device_fimd0.name = name;
36 break;
37#endif
38 default:
39 printk(KERN_ERR "%s: invalid device id(%d)\n", __func__, id);
40 break;
41 }
42}
43
44#endif /* __ASM_PLAT_FB_CORE_H */ 29#endif /* __ASM_PLAT_FB_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h
index 5a0e26afb961..b89f8f208515 100644
--- a/arch/arm/plat-samsung/include/plat/fb.h
+++ b/arch/arm/plat-samsung/include/plat/fb.h
@@ -26,32 +26,10 @@
26extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd); 26extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd);
27 27
28/** 28/**
29 * s5p_fimd0_set_platdata() - Setup the FB device with platform data.
30 * @pd: The platform data to set. The data is copied from the passed structure
31 * so the machine data can mark the data __initdata so that any unused
32 * machines will end up dumping their data at runtime.
33 */
34extern void s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd);
35
36/**
37 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD 29 * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD
38 * 30 *
39 * Initialise the GPIO for an 24bpp LCD display on the RGB interface. 31 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
40 */ 32 */
41extern void s3c64xx_fb_gpio_setup_24bpp(void); 33extern void s3c64xx_fb_gpio_setup_24bpp(void);
42 34
43/**
44 * s5pv210_fb_gpio_setup_24bpp() - S5PV210/S5PC110 setup function for 24bpp LCD
45 *
46 * Initialise the GPIO for an 24bpp LCD display on the RGB interface.
47 */
48extern void s5pv210_fb_gpio_setup_24bpp(void);
49
50/**
51 * exynos4_fimd0_gpio_setup_24bpp() - Exynos4 setup function for 24bpp LCD0
52 *
53 * Initialise the GPIO for an 24bpp LCD display on the RGB interface 0.
54 */
55extern void exynos4_fimd0_gpio_setup_24bpp(void);
56
57#endif /* __PLAT_S3C_FB_H */ 35#endif /* __PLAT_S3C_FB_H */
diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h
deleted file mode 100644
index 1d6cb2b8b094..000000000000
--- a/arch/arm/plat-samsung/include/plat/fimc-core.h
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/arm/plat-samsung/include/plat/fimc-core.h
3 *
4 * Copyright 2010 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * Samsung camera interface driver core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_PLAT_FIMC_CORE_H
15#define __ASM_PLAT_FIMC_CORE_H __FILE__
16
17/*
18 * These functions are only for use with the core support code, such as
19 * the CPU-specific initialization code.
20 */
21
22/* Re-define device name to differentiate the subsystem in various SoCs. */
23static inline void s3c_fimc_setname(int id, char *name)
24{
25 switch (id) {
26#ifdef CONFIG_S5P_DEV_FIMC0
27 case 0:
28 s5p_device_fimc0.name = name;
29 break;
30#endif
31#ifdef CONFIG_S5P_DEV_FIMC1
32 case 1:
33 s5p_device_fimc1.name = name;
34 break;
35#endif
36#ifdef CONFIG_S5P_DEV_FIMC2
37 case 2:
38 s5p_device_fimc2.name = name;
39 break;
40#endif
41#ifdef CONFIG_S5P_DEV_FIMC3
42 case 3:
43 s5p_device_fimc3.name = name;
44 break;
45#endif
46 default:
47 break;
48 }
49}
50
51#endif /* __ASM_PLAT_FIMC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 08740eed050c..b5294eff18b5 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -27,7 +27,6 @@
27#include <linux/types.h> 27#include <linux/types.h>
28 28
29typedef unsigned int __bitwise__ samsung_gpio_pull_t; 29typedef unsigned int __bitwise__ samsung_gpio_pull_t;
30typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
31 30
32/* forward declaration if gpio-core.h hasn't been included */ 31/* forward declaration if gpio-core.h hasn't been included */
33struct samsung_gpio_chip; 32struct samsung_gpio_chip;
@@ -180,67 +179,4 @@ static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size,
180 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); 179 return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE);
181} 180}
182 181
183/* Define values for the drvstr available for each gpio pin.
184 *
185 * These values control the value of the output signal driver strength,
186 * configurable on most pins on the S5P series.
187 */
188#define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
189#define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
190#define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
191#define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
192
193/**
194 * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
195 * @pin: The pin number to get the settings for
196 *
197 * Read the driver streght value for the specified pin.
198*/
199extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
200
201/**
202 * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
203 * @pin: The pin number to configure the driver streght value
204 * @drvstr: The new value of the driver strength
205 *
206 * This function sets the driver strength value for the specified pin.
207 * It will return 0 if successful, or a negative error code if the pin
208 * cannot support the requested setting.
209*/
210extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
211
212/**
213 * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
214 * @pin: The pin number from the group to be registered
215 *
216 * This function registers gpio interrupt support for the group that the
217 * specified pin belongs to.
218 *
219 * The total number of gpio pins is quite large ob s5p series. Registering
220 * irq support for all of them would be a resource waste. Because of that the
221 * interrupt support for standard gpio pins is registered dynamically.
222 *
223 * It will return the irq number of the interrupt that has been registered
224 * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
225 * to call this function more than once for the same gpio group (the group
226 * will be registered only once).
227 */
228extern int s5p_register_gpio_interrupt(int pin);
229
230/** s5p_register_gpioint_bank() - add gpio bank for further gpio interrupt
231 * registration (see s5p_register_gpio_interrupt function)
232 * @chain_irq: chained irq number for the gpio int handler for this bank
233 * @start: start gpio group number of this bank
234 * @nr_groups: number of gpio groups handled by this bank
235 *
236 * This functions registers initial information about gpio banks that
237 * can be later used by the s5p_register_gpio_interrupt() function to
238 * enable support for gpio interrupt for particular gpio group.
239 */
240#ifdef CONFIG_S5P_GPIO_INT
241extern int s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups);
242#else
243#define s5p_register_gpioint_bank(chain_irq, start, nr_groups) do { } while (0)
244#endif
245
246#endif /* __PLAT_GPIO_CFG_H */ 182#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-samsung/include/plat/hdmi.h b/arch/arm/plat-samsung/include/plat/hdmi.h
deleted file mode 100644
index 331d046ac2c5..000000000000
--- a/arch/arm/plat-samsung/include/plat/hdmi.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/*
2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_SAMSUNG_HDMI_H
11#define __PLAT_SAMSUNG_HDMI_H __FILE__
12
13extern void s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
14 struct i2c_board_info *mhl_info, int mhl_bus);
15
16#endif /* __PLAT_SAMSUNG_HDMI_H */
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
deleted file mode 100644
index 039001c0ef05..000000000000
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ /dev/null
@@ -1,72 +0,0 @@
1/* linux/arch/arm/plat-samsung/include/plat/irqs.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P Common IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __PLAT_SAMSUNG_IRQS_H
14#define __PLAT_SAMSUNG_IRQS_H __FILE__
15
16/* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
20 *
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
23 */
24
25#define S5P_IRQ_OFFSET (32)
26
27#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
28
29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
35
36#define IRQ_VIC0_BASE S5P_VIC0_BASE
37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
39
40/* VIC based IRQs */
41
42#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
43#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
46
47#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
48 : ((x) - 16 + S5P_EINT_BASE2))
49
50#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
51 ((irq) - S5P_EINT_BASE1) : \
52 ((irq) + 16 - S5P_EINT_BASE2))
53
54#define IRQ_EINT_BIT(x) EINT_OFFSET(x)
55
56/* Typically only a few gpio chips require gpio interrupt support.
57 To avoid memory waste irq descriptors are allocated only for
58 S5P_GPIOINT_GROUP_COUNT chips, each with total number of
59 S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged
60 to any gpio chip with the s5p_register_gpio_interrupt() function */
61#define S5P_GPIOINT_GROUP_COUNT 4
62#define S5P_GPIOINT_GROUP_SIZE 8
63#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
64
65/* IRQ types common for all s5p platforms */
66#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
67#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
68#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
69#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
70#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
71
72#endif /* __PLAT_SAMSUNG_IRQS_H */
diff --git a/arch/arm/plat-samsung/include/plat/mfc.h b/arch/arm/plat-samsung/include/plat/mfc.h
deleted file mode 100644
index 033654e91e22..000000000000
--- a/arch/arm/plat-samsung/include/plat/mfc.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_SAMSUNG_MFC_H
11#define __PLAT_SAMSUNG_MFC_H __FILE__
12
13struct s5p_mfc_dt_meminfo {
14 unsigned long loff;
15 unsigned long lsize;
16 unsigned long roff;
17 unsigned long rsize;
18 char *compatible;
19};
20
21/**
22 * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
23 * @rbase: base address for MFC 'right' memory interface
24 * @rsize: size of the memory reserved for MFC 'right' interface
25 * @lbase: base address for MFC 'left' memory interface
26 * @lsize: size of the memory reserved for MFC 'left' interface
27 *
28 * This function reserves system memory for both MFC device memory
29 * interfaces and registers it to respective struct device entries as
30 * coherent memory.
31 */
32void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
33 phys_addr_t lbase, unsigned int lsize);
34
35#endif /* __PLAT_SAMSUNG_MFC_H */
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index f84b6cbc8745..2787553c3ae2 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -57,14 +57,6 @@ extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
57extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); 57extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
58extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); 58extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
59extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 59extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
60extern void s5pv210_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
61extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
62extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
63extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
64extern void exynos4_setup_sdhci0_cfg_gpio(struct platform_device *, int w);
65extern void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
66extern void exynos4_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
67extern void exynos4_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
68 60
69/* S3C2416 SDHCI setup */ 61/* S3C2416 SDHCI setup */
70 62
@@ -144,45 +136,6 @@ static inline void s3c6400_default_sdhci2(void) { }
144 136
145#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ 137#endif /* CONFIG_S3C64XX_SETUP_SDHCI */
146 138
147/* S5PV210 SDHCI setup */
148
149#ifdef CONFIG_S5PV210_SETUP_SDHCI
150static inline void s5pv210_default_sdhci0(void)
151{
152#ifdef CONFIG_S3C_DEV_HSMMC
153 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
154#endif
155}
156
157static inline void s5pv210_default_sdhci1(void)
158{
159#ifdef CONFIG_S3C_DEV_HSMMC1
160 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
161#endif
162}
163
164static inline void s5pv210_default_sdhci2(void)
165{
166#ifdef CONFIG_S3C_DEV_HSMMC2
167 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
168#endif
169}
170
171static inline void s5pv210_default_sdhci3(void)
172{
173#ifdef CONFIG_S3C_DEV_HSMMC3
174 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
175#endif
176}
177
178#else
179static inline void s5pv210_default_sdhci0(void) { }
180static inline void s5pv210_default_sdhci1(void) { }
181static inline void s5pv210_default_sdhci2(void) { }
182static inline void s5pv210_default_sdhci3(void) { }
183
184#endif /* CONFIG_S5PV210_SETUP_SDHCI */
185
186static inline void s3c_sdhci_setname(int id, char *name) 139static inline void s3c_sdhci_setname(int id, char *name)
187{ 140{
188 switch (id) { 141 switch (id) {
diff --git a/arch/arm/plat-samsung/include/plat/tv-core.h b/arch/arm/plat-samsung/include/plat/tv-core.h
deleted file mode 100644
index 3bc34f3ce28f..000000000000
--- a/arch/arm/plat-samsung/include/plat/tv-core.h
+++ /dev/null
@@ -1,44 +0,0 @@
1/*
2 * arch/arm/plat-samsung/include/plat/tv.h
3 *
4 * Copyright 2011 Samsung Electronics Co., Ltd.
5 * Tomasz Stanislawski <t.stanislaws@samsung.com>
6 *
7 * Samsung TV driver core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __SAMSUNG_PLAT_TV_H
15#define __SAMSUNG_PLAT_TV_H __FILE__
16
17/*
18 * These functions are only for use with the core support code, such as
19 * the CPU-specific initialization code.
20 */
21
22/* Re-define device name to differentiate the subsystem in various SoCs. */
23static inline void s5p_hdmi_setname(char *name)
24{
25#ifdef CONFIG_S5P_DEV_TV
26 s5p_device_hdmi.name = name;
27#endif
28}
29
30static inline void s5p_mixer_setname(char *name)
31{
32#ifdef CONFIG_S5P_DEV_TV
33 s5p_device_mixer.name = name;
34#endif
35}
36
37static inline void s5p_sdo_setname(char *name)
38{
39#ifdef CONFIG_S5P_DEV_TV
40 s5p_device_sdo.name = name;
41#endif
42}
43
44#endif /* __SAMSUNG_PLAT_TV_H */
diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c
index da268813901b..f6084f641e6f 100644
--- a/arch/arm/plat-samsung/pm-gpio.c
+++ b/arch/arm/plat-samsung/pm-gpio.c
@@ -196,7 +196,7 @@ struct samsung_gpio_pm samsung_gpio_pm_2bit = {
196 .resume = samsung_gpio_pm_2bit_resume, 196 .resume = samsung_gpio_pm_2bit_resume,
197}; 197};
198 198
199#if defined(CONFIG_ARCH_S3C64XX) || defined(CONFIG_PLAT_S5P) 199#if defined(CONFIG_ARCH_S3C64XX)
200static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) 200static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip)
201{ 201{
202 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); 202 chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON);
@@ -306,7 +306,7 @@ struct samsung_gpio_pm samsung_gpio_pm_4bit = {
306 .save = samsung_gpio_pm_4bit_save, 306 .save = samsung_gpio_pm_4bit_save,
307 .resume = samsung_gpio_pm_4bit_resume, 307 .resume = samsung_gpio_pm_4bit_resume,
308}; 308};
309#endif /* CONFIG_ARCH_S3C64XX || CONFIG_PLAT_S5P */ 309#endif /* CONFIG_ARCH_S3C64XX */
310 310
311/** 311/**
312 * samsung_pm_save_gpio() - save gpio chip data for suspend 312 * samsung_pm_save_gpio() - save gpio chip data for suspend
diff --git a/arch/arm/plat-samsung/s5p-dev-mfc.c b/arch/arm/plat-samsung/s5p-dev-mfc.c
index 469b86260fe3..0b04b6b0fa30 100644
--- a/arch/arm/plat-samsung/s5p-dev-mfc.c
+++ b/arch/arm/plat-samsung/s5p-dev-mfc.c
@@ -17,56 +17,16 @@
17#include <linux/of_fdt.h> 17#include <linux/of_fdt.h>
18#include <linux/of.h> 18#include <linux/of.h>
19 19
20#include <plat/mfc.h>
21
22#ifdef CONFIG_SAMSUNG_ATAGS
23#include <mach/map.h>
24#include <mach/irqs.h>
25#include <plat/devs.h>
26
27static struct resource s5p_mfc_resource[] = {
28 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
29 [1] = DEFINE_RES_IRQ(IRQ_MFC),
30};
31
32struct platform_device s5p_device_mfc = {
33 .name = "s5p-mfc",
34 .id = -1,
35 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
36 .resource = s5p_mfc_resource,
37};
38
39/*
40 * MFC hardware has 2 memory interfaces which are modelled as two separate
41 * platform devices to let dma-mapping distinguish between them.
42 *
43 * MFC parent device (s5p_device_mfc) must be registered before memory
44 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
45 */
46
47struct platform_device s5p_device_mfc_l = {
48 .name = "s5p-mfc-l",
49 .id = -1,
50 .dev = {
51 .parent = &s5p_device_mfc.dev,
52 .dma_mask = &s5p_device_mfc_l.dev.coherent_dma_mask,
53 .coherent_dma_mask = DMA_BIT_MASK(32),
54 },
55};
56
57struct platform_device s5p_device_mfc_r = {
58 .name = "s5p-mfc-r",
59 .id = -1,
60 .dev = {
61 .parent = &s5p_device_mfc.dev,
62 .dma_mask = &s5p_device_mfc_r.dev.coherent_dma_mask,
63 .coherent_dma_mask = DMA_BIT_MASK(32),
64 },
65};
66#else
67static struct platform_device s5p_device_mfc_l; 20static struct platform_device s5p_device_mfc_l;
68static struct platform_device s5p_device_mfc_r; 21static struct platform_device s5p_device_mfc_r;
69#endif 22
23struct s5p_mfc_dt_meminfo {
24 unsigned long loff;
25 unsigned long lsize;
26 unsigned long roff;
27 unsigned long rsize;
28 char *compatible;
29};
70 30
71struct s5p_mfc_reserved_mem { 31struct s5p_mfc_reserved_mem {
72 phys_addr_t base; 32 phys_addr_t base;
@@ -77,7 +37,7 @@ struct s5p_mfc_reserved_mem {
77static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata; 37static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata;
78 38
79 39
80void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize, 40static void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
81 phys_addr_t lbase, unsigned int lsize) 41 phys_addr_t lbase, unsigned int lsize)
82{ 42{
83 int i; 43 int i;
@@ -100,28 +60,6 @@ void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
100 } 60 }
101} 61}
102 62
103#ifdef CONFIG_SAMSUNG_ATAGS
104static int __init s5p_mfc_memory_init(void)
105{
106 int i;
107
108 for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) {
109 struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i];
110 if (!area->base)
111 continue;
112
113 if (dma_declare_coherent_memory(area->dev, area->base,
114 area->base, area->size,
115 DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0)
116 printk(KERN_ERR "Failed to declare coherent memory for MFC device (%ld bytes at 0x%08lx)\n",
117 area->size, (unsigned long) area->base);
118 }
119 return 0;
120}
121device_initcall(s5p_mfc_memory_init);
122#endif
123
124#ifdef CONFIG_OF
125int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname, 63int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname,
126 int depth, void *data) 64 int depth, void *data)
127{ 65{
@@ -154,4 +92,3 @@ int __init s5p_fdt_alloc_mfc_mem(unsigned long node, const char *uname,
154 92
155 return 1; 93 return 1;
156} 94}
157#endif
diff --git a/arch/arm/plat-samsung/s5p-dev-uart.c b/arch/arm/plat-samsung/s5p-dev-uart.c
deleted file mode 100644
index 8c4487af98c8..000000000000
--- a/arch/arm/plat-samsung/s5p-dev-uart.c
+++ /dev/null
@@ -1,88 +0,0 @@
1/*
2 * Copyright (c) 2009,2012 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * Base S5P UART resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/interrupt.h>
15#include <linux/list.h>
16#include <linux/ioport.h>
17#include <linux/platform_device.h>
18
19#include <asm/mach/arch.h>
20#include <asm/mach/irq.h>
21#include <mach/map.h>
22
23#include <plat/devs.h>
24
25 /* Serial port registrations */
26
27static struct resource s5p_uart0_resource[] = {
28 [0] = DEFINE_RES_MEM(S5P_PA_UART0, S5P_SZ_UART),
29 [1] = DEFINE_RES_IRQ(IRQ_UART0),
30};
31
32static struct resource s5p_uart1_resource[] = {
33 [0] = DEFINE_RES_MEM(S5P_PA_UART1, S5P_SZ_UART),
34 [1] = DEFINE_RES_IRQ(IRQ_UART1),
35};
36
37static struct resource s5p_uart2_resource[] = {
38 [0] = DEFINE_RES_MEM(S5P_PA_UART2, S5P_SZ_UART),
39 [1] = DEFINE_RES_IRQ(IRQ_UART2),
40};
41
42static struct resource s5p_uart3_resource[] = {
43#if CONFIG_SERIAL_SAMSUNG_UARTS > 3
44 [0] = DEFINE_RES_MEM(S5P_PA_UART3, S5P_SZ_UART),
45 [1] = DEFINE_RES_IRQ(IRQ_UART3),
46#endif
47};
48
49static struct resource s5p_uart4_resource[] = {
50#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
51 [0] = DEFINE_RES_MEM(S5P_PA_UART4, S5P_SZ_UART),
52 [1] = DEFINE_RES_IRQ(IRQ_UART4),
53#endif
54};
55
56static struct resource s5p_uart5_resource[] = {
57#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
58 [0] = DEFINE_RES_MEM(S5P_PA_UART5, S5P_SZ_UART),
59 [1] = DEFINE_RES_IRQ(IRQ_UART5),
60#endif
61};
62
63struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
64 [0] = {
65 .resources = s5p_uart0_resource,
66 .nr_resources = ARRAY_SIZE(s5p_uart0_resource),
67 },
68 [1] = {
69 .resources = s5p_uart1_resource,
70 .nr_resources = ARRAY_SIZE(s5p_uart1_resource),
71 },
72 [2] = {
73 .resources = s5p_uart2_resource,
74 .nr_resources = ARRAY_SIZE(s5p_uart2_resource),
75 },
76 [3] = {
77 .resources = s5p_uart3_resource,
78 .nr_resources = ARRAY_SIZE(s5p_uart3_resource),
79 },
80 [4] = {
81 .resources = s5p_uart4_resource,
82 .nr_resources = ARRAY_SIZE(s5p_uart4_resource),
83 },
84 [5] = {
85 .resources = s5p_uart5_resource,
86 .nr_resources = ARRAY_SIZE(s5p_uart5_resource),
87 },
88};
diff --git a/arch/arm/plat-samsung/s5p-irq-eint.c b/arch/arm/plat-samsung/s5p-irq-eint.c
deleted file mode 100644
index ebee4dc11a94..000000000000
--- a/arch/arm/plat-samsung/s5p-irq-eint.c
+++ /dev/null
@@ -1,221 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * S5P - IRQ EINT support
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/device.h>
17#include <linux/gpio.h>
18#include <linux/irqchip/arm-vic.h>
19#include <linux/of.h>
20
21#include <plat/regs-irqtype.h>
22
23#include <mach/map.h>
24#include <plat/cpu.h>
25#include <plat/pm.h>
26
27#include <plat/gpio-cfg.h>
28#include <mach/regs-gpio.h>
29
30static inline void s5p_irq_eint_mask(struct irq_data *data)
31{
32 u32 mask;
33
34 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
35 mask |= eint_irq_to_bit(data->irq);
36 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
37}
38
39static void s5p_irq_eint_unmask(struct irq_data *data)
40{
41 u32 mask;
42
43 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(data->irq)));
44 mask &= ~(eint_irq_to_bit(data->irq));
45 __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(data->irq)));
46}
47
48static inline void s5p_irq_eint_ack(struct irq_data *data)
49{
50 __raw_writel(eint_irq_to_bit(data->irq),
51 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
52}
53
54static void s5p_irq_eint_maskack(struct irq_data *data)
55{
56 /* compiler should in-line these */
57 s5p_irq_eint_mask(data);
58 s5p_irq_eint_ack(data);
59}
60
61static int s5p_irq_eint_set_type(struct irq_data *data, unsigned int type)
62{
63 int offs = EINT_OFFSET(data->irq);
64 int shift;
65 u32 ctrl, mask;
66 u32 newvalue = 0;
67
68 switch (type) {
69 case IRQ_TYPE_EDGE_RISING:
70 newvalue = S5P_IRQ_TYPE_EDGE_RISING;
71 break;
72
73 case IRQ_TYPE_EDGE_FALLING:
74 newvalue = S5P_IRQ_TYPE_EDGE_FALLING;
75 break;
76
77 case IRQ_TYPE_EDGE_BOTH:
78 newvalue = S5P_IRQ_TYPE_EDGE_BOTH;
79 break;
80
81 case IRQ_TYPE_LEVEL_LOW:
82 newvalue = S5P_IRQ_TYPE_LEVEL_LOW;
83 break;
84
85 case IRQ_TYPE_LEVEL_HIGH:
86 newvalue = S5P_IRQ_TYPE_LEVEL_HIGH;
87 break;
88
89 default:
90 printk(KERN_ERR "No such irq type %d", type);
91 return -EINVAL;
92 }
93
94 shift = (offs & 0x7) * 4;
95 mask = 0x7 << shift;
96
97 ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(data->irq)));
98 ctrl &= ~mask;
99 ctrl |= newvalue << shift;
100 __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(data->irq)));
101
102 if ((0 <= offs) && (offs < 8))
103 s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE);
104
105 else if ((8 <= offs) && (offs < 16))
106 s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE);
107
108 else if ((16 <= offs) && (offs < 24))
109 s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE);
110
111 else if ((24 <= offs) && (offs < 32))
112 s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE);
113
114 else
115 printk(KERN_ERR "No such irq number %d", offs);
116
117 return 0;
118}
119
120static struct irq_chip s5p_irq_eint = {
121 .name = "s5p-eint",
122 .irq_mask = s5p_irq_eint_mask,
123 .irq_unmask = s5p_irq_eint_unmask,
124 .irq_mask_ack = s5p_irq_eint_maskack,
125 .irq_ack = s5p_irq_eint_ack,
126 .irq_set_type = s5p_irq_eint_set_type,
127#ifdef CONFIG_PM
128 .irq_set_wake = s3c_irqext_wake,
129#endif
130};
131
132/* s5p_irq_demux_eint
133 *
134 * This function demuxes the IRQ from the group0 external interrupts,
135 * from EINTs 16 to 31. It is designed to be inlined into the specific
136 * handler s5p_irq_demux_eintX_Y.
137 *
138 * Each EINT pend/mask registers handle eight of them.
139 */
140static inline void s5p_irq_demux_eint(unsigned int start)
141{
142 u32 status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start)));
143 u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start)));
144 unsigned int irq;
145
146 status &= ~mask;
147 status &= 0xff;
148
149 while (status) {
150 irq = fls(status) - 1;
151 generic_handle_irq(irq + start);
152 status &= ~(1 << irq);
153 }
154}
155
156static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc)
157{
158 s5p_irq_demux_eint(IRQ_EINT(16));
159 s5p_irq_demux_eint(IRQ_EINT(24));
160}
161
162static inline void s5p_irq_vic_eint_mask(struct irq_data *data)
163{
164 void __iomem *base = irq_data_get_irq_chip_data(data);
165
166 s5p_irq_eint_mask(data);
167 writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE_CLEAR);
168}
169
170static void s5p_irq_vic_eint_unmask(struct irq_data *data)
171{
172 void __iomem *base = irq_data_get_irq_chip_data(data);
173
174 s5p_irq_eint_unmask(data);
175 writel(1 << EINT_OFFSET(data->irq), base + VIC_INT_ENABLE);
176}
177
178static inline void s5p_irq_vic_eint_ack(struct irq_data *data)
179{
180 __raw_writel(eint_irq_to_bit(data->irq),
181 S5P_EINT_PEND(EINT_REG_NR(data->irq)));
182}
183
184static void s5p_irq_vic_eint_maskack(struct irq_data *data)
185{
186 s5p_irq_vic_eint_mask(data);
187 s5p_irq_vic_eint_ack(data);
188}
189
190static struct irq_chip s5p_irq_vic_eint = {
191 .name = "s5p_vic_eint",
192 .irq_mask = s5p_irq_vic_eint_mask,
193 .irq_unmask = s5p_irq_vic_eint_unmask,
194 .irq_mask_ack = s5p_irq_vic_eint_maskack,
195 .irq_ack = s5p_irq_vic_eint_ack,
196 .irq_set_type = s5p_irq_eint_set_type,
197#ifdef CONFIG_PM
198 .irq_set_wake = s3c_irqext_wake,
199#endif
200};
201
202static int __init s5p_init_irq_eint(void)
203{
204 int irq;
205
206 if (of_have_populated_dt())
207 return -ENODEV;
208
209 for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++)
210 irq_set_chip(irq, &s5p_irq_vic_eint);
211
212 for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) {
213 irq_set_chip_and_handler(irq, &s5p_irq_eint, handle_level_irq);
214 set_irq_flags(irq, IRQF_VALID);
215 }
216
217 irq_set_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31);
218 return 0;
219}
220
221arch_initcall(s5p_init_irq_eint);
diff --git a/arch/arm/plat-samsung/s5p-irq-gpioint.c b/arch/arm/plat-samsung/s5p-irq-gpioint.c
deleted file mode 100644
index fafdb059043a..000000000000
--- a/arch/arm/plat-samsung/s5p-irq-gpioint.c
+++ /dev/null
@@ -1,218 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * Author: Kyungmin Park <kyungmin.park@samsung.com>
4 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
5 * Author: Marek Szyprowski <m.szyprowski@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/interrupt.h>
16#include <linux/irq.h>
17#include <linux/irqchip/chained_irq.h>
18#include <linux/io.h>
19#include <linux/gpio.h>
20#include <linux/slab.h>
21
22#include <mach/map.h>
23#include <plat/gpio-core.h>
24#include <plat/gpio-cfg.h>
25
26#define GPIO_BASE(chip) ((void __iomem *)((unsigned long)((chip)->base) & 0xFFFFF000u))
27
28#define CON_OFFSET 0x700
29#define MASK_OFFSET 0x900
30#define PEND_OFFSET 0xA00
31#define REG_OFFSET(x) ((x) << 2)
32
33struct s5p_gpioint_bank {
34 struct list_head list;
35 int start;
36 int nr_groups;
37 int irq;
38 struct samsung_gpio_chip **chips;
39 void (*handler)(unsigned int, struct irq_desc *);
40};
41
42static LIST_HEAD(banks);
43
44static int s5p_gpioint_set_type(struct irq_data *d, unsigned int type)
45{
46 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
47 struct irq_chip_type *ct = gc->chip_types;
48 unsigned int shift = (d->irq - gc->irq_base) << 2;
49
50 switch (type) {
51 case IRQ_TYPE_EDGE_RISING:
52 type = S5P_IRQ_TYPE_EDGE_RISING;
53 break;
54 case IRQ_TYPE_EDGE_FALLING:
55 type = S5P_IRQ_TYPE_EDGE_FALLING;
56 break;
57 case IRQ_TYPE_EDGE_BOTH:
58 type = S5P_IRQ_TYPE_EDGE_BOTH;
59 break;
60 case IRQ_TYPE_LEVEL_HIGH:
61 type = S5P_IRQ_TYPE_LEVEL_HIGH;
62 break;
63 case IRQ_TYPE_LEVEL_LOW:
64 type = S5P_IRQ_TYPE_LEVEL_LOW;
65 break;
66 case IRQ_TYPE_NONE:
67 default:
68 printk(KERN_WARNING "No irq type\n");
69 return -EINVAL;
70 }
71
72 gc->type_cache &= ~(0x7 << shift);
73 gc->type_cache |= type << shift;
74 writel(gc->type_cache, gc->reg_base + ct->regs.type);
75 return 0;
76}
77
78static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
79{
80 struct s5p_gpioint_bank *bank = irq_get_handler_data(irq);
81 int group, pend_offset, mask_offset;
82 unsigned int pend, mask;
83
84 struct irq_chip *chip = irq_get_chip(irq);
85 chained_irq_enter(chip, desc);
86
87 for (group = 0; group < bank->nr_groups; group++) {
88 struct samsung_gpio_chip *chip = bank->chips[group];
89 if (!chip)
90 continue;
91
92 pend_offset = REG_OFFSET(group);
93 pend = __raw_readl(GPIO_BASE(chip) + PEND_OFFSET + pend_offset);
94 if (!pend)
95 continue;
96
97 mask_offset = REG_OFFSET(group);
98 mask = __raw_readl(GPIO_BASE(chip) + MASK_OFFSET + mask_offset);
99 pend &= ~mask;
100
101 while (pend) {
102 int offset = fls(pend) - 1;
103 int real_irq = chip->irq_base + offset;
104 generic_handle_irq(real_irq);
105 pend &= ~BIT(offset);
106 }
107 }
108 chained_irq_exit(chip, desc);
109}
110
111static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
112{
113 static int used_gpioint_groups = 0;
114 int group = chip->group;
115 struct s5p_gpioint_bank *b, *bank = NULL;
116 struct irq_chip_generic *gc;
117 struct irq_chip_type *ct;
118
119 if (used_gpioint_groups >= S5P_GPIOINT_GROUP_COUNT)
120 return -ENOMEM;
121
122 list_for_each_entry(b, &banks, list) {
123 if (group >= b->start && group < b->start + b->nr_groups) {
124 bank = b;
125 break;
126 }
127 }
128 if (!bank)
129 return -EINVAL;
130
131 if (!bank->handler) {
132 bank->chips = kzalloc(sizeof(struct samsung_gpio_chip *) *
133 bank->nr_groups, GFP_KERNEL);
134 if (!bank->chips)
135 return -ENOMEM;
136
137 irq_set_chained_handler(bank->irq, s5p_gpioint_handler);
138 irq_set_handler_data(bank->irq, bank);
139 bank->handler = s5p_gpioint_handler;
140 printk(KERN_INFO "Registered chained gpio int handler for interrupt %d.\n",
141 bank->irq);
142 }
143
144 /*
145 * chained GPIO irq has been successfully registered, allocate new gpio
146 * int group and assign irq nubmers
147 */
148 chip->irq_base = S5P_GPIOINT_BASE +
149 used_gpioint_groups * S5P_GPIOINT_GROUP_SIZE;
150 used_gpioint_groups++;
151
152 bank->chips[group - bank->start] = chip;
153
154 gc = irq_alloc_generic_chip("s5p_gpioint", 1, chip->irq_base,
155 GPIO_BASE(chip),
156 handle_level_irq);
157 if (!gc)
158 return -ENOMEM;
159 ct = gc->chip_types;
160 ct->chip.irq_ack = irq_gc_ack_set_bit;
161 ct->chip.irq_mask = irq_gc_mask_set_bit;
162 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
163 ct->chip.irq_set_type = s5p_gpioint_set_type,
164 ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
165 ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
166 ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
167 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
168 IRQ_GC_INIT_MASK_CACHE,
169 IRQ_NOREQUEST | IRQ_NOPROBE, 0);
170 return 0;
171}
172
173int __init s5p_register_gpio_interrupt(int pin)
174{
175 struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin);
176 int offset, group;
177 int ret;
178
179 if (!my_chip)
180 return -EINVAL;
181
182 offset = pin - my_chip->chip.base;
183 group = my_chip->group;
184
185 /* check if the group has been already registered */
186 if (my_chip->irq_base)
187 goto success;
188
189 /* register gpio group */
190 ret = s5p_gpioint_add(my_chip);
191 if (ret == 0) {
192 my_chip->chip.to_irq = samsung_gpiolib_to_irq;
193 printk(KERN_INFO "Registered interrupt support for gpio group %d.\n",
194 group);
195 goto success;
196 }
197 return ret;
198success:
199 my_chip->bitmap_gpio_int |= BIT(offset);
200
201 return my_chip->irq_base + offset;
202}
203
204int __init s5p_register_gpioint_bank(int chain_irq, int start, int nr_groups)
205{
206 struct s5p_gpioint_bank *bank;
207
208 bank = kzalloc(sizeof(*bank), GFP_KERNEL);
209 if (!bank)
210 return -ENOMEM;
211
212 bank->start = start;
213 bank->nr_groups = nr_groups;
214 bank->irq = chain_irq;
215
216 list_add_tail(&bank->list, &banks);
217 return 0;
218}
diff --git a/arch/arm/plat-samsung/s5p-irq-pm.c b/arch/arm/plat-samsung/s5p-irq-pm.c
deleted file mode 100644
index 52b16943617e..000000000000
--- a/arch/arm/plat-samsung/s5p-irq-pm.c
+++ /dev/null
@@ -1,92 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Based on arch/arm/plat-s3c24xx/irq-pm.c,
6 * Copyright (c) 2003,2004 Simtec Electronics
7 * Ben Dooks <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <linux/init.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18
19#include <plat/cpu.h>
20#include <plat/irqs.h>
21#include <plat/pm.h>
22#include <mach/map.h>
23
24#include <mach/regs-gpio.h>
25#include <mach/regs-irq.h>
26
27/* state for IRQs over sleep */
28
29/* default is to allow for EINT0..EINT31, and IRQ_RTC_TIC, IRQ_RTC_ALARM,
30 * as wakeup sources
31 *
32 * set bit to 1 in allow bitfield to enable the wakeup settings on it
33*/
34
35unsigned long s3c_irqwake_intallow = 0x00000006L;
36unsigned long s3c_irqwake_eintallow = 0xffffffffL;
37
38int s3c_irq_wake(struct irq_data *data, unsigned int state)
39{
40 unsigned long irqbit;
41 unsigned int irq_rtc_tic, irq_rtc_alarm;
42
43 irq_rtc_tic = IRQ_RTC_TIC;
44 irq_rtc_alarm = IRQ_RTC_ALARM;
45
46 if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
47 irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
48
49 if (!state)
50 s3c_irqwake_intmask |= irqbit;
51 else
52 s3c_irqwake_intmask &= ~irqbit;
53 } else {
54 return -ENOENT;
55 }
56
57 return 0;
58}
59
60static struct sleep_save eint_save[] = {
61 SAVE_ITEM(S5P_EINT_CON(0)),
62 SAVE_ITEM(S5P_EINT_CON(1)),
63 SAVE_ITEM(S5P_EINT_CON(2)),
64 SAVE_ITEM(S5P_EINT_CON(3)),
65
66 SAVE_ITEM(S5P_EINT_FLTCON(0)),
67 SAVE_ITEM(S5P_EINT_FLTCON(1)),
68 SAVE_ITEM(S5P_EINT_FLTCON(2)),
69 SAVE_ITEM(S5P_EINT_FLTCON(3)),
70 SAVE_ITEM(S5P_EINT_FLTCON(4)),
71 SAVE_ITEM(S5P_EINT_FLTCON(5)),
72 SAVE_ITEM(S5P_EINT_FLTCON(6)),
73 SAVE_ITEM(S5P_EINT_FLTCON(7)),
74
75 SAVE_ITEM(S5P_EINT_MASK(0)),
76 SAVE_ITEM(S5P_EINT_MASK(1)),
77 SAVE_ITEM(S5P_EINT_MASK(2)),
78 SAVE_ITEM(S5P_EINT_MASK(3)),
79};
80
81int s3c24xx_irq_suspend(void)
82{
83 s3c_pm_do_save(eint_save, ARRAY_SIZE(eint_save));
84
85 return 0;
86}
87
88void s3c24xx_irq_resume(void)
89{
90 s3c_pm_do_restore(eint_save, ARRAY_SIZE(eint_save));
91}
92
diff --git a/arch/arm/plat-samsung/s5p-irq.c b/arch/arm/plat-samsung/s5p-irq.c
deleted file mode 100644
index ddfaca9c79d8..000000000000
--- a/arch/arm/plat-samsung/s5p-irq.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com/
4 *
5 * S5P - Interrupt handling
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10*/
11
12#include <linux/kernel.h>
13#include <linux/interrupt.h>
14#include <linux/irq.h>
15#include <linux/io.h>
16#include <linux/irqchip/arm-vic.h>
17
18#include <mach/irqs.h>
19#include <mach/map.h>
20#include <plat/cpu.h>
21
22void __init s5p_init_irq(u32 *vic, u32 num_vic)
23{
24#ifdef CONFIG_ARM_VIC
25 int irq;
26
27 /* initialize the VICs */
28 for (irq = 0; irq < num_vic; irq++)
29 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
30#endif
31}
diff --git a/arch/arm/plat-samsung/s5p-pm.c b/arch/arm/plat-samsung/s5p-pm.c
deleted file mode 100644
index 0747468f0936..000000000000
--- a/arch/arm/plat-samsung/s5p-pm.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * S5P Power Manager (Suspend-To-RAM) support
6 *
7 * Based on arch/arm/plat-s3c24xx/pm.c
8 * Copyright (c) 2004,2006 Simtec Electronics
9 * Ben Dooks <ben@simtec.co.uk>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14*/
15
16#include <linux/suspend.h>
17#include <plat/pm.h>
18
19#define PFX "s5p pm: "
20
21/* s3c_pm_configure_extint
22 *
23 * configure all external interrupt pins
24*/
25
26void s3c_pm_configure_extint(void)
27{
28 /* nothing here yet */
29}
30
31void s3c_pm_restore_core(void)
32{
33 /* nothing here yet */
34}
35
36void s3c_pm_save_core(void)
37{
38 /* nothing here yet */
39}
40
diff --git a/arch/arm/plat-samsung/s5p-sleep.S b/arch/arm/plat-samsung/s5p-sleep.S
deleted file mode 100644
index 25c68ceb9e2b..000000000000
--- a/arch/arm/plat-samsung/s5p-sleep.S
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
4 *
5 * Common S5P Sleep Code
6 * Based on S3C64XX sleep code by:
7 * Ben Dooks, (c) 2008 Simtec Electronics
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22*/
23
24#include <linux/linkage.h>
25
26 .data
27 .align
28
29 /*
30 * sleep magic, to allow the bootloader to check for an valid
31 * image to resume to. Must be the first word before the
32 * s3c_cpu_resume entry.
33 */
34
35 .word 0x2bedf00d
36
37 /*
38 * s3c_cpu_resume
39 *
40 * resume code entry for bootloader to call
41 */
42
43ENTRY(s3c_cpu_resume)
44 b cpu_resume
45ENDPROC(s3c_cpu_resume)
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-03 05:03:11 -0400