diff options
author | Thomas Abraham <thomas.abraham@linaro.org> | 2012-07-12 18:15:14 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-07-13 02:23:46 -0400 |
commit | a5238e360b715e9a1bb39d7d3537f78cc9e9e286 (patch) | |
tree | b6503a7429b93b7c15f90d5e3b0124a191215423 /arch/arm/plat-samsung | |
parent | 2b54be661191532ddf1628c3b151b81ae8743caa (diff) |
spi: s3c64xx: move controller information into driver data
Platform data is used to specify controller hardware specific information
such as the tx/rx fifo level mask and bit offset of rx fifo level. Such
information is not suitable to be supplied from device tree. Instead,
it can be moved into the driver data and removed from platform data.
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
Acked-by: Jaswinder Singh <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | 15 |
1 files changed, 0 insertions, 15 deletions
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h index fa95e9a00972..4e9b9c314a29 100644 --- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h +++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h | |||
@@ -33,28 +33,13 @@ struct s3c64xx_spi_csinfo { | |||
33 | /** | 33 | /** |
34 | * struct s3c64xx_spi_info - SPI Controller defining structure | 34 | * struct s3c64xx_spi_info - SPI Controller defining structure |
35 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. | 35 | * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field. |
36 | * @clk_from_cmu: If the SPI clock/prescalar control block is present | ||
37 | * by the platform's clock-management-unit and not in SPI controller. | ||
38 | * @num_cs: Number of CS this controller emulates. | 36 | * @num_cs: Number of CS this controller emulates. |
39 | * @cfg_gpio: Configure pins for this SPI controller. | 37 | * @cfg_gpio: Configure pins for this SPI controller. |
40 | * @fifo_lvl_mask: All tx fifo_lvl fields start at offset-6 | ||
41 | * @rx_lvl_offset: Depends on tx fifo_lvl field and bus number | ||
42 | * @high_speed: If the controller supports HIGH_SPEED_EN bit | ||
43 | * @tx_st_done: Depends on tx fifo_lvl field | ||
44 | */ | 38 | */ |
45 | struct s3c64xx_spi_info { | 39 | struct s3c64xx_spi_info { |
46 | int src_clk_nr; | 40 | int src_clk_nr; |
47 | bool clk_from_cmu; | ||
48 | |||
49 | int num_cs; | 41 | int num_cs; |
50 | |||
51 | int (*cfg_gpio)(struct platform_device *pdev); | 42 | int (*cfg_gpio)(struct platform_device *pdev); |
52 | |||
53 | /* Following two fields are for future compatibility */ | ||
54 | int fifo_lvl_mask; | ||
55 | int rx_lvl_offset; | ||
56 | int high_speed; | ||
57 | int tx_st_done; | ||
58 | }; | 43 | }; |
59 | 44 | ||
60 | /** | 45 | /** |