diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:28:38 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 17:28:38 -0500 |
commit | dfc1ebe76663d582a01c9dc572395cf8086d01de (patch) | |
tree | 54a5ac91214a90f82c27b6e38099a4470837729e /arch/arm/plat-samsung | |
parent | acc952c1f373bf3f66cc7a10680eee1762bed40b (diff) | |
parent | b001befe58691ef3627458cd814e8cee7f845c5f (diff) |
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Device tree conversions for samsung and tegra
Both platforms had some initial device tree support, but this adds
much more to actually make it usable.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN
ARM: EXYNOS: Add Exynos4 device tree enabled board file
rtc: rtc-s3c: Add device tree support
input: samsung-keypad: Add device tree support
ARM: S5PV210: Modify platform data for pl330 driver
ARM: S5PC100: Modify platform data for pl330 driver
ARM: S5P64x0: Modify platform data for pl330 driver
ARM: EXYNOS: Add a alias for pdma clocks
ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build
ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
DMA: PL330: Add device tree support
ARM: EXYNOS: Modify platform data for pl330 driver
DMA: PL330: Infer transfer direction from transfer request instead of platform data
DMA: PL330: move filter function into driver
serial: samsung: Fix build for non-Exynos4210 devices
serial: samsung: add device tree support
serial: samsung: merge probe() function from all SoC specific extensions
serial: samsung: merge all SoC specific port reset functions
ARM: SAMSUNG: register uart clocks to clock lookup list
serial: samsung: remove all uses of get_clksrc and set_clksrc
...
Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and
drivers/tty/serial/Kconfig both due to just adding code close to
changes.
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/dma-ops.c | 15 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/dma-ops.h | 1 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/dma-pl330.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/irqs.h | 3 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-serial.h | 45 |
5 files changed, 35 insertions, 32 deletions
diff --git a/arch/arm/plat-samsung/dma-ops.c b/arch/arm/plat-samsung/dma-ops.c index 93a994a5dd8f..2cded872f22b 100644 --- a/arch/arm/plat-samsung/dma-ops.c +++ b/arch/arm/plat-samsung/dma-ops.c | |||
@@ -18,23 +18,24 @@ | |||
18 | 18 | ||
19 | #include <mach/dma.h> | 19 | #include <mach/dma.h> |
20 | 20 | ||
21 | static inline bool pl330_filter(struct dma_chan *chan, void *param) | ||
22 | { | ||
23 | struct dma_pl330_peri *peri = chan->private; | ||
24 | return peri->peri_id == (unsigned)param; | ||
25 | } | ||
26 | |||
27 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, | 21 | static unsigned samsung_dmadev_request(enum dma_ch dma_ch, |
28 | struct samsung_dma_info *info) | 22 | struct samsung_dma_info *info) |
29 | { | 23 | { |
30 | struct dma_chan *chan; | 24 | struct dma_chan *chan; |
31 | dma_cap_mask_t mask; | 25 | dma_cap_mask_t mask; |
32 | struct dma_slave_config slave_config; | 26 | struct dma_slave_config slave_config; |
27 | void *filter_param; | ||
33 | 28 | ||
34 | dma_cap_zero(mask); | 29 | dma_cap_zero(mask); |
35 | dma_cap_set(info->cap, mask); | 30 | dma_cap_set(info->cap, mask); |
36 | 31 | ||
37 | chan = dma_request_channel(mask, pl330_filter, (void *)dma_ch); | 32 | /* |
33 | * If a dma channel property of a device node from device tree is | ||
34 | * specified, use that as the fliter parameter. | ||
35 | */ | ||
36 | filter_param = (dma_ch == DMACH_DT_PROP) ? (void *)info->dt_dmach_prop : | ||
37 | (void *)dma_ch; | ||
38 | chan = dma_request_channel(mask, pl330_filter, filter_param); | ||
38 | 39 | ||
39 | if (info->direction == DMA_FROM_DEVICE) { | 40 | if (info->direction == DMA_FROM_DEVICE) { |
40 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); | 41 | memset(&slave_config, 0, sizeof(struct dma_slave_config)); |
diff --git a/arch/arm/plat-samsung/include/plat/dma-ops.h b/arch/arm/plat-samsung/include/plat/dma-ops.h index 4c1a363526cf..22eafc310bd7 100644 --- a/arch/arm/plat-samsung/include/plat/dma-ops.h +++ b/arch/arm/plat-samsung/include/plat/dma-ops.h | |||
@@ -31,6 +31,7 @@ struct samsung_dma_info { | |||
31 | enum dma_slave_buswidth width; | 31 | enum dma_slave_buswidth width; |
32 | dma_addr_t fifo; | 32 | dma_addr_t fifo; |
33 | struct s3c2410_dma_client *client; | 33 | struct s3c2410_dma_client *client; |
34 | struct property *dt_dmach_prop; | ||
34 | }; | 35 | }; |
35 | 36 | ||
36 | struct samsung_dma_ops { | 37 | struct samsung_dma_ops { |
diff --git a/arch/arm/plat-samsung/include/plat/dma-pl330.h b/arch/arm/plat-samsung/include/plat/dma-pl330.h index 2e55e5958674..c5eaad529de5 100644 --- a/arch/arm/plat-samsung/include/plat/dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/dma-pl330.h | |||
@@ -21,7 +21,8 @@ | |||
21 | * use these just as IDs. | 21 | * use these just as IDs. |
22 | */ | 22 | */ |
23 | enum dma_ch { | 23 | enum dma_ch { |
24 | DMACH_UART0_RX, | 24 | DMACH_DT_PROP = -1, |
25 | DMACH_UART0_RX = 0, | ||
25 | DMACH_UART0_TX, | 26 | DMACH_UART0_TX, |
26 | DMACH_UART1_RX, | 27 | DMACH_UART1_RX, |
27 | DMACH_UART1_TX, | 28 | DMACH_UART1_TX, |
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h index 08d1a7ef97b7..df46b776976a 100644 --- a/arch/arm/plat-samsung/include/plat/irqs.h +++ b/arch/arm/plat-samsung/include/plat/irqs.h | |||
@@ -44,13 +44,14 @@ | |||
44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) | 44 | #define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x)) |
45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) | 45 | #define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x)) |
46 | 46 | ||
47 | #define S5P_TIMER_IRQ(x) (11 + (x)) | 47 | #define S5P_TIMER_IRQ(x) (IRQ_TIMER_BASE + (x)) |
48 | 48 | ||
49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) | 49 | #define IRQ_TIMER0 S5P_TIMER_IRQ(0) |
50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) | 50 | #define IRQ_TIMER1 S5P_TIMER_IRQ(1) |
51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) | 51 | #define IRQ_TIMER2 S5P_TIMER_IRQ(2) |
52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) | 52 | #define IRQ_TIMER3 S5P_TIMER_IRQ(3) |
53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) | 53 | #define IRQ_TIMER4 S5P_TIMER_IRQ(4) |
54 | #define IRQ_TIMER_COUNT (5) | ||
54 | 55 | ||
55 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ | 56 | #define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \ |
56 | : ((x) - 16 + S5P_EINT_BASE2)) | 57 | : ((x) - 16 + S5P_EINT_BASE2)) |
diff --git a/arch/arm/plat-samsung/include/plat/regs-serial.h b/arch/arm/plat-samsung/include/plat/regs-serial.h index 720734847027..29c26a818842 100644 --- a/arch/arm/plat-samsung/include/plat/regs-serial.h +++ b/arch/arm/plat-samsung/include/plat/regs-serial.h | |||
@@ -71,6 +71,7 @@ | |||
71 | #define S3C2410_LCON_IRM (1<<6) | 71 | #define S3C2410_LCON_IRM (1<<6) |
72 | 72 | ||
73 | #define S3C2440_UCON_CLKMASK (3<<10) | 73 | #define S3C2440_UCON_CLKMASK (3<<10) |
74 | #define S3C2440_UCON_CLKSHIFT (10) | ||
74 | #define S3C2440_UCON_PCLK (0<<10) | 75 | #define S3C2440_UCON_PCLK (0<<10) |
75 | #define S3C2440_UCON_UCLK (1<<10) | 76 | #define S3C2440_UCON_UCLK (1<<10) |
76 | #define S3C2440_UCON_PCLK2 (2<<10) | 77 | #define S3C2440_UCON_PCLK2 (2<<10) |
@@ -78,6 +79,7 @@ | |||
78 | #define S3C2443_UCON_EPLL (3<<10) | 79 | #define S3C2443_UCON_EPLL (3<<10) |
79 | 80 | ||
80 | #define S3C6400_UCON_CLKMASK (3<<10) | 81 | #define S3C6400_UCON_CLKMASK (3<<10) |
82 | #define S3C6400_UCON_CLKSHIFT (10) | ||
81 | #define S3C6400_UCON_PCLK (0<<10) | 83 | #define S3C6400_UCON_PCLK (0<<10) |
82 | #define S3C6400_UCON_PCLK2 (2<<10) | 84 | #define S3C6400_UCON_PCLK2 (2<<10) |
83 | #define S3C6400_UCON_UCLK0 (1<<10) | 85 | #define S3C6400_UCON_UCLK0 (1<<10) |
@@ -90,11 +92,14 @@ | |||
90 | #define S3C2440_UCON_DIVSHIFT (12) | 92 | #define S3C2440_UCON_DIVSHIFT (12) |
91 | 93 | ||
92 | #define S3C2412_UCON_CLKMASK (3<<10) | 94 | #define S3C2412_UCON_CLKMASK (3<<10) |
95 | #define S3C2412_UCON_CLKSHIFT (10) | ||
93 | #define S3C2412_UCON_UCLK (1<<10) | 96 | #define S3C2412_UCON_UCLK (1<<10) |
94 | #define S3C2412_UCON_USYSCLK (3<<10) | 97 | #define S3C2412_UCON_USYSCLK (3<<10) |
95 | #define S3C2412_UCON_PCLK (0<<10) | 98 | #define S3C2412_UCON_PCLK (0<<10) |
96 | #define S3C2412_UCON_PCLK2 (2<<10) | 99 | #define S3C2412_UCON_PCLK2 (2<<10) |
97 | 100 | ||
101 | #define S3C2410_UCON_CLKMASK (1 << 10) | ||
102 | #define S3C2410_UCON_CLKSHIFT (10) | ||
98 | #define S3C2410_UCON_UCLK (1<<10) | 103 | #define S3C2410_UCON_UCLK (1<<10) |
99 | #define S3C2410_UCON_SBREAK (1<<4) | 104 | #define S3C2410_UCON_SBREAK (1<<4) |
100 | 105 | ||
@@ -193,6 +198,7 @@ | |||
193 | 198 | ||
194 | /* Following are specific to S5PV210 */ | 199 | /* Following are specific to S5PV210 */ |
195 | #define S5PV210_UCON_CLKMASK (1<<10) | 200 | #define S5PV210_UCON_CLKMASK (1<<10) |
201 | #define S5PV210_UCON_CLKSHIFT (10) | ||
196 | #define S5PV210_UCON_PCLK (0<<10) | 202 | #define S5PV210_UCON_PCLK (0<<10) |
197 | #define S5PV210_UCON_UCLK (1<<10) | 203 | #define S5PV210_UCON_UCLK (1<<10) |
198 | 204 | ||
@@ -221,29 +227,24 @@ | |||
221 | #define S5PV210_UFSTAT_RXMASK (255<<0) | 227 | #define S5PV210_UFSTAT_RXMASK (255<<0) |
222 | #define S5PV210_UFSTAT_RXSHIFT (0) | 228 | #define S5PV210_UFSTAT_RXSHIFT (0) |
223 | 229 | ||
224 | #define NO_NEED_CHECK_CLKSRC 1 | 230 | #define S3C2410_UCON_CLKSEL0 (1 << 0) |
231 | #define S3C2410_UCON_CLKSEL1 (1 << 1) | ||
232 | #define S3C2410_UCON_CLKSEL2 (1 << 2) | ||
233 | #define S3C2410_UCON_CLKSEL3 (1 << 3) | ||
225 | 234 | ||
226 | #ifndef __ASSEMBLY__ | 235 | /* Default values for s5pv210 UCON and UFCON uart registers */ |
236 | #define S5PV210_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \ | ||
237 | S3C2410_UCON_RXILEVEL | \ | ||
238 | S3C2410_UCON_TXIRQMODE | \ | ||
239 | S3C2410_UCON_RXIRQMODE | \ | ||
240 | S3C2410_UCON_RXFIFO_TOI | \ | ||
241 | S3C2443_UCON_RXERR_IRQEN) | ||
227 | 242 | ||
228 | /* struct s3c24xx_uart_clksrc | 243 | #define S5PV210_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \ |
229 | * | 244 | S5PV210_UFCON_TXTRIG4 | \ |
230 | * this structure defines a named clock source that can be used for the | 245 | S5PV210_UFCON_RXTRIG4) |
231 | * uart, so that the best clock can be selected for the requested baud | ||
232 | * rate. | ||
233 | * | ||
234 | * min_baud and max_baud define the range of baud-rates this clock is | ||
235 | * acceptable for, if they are both zero, it is assumed any baud rate that | ||
236 | * can be generated from this clock will be used. | ||
237 | * | ||
238 | * divisor gives the divisor from the clock to the one seen by the uart | ||
239 | */ | ||
240 | 246 | ||
241 | struct s3c24xx_uart_clksrc { | 247 | #ifndef __ASSEMBLY__ |
242 | const char *name; | ||
243 | unsigned int divisor; | ||
244 | unsigned int min_baud; | ||
245 | unsigned int max_baud; | ||
246 | }; | ||
247 | 248 | ||
248 | /* configuration structure for per-machine configurations for the | 249 | /* configuration structure for per-machine configurations for the |
249 | * serial port | 250 | * serial port |
@@ -257,15 +258,13 @@ struct s3c2410_uartcfg { | |||
257 | unsigned char unused; | 258 | unsigned char unused; |
258 | unsigned short flags; | 259 | unsigned short flags; |
259 | upf_t uart_flags; /* default uart flags */ | 260 | upf_t uart_flags; /* default uart flags */ |
261 | unsigned int clk_sel; | ||
260 | 262 | ||
261 | unsigned int has_fracval; | 263 | unsigned int has_fracval; |
262 | 264 | ||
263 | unsigned long ucon; /* value of ucon for port */ | 265 | unsigned long ucon; /* value of ucon for port */ |
264 | unsigned long ulcon; /* value of ulcon for port */ | 266 | unsigned long ulcon; /* value of ulcon for port */ |
265 | unsigned long ufcon; /* value of ufcon for port */ | 267 | unsigned long ufcon; /* value of ufcon for port */ |
266 | |||
267 | struct s3c24xx_uart_clksrc *clocks; | ||
268 | unsigned int clocks_size; | ||
269 | }; | 268 | }; |
270 | 269 | ||
271 | /* s3c24xx_uart_devs | 270 | /* s3c24xx_uart_devs |