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authorKukjin Kim <kgene.kim@samsung.com>2012-01-24 23:48:11 -0500
committerKukjin Kim <kgene.kim@samsung.com>2012-03-14 05:35:04 -0400
commitbb19a7513dffc82f4b474ed90fc8ed691b54768b (patch)
tree66b098edcfe46a463337d4c1705e1385a7f197c8 /arch/arm/plat-samsung
parent94c7ca71c40ffcde28388a712cab524d636bec60 (diff)
ARM: EXYNOS: add interrupt definitions for EXYNOS5250
This patch adds the interrupt definitions for EXYNOS5250 at <mach/irqs.h> file and it is needed for EXYNOS5250 SoC. As a note, for single zImage of EXYNOS4 and EXYNOS5, prefix of EXYNOS4_ and EXYNOS5_ has been added. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/irq-vic-timer.c16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/irq-vic-timer.c b/arch/arm/plat-samsung/irq-vic-timer.c
index 51583cd30164..f980cf3d2baa 100644
--- a/arch/arm/plat-samsung/irq-vic-timer.c
+++ b/arch/arm/plat-samsung/irq-vic-timer.c
@@ -19,6 +19,7 @@
19#include <linux/io.h> 19#include <linux/io.h>
20 20
21#include <mach/map.h> 21#include <mach/map.h>
22#include <plat/cpu.h>
22#include <plat/irq-vic-timer.h> 23#include <plat/irq-vic-timer.h>
23#include <plat/regs-timer.h> 24#include <plat/regs-timer.h>
24 25
@@ -57,6 +58,21 @@ void __init s3c_init_vic_timer_irq(unsigned int num, unsigned int timer_irq)
57 struct irq_chip_type *ct; 58 struct irq_chip_type *ct;
58 unsigned int i; 59 unsigned int i;
59 60
61#ifdef CONFIG_ARCH_EXYNOS
62 if (soc_is_exynos5250()) {
63 pirq[0] = EXYNOS5_IRQ_TIMER0_VIC;
64 pirq[1] = EXYNOS5_IRQ_TIMER1_VIC;
65 pirq[2] = EXYNOS5_IRQ_TIMER2_VIC;
66 pirq[3] = EXYNOS5_IRQ_TIMER3_VIC;
67 pirq[4] = EXYNOS5_IRQ_TIMER4_VIC;
68 } else {
69 pirq[0] = EXYNOS4_IRQ_TIMER0_VIC;
70 pirq[1] = EXYNOS4_IRQ_TIMER1_VIC;
71 pirq[2] = EXYNOS4_IRQ_TIMER2_VIC;
72 pirq[3] = EXYNOS4_IRQ_TIMER3_VIC;
73 pirq[4] = EXYNOS4_IRQ_TIMER4_VIC;
74 }
75#endif
60 s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq, 76 s3c_tgc = irq_alloc_generic_chip("s3c-timer", 1, timer_irq,
61 S3C64XX_TINT_CSTAT, handle_level_irq); 77 S3C64XX_TINT_CSTAT, handle_level_irq);
62 78