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authorBen Dooks <ben-linux@fluff.org>2010-05-06 02:42:23 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-11 04:45:46 -0400
commitfcef85c0c122f90f57f2f3ef0caeaf6404d6e8f3 (patch)
treef674a70c38a71309d27029f2c25d18a15800cf88 /arch/arm/plat-samsung
parent1d3ef014b5fe959a789c2df708713d58c9491c3b (diff)
ARM: SAMSUNG: Add spinlock locking to GPIO banks
Add locking to each GPIO bank to allow for SMP capable code to use the gpiolib functions. See the gpio-core.h header file for more information. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/gpio-config.c12
-rw-r--r--arch/arm/plat-samsung/gpio.c15
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h14
3 files changed, 29 insertions, 12 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c
index 3282db360fa8..a76eef533392 100644
--- a/arch/arm/plat-samsung/gpio-config.c
+++ b/arch/arm/plat-samsung/gpio-config.c
@@ -33,9 +33,9 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
33 33
34 offset = pin - chip->chip.base; 34 offset = pin - chip->chip.base;
35 35
36 local_irq_save(flags); 36 s3c_gpio_lock(chip, flags);
37 ret = s3c_gpio_do_setcfg(chip, offset, config); 37 ret = s3c_gpio_do_setcfg(chip, offset, config);
38 local_irq_restore(flags); 38 s3c_gpio_unlock(chip, flags);
39 39
40 return ret; 40 return ret;
41} 41}
@@ -51,9 +51,9 @@ unsigned s3c_gpio_getcfg(unsigned int pin)
51 if (chip) { 51 if (chip) {
52 offset = pin - chip->chip.base; 52 offset = pin - chip->chip.base;
53 53
54 local_irq_save(flags); 54 s3c_gpio_lock(chip, flags);
55 ret = s3c_gpio_do_getcfg(chip, offset); 55 ret = s3c_gpio_do_getcfg(chip, offset);
56 local_irq_restore(flags); 56 s3c_gpio_unlock(chip, flags);
57 } 57 }
58 58
59 return ret; 59 return ret;
@@ -72,9 +72,9 @@ int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull)
72 72
73 offset = pin - chip->chip.base; 73 offset = pin - chip->chip.base;
74 74
75 local_irq_save(flags); 75 s3c_gpio_lock(chip, flags);
76 ret = s3c_gpio_do_setpull(chip, offset, pull); 76 ret = s3c_gpio_do_setpull(chip, offset, pull);
77 local_irq_restore(flags); 77 s3c_gpio_unlock(chip, flags);
78 78
79 return ret; 79 return ret;
80} 80}
diff --git a/arch/arm/plat-samsung/gpio.c b/arch/arm/plat-samsung/gpio.c
index 28d2ab8a08db..b83a83351cea 100644
--- a/arch/arm/plat-samsung/gpio.c
+++ b/arch/arm/plat-samsung/gpio.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/spinlock.h>
18 19
19#include <plat/gpio-core.h> 20#include <plat/gpio-core.h>
20 21
@@ -52,14 +53,14 @@ static int s3c_gpiolib_input(struct gpio_chip *chip, unsigned offset)
52 unsigned long flags; 53 unsigned long flags;
53 unsigned long con; 54 unsigned long con;
54 55
55 local_irq_save(flags); 56 s3c_gpio_lock(ourchip, flags);
56 57
57 con = __raw_readl(base + 0x00); 58 con = __raw_readl(base + 0x00);
58 con &= ~(3 << (offset * 2)); 59 con &= ~(3 << (offset * 2));
59 60
60 __raw_writel(con, base + 0x00); 61 __raw_writel(con, base + 0x00);
61 62
62 local_irq_restore(flags); 63 s3c_gpio_unlock(ourchip, flags);
63 return 0; 64 return 0;
64} 65}
65 66
@@ -72,7 +73,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
72 unsigned long dat; 73 unsigned long dat;
73 unsigned long con; 74 unsigned long con;
74 75
75 local_irq_save(flags); 76 s3c_gpio_lock(ourchip, flags);
76 77
77 dat = __raw_readl(base + 0x04); 78 dat = __raw_readl(base + 0x04);
78 dat &= ~(1 << offset); 79 dat &= ~(1 << offset);
@@ -87,7 +88,7 @@ static int s3c_gpiolib_output(struct gpio_chip *chip,
87 __raw_writel(con, base + 0x00); 88 __raw_writel(con, base + 0x00);
88 __raw_writel(dat, base + 0x04); 89 __raw_writel(dat, base + 0x04);
89 90
90 local_irq_restore(flags); 91 s3c_gpio_unlock(ourchip, flags);
91 return 0; 92 return 0;
92} 93}
93 94
@@ -99,7 +100,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
99 unsigned long flags; 100 unsigned long flags;
100 unsigned long dat; 101 unsigned long dat;
101 102
102 local_irq_save(flags); 103 s3c_gpio_lock(ourchip, flags);
103 104
104 dat = __raw_readl(base + 0x04); 105 dat = __raw_readl(base + 0x04);
105 dat &= ~(1 << offset); 106 dat &= ~(1 << offset);
@@ -107,7 +108,7 @@ static void s3c_gpiolib_set(struct gpio_chip *chip,
107 dat |= 1 << offset; 108 dat |= 1 << offset;
108 __raw_writel(dat, base + 0x04); 109 __raw_writel(dat, base + 0x04);
109 110
110 local_irq_restore(flags); 111 s3c_gpio_unlock(ourchip, flags);
111} 112}
112 113
113static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset) 114static int s3c_gpiolib_get(struct gpio_chip *chip, unsigned offset)
@@ -131,6 +132,8 @@ __init void s3c_gpiolib_add(struct s3c_gpio_chip *chip)
131 BUG_ON(!gc->label); 132 BUG_ON(!gc->label);
132 BUG_ON(!gc->ngpio); 133 BUG_ON(!gc->ngpio);
133 134
135 spin_lock_init(&chip->lock);
136
134 if (!gc->direction_input) 137 if (!gc->direction_input)
135 gc->direction_input = s3c_gpiolib_input; 138 gc->direction_input = s3c_gpiolib_input;
136 if (!gc->direction_output) 139 if (!gc->direction_output)
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index f0584f26d493..f3a68d1a07b9 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -44,16 +44,26 @@ struct s3c_gpio_cfg;
44 * @chip: The chip structure to be exported via gpiolib. 44 * @chip: The chip structure to be exported via gpiolib.
45 * @base: The base pointer to the gpio configuration registers. 45 * @base: The base pointer to the gpio configuration registers.
46 * @config: special function and pull-resistor control information. 46 * @config: special function and pull-resistor control information.
47 * @lock: Lock for exclusive access to this gpio bank.
47 * @pm_save: Save information for suspend/resume support. 48 * @pm_save: Save information for suspend/resume support.
48 * 49 *
49 * This wrapper provides the necessary information for the Samsung 50 * This wrapper provides the necessary information for the Samsung
50 * specific gpios being registered with gpiolib. 51 * specific gpios being registered with gpiolib.
52 *
53 * The lock protects each gpio bank from multiple access of the shared
54 * configuration registers, or from reading of data whilst another thread
55 * is writing to the register set.
56 *
57 * Each chip has its own lock to avoid any contention between different
58 * CPU cores trying to get one lock for different GPIO banks, where each
59 * bank of GPIO has its own register space and configuration registers.
51 */ 60 */
52struct s3c_gpio_chip { 61struct s3c_gpio_chip {
53 struct gpio_chip chip; 62 struct gpio_chip chip;
54 struct s3c_gpio_cfg *config; 63 struct s3c_gpio_cfg *config;
55 struct s3c_gpio_pm *pm; 64 struct s3c_gpio_pm *pm;
56 void __iomem *base; 65 void __iomem *base;
66 spinlock_t lock;
57#ifdef CONFIG_PM 67#ifdef CONFIG_PM
58 u32 pm_save[4]; 68 u32 pm_save[4];
59#endif 69#endif
@@ -138,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit;
138#define __gpio_pm(x) NULL 148#define __gpio_pm(x) NULL
139 149
140#endif /* CONFIG_PM */ 150#endif /* CONFIG_PM */
151
152/* locking wrappers to deal with multiple access to the same gpio bank */
153#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
154#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)