diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-20 12:41:44 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-05-20 12:41:44 -0400 |
commit | 7f06a8b26aba1dc03b42272dc0089a800372c575 (patch) | |
tree | 7c67198f83d069eb13fd417e022d111b7e4c82a1 /arch/arm/plat-samsung | |
parent | c3ad33c9bcb6616999953af76f16318120fe3691 (diff) | |
parent | d71f4cece4bd97d05592836202fc04ff2e7817e3 (diff) |
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound-2.6: (250 commits)
ALSA: hda: Storage class should be before const qualifier
ASoC: tpa6130a2: Remove CPVSS and HPVdd supplies
ASoC: tpa6130a2: Define output pins with SND_SOC_DAPM_OUTPUT
ASoC: sdp4430 - add sdp4430 pcm ops to DAI.
ASoC: TWL6040: Enable earphone path in codec
ASoC: SDP4430: Add support for Earphone speaker
ASoC: SDP4430: Add sdp4430 machine driver
ASoC: tlv320dac33: Avoid powering off while in BIAS_OFF
ASoC: tlv320dac33: Use dev_dbg in dac33_hard_power function
ALSA: sound/pci/asihpi: Use kzalloc
ALSA: hdmi - dont fail on extra nodes
ALSA: intelhdmi - add id for the CougarPoint chipset
ALSA: intelhdmi - user friendly codec name
ALSA: intelhdmi - add dependency on SND_DYNAMIC_MINORS
ALSA: asihpi: incorrect range check
ALSA: asihpi: testing the wrong variable
ALSA: es1688: add pedantic range checks
ARM: McBSP: Add support for omap4 in McBSP driver
ARM: McBSP: Fix request for irq in OMAP4
OMAP: McBSP: Add 32-bit mode support
...
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h | 82 |
1 files changed, 0 insertions, 82 deletions
diff --git a/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h b/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h deleted file mode 100644 index abf2fbc2eb2f..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-s3c2412-iis.h +++ /dev/null | |||
@@ -1,82 +0,0 @@ | |||
1 | /* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h | ||
2 | * | ||
3 | * Copyright 2007 Simtec Electronics <linux@simtec.co.uk> | ||
4 | * http://armlinux.simtec.co.uk/ | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * S3C2412 IIS register definition | ||
11 | */ | ||
12 | |||
13 | #ifndef __ASM_ARCH_REGS_S3C2412_IIS_H | ||
14 | #define __ASM_ARCH_REGS_S3C2412_IIS_H | ||
15 | |||
16 | #define S3C2412_IISCON (0x00) | ||
17 | #define S3C2412_IISMOD (0x04) | ||
18 | #define S3C2412_IISFIC (0x08) | ||
19 | #define S3C2412_IISPSR (0x0C) | ||
20 | #define S3C2412_IISTXD (0x10) | ||
21 | #define S3C2412_IISRXD (0x14) | ||
22 | |||
23 | #define S3C2412_IISCON_LRINDEX (1 << 11) | ||
24 | #define S3C2412_IISCON_TXFIFO_EMPTY (1 << 10) | ||
25 | #define S3C2412_IISCON_RXFIFO_EMPTY (1 << 9) | ||
26 | #define S3C2412_IISCON_TXFIFO_FULL (1 << 8) | ||
27 | #define S3C2412_IISCON_RXFIFO_FULL (1 << 7) | ||
28 | #define S3C2412_IISCON_TXDMA_PAUSE (1 << 6) | ||
29 | #define S3C2412_IISCON_RXDMA_PAUSE (1 << 5) | ||
30 | #define S3C2412_IISCON_TXCH_PAUSE (1 << 4) | ||
31 | #define S3C2412_IISCON_RXCH_PAUSE (1 << 3) | ||
32 | #define S3C2412_IISCON_TXDMA_ACTIVE (1 << 2) | ||
33 | #define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) | ||
34 | #define S3C2412_IISCON_IIS_ACTIVE (1 << 0) | ||
35 | |||
36 | #define S3C64XX_IISMOD_BLC_16BIT (0 << 13) | ||
37 | #define S3C64XX_IISMOD_BLC_8BIT (1 << 13) | ||
38 | #define S3C64XX_IISMOD_BLC_24BIT (2 << 13) | ||
39 | #define S3C64XX_IISMOD_BLC_MASK (3 << 13) | ||
40 | |||
41 | #define S3C64XX_IISMOD_IMS_PCLK (0 << 10) | ||
42 | #define S3C64XX_IISMOD_IMS_SYSMUX (1 << 10) | ||
43 | |||
44 | #define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10) | ||
45 | #define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10) | ||
46 | #define S3C2412_IISMOD_SLAVE (2 << 10) | ||
47 | #define S3C2412_IISMOD_MASTER_MASK (3 << 10) | ||
48 | #define S3C2412_IISMOD_MODE_TXONLY (0 << 8) | ||
49 | #define S3C2412_IISMOD_MODE_RXONLY (1 << 8) | ||
50 | #define S3C2412_IISMOD_MODE_TXRX (2 << 8) | ||
51 | #define S3C2412_IISMOD_MODE_MASK (3 << 8) | ||
52 | #define S3C2412_IISMOD_LR_LLOW (0 << 7) | ||
53 | #define S3C2412_IISMOD_LR_RLOW (1 << 7) | ||
54 | #define S3C2412_IISMOD_SDF_IIS (0 << 5) | ||
55 | #define S3C2412_IISMOD_SDF_MSB (1 << 5) | ||
56 | #define S3C2412_IISMOD_SDF_LSB (2 << 5) | ||
57 | #define S3C2412_IISMOD_SDF_MASK (3 << 5) | ||
58 | #define S3C2412_IISMOD_RCLK_256FS (0 << 3) | ||
59 | #define S3C2412_IISMOD_RCLK_512FS (1 << 3) | ||
60 | #define S3C2412_IISMOD_RCLK_384FS (2 << 3) | ||
61 | #define S3C2412_IISMOD_RCLK_768FS (3 << 3) | ||
62 | #define S3C2412_IISMOD_RCLK_MASK (3 << 3) | ||
63 | #define S3C2412_IISMOD_BCLK_32FS (0 << 1) | ||
64 | #define S3C2412_IISMOD_BCLK_48FS (1 << 1) | ||
65 | #define S3C2412_IISMOD_BCLK_16FS (2 << 1) | ||
66 | #define S3C2412_IISMOD_BCLK_24FS (3 << 1) | ||
67 | #define S3C2412_IISMOD_BCLK_MASK (3 << 1) | ||
68 | #define S3C2412_IISMOD_8BIT (1 << 0) | ||
69 | |||
70 | #define S3C64XX_IISMOD_CDCLKCON (1 << 12) | ||
71 | |||
72 | #define S3C2412_IISPSR_PSREN (1 << 15) | ||
73 | |||
74 | #define S3C2412_IISFIC_TXFLUSH (1 << 15) | ||
75 | #define S3C2412_IISFIC_RXFLUSH (1 << 7) | ||
76 | #define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) | ||
77 | #define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) | ||
78 | |||
79 | |||
80 | |||
81 | #endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */ | ||
82 | |||