diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-10-01 00:37:13 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-10-22 22:48:47 -0400 |
commit | 4b46fbba607ef99f1aab3b77bfc1dc25464df5a6 (patch) | |
tree | 8abce026b2f489ffe94982e73b05884d4db9cd3c /arch/arm/plat-samsung | |
parent | fe0cdec8bad919fd91cd344123906a55f3857209 (diff) |
ARM: SAMSUNG: Add GPIO configuration for a range of pins
Add s3c_gpio_cfgpin_range() to configure a range of pins to the given
value. This is useful for a number of blocks where the pins are in order
and saves multiple calls to s3c_gpio_cfgpin().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r-- | arch/arm/plat-samsung/gpio-config.c | 15 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-cfg.h | 13 |
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index e3d41eaed1ff..fa180dcc41ce 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c | |||
@@ -41,6 +41,21 @@ int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) | |||
41 | } | 41 | } |
42 | EXPORT_SYMBOL(s3c_gpio_cfgpin); | 42 | EXPORT_SYMBOL(s3c_gpio_cfgpin); |
43 | 43 | ||
44 | int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | ||
45 | unsigned int cfg) | ||
46 | { | ||
47 | int ret; | ||
48 | |||
49 | for (; nr > 0; nr--, start++) { | ||
50 | ret = s3c_gpio_cfgpin(start, cfg); | ||
51 | if (ret != 0) | ||
52 | return ret; | ||
53 | } | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); | ||
58 | |||
44 | unsigned s3c_gpio_getcfg(unsigned int pin) | 59 | unsigned s3c_gpio_getcfg(unsigned int pin) |
45 | { | 60 | { |
46 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); | 61 | struct s3c_gpio_chip *chip = s3c_gpiolib_getchip(pin); |
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h index 1c6b92947c5d..6e117dc2709b 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h | |||
@@ -108,6 +108,19 @@ extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); | |||
108 | */ | 108 | */ |
109 | extern unsigned s3c_gpio_getcfg(unsigned int pin); | 109 | extern unsigned s3c_gpio_getcfg(unsigned int pin); |
110 | 110 | ||
111 | /** | ||
112 | * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range | ||
113 | * @start: The pin number to start at | ||
114 | * @nr: The number of pins to configure from @start. | ||
115 | * @cfg: The configuration for the pin's function | ||
116 | * | ||
117 | * Call s3c_gpio_cfgpin() for the @nr pins starting at @start. | ||
118 | * | ||
119 | * @sa s3c_gpio_cfgpin. | ||
120 | */ | ||
121 | extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, | ||
122 | unsigned int cfg); | ||
123 | |||
111 | /* Define values for the pull-{up,down} available for each gpio pin. | 124 | /* Define values for the pull-{up,down} available for each gpio pin. |
112 | * | 125 | * |
113 | * These values control the state of the weak pull-{up,down} resistors | 126 | * These values control the state of the weak pull-{up,down} resistors |