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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-09-30 21:40:37 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-10-20 18:54:56 -0400
commit170a46177094b390299d1206748d7f15cd375dc9 (patch)
tree81fc5270bbc74d1cf946b2ed265fb85c4dee3ed8 /arch/arm/plat-samsung
parentca1931ca1e87c32f9abaef378c6996b25774cb02 (diff)
ARM: S5P: Add common S5P GPIO Interrupt support
This patch adds common code to enable support of GPIO interrupt on S5P SoCs. The total number of GPIO pins is quite large on S5P SoCs. Registering irq support for all of them would be a resource waste. Because of that the interrupt support for standard GPIO pins is registered dynamically by the s5p_register_gpio_interrupt() function. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: minor title fixes] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung')
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg.h18
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-core.h4
2 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
index 1c6b92947c5d..5b43b95da68e 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg.h
@@ -169,4 +169,22 @@ extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
169*/ 169*/
170extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr); 170extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
171 171
172/**
173 * s5p_register_gpio_interrupt() - register interrupt support for a gpio group
174 * @pin: The pin number from the group to be registered
175 *
176 * This function registers gpio interrupt support for the group that the
177 * specified pin belongs to.
178 *
179 * The total number of gpio pins is quite large ob s5p series. Registering
180 * irq support for all of them would be a resource waste. Because of that the
181 * interrupt support for standard gpio pins is registered dynamically.
182 *
183 * It will return the irq number of the interrupt that has been registered
184 * or -ENOMEM if no more gpio interrupts can be registered. It is allowed
185 * to call this function more than once for the same gpio group (the group
186 * will be registered only once).
187 */
188extern int s5p_register_gpio_interrupt(int pin);
189
172#endif /* __PLAT_GPIO_CFG_H */ 190#endif /* __PLAT_GPIO_CFG_H */
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h
index e358c7da8480..c22c27ca675a 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-core.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-core.h
@@ -43,6 +43,8 @@ struct s3c_gpio_cfg;
43 * struct s3c_gpio_chip - wrapper for specific implementation of gpio 43 * struct s3c_gpio_chip - wrapper for specific implementation of gpio
44 * @chip: The chip structure to be exported via gpiolib. 44 * @chip: The chip structure to be exported via gpiolib.
45 * @base: The base pointer to the gpio configuration registers. 45 * @base: The base pointer to the gpio configuration registers.
46 * @group: The group register number for gpio interrupt support.
47 * @irq_base: The base irq number.
46 * @config: special function and pull-resistor control information. 48 * @config: special function and pull-resistor control information.
47 * @lock: Lock for exclusive access to this gpio bank. 49 * @lock: Lock for exclusive access to this gpio bank.
48 * @pm_save: Save information for suspend/resume support. 50 * @pm_save: Save information for suspend/resume support.
@@ -63,6 +65,8 @@ struct s3c_gpio_chip {
63 struct s3c_gpio_cfg *config; 65 struct s3c_gpio_cfg *config;
64 struct s3c_gpio_pm *pm; 66 struct s3c_gpio_pm *pm;
65 void __iomem *base; 67 void __iomem *base;
68 int irq_base;
69 int group;
66 spinlock_t lock; 70 spinlock_t lock;
67#ifdef CONFIG_PM 71#ifdef CONFIG_PM
68 u32 pm_save[4]; 72 u32 pm_save[4];