diff options
author | Tomasz Figa <tomasz.figa@gmail.com> | 2013-03-07 18:44:29 -0500 |
---|---|---|
committer | Tomasz Figa <tomasz.figa@gmail.com> | 2013-08-12 15:53:24 -0400 |
commit | 7c93c200f66c2b7f0e0de7ccc0d6718b151adc56 (patch) | |
tree | d6f1af8cf75c667b5f916fc5cd85c59038b94f41 /arch/arm/plat-samsung/include | |
parent | a2eed492f8192db692c3697b3465ea467b7abc10 (diff) |
ARM: SAMSUNG: Remove pwm-clock infrastructure
Since all the used PWM prescalers and dividers configuration has been
moved to appropriate drivers, the pwm-clock infrastructure is now
unused and so this patch removes it.
Signed-off-by: Tomasz Figa <tomasz.figa@gmail.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Mark Brown <broonie@linaro.org>
Tested-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/clock.h | 4 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/pwm-clock.h | 81 |
2 files changed, 0 insertions, 85 deletions
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h index df45d6edc98d..63239f409807 100644 --- a/arch/arm/plat-samsung/include/plat/clock.h +++ b/arch/arm/plat-samsung/include/plat/clock.h | |||
@@ -145,10 +145,6 @@ extern int s3c2443_clkcon_enable_s(struct clk *clk, int enable); | |||
145 | 145 | ||
146 | extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); | 146 | extern int s3c64xx_sclk_ctrl(struct clk *clk, int enable); |
147 | 147 | ||
148 | /* Init for pwm clock code */ | ||
149 | |||
150 | extern void s3c_pwmclk_init(void); | ||
151 | |||
152 | /* Global watchdog clock used by arch_wtd_reset() callback */ | 148 | /* Global watchdog clock used by arch_wtd_reset() callback */ |
153 | 149 | ||
154 | extern struct clk *s3c2410_wdtclk; | 150 | extern struct clk *s3c2410_wdtclk; |
diff --git a/arch/arm/plat-samsung/include/plat/pwm-clock.h b/arch/arm/plat-samsung/include/plat/pwm-clock.h deleted file mode 100644 index bf6a60eb6237..000000000000 --- a/arch/arm/plat-samsung/include/plat/pwm-clock.h +++ /dev/null | |||
@@ -1,81 +0,0 @@ | |||
1 | /* linux/arch/arm/plat-samsung/include/plat/pwm-clock.h | ||
2 | * | ||
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
6 | * Copyright 2008 Openmoko, Inc. | ||
7 | * Copyright 2008 Simtec Electronics | ||
8 | * Ben Dooks <ben@simtec.co.uk> | ||
9 | * http://armlinux.simtec.co.uk/ | ||
10 | * | ||
11 | * SAMSUNG - pwm clock and timer support | ||
12 | * | ||
13 | * This program is free software; you can redistribute it and/or modify | ||
14 | * it under the terms of the GNU General Public License version 2 as | ||
15 | * published by the Free Software Foundation. | ||
16 | */ | ||
17 | |||
18 | #ifndef __ASM_PLAT_PWM_CLOCK_H | ||
19 | #define __ASM_PLAT_PWM_CLOCK_H __FILE__ | ||
20 | |||
21 | /** | ||
22 | * pwm_cfg_src_is_tclk() - return whether the given mux config is a tclk | ||
23 | * @tcfg: The timer TCFG1 register bits shifted down to 0. | ||
24 | * | ||
25 | * Return true if the given configuration from TCFG1 is a TCLK instead | ||
26 | * any of the TDIV clocks. | ||
27 | */ | ||
28 | static inline int pwm_cfg_src_is_tclk(unsigned long tcfg) | ||
29 | { | ||
30 | if (soc_is_s3c24xx()) | ||
31 | return tcfg == S3C2410_TCFG1_MUX_TCLK; | ||
32 | else if (soc_is_s3c64xx() || soc_is_s5pc100()) | ||
33 | return tcfg >= S3C64XX_TCFG1_MUX_TCLK; | ||
34 | else if (soc_is_s5p6440() || soc_is_s5p6450()) | ||
35 | return 0; | ||
36 | else | ||
37 | return tcfg == S3C64XX_TCFG1_MUX_TCLK; | ||
38 | } | ||
39 | |||
40 | /** | ||
41 | * tcfg_to_divisor() - convert tcfg1 setting to a divisor | ||
42 | * @tcfg1: The tcfg1 setting, shifted down. | ||
43 | * | ||
44 | * Get the divisor value for the given tcfg1 setting. We assume the | ||
45 | * caller has already checked to see if this is not a TCLK source. | ||
46 | */ | ||
47 | static inline unsigned long tcfg_to_divisor(unsigned long tcfg1) | ||
48 | { | ||
49 | if (soc_is_s3c24xx()) | ||
50 | return 1 << (tcfg1 + 1); | ||
51 | else | ||
52 | return 1 << tcfg1; | ||
53 | } | ||
54 | |||
55 | /** | ||
56 | * pwm_tdiv_has_div1() - does the tdiv setting have a /1 | ||
57 | * | ||
58 | * Return true if we have a /1 in the tdiv setting. | ||
59 | */ | ||
60 | static inline unsigned int pwm_tdiv_has_div1(void) | ||
61 | { | ||
62 | if (soc_is_s3c24xx()) | ||
63 | return 0; | ||
64 | else | ||
65 | return 1; | ||
66 | } | ||
67 | |||
68 | /** | ||
69 | * pwm_tdiv_div_bits() - calculate TCFG1 divisor value. | ||
70 | * @div: The divisor to calculate the bit information for. | ||
71 | * | ||
72 | * Turn a divisor into the necessary bit field for TCFG1. | ||
73 | */ | ||
74 | static inline unsigned long pwm_tdiv_div_bits(unsigned int div) | ||
75 | { | ||
76 | if (soc_is_s3c24xx()) | ||
77 | return ilog2(div) - 1; | ||
78 | else | ||
79 | return ilog2(div); | ||
80 | } | ||
81 | #endif /* __ASM_PLAT_PWM_CLOCK_H */ | ||