diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-05-06 02:42:23 -0400 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-11 04:45:46 -0400 |
commit | fcef85c0c122f90f57f2f3ef0caeaf6404d6e8f3 (patch) | |
tree | f674a70c38a71309d27029f2c25d18a15800cf88 /arch/arm/plat-samsung/include | |
parent | 1d3ef014b5fe959a789c2df708713d58c9491c3b (diff) |
ARM: SAMSUNG: Add spinlock locking to GPIO banks
Add locking to each GPIO bank to allow for SMP capable code
to use the gpiolib functions. See the gpio-core.h header file
for more information.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-core.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index f0584f26d493..f3a68d1a07b9 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h | |||
@@ -44,16 +44,26 @@ struct s3c_gpio_cfg; | |||
44 | * @chip: The chip structure to be exported via gpiolib. | 44 | * @chip: The chip structure to be exported via gpiolib. |
45 | * @base: The base pointer to the gpio configuration registers. | 45 | * @base: The base pointer to the gpio configuration registers. |
46 | * @config: special function and pull-resistor control information. | 46 | * @config: special function and pull-resistor control information. |
47 | * @lock: Lock for exclusive access to this gpio bank. | ||
47 | * @pm_save: Save information for suspend/resume support. | 48 | * @pm_save: Save information for suspend/resume support. |
48 | * | 49 | * |
49 | * This wrapper provides the necessary information for the Samsung | 50 | * This wrapper provides the necessary information for the Samsung |
50 | * specific gpios being registered with gpiolib. | 51 | * specific gpios being registered with gpiolib. |
52 | * | ||
53 | * The lock protects each gpio bank from multiple access of the shared | ||
54 | * configuration registers, or from reading of data whilst another thread | ||
55 | * is writing to the register set. | ||
56 | * | ||
57 | * Each chip has its own lock to avoid any contention between different | ||
58 | * CPU cores trying to get one lock for different GPIO banks, where each | ||
59 | * bank of GPIO has its own register space and configuration registers. | ||
51 | */ | 60 | */ |
52 | struct s3c_gpio_chip { | 61 | struct s3c_gpio_chip { |
53 | struct gpio_chip chip; | 62 | struct gpio_chip chip; |
54 | struct s3c_gpio_cfg *config; | 63 | struct s3c_gpio_cfg *config; |
55 | struct s3c_gpio_pm *pm; | 64 | struct s3c_gpio_pm *pm; |
56 | void __iomem *base; | 65 | void __iomem *base; |
66 | spinlock_t lock; | ||
57 | #ifdef CONFIG_PM | 67 | #ifdef CONFIG_PM |
58 | u32 pm_save[4]; | 68 | u32 pm_save[4]; |
59 | #endif | 69 | #endif |
@@ -138,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit; | |||
138 | #define __gpio_pm(x) NULL | 148 | #define __gpio_pm(x) NULL |
139 | 149 | ||
140 | #endif /* CONFIG_PM */ | 150 | #endif /* CONFIG_PM */ |
151 | |||
152 | /* locking wrappers to deal with multiple access to the same gpio bank */ | ||
153 | #define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) | ||
154 | #define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) | ||