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authorKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:49:18 -0400
committerKukjin Kim <kgene.kim@samsung.com>2010-08-06 08:49:18 -0400
commitd61bd77ff1e7c7a0a381c6e656dbc07b37510f37 (patch)
tree838f7b1c4d931814fbbc30643bb423f409e6daba /arch/arm/plat-samsung/include
parentf2b7e3c54a304677a1142829fb5913595885379f (diff)
parent1c739c7f374f77c5a355273c0c1d9345ed08c0ce (diff)
Merge branch 'next-samsung' into for-next
Conflicts: arch/arm/mach-s5p6440/Kconfig arch/arm/mach-s5p6442/Kconfig arch/arm/mach-s5pc100/Kconfig arch/arm/mach-s5pv210/Kconfig arch/arm/mach-s5pv210/cpu.c arch/arm/plat-samsung/include/plat/sdhci.h
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r--arch/arm/plat-samsung/include/plat/adc-core.h28
-rw-r--r--arch/arm/plat-samsung/include/plat/ata-core.h28
-rw-r--r--arch/arm/plat-samsung/include/plat/ata.h36
-rw-r--r--arch/arm/plat-samsung/include/plat/devs.h20
-rw-r--r--arch/arm/plat-samsung/include/plat/fimc-core.h44
-rw-r--r--arch/arm/plat-samsung/include/plat/keypad.h56
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-ata.h56
-rw-r--r--arch/arm/plat-samsung/include/plat/regs-rtc.h3
-rw-r--r--arch/arm/plat-samsung/include/plat/sdhci.h122
9 files changed, 332 insertions, 61 deletions
diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h
new file mode 100644
index 000000000000..a281568d5856
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/adc-core.h
@@ -0,0 +1,28 @@
1/* linux/arch/arm/plat-samsung/include/plat/adc-core.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Samsung ADC Controller core functions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_ADC_CORE_H
14#define __ASM_PLAT_ADC_CORE_H __FILE__
15
16/* These functions are only for use with the core support code, such as
17 * the cpu specific initialisation code
18 */
19
20/* re-define device name depending on support. */
21static inline void s3c_adc_setname(char *name)
22{
23#ifdef CONFIG_SAMSUNG_DEV_ADC
24 s3c_device_adc.name = name;
25#endif
26}
27
28#endif /* __ASM_PLAT_ADC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/ata-core.h b/arch/arm/plat-samsung/include/plat/ata-core.h
new file mode 100644
index 000000000000..f5a4ec7141b1
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ata-core.h
@@ -0,0 +1,28 @@
1/* linux/arch/arm/plat-samsung/include/plat/ata-core.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Samsung CF-ATA Controller core functions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_ATA_CORE_H
14#define __ASM_PLAT_ATA_CORE_H __FILE__
15
16/* These functions are only for use with the core support code, such as
17 * the cpu specific initialisation code
18*/
19
20/* re-define device name depending on support. */
21static inline void s3c_cfcon_setname(char *name)
22{
23#ifdef CONFIG_SAMSUNG_DEV_IDE
24 s3c_device_cfcon.name = name;
25#endif
26}
27
28#endif /* __ASM_PLAT_ATA_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/ata.h b/arch/arm/plat-samsung/include/plat/ata.h
new file mode 100644
index 000000000000..2a3855a8372a
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/ata.h
@@ -0,0 +1,36 @@
1/* linux/arch/arm/plat-samsung/include/plat/ata.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Samsung CF-ATA platform_device info
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_ATA_H
14#define __ASM_PLAT_ATA_H __FILE__
15
16/**
17 * struct s3c_ide_platdata - S3C IDE driver platform data.
18 * @setup_gpio: Setup the external GPIO pins to the right state for data
19 * transfer in true-ide mode.
20 */
21struct s3c_ide_platdata {
22 void (*setup_gpio)(void);
23};
24
25/*
26 * s3c_ide_set_platdata() - Setup the platform specifc data for IDE driver.
27 * @pdata: Platform data for IDE driver.
28 */
29extern void s3c_ide_set_platdata(struct s3c_ide_platdata *pdata);
30
31/* architecture-specific IDE configuration */
32extern void s3c64xx_ide_setup_gpio(void);
33extern void s5pc100_ide_setup_gpio(void);
34extern void s5pv210_ide_setup_gpio(void);
35
36#endif /*__ASM_PLAT_ATA_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index e6144e4b9118..85f6f23a510f 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -54,6 +54,8 @@ extern struct platform_device s3c_device_hwmon;
54extern struct platform_device s3c_device_hsmmc0; 54extern struct platform_device s3c_device_hsmmc0;
55extern struct platform_device s3c_device_hsmmc1; 55extern struct platform_device s3c_device_hsmmc1;
56extern struct platform_device s3c_device_hsmmc2; 56extern struct platform_device s3c_device_hsmmc2;
57extern struct platform_device s3c_device_hsmmc3;
58extern struct platform_device s3c_device_cfcon;
57 59
58extern struct platform_device s3c_device_spi0; 60extern struct platform_device s3c_device_spi0;
59extern struct platform_device s3c_device_spi1; 61extern struct platform_device s3c_device_spi1;
@@ -100,6 +102,12 @@ extern struct platform_device s5pc100_device_iis0;
100extern struct platform_device s5pc100_device_iis1; 102extern struct platform_device s5pc100_device_iis1;
101extern struct platform_device s5pc100_device_iis2; 103extern struct platform_device s5pc100_device_iis2;
102 104
105extern struct platform_device samsung_device_keypad;
106
107extern struct platform_device s5p_device_fimc0;
108extern struct platform_device s5p_device_fimc1;
109extern struct platform_device s5p_device_fimc2;
110
103/* s3c2440 specific devices */ 111/* s3c2440 specific devices */
104 112
105#ifdef CONFIG_CPU_S3C2440 113#ifdef CONFIG_CPU_S3C2440
@@ -108,3 +116,15 @@ extern struct platform_device s3c_device_camif;
108extern struct platform_device s3c_device_ac97; 116extern struct platform_device s3c_device_ac97;
109 117
110#endif 118#endif
119
120/**
121 * s3c_set_platdata() - helper for setting platform data
122 * @pd: The default platform data for this device.
123 * @pdsize: The size of the platform data.
124 * @pdev: Pointer to the device to fill in.
125 *
126 * This helper replaces a number of calls that copy and then set the
127 * platform data of the device.
128 */
129extern void *s3c_set_platdata(void *pd, size_t pdsize,
130 struct platform_device *pdev);
diff --git a/arch/arm/plat-samsung/include/plat/fimc-core.h b/arch/arm/plat-samsung/include/plat/fimc-core.h
new file mode 100644
index 000000000000..81a3bfeeccad
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/fimc-core.h
@@ -0,0 +1,44 @@
1/*
2 * arch/arm/plat-samsung/include/plat/fimc-core.h
3 *
4 * Copyright 2010 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
6 *
7 * Samsung camera interface driver core functions
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __ASM_PLAT_FIMC_CORE_H
15#define __ASM_PLAT_FIMC_CORE_H __FILE__
16
17/*
18 * These functions are only for use with the core support code, such as
19 * the CPU-specific initialization code.
20 */
21
22/* Re-define device name to differentiate the subsystem in various SoCs. */
23static inline void s3c_fimc_setname(int id, char *name)
24{
25 switch (id) {
26#ifdef CONFIG_S5P_DEV_FIMC0
27 case 0:
28 s5p_device_fimc0.name = name;
29 break;
30#endif
31#ifdef CONFIG_S5P_DEV_FIMC1
32 case 1:
33 s5p_device_fimc1.name = name;
34 break;
35#endif
36#ifdef CONFIG_S5P_DEV_FIMC2
37 case 2:
38 s5p_device_fimc2.name = name;
39 break;
40#endif
41 }
42}
43
44#endif /* __ASM_PLAT_FIMC_CORE_H */
diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/plat-samsung/include/plat/keypad.h
new file mode 100644
index 000000000000..b59a6483cd8a
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/keypad.h
@@ -0,0 +1,56 @@
1/*
2 * Samsung Platform - Keypad platform data definitions
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef __PLAT_SAMSUNG_KEYPAD_H
14#define __PLAT_SAMSUNG_KEYPAD_H
15
16#include <linux/input/matrix_keypad.h>
17
18#define SAMSUNG_MAX_ROWS 8
19#define SAMSUNG_MAX_COLS 8
20
21/**
22 * struct samsung_keypad_platdata - Platform device data for Samsung Keypad.
23 * @keymap_data: pointer to &matrix_keymap_data.
24 * @rows: number of keypad row supported.
25 * @cols: number of keypad col supported.
26 * @no_autorepeat: disable key autorepeat.
27 * @wakeup: controls whether the device should be set up as wakeup source.
28 * @cfg_gpio: configure the GPIO.
29 *
30 * Initialisation data specific to either the machine or the platform
31 * for the device driver to use or call-back when configuring gpio.
32 */
33struct samsung_keypad_platdata {
34 const struct matrix_keymap_data *keymap_data;
35 unsigned int rows;
36 unsigned int cols;
37 bool no_autorepeat;
38 bool wakeup;
39
40 void (*cfg_gpio)(unsigned int rows, unsigned int cols);
41};
42
43/**
44 * samsung_keypad_set_platdata - Set platform data for Samsung Keypad device.
45 * @pd: Platform data to register to device.
46 *
47 * Register the given platform data for use with Samsung Keypad device.
48 * The call will copy the platform data, so the board definitions can
49 * make the structure itself __initdata.
50 */
51extern void samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd);
52
53/* defined by architecture to configure gpio. */
54extern void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols);
55
56#endif /* __PLAT_SAMSUNG_KEYPAD_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-ata.h b/arch/arm/plat-samsung/include/plat/regs-ata.h
new file mode 100644
index 000000000000..f5df92fdae26
--- /dev/null
+++ b/arch/arm/plat-samsung/include/plat/regs-ata.h
@@ -0,0 +1,56 @@
1/* linux/arch/arm/plat-samsung/include/plat/regs-ata.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Samsung CF-ATA register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_REGS_ATA_H
14#define __ASM_PLAT_REGS_ATA_H __FILE__
15
16#define S3C_CFATA_REG(x) (x)
17
18#define S3C_CFATA_MUX S3C_CFATA_REG(0x0)
19
20#define S3C_ATA_CTRL S3C_CFATA_REG(0x0)
21#define S3C_ATA_STATUS S3C_CFATA_REG(0x4)
22#define S3C_ATA_CMD S3C_CFATA_REG(0x8)
23#define S3C_ATA_SWRST S3C_CFATA_REG(0xc)
24#define S3C_ATA_IRQ S3C_CFATA_REG(0x10)
25#define S3C_ATA_IRQ_MSK S3C_CFATA_REG(0x14)
26#define S3C_ATA_CFG S3C_CFATA_REG(0x18)
27
28#define S3C_ATA_MDMA_TIME S3C_CFATA_REG(0x28)
29#define S3C_ATA_PIO_TIME S3C_CFATA_REG(0x2c)
30#define S3C_ATA_UDMA_TIME S3C_CFATA_REG(0x30)
31#define S3C_ATA_XFR_NUM S3C_CFATA_REG(0x34)
32#define S3C_ATA_XFR_CNT S3C_CFATA_REG(0x38)
33#define S3C_ATA_TBUF_START S3C_CFATA_REG(0x3c)
34#define S3C_ATA_TBUF_SIZE S3C_CFATA_REG(0x40)
35#define S3C_ATA_SBUF_START S3C_CFATA_REG(0x44)
36#define S3C_ATA_SBUF_SIZE S3C_CFATA_REG(0x48)
37#define S3C_ATA_CADR_TBUF S3C_CFATA_REG(0x4c)
38#define S3C_ATA_CADR_SBUF S3C_CFATA_REG(0x50)
39#define S3C_ATA_PIO_DTR S3C_CFATA_REG(0x54)
40#define S3C_ATA_PIO_FED S3C_CFATA_REG(0x58)
41#define S3C_ATA_PIO_SCR S3C_CFATA_REG(0x5c)
42#define S3C_ATA_PIO_LLR S3C_CFATA_REG(0x60)
43#define S3C_ATA_PIO_LMR S3C_CFATA_REG(0x64)
44#define S3C_ATA_PIO_LHR S3C_CFATA_REG(0x68)
45#define S3C_ATA_PIO_DVR S3C_CFATA_REG(0x6c)
46#define S3C_ATA_PIO_CSD S3C_CFATA_REG(0x70)
47#define S3C_ATA_PIO_DAD S3C_CFATA_REG(0x74)
48#define S3C_ATA_PIO_READY S3C_CFATA_REG(0x78)
49#define S3C_ATA_PIO_RDATA S3C_CFATA_REG(0x7c)
50
51#define S3C_CFATA_MUX_TRUEIDE 0x01
52
53#define S3C_ATA_CFG_SWAP 0x40
54#define S3C_ATA_CFG_IORDYEN 0x02
55
56#endif /* __ASM_PLAT_REGS_ATA_H */
diff --git a/arch/arm/plat-samsung/include/plat/regs-rtc.h b/arch/arm/plat-samsung/include/plat/regs-rtc.h
index 65c190d142dd..30b7cc14cef5 100644
--- a/arch/arm/plat-samsung/include/plat/regs-rtc.h
+++ b/arch/arm/plat-samsung/include/plat/regs-rtc.h
@@ -14,6 +14,9 @@
14#define __ASM_ARCH_REGS_RTC_H __FILE__ 14#define __ASM_ARCH_REGS_RTC_H __FILE__
15 15
16#define S3C2410_RTCREG(x) (x) 16#define S3C2410_RTCREG(x) (x)
17#define S3C2410_INTP S3C2410_RTCREG(0x30)
18#define S3C2410_INTP_ALM (1 << 1)
19#define S3C2410_INTP_TIC (1 << 0)
17 20
18#define S3C2410_RTCCON S3C2410_RTCREG(0x40) 21#define S3C2410_RTCCON S3C2410_RTCREG(0x40)
19#define S3C2410_RTCCON_RTCEN (1<<0) 22#define S3C2410_RTCCON_RTCEN (1<<0)
diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h
index 10413728530f..30844c263d03 100644
--- a/arch/arm/plat-samsung/include/plat/sdhci.h
+++ b/arch/arm/plat-samsung/include/plat/sdhci.h
@@ -20,10 +20,31 @@ struct mmc_host;
20struct mmc_card; 20struct mmc_card;
21struct mmc_ios; 21struct mmc_ios;
22 22
23enum cd_types {
24 S3C_SDHCI_CD_INTERNAL, /* use mmc internal CD line */
25 S3C_SDHCI_CD_EXTERNAL, /* use external callback */
26 S3C_SDHCI_CD_GPIO, /* use external gpio pin for CD line */
27 S3C_SDHCI_CD_NONE, /* no CD line, use polling to detect card */
28 S3C_SDHCI_CD_PERMANENT, /* no CD line, card permanently wired to host */
29};
30
23/** 31/**
24 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI 32 * struct s3c_sdhci_platdata() - Platform device data for Samsung SDHCI
25 * @max_width: The maximum number of data bits supported. 33 * @max_width: The maximum number of data bits supported.
26 * @host_caps: Standard MMC host capabilities bit field. 34 * @host_caps: Standard MMC host capabilities bit field.
35 * @cd_type: Type of Card Detection method (see cd_types enum above)
36 * @ext_cd_init: Initialize external card detect subsystem. Called on
37 * sdhci-s3c driver probe when cd_type == S3C_SDHCI_CD_EXTERNAL.
38 * notify_func argument is a callback to the sdhci-s3c driver
39 * that triggers the card detection event. Callback arguments:
40 * dev is pointer to platform device of the host controller,
41 * state is new state of the card (0 - removed, 1 - inserted).
42 * @ext_cd_cleanup: Cleanup external card detect subsystem. Called on
43 * sdhci-s3c driver remove when cd_type == S3C_SDHCI_CD_EXTERNAL.
44 * notify_func argument is the same callback as for ext_cd_init.
45 * @ext_cd_gpio: gpio pin used for external CD line, valid only if
46 * cd_type == S3C_SDHCI_CD_GPIO
47 * @ext_cd_gpio_invert: invert values for external CD gpio line
27 * @cfg_gpio: Configure the GPIO for a specific card bit-width 48 * @cfg_gpio: Configure the GPIO for a specific card bit-width
28 * @cfg_card: Configure the interface for a specific card and speed. This 49 * @cfg_card: Configure the interface for a specific card and speed. This
29 * is necessary the controllers and/or GPIO blocks require the 50 * is necessary the controllers and/or GPIO blocks require the
@@ -37,9 +58,17 @@ struct mmc_ios;
37struct s3c_sdhci_platdata { 58struct s3c_sdhci_platdata {
38 unsigned int max_width; 59 unsigned int max_width;
39 unsigned int host_caps; 60 unsigned int host_caps;
61 enum cd_types cd_type;
40 62
41 char **clocks; /* set of clock sources */ 63 char **clocks; /* set of clock sources */
42 64
65 int ext_cd_gpio;
66 bool ext_cd_gpio_invert;
67 int (*ext_cd_init)(void (*notify_func)(struct platform_device *,
68 int state));
69 int (*ext_cd_cleanup)(void (*notify_func)(struct platform_device *,
70 int state));
71
43 void (*cfg_gpio)(struct platform_device *dev, int width); 72 void (*cfg_gpio)(struct platform_device *dev, int width);
44 void (*cfg_card)(struct platform_device *dev, 73 void (*cfg_card)(struct platform_device *dev,
45 void __iomem *regbase, 74 void __iomem *regbase,
@@ -58,6 +87,7 @@ struct s3c_sdhci_platdata {
58extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); 87extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd);
59extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); 88extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd);
60extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); 89extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
90extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd);
61 91
62/* Default platform data, exported so that per-cpu initialisation can 92/* Default platform data, exported so that per-cpu initialisation can
63 * set the correct one when there are more than one cpu type selected. 93 * set the correct one when there are more than one cpu type selected.
@@ -66,6 +96,7 @@ extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd);
66extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; 96extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata;
67extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; 97extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata;
68extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; 98extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata;
99extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata;
69 100
70/* Helper function availablity */ 101/* Helper function availablity */
71 102
@@ -80,12 +111,11 @@ extern void s5pv210_setup_sdhci1_cfg_gpio(struct platform_device *, int w);
80extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w); 111extern void s5pv210_setup_sdhci2_cfg_gpio(struct platform_device *, int w);
81extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w); 112extern void s5pv210_setup_sdhci3_cfg_gpio(struct platform_device *, int w);
82 113
83/* S3C6400 SDHCI setup */ 114/* S3C64XX SDHCI setup */
84 115
85#ifdef CONFIG_S3C64XX_SETUP_SDHCI 116#ifdef CONFIG_S3C64XX_SETUP_SDHCI
86extern char *s3c64xx_hsmmc_clksrcs[4]; 117extern char *s3c64xx_hsmmc_clksrcs[4];
87 118
88#ifdef CONFIG_S3C_DEV_HSMMC
89extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev, 119extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
90 void __iomem *r, 120 void __iomem *r,
91 struct mmc_ios *ios, 121 struct mmc_ios *ios,
@@ -93,76 +123,62 @@ extern void s3c6400_setup_sdhci_cfg_card(struct platform_device *dev,
93 123
94static inline void s3c6400_default_sdhci0(void) 124static inline void s3c6400_default_sdhci0(void)
95{ 125{
126#ifdef CONFIG_S3C_DEV_HSMMC
96 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 127 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
97 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 128 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
98 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 129 s3c_hsmmc0_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
130#endif
99} 131}
100 132
101#else
102static inline void s3c6400_default_sdhci0(void) { }
103#endif /* CONFIG_S3C_DEV_HSMMC */
104
105#ifdef CONFIG_S3C_DEV_HSMMC1
106static inline void s3c6400_default_sdhci1(void) 133static inline void s3c6400_default_sdhci1(void)
107{ 134{
135#ifdef CONFIG_S3C_DEV_HSMMC1
108 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 136 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
109 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 137 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
110 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 138 s3c_hsmmc1_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
139#endif
111} 140}
112#else
113static inline void s3c6400_default_sdhci1(void) { }
114#endif /* CONFIG_S3C_DEV_HSMMC1 */
115 141
116#ifdef CONFIG_S3C_DEV_HSMMC2
117static inline void s3c6400_default_sdhci2(void) 142static inline void s3c6400_default_sdhci2(void)
118{ 143{
144#ifdef CONFIG_S3C_DEV_HSMMC2
119 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 145 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
120 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 146 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
121 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card; 147 s3c_hsmmc2_def_platdata.cfg_card = s3c6400_setup_sdhci_cfg_card;
148#endif
122} 149}
123#else
124static inline void s3c6400_default_sdhci2(void) { }
125#endif /* CONFIG_S3C_DEV_HSMMC2 */
126
127/* S3C6410 SDHCI setup */
128 150
129extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev, 151extern void s3c6410_setup_sdhci_cfg_card(struct platform_device *dev,
130 void __iomem *r, 152 void __iomem *r,
131 struct mmc_ios *ios, 153 struct mmc_ios *ios,
132 struct mmc_card *card); 154 struct mmc_card *card);
133 155
134#ifdef CONFIG_S3C_DEV_HSMMC
135static inline void s3c6410_default_sdhci0(void) 156static inline void s3c6410_default_sdhci0(void)
136{ 157{
158#ifdef CONFIG_S3C_DEV_HSMMC
137 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 159 s3c_hsmmc0_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
138 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; 160 s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio;
139 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; 161 s3c_hsmmc0_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
162#endif
140} 163}
141#else
142static inline void s3c6410_default_sdhci0(void) { }
143#endif /* CONFIG_S3C_DEV_HSMMC */
144 164
145#ifdef CONFIG_S3C_DEV_HSMMC1
146static inline void s3c6410_default_sdhci1(void) 165static inline void s3c6410_default_sdhci1(void)
147{ 166{
167#ifdef CONFIG_S3C_DEV_HSMMC1
148 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 168 s3c_hsmmc1_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
149 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; 169 s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio;
150 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; 170 s3c_hsmmc1_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
171#endif
151} 172}
152#else
153static inline void s3c6410_default_sdhci1(void) { }
154#endif /* CONFIG_S3C_DEV_HSMMC1 */
155 173
156#ifdef CONFIG_S3C_DEV_HSMMC2
157static inline void s3c6410_default_sdhci2(void) 174static inline void s3c6410_default_sdhci2(void)
158{ 175{
176#ifdef CONFIG_S3C_DEV_HSMMC2
159 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs; 177 s3c_hsmmc2_def_platdata.clocks = s3c64xx_hsmmc_clksrcs;
160 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; 178 s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio;
161 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card; 179 s3c_hsmmc2_def_platdata.cfg_card = s3c6410_setup_sdhci_cfg_card;
180#endif
162} 181}
163#else
164static inline void s3c6410_default_sdhci2(void) { }
165#endif /* CONFIG_S3C_DEV_HSMMC2 */
166 182
167#else 183#else
168static inline void s3c6410_default_sdhci0(void) { } 184static inline void s3c6410_default_sdhci0(void) { }
@@ -184,48 +200,42 @@ extern void s5pc100_setup_sdhci0_cfg_card(struct platform_device *dev,
184 struct mmc_ios *ios, 200 struct mmc_ios *ios,
185 struct mmc_card *card); 201 struct mmc_card *card);
186 202
187#ifdef CONFIG_S3C_DEV_HSMMC
188static inline void s5pc100_default_sdhci0(void) 203static inline void s5pc100_default_sdhci0(void)
189{ 204{
205#ifdef CONFIG_S3C_DEV_HSMMC
190 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 206 s3c_hsmmc0_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
191 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio; 207 s3c_hsmmc0_def_platdata.cfg_gpio = s5pc100_setup_sdhci0_cfg_gpio;
192 s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; 208 s3c_hsmmc0_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
209#endif
193} 210}
194#else
195static inline void s5pc100_default_sdhci0(void) { }
196#endif /* CONFIG_S3C_DEV_HSMMC */
197 211
198#ifdef CONFIG_S3C_DEV_HSMMC1
199static inline void s5pc100_default_sdhci1(void) 212static inline void s5pc100_default_sdhci1(void)
200{ 213{
214#ifdef CONFIG_S3C_DEV_HSMMC1
201 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 215 s3c_hsmmc1_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
202 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio; 216 s3c_hsmmc1_def_platdata.cfg_gpio = s5pc100_setup_sdhci1_cfg_gpio;
203 s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; 217 s3c_hsmmc1_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
218#endif
204} 219}
205#else
206static inline void s5pc100_default_sdhci1(void) { }
207#endif /* CONFIG_S3C_DEV_HSMMC1 */
208 220
209#ifdef CONFIG_S3C_DEV_HSMMC2
210static inline void s5pc100_default_sdhci2(void) 221static inline void s5pc100_default_sdhci2(void)
211{ 222{
223#ifdef CONFIG_S3C_DEV_HSMMC2
212 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs; 224 s3c_hsmmc2_def_platdata.clocks = s5pc100_hsmmc_clksrcs;
213 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio; 225 s3c_hsmmc2_def_platdata.cfg_gpio = s5pc100_setup_sdhci2_cfg_gpio;
214 s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card; 226 s3c_hsmmc2_def_platdata.cfg_card = s5pc100_setup_sdhci0_cfg_card;
227#endif
215} 228}
216#else
217static inline void s5pc100_default_sdhci2(void) { }
218#endif /* CONFIG_S3C_DEV_HSMMC1 */
219
220 229
221#else 230#else
222static inline void s5pc100_default_sdhci0(void) { } 231static inline void s5pc100_default_sdhci0(void) { }
223static inline void s5pc100_default_sdhci1(void) { } 232static inline void s5pc100_default_sdhci1(void) { }
224static inline void s5pc100_default_sdhci2(void) { } 233static inline void s5pc100_default_sdhci2(void) { }
234
225#endif /* CONFIG_S5PC100_SETUP_SDHCI */ 235#endif /* CONFIG_S5PC100_SETUP_SDHCI */
226 236
237/* S5PV210 SDHCI setup */
227 238
228/* S5PC110 SDHCI setup */
229#ifdef CONFIG_S5PV210_SETUP_SDHCI 239#ifdef CONFIG_S5PV210_SETUP_SDHCI
230extern char *s5pv210_hsmmc_clksrcs[4]; 240extern char *s5pv210_hsmmc_clksrcs[4];
231 241
@@ -234,58 +244,48 @@ extern void s5pv210_setup_sdhci_cfg_card(struct platform_device *dev,
234 struct mmc_ios *ios, 244 struct mmc_ios *ios,
235 struct mmc_card *card); 245 struct mmc_card *card);
236 246
237#ifdef CONFIG_S3C_DEV_HSMMC
238static inline void s5pv210_default_sdhci0(void) 247static inline void s5pv210_default_sdhci0(void)
239{ 248{
249#ifdef CONFIG_S3C_DEV_HSMMC
240 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 250 s3c_hsmmc0_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
241 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio; 251 s3c_hsmmc0_def_platdata.cfg_gpio = s5pv210_setup_sdhci0_cfg_gpio;
242 s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; 252 s3c_hsmmc0_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
253#endif
243} 254}
244#else
245static inline void s5pv210_default_sdhci0(void) { }
246#endif /* CONFIG_S3C_DEV_HSMMC */
247 255
248#ifdef CONFIG_S3C_DEV_HSMMC1
249static inline void s5pv210_default_sdhci1(void) 256static inline void s5pv210_default_sdhci1(void)
250{ 257{
258#ifdef CONFIG_S3C_DEV_HSMMC1
251 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 259 s3c_hsmmc1_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
252 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio; 260 s3c_hsmmc1_def_platdata.cfg_gpio = s5pv210_setup_sdhci1_cfg_gpio;
253 s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; 261 s3c_hsmmc1_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
262#endif
254} 263}
255#else
256static inline void s5pv210_default_sdhci1(void) { }
257#endif /* CONFIG_S3C_DEV_HSMMC1 */
258 264
259#ifdef CONFIG_S3C_DEV_HSMMC2
260static inline void s5pv210_default_sdhci2(void) 265static inline void s5pv210_default_sdhci2(void)
261{ 266{
267#ifdef CONFIG_S3C_DEV_HSMMC2
262 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 268 s3c_hsmmc2_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
263 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio; 269 s3c_hsmmc2_def_platdata.cfg_gpio = s5pv210_setup_sdhci2_cfg_gpio;
264 s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; 270 s3c_hsmmc2_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
271#endif
265} 272}
266#else
267static inline void s5pv210_default_sdhci2(void) { }
268#endif /* CONFIG_S3C_DEV_HSMMC2 */
269 273
270#ifdef CONFIG_S3C_DEV_HSMMC3
271static inline void s5pv210_default_sdhci3(void) 274static inline void s5pv210_default_sdhci3(void)
272{ 275{
276#ifdef CONFIG_S3C_DEV_HSMMC3
273 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs; 277 s3c_hsmmc3_def_platdata.clocks = s5pv210_hsmmc_clksrcs;
274 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio; 278 s3c_hsmmc3_def_platdata.cfg_gpio = s5pv210_setup_sdhci3_cfg_gpio;
275 s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card; 279 s3c_hsmmc3_def_platdata.cfg_card = s5pv210_setup_sdhci_cfg_card;
280#endif
276} 281}
277#else
278static inline void s5pv210_default_sdhci3(void) { }
279#endif /* CONFIG_S3C_DEV_HSMMC3 */
280 282
281#else 283#else
282static inline void s5pv210_default_sdhci0(void) { } 284static inline void s5pv210_default_sdhci0(void) { }
283static inline void s5pv210_default_sdhci1(void) { } 285static inline void s5pv210_default_sdhci1(void) { }
284static inline void s5pv210_default_sdhci2(void) { } 286static inline void s5pv210_default_sdhci2(void) { }
285static inline void s5pv210_default_sdhci3(void) { } 287static inline void s5pv210_default_sdhci3(void) { }
286#endif /* CONFIG_S5PC100_SETUP_SDHCI */
287
288
289 288
289#endif /* CONFIG_S5PV210_SETUP_SDHCI */
290 290
291#endif /* __PLAT_S3C_SDHCI_H */ 291#endif /* __PLAT_S3C_SDHCI_H */