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authorBen Dooks <ben-linux@fluff.org>2010-05-05 21:27:16 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-05 21:27:16 -0400
commit97a339995fa6224487dc026e466f5bd1bbcaa3b2 (patch)
treea11be4a147685fd970cb924c633d47c3deebeeab /arch/arm/plat-samsung/include
parent5690a6267f0f0f15a01eeed143828726627c6ae6 (diff)
ARM: SAMSUNG: Add GPIO configuration read calls
Add the necessary 1,2 and 4 bit configuration read calls for the new gpio code to allow removal of the old s3c24xx gpio code. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung/include')
-rw-r--r--arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
index 885e9ac642d3..a8868c429f7a 100644
--- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
+++ b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h
@@ -53,6 +53,18 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
53 unsigned int off, unsigned int cfg); 53 unsigned int off, unsigned int cfg);
54 54
55/** 55/**
56 * s3c_gpio_getcfg_s3c24xx - S3C24XX style GPIO configuration read.
57 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured.
59 *
60 * The reverse of s3c_gpio_setcfg_s3c24xx(). Will return a value whicg
61 * could be directly passed back to s3c_gpio_setcfg_s3c24xx(), from the
62 * S3C_GPIO_SPECIAL() macro.
63 */
64unsigned int s3c_gpio_getcfg_s3c24xx(struct s3c_gpio_chip *chip,
65 unsigned int off);
66
67/**
56 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A) 68 * s3c_gpio_setcfg_s3c24xx_a - S3C24XX style GPIO configuration (Bank A)
57 * @chip: The gpio chip that is being configured. 69 * @chip: The gpio chip that is being configured.
58 * @off: The offset for the GPIO being configured. 70 * @off: The offset for the GPIO being configured.
@@ -65,6 +77,21 @@ extern int s3c_gpio_setcfg_s3c24xx(struct s3c_gpio_chip *chip,
65extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip, 77extern int s3c_gpio_setcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
66 unsigned int off, unsigned int cfg); 78 unsigned int off, unsigned int cfg);
67 79
80
81/**
82 * s3c_gpio_getcfg_s3c24xx_a - S3C24XX style GPIO configuration read (Bank A)
83 * @chip: The gpio chip that is being configured.
84 * @off: The offset for the GPIO being configured.
85 *
86 * The reverse of s3c_gpio_setcfg_s3c24xx_a() turning an GPIO into a usable
87 * GPIO configuration value.
88 *
89 * @sa s3c_gpio_getcfg_s3c24xx
90 * @sa s3c_gpio_getcfg_s3c64xx_4bit
91 */
92extern unsigned s3c_gpio_getcfg_s3c24xx_a(struct s3c_gpio_chip *chip,
93 unsigned int off);
94
68/** 95/**
69 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config. 96 * s3c_gpio_setcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config.
70 * @chip: The gpio chip that is being configured. 97 * @chip: The gpio chip that is being configured.
@@ -85,6 +112,20 @@ extern int s3c_gpio_setcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
85 unsigned int off, unsigned int cfg); 112 unsigned int off, unsigned int cfg);
86 113
87 114
115/**
116 * s3c_gpio_getcfg_s3c64xx_4bit - S3C64XX 4bit single register GPIO config read.
117 * @chip: The gpio chip that is being configured.
118 * @off: The offset for the GPIO being configured.
119 *
120 * The reverse of s3c_gpio_setcfg_s3c64xx_4bit(), turning a gpio configuration
121 * register setting into a value the software can use, such as could be passed
122 * to s3c_gpio_setcfg_s3c64xx_4bit().
123 *
124 * @sa s3c_gpio_getcfg_s3c24xx
125 */
126extern unsigned s3c_gpio_getcfg_s3c64xx_4bit(struct s3c_gpio_chip *chip,
127 unsigned int off);
128
88/* Pull-{up,down} resistor controls. 129/* Pull-{up,down} resistor controls.
89 * 130 *
90 * S3C2410,S3C2440,S3C24A0 = Pull-UP, 131 * S3C2410,S3C2440,S3C24A0 = Pull-UP,