diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-09-19 14:05:05 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-09-19 14:05:05 -0400 |
commit | f1c9c9797a7c519a70b8e4607f41d97ec59fc8f0 (patch) | |
tree | 42b0cbfeb946a76844d20c7aae39037f5e1c7ba3 /arch/arm/plat-samsung/gpio-config.c | |
parent | 112d421df2fddc0278584b084f4fcfedd144c5f4 (diff) | |
parent | 4d89ecaae9c145e60b920acb1120f1de3d6eac6e (diff) |
Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S3C64XX: Add IORESOURCE_IRQ_HIGHLEVEL flag to dm9000 on mach-real6410
ARM: S3C64XX: Fix coding style errors on mach-real6410
ARM: S3C64XX: Prototype SPI devices
ARM: S3C64XX: Fix dev-spi build
ARM: SAMSUNG: Fix on s5p_gpio_[get,set]_drvstr
ARM: SAMSUNG: Fix on drive strength value
ARM: S5PV210: Add FIMC clocks
ARM: S5PV210: Reduce the iodesc length of systimer
ARM: S5PV210: Update I2C-1 Clock Register Property.
ARM: S5P: Decrease IO Registers memory region size on FIMC
ARM: S5P: Fix DMA coherent mask for FIMC
Diffstat (limited to 'arch/arm/plat-samsung/gpio-config.c')
-rw-r--r-- | arch/arm/plat-samsung/gpio-config.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/plat-samsung/gpio-config.c b/arch/arm/plat-samsung/gpio-config.c index 57b68a50f45e..e3d41eaed1ff 100644 --- a/arch/arm/plat-samsung/gpio-config.c +++ b/arch/arm/plat-samsung/gpio-config.c | |||
@@ -273,13 +273,13 @@ s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin) | |||
273 | if (!chip) | 273 | if (!chip) |
274 | return -EINVAL; | 274 | return -EINVAL; |
275 | 275 | ||
276 | off = chip->chip.base - pin; | 276 | off = pin - chip->chip.base; |
277 | shift = off * 2; | 277 | shift = off * 2; |
278 | reg = chip->base + 0x0C; | 278 | reg = chip->base + 0x0C; |
279 | 279 | ||
280 | drvstr = __raw_readl(reg); | 280 | drvstr = __raw_readl(reg); |
281 | drvstr = 0xffff & (0x3 << shift); | ||
282 | drvstr = drvstr >> shift; | 281 | drvstr = drvstr >> shift; |
282 | drvstr &= 0x3; | ||
283 | 283 | ||
284 | return (__force s5p_gpio_drvstr_t)drvstr; | 284 | return (__force s5p_gpio_drvstr_t)drvstr; |
285 | } | 285 | } |
@@ -296,11 +296,12 @@ int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr) | |||
296 | if (!chip) | 296 | if (!chip) |
297 | return -EINVAL; | 297 | return -EINVAL; |
298 | 298 | ||
299 | off = chip->chip.base - pin; | 299 | off = pin - chip->chip.base; |
300 | shift = off * 2; | 300 | shift = off * 2; |
301 | reg = chip->base + 0x0C; | 301 | reg = chip->base + 0x0C; |
302 | 302 | ||
303 | tmp = __raw_readl(reg); | 303 | tmp = __raw_readl(reg); |
304 | tmp &= ~(0x3 << shift); | ||
304 | tmp |= drvstr << shift; | 305 | tmp |= drvstr << shift; |
305 | 306 | ||
306 | __raw_writel(tmp, reg); | 307 | __raw_writel(tmp, reg); |