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authorBen Dooks <ben-linux@fluff.org>2010-01-18 01:57:42 -0500
committerBen Dooks <ben-linux@fluff.org>2010-01-18 02:00:56 -0500
commitf9e011b6b305d38445bbd4a1e7a8814e056de37b (patch)
treee468845831a2061edd25f1f41b57b0b111e3d9d3 /arch/arm/plat-samsung/clock-clksrc.c
parentf3b464cca94c4a8f54fbc11ec5af8b143fd1750b (diff)
ARM: SAMSUNG: Fix bug in clksrc-clk round_rate call.
The call has been assuming all clksrc-clks' divider size is 4 bits, but this may not be the case anymore. Use the reg_div.size parameter to calculate the maximum value it can take and check against that. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung/clock-clksrc.c')
-rw-r--r--arch/arm/plat-samsung/clock-clksrc.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/arch/arm/plat-samsung/clock-clksrc.c b/arch/arm/plat-samsung/clock-clksrc.c
index 656c70e0400a..ae8b8507663f 100644
--- a/arch/arm/plat-samsung/clock-clksrc.c
+++ b/arch/arm/plat-samsung/clock-clksrc.c
@@ -60,7 +60,7 @@ static int s3c_setrate_clksrc(struct clk *clk, unsigned long rate)
60 60
61 rate = clk_round_rate(clk, rate); 61 rate = clk_round_rate(clk, rate);
62 div = clk_get_rate(clk->parent) / rate; 62 div = clk_get_rate(clk->parent) / rate;
63 if (div > 16) 63 if (div > (1 << sclk->reg_div.size))
64 return -EINVAL; 64 return -EINVAL;
65 65
66 val = __raw_readl(reg); 66 val = __raw_readl(reg);
@@ -102,7 +102,9 @@ static int s3c_setparent_clksrc(struct clk *clk, struct clk *parent)
102static unsigned long s3c_roundrate_clksrc(struct clk *clk, 102static unsigned long s3c_roundrate_clksrc(struct clk *clk,
103 unsigned long rate) 103 unsigned long rate)
104{ 104{
105 struct clksrc_clk *sclk = to_clksrc(clk);
105 unsigned long parent_rate = clk_get_rate(clk->parent); 106 unsigned long parent_rate = clk_get_rate(clk->parent);
107 int max_div = 1 << sclk->reg_div.size;
106 int div; 108 int div;
107 109
108 if (rate >= parent_rate) 110 if (rate >= parent_rate)
@@ -114,8 +116,8 @@ static unsigned long s3c_roundrate_clksrc(struct clk *clk,
114 116
115 if (div == 0) 117 if (div == 0)
116 div = 1; 118 div = 1;
117 if (div > 16) 119 if (div > max_div)
118 div = 16; 120 div = max_div;
119 121
120 rate = parent_rate / div; 122 rate = parent_rate / div;
121 } 123 }