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authorMarek Szyprowski <m.szyprowski@samsung.com>2010-05-20 01:51:11 -0400
committerBen Dooks <ben-linux@fluff.org>2010-05-20 02:28:45 -0400
commita73e3e6f8f5847c00edb9dd7aab19d005a3d6e5c (patch)
tree61cfc338e7e58134f078eb79c35f5a6ab9cb6ea8 /arch/arm/plat-s5pc1xx/include/plat/irqs.h
parent80dfd9556a94fe479fde86370713aafd33b61a0c (diff)
ARM: remove obsolete plat-s5pc1xx directory
This patch removes all obsolete files from plat-s5pc1xx. This directory is no longer needed. S5PC100 SoC is now completely supported in plat-s5p framework. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-s5pc1xx/include/plat/irqs.h')
-rw-r--r--arch/arm/plat-s5pc1xx/include/plat/irqs.h198
1 files changed, 0 insertions, 198 deletions
diff --git a/arch/arm/plat-s5pc1xx/include/plat/irqs.h b/arch/arm/plat-s5pc1xx/include/plat/irqs.h
deleted file mode 100644
index 409c804315e8..000000000000
--- a/arch/arm/plat-s5pc1xx/include/plat/irqs.h
+++ /dev/null
@@ -1,198 +0,0 @@
1/* linux/arch/arm/plat-s5pc1xx/include/plat/irqs.h
2 *
3 * Copyright 2009 Samsung Electronics Co.
4 * Byungho Min <bhmin@samsung.com>
5 *
6 * S5PC1XX - Common IRQ support
7 *
8 * Based on plat-s3c64xx/include/plat/irqs.h
9 */
10
11#ifndef __ASM_PLAT_S5PC1XX_IRQS_H
12#define __ASM_PLAT_S5PC1XX_IRQS_H __FILE__
13
14/* we keep the first set of CPU IRQs out of the range of
15 * the ISA space, so that the PC104 has them to itself
16 * and we don't end up having to do horrible things to the
17 * standard ISA drivers....
18 *
19 * note, since we're using the VICs, our start must be a
20 * mulitple of 32 to allow the common code to work
21 */
22
23#define S3C_IRQ_OFFSET (32)
24
25#define S3C_IRQ(x) ((x) + S3C_IRQ_OFFSET)
26
27#define S3C_VIC0_BASE S3C_IRQ(0)
28#define S3C_VIC1_BASE S3C_IRQ(32)
29#define S3C_VIC2_BASE S3C_IRQ(64)
30
31/* UART interrupts, each UART has 4 intterupts per channel so
32 * use the space between the ISA and S3C main interrupts. Note, these
33 * are not in the same order as the S3C24XX series! */
34
35#define IRQ_S3CUART_BASE0 (16)
36#define IRQ_S3CUART_BASE1 (20)
37#define IRQ_S3CUART_BASE2 (24)
38#define IRQ_S3CUART_BASE3 (28)
39
40#define UART_IRQ_RXD (0)
41#define UART_IRQ_ERR (1)
42#define UART_IRQ_TXD (2)
43#define UART_IRQ_MODEM (3)
44
45#define IRQ_S3CUART_RX0 (IRQ_S3CUART_BASE0 + UART_IRQ_RXD)
46#define IRQ_S3CUART_TX0 (IRQ_S3CUART_BASE0 + UART_IRQ_TXD)
47#define IRQ_S3CUART_ERR0 (IRQ_S3CUART_BASE0 + UART_IRQ_ERR)
48
49#define IRQ_S3CUART_RX1 (IRQ_S3CUART_BASE1 + UART_IRQ_RXD)
50#define IRQ_S3CUART_TX1 (IRQ_S3CUART_BASE1 + UART_IRQ_TXD)
51#define IRQ_S3CUART_ERR1 (IRQ_S3CUART_BASE1 + UART_IRQ_ERR)
52
53#define IRQ_S3CUART_RX2 (IRQ_S3CUART_BASE2 + UART_IRQ_RXD)
54#define IRQ_S3CUART_TX2 (IRQ_S3CUART_BASE2 + UART_IRQ_TXD)
55#define IRQ_S3CUART_ERR2 (IRQ_S3CUART_BASE2 + UART_IRQ_ERR)
56
57#define IRQ_S3CUART_RX3 (IRQ_S3CUART_BASE3 + UART_IRQ_RXD)
58#define IRQ_S3CUART_TX3 (IRQ_S3CUART_BASE3 + UART_IRQ_TXD)
59#define IRQ_S3CUART_ERR3 (IRQ_S3CUART_BASE3 + UART_IRQ_ERR)
60
61/* VIC based IRQs */
62
63#define S5PC1XX_IRQ_VIC0(x) (S3C_VIC0_BASE + (x))
64#define S5PC1XX_IRQ_VIC1(x) (S3C_VIC1_BASE + (x))
65#define S5PC1XX_IRQ_VIC2(x) (S3C_VIC2_BASE + (x))
66
67/*
68 * VIC0: system, DMA, timer
69 */
70#define IRQ_EINT0 S5PC1XX_IRQ_VIC0(0)
71#define IRQ_EINT1 S5PC1XX_IRQ_VIC0(1)
72#define IRQ_EINT2 S5PC1XX_IRQ_VIC0(2)
73#define IRQ_EINT3 S5PC1XX_IRQ_VIC0(3)
74#define IRQ_EINT4 S5PC1XX_IRQ_VIC0(4)
75#define IRQ_EINT5 S5PC1XX_IRQ_VIC0(5)
76#define IRQ_EINT6 S5PC1XX_IRQ_VIC0(6)
77#define IRQ_EINT7 S5PC1XX_IRQ_VIC0(7)
78#define IRQ_EINT8 S5PC1XX_IRQ_VIC0(8)
79#define IRQ_EINT9 S5PC1XX_IRQ_VIC0(9)
80#define IRQ_EINT10 S5PC1XX_IRQ_VIC0(10)
81#define IRQ_EINT11 S5PC1XX_IRQ_VIC0(11)
82#define IRQ_EINT12 S5PC1XX_IRQ_VIC0(12)
83#define IRQ_EINT13 S5PC1XX_IRQ_VIC0(13)
84#define IRQ_EINT14 S5PC1XX_IRQ_VIC0(14)
85#define IRQ_EINT15 S5PC1XX_IRQ_VIC0(15)
86#define IRQ_EINT16_31 S5PC1XX_IRQ_VIC0(16)
87#define IRQ_BATF S5PC1XX_IRQ_VIC0(17)
88#define IRQ_MDMA S5PC1XX_IRQ_VIC0(18)
89#define IRQ_PDMA0 S5PC1XX_IRQ_VIC0(19)
90#define IRQ_PDMA1 S5PC1XX_IRQ_VIC0(20)
91#define IRQ_TIMER0_VIC S5PC1XX_IRQ_VIC0(21)
92#define IRQ_TIMER1_VIC S5PC1XX_IRQ_VIC0(22)
93#define IRQ_TIMER2_VIC S5PC1XX_IRQ_VIC0(23)
94#define IRQ_TIMER3_VIC S5PC1XX_IRQ_VIC0(24)
95#define IRQ_TIMER4_VIC S5PC1XX_IRQ_VIC0(25)
96#define IRQ_SYSTIMER S5PC1XX_IRQ_VIC0(26)
97#define IRQ_WDT S5PC1XX_IRQ_VIC0(27)
98#define IRQ_RTC_ALARM S5PC1XX_IRQ_VIC0(28)
99#define IRQ_RTC_TIC S5PC1XX_IRQ_VIC0(29)
100#define IRQ_GPIOINT S5PC1XX_IRQ_VIC0(30)
101
102/*
103 * VIC1: ARM, power, memory, connectivity
104 */
105#define IRQ_CORTEX0 S5PC1XX_IRQ_VIC1(0)
106#define IRQ_CORTEX1 S5PC1XX_IRQ_VIC1(1)
107#define IRQ_CORTEX2 S5PC1XX_IRQ_VIC1(2)
108#define IRQ_CORTEX3 S5PC1XX_IRQ_VIC1(3)
109#define IRQ_CORTEX4 S5PC1XX_IRQ_VIC1(4)
110#define IRQ_IEMAPC S5PC1XX_IRQ_VIC1(5)
111#define IRQ_IEMIEC S5PC1XX_IRQ_VIC1(6)
112#define IRQ_ONENAND S5PC1XX_IRQ_VIC1(7)
113#define IRQ_NFC S5PC1XX_IRQ_VIC1(8)
114#define IRQ_CFC S5PC1XX_IRQ_VIC1(9)
115#define IRQ_UART0 S5PC1XX_IRQ_VIC1(10)
116#define IRQ_UART1 S5PC1XX_IRQ_VIC1(11)
117#define IRQ_UART2 S5PC1XX_IRQ_VIC1(12)
118#define IRQ_UART3 S5PC1XX_IRQ_VIC1(13)
119#define IRQ_IIC S5PC1XX_IRQ_VIC1(14)
120#define IRQ_SPI0 S5PC1XX_IRQ_VIC1(15)
121#define IRQ_SPI1 S5PC1XX_IRQ_VIC1(16)
122#define IRQ_SPI2 S5PC1XX_IRQ_VIC1(17)
123#define IRQ_IRDA S5PC1XX_IRQ_VIC1(18)
124#define IRQ_CAN0 S5PC1XX_IRQ_VIC1(19)
125#define IRQ_CAN1 S5PC1XX_IRQ_VIC1(20)
126#define IRQ_HSIRX S5PC1XX_IRQ_VIC1(21)
127#define IRQ_HSITX S5PC1XX_IRQ_VIC1(22)
128#define IRQ_UHOST S5PC1XX_IRQ_VIC1(23)
129#define IRQ_OTG S5PC1XX_IRQ_VIC1(24)
130#define IRQ_MSM S5PC1XX_IRQ_VIC1(25)
131#define IRQ_HSMMC0 S5PC1XX_IRQ_VIC1(26)
132#define IRQ_HSMMC1 S5PC1XX_IRQ_VIC1(27)
133#define IRQ_HSMMC2 S5PC1XX_IRQ_VIC1(28)
134#define IRQ_MIPICSI S5PC1XX_IRQ_VIC1(29)
135#define IRQ_MIPIDSI S5PC1XX_IRQ_VIC1(30)
136
137/*
138 * VIC2: multimedia, audio, security
139 */
140#define IRQ_LCD0 S5PC1XX_IRQ_VIC2(0)
141#define IRQ_LCD1 S5PC1XX_IRQ_VIC2(1)
142#define IRQ_LCD2 S5PC1XX_IRQ_VIC2(2)
143#define IRQ_LCD3 S5PC1XX_IRQ_VIC2(3)
144#define IRQ_ROTATOR S5PC1XX_IRQ_VIC2(4)
145#define IRQ_FIMC0 S5PC1XX_IRQ_VIC2(5)
146#define IRQ_FIMC1 S5PC1XX_IRQ_VIC2(6)
147#define IRQ_FIMC2 S5PC1XX_IRQ_VIC2(7)
148#define IRQ_JPEG S5PC1XX_IRQ_VIC2(8)
149#define IRQ_2D S5PC1XX_IRQ_VIC2(9)
150#define IRQ_3D S5PC1XX_IRQ_VIC2(10)
151#define IRQ_MIXER S5PC1XX_IRQ_VIC2(11)
152#define IRQ_HDMI S5PC1XX_IRQ_VIC2(12)
153#define IRQ_IIC1 S5PC1XX_IRQ_VIC2(13)
154#define IRQ_MFC S5PC1XX_IRQ_VIC2(14)
155#define IRQ_TVENC S5PC1XX_IRQ_VIC2(15)
156#define IRQ_I2S0 S5PC1XX_IRQ_VIC2(16)
157#define IRQ_I2S1 S5PC1XX_IRQ_VIC2(17)
158#define IRQ_I2S2 S5PC1XX_IRQ_VIC2(18)
159#define IRQ_AC97 S5PC1XX_IRQ_VIC2(19)
160#define IRQ_PCM0 S5PC1XX_IRQ_VIC2(20)
161#define IRQ_PCM1 S5PC1XX_IRQ_VIC2(21)
162#define IRQ_SPDIF S5PC1XX_IRQ_VIC2(22)
163#define IRQ_ADC S5PC1XX_IRQ_VIC2(23)
164#define IRQ_PENDN S5PC1XX_IRQ_VIC2(24)
165#define IRQ_TC IRQ_PENDN
166#define IRQ_KEYPAD S5PC1XX_IRQ_VIC2(25)
167#define IRQ_CG S5PC1XX_IRQ_VIC2(26)
168#define IRQ_SEC S5PC1XX_IRQ_VIC2(27)
169#define IRQ_SECRX S5PC1XX_IRQ_VIC2(28)
170#define IRQ_SECTX S5PC1XX_IRQ_VIC2(29)
171#define IRQ_SDMIRQ S5PC1XX_IRQ_VIC2(30)
172#define IRQ_SDMFIQ S5PC1XX_IRQ_VIC2(31)
173
174#define IRQ_TIMER(x) (IRQ_SDMFIQ + 1 + (x))
175#define IRQ_TIMER0 IRQ_TIMER(0)
176#define IRQ_TIMER1 IRQ_TIMER(1)
177#define IRQ_TIMER2 IRQ_TIMER(2)
178#define IRQ_TIMER3 IRQ_TIMER(3)
179#define IRQ_TIMER4 IRQ_TIMER(4)
180
181/* External interrupt */
182#define S3C_IRQ_EINT_BASE (IRQ_SDMFIQ + 6)
183
184#define S3C_EINT(x) (S3C_IRQ_EINT_BASE + (x - 16))
185#define IRQ_EINT(x) (x < 16 ? IRQ_EINT0 + x : S3C_EINT(x))
186#define IRQ_EINT_BIT(x) (x < IRQ_EINT16_31 ? x - IRQ_EINT0 : x - S3C_EINT(0))
187
188/* GPIO interrupt */
189#define S3C_IRQ_GPIO_BASE (IRQ_EINT(31) + 1)
190#define S3C_IRQ_GPIO(x) (S3C_IRQ_GPIO_BASE + (x))
191
192/*
193 * Until MP04 Groups -> 40 (exactly 39) Groups * 8 ~= 320 GPIOs
194 */
195#define NR_IRQS (S3C_IRQ_GPIO(320) + 1)
196
197#endif /* __ASM_PLAT_S5PC1XX_IRQS_H */
198
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-26 12:03:55 -0500