ARM: EXYNOS: add interrupt definitions for EXYNOS5250

This patch adds the interrupt definitions for EXYNOS5250 at
<mach/irqs.h> file and it is needed for EXYNOS5250 SoC.
As a note, for single zImage of EXYNOS4 and EXYNOS5, prefix
of EXYNOS4_ and EXYNOS5_ has been added.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

1 files changed, 19 insertions, 6 deletions

diff --git a/arch/arm/plat-s5p/irq-pm.c b/arch/arm/plat-s5p/irq-pm.c
index 327acb3a4464..d1bfecae6c9f 100644
--- a/arch/arm/plat-s5p/irq-pm.c
+++ b/arch/arm/plat-s5p/irq-pm.c
@@ -39,19 +39,32 @@ unsigned long s3c_irqwake_eintallow	= 0xffffffffL;
 int s3c_irq_wake(struct irq_data *data, unsigned int state)
 {
         unsigned long irqbit;
+        unsigned int irq_rtc_tic, irq_rtc_alarm;
+
+#ifdef CONFIG_ARCH_EXYNOS
+        if (soc_is_exynos5250()) {
+                irq_rtc_tic = EXYNOS5_IRQ_RTC_TIC;
+                irq_rtc_alarm = EXYNOS5_IRQ_RTC_ALARM;
+        } else {
+                irq_rtc_tic = EXYNOS4_IRQ_RTC_TIC;
+                irq_rtc_alarm = EXYNOS4_IRQ_RTC_ALARM;
+        }
+#else
+        irq_rtc_tic = IRQ_RTC_TIC;
+        irq_rtc_alarm = IRQ_RTC_ALARM;
+#endif
+
+        if (data->irq == irq_rtc_tic || data->irq == irq_rtc_alarm) {
+                irqbit = 1 << (data->irq + 1 - irq_rtc_alarm);
 
-        switch (data->irq) {
-        case IRQ_RTC_TIC:
-        case IRQ_RTC_ALARM:
-                irqbit = 1 << (data->irq + 1 - IRQ_RTC_ALARM);
                 if (!state)
                         s3c_irqwake_intmask |= irqbit;
                 else
                         s3c_irqwake_intmask &= ~irqbit;
-                break;
-        default:
+        } else {
                 return -ENOENT;
         }
+
         return 0;
 }