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authorLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 12:13:19 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-08-11 12:13:19 -0400
commit636d17427b1ef0e97bd9df9b3b0e0f314ff889d3 (patch)
treef573602c1a78e9140c36e220c47675b79af1c270 /arch/arm/plat-s5p
parentdd21e9bdff14a9882f2c485fe533c6ce64ea2675 (diff)
parent0b019a41553a919965bb02d07d54e3e6c57a796d (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (226 commits) ARM: 6323/1: cam60: don't use __init for cam60_spi_{flash_platform_data,partitions} ARM: 6324/1: cam60: move cam60_spi_devices to .init.data ARM: 6322/1: imx/pca100: Fix name of spi platform data ARM: 6321/1: fix syntax error in main Kconfig file ARM: 6297/1: move U300 timer to dynamic clock lookup ARM: 6296/1: clock U300 intcon and timer properly ARM: 6295/1: fix U300 apb_pclk split ARM: 6306/1: fix inverted MMC card detect in U300 ARM: 6299/1: errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID ARM: 6294/1: etm: do a dummy read from OSSRR during initialization ARM: 6292/1: coresight: add ETM management registers ARM: 6288/1: ftrace: document mcount formats ARM: 6287/1: ftrace: clean up mcount assembly indentation ARM: 6286/1: fix Thumb-2 decompressor broken by "Auto calculate ZRELADDR" ARM: 6281/1: video/imxfb.c: allow usage without BACKLIGHT_CLASS_DEVICE ARM: 6280/1: imx: Fix build failure when including <mach/gpio.h> without <linux/spinlock.h> ARM: S5PV210: Fix on missing s3c-sdhci card detection method for hsmmc3 ARM: S5P: Fix on missing S5P_DEV_FIMC in plat-s5p/Kconfig ARM: S5PV210: Override FIMC driver name on Aquila board ARM: S5PC100: enable FIMC on SMDKC100 ... Fix up conflicts in arch/arm/mach-{s5pc100,s5pv210}/cpu.c due to different subsystem 'setname' calls, and trivial port types in include/linux/serial_core.h
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r--arch/arm/plat-s5p/Kconfig20
-rw-r--r--arch/arm/plat-s5p/Makefile6
-rw-r--r--arch/arm/plat-s5p/cpu.c19
-rw-r--r--arch/arm/plat-s5p/dev-fimc0.c36
-rw-r--r--arch/arm/plat-s5p/dev-fimc1.c36
-rw-r--r--arch/arm/plat-s5p/dev-fimc2.c36
-rw-r--r--arch/arm/plat-s5p/dev-pmu.c36
-rw-r--r--arch/arm/plat-s5p/include/plat/map-s5p.h23
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h41
-rw-r--r--arch/arm/plat-s5p/include/plat/reset.h16
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv310.h34
-rw-r--r--arch/arm/plat-s5p/include/plat/system-reset.h31
-rw-r--r--arch/arm/plat-s5p/irq.c2
13 files changed, 329 insertions, 7 deletions
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 11d6a1bbd90d..c6a855db2fb6 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,9 +7,10 @@
7 7
8config PLAT_S5P 8config PLAT_S5P
9 bool 9 bool
10 depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210) 10 depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
11 default y 11 default y
12 select ARM_VIC 12 select ARM_VIC if !ARCH_S5PV310
13 select ARM_GIC if ARCH_S5PV310
13 select NO_IOPORT 14 select NO_IOPORT
14 select ARCH_REQUIRE_GPIOLIB 15 select ARCH_REQUIRE_GPIOLIB
15 select S3C_GPIO_TRACK 16 select S3C_GPIO_TRACK
@@ -30,3 +31,18 @@ config S5P_EXT_INT
30 help 31 help
31 Use the external interrupts (other than GPIO interrupts.) 32 Use the external interrupts (other than GPIO interrupts.)
32 Note: Do not choose this for S5P6440. 33 Note: Do not choose this for S5P6440.
34
35config S5P_DEV_FIMC0
36 bool
37 help
38 Compile in platform device definitions for FIMC controller 0
39
40config S5P_DEV_FIMC1
41 bool
42 help
43 Compile in platform device definitions for FIMC controller 1
44
45config S5P_DEV_FIMC2
46 bool
47 help
48 Compile in platform device definitions for FIMC controller 2
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 39c242bb9d58..b2e029673950 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -12,9 +12,15 @@ obj- :=
12 12
13# Core files 13# Core files
14 14
15obj-y += dev-pmu.o
15obj-y += dev-uart.o 16obj-y += dev-uart.o
16obj-y += cpu.o 17obj-y += cpu.o
17obj-y += clock.o 18obj-y += clock.o
18obj-y += irq.o 19obj-y += irq.o
19obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o 20obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
20 21
22# devices
23
24obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o
25obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o
26obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 75cb8c37ca2c..b07a078fd284 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -21,6 +21,7 @@
21#include <plat/s5p6442.h> 21#include <plat/s5p6442.h>
22#include <plat/s5pc100.h> 22#include <plat/s5pc100.h>
23#include <plat/s5pv210.h> 23#include <plat/s5pv210.h>
24#include <plat/s5pv310.h>
24 25
25/* table of supported CPUs */ 26/* table of supported CPUs */
26 27
@@ -28,6 +29,7 @@ static const char name_s5p6440[] = "S5P6440";
28static const char name_s5p6442[] = "S5P6442"; 29static const char name_s5p6442[] = "S5P6442";
29static const char name_s5pc100[] = "S5PC100"; 30static const char name_s5pc100[] = "S5PC100";
30static const char name_s5pv210[] = "S5PV210/S5PC110"; 31static const char name_s5pv210[] = "S5PV210/S5PC110";
32static const char name_s5pv310[] = "S5PV310";
31 33
32static struct cpu_table cpu_ids[] __initdata = { 34static struct cpu_table cpu_ids[] __initdata = {
33 { 35 {
@@ -62,6 +64,14 @@ static struct cpu_table cpu_ids[] __initdata = {
62 .init_uarts = s5pv210_init_uarts, 64 .init_uarts = s5pv210_init_uarts,
63 .init = s5pv210_init, 65 .init = s5pv210_init,
64 .name = name_s5pv210, 66 .name = name_s5pv210,
67 }, {
68 .idcode = 0x43200000,
69 .idmask = 0xfffff000,
70 .map_io = s5pv310_map_io,
71 .init_clocks = s5pv310_init_clocks,
72 .init_uarts = s5pv310_init_uarts,
73 .init = s5pv310_init,
74 .name = name_s5pv310,
65 }, 75 },
66}; 76};
67 77
@@ -81,8 +91,9 @@ static struct map_desc s5p_iodesc[] __initdata = {
81 }, { 91 }, {
82 .virtual = (unsigned long)S3C_VA_UART, 92 .virtual = (unsigned long)S3C_VA_UART,
83 .pfn = __phys_to_pfn(S3C_PA_UART), 93 .pfn = __phys_to_pfn(S3C_PA_UART),
84 .length = SZ_4K, 94 .length = SZ_512K,
85 .type = MT_DEVICE, 95 .type = MT_DEVICE,
96#ifdef CONFIG_ARM_VIC
86 }, { 97 }, {
87 .virtual = (unsigned long)VA_VIC0, 98 .virtual = (unsigned long)VA_VIC0,
88 .pfn = __phys_to_pfn(S5P_PA_VIC0), 99 .pfn = __phys_to_pfn(S5P_PA_VIC0),
@@ -93,6 +104,7 @@ static struct map_desc s5p_iodesc[] __initdata = {
93 .pfn = __phys_to_pfn(S5P_PA_VIC1), 104 .pfn = __phys_to_pfn(S5P_PA_VIC1),
94 .length = SZ_16K, 105 .length = SZ_16K,
95 .type = MT_DEVICE, 106 .type = MT_DEVICE,
107#endif
96 }, { 108 }, {
97 .virtual = (unsigned long)S3C_VA_TIMER, 109 .virtual = (unsigned long)S3C_VA_TIMER,
98 .pfn = __phys_to_pfn(S5P_PA_TIMER), 110 .pfn = __phys_to_pfn(S5P_PA_TIMER),
@@ -103,6 +115,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
103 .pfn = __phys_to_pfn(S5P_PA_GPIO), 115 .pfn = __phys_to_pfn(S5P_PA_GPIO),
104 .length = SZ_4K, 116 .length = SZ_4K,
105 .type = MT_DEVICE, 117 .type = MT_DEVICE,
118 }, {
119 .virtual = (unsigned long)S3C_VA_WATCHDOG,
120 .pfn = __phys_to_pfn(S3C_PA_WDT),
121 .length = SZ_4K,
122 .type = MT_DEVICE,
106 }, 123 },
107}; 124};
108 125
diff --git a/arch/arm/plat-s5p/dev-fimc0.c b/arch/arm/plat-s5p/dev-fimc0.c
new file mode 100644
index 000000000000..d3f1a9b5d2b5
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc0.c
@@ -0,0 +1,36 @@
1/* linux/arch/arm/plat-s5p/dev-fimc0.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC0 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <mach/map.h>
17
18static struct resource s5p_fimc0_resource[] = {
19 [0] = {
20 .start = S5P_PA_FIMC0,
21 .end = S5P_PA_FIMC0 + SZ_1M - 1,
22 .flags = IORESOURCE_MEM,
23 },
24 [1] = {
25 .start = IRQ_FIMC0,
26 .end = IRQ_FIMC0,
27 .flags = IORESOURCE_IRQ,
28 },
29};
30
31struct platform_device s5p_device_fimc0 = {
32 .name = "s5p-fimc",
33 .id = 0,
34 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
35 .resource = s5p_fimc0_resource,
36};
diff --git a/arch/arm/plat-s5p/dev-fimc1.c b/arch/arm/plat-s5p/dev-fimc1.c
new file mode 100644
index 000000000000..41bd6986d0ad
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc1.c
@@ -0,0 +1,36 @@
1/* linux/arch/arm/plat-s5p/dev-fimc1.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC1 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <mach/map.h>
17
18static struct resource s5p_fimc1_resource[] = {
19 [0] = {
20 .start = S5P_PA_FIMC1,
21 .end = S5P_PA_FIMC1 + SZ_1M - 1,
22 .flags = IORESOURCE_MEM,
23 },
24 [1] = {
25 .start = IRQ_FIMC1,
26 .end = IRQ_FIMC1,
27 .flags = IORESOURCE_IRQ,
28 },
29};
30
31struct platform_device s5p_device_fimc1 = {
32 .name = "s5p-fimc",
33 .id = 1,
34 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
35 .resource = s5p_fimc1_resource,
36};
diff --git a/arch/arm/plat-s5p/dev-fimc2.c b/arch/arm/plat-s5p/dev-fimc2.c
new file mode 100644
index 000000000000..dfddeda6d4a3
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-fimc2.c
@@ -0,0 +1,36 @@
1/* linux/arch/arm/plat-s5p/dev-fimc2.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC2 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/ioport.h>
16#include <mach/map.h>
17
18static struct resource s5p_fimc2_resource[] = {
19 [0] = {
20 .start = S5P_PA_FIMC2,
21 .end = S5P_PA_FIMC2 + SZ_1M - 1,
22 .flags = IORESOURCE_MEM,
23 },
24 [1] = {
25 .start = IRQ_FIMC2,
26 .end = IRQ_FIMC2,
27 .flags = IORESOURCE_IRQ,
28 },
29};
30
31struct platform_device s5p_device_fimc2 = {
32 .name = "s5p-fimc",
33 .id = 2,
34 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
35 .resource = s5p_fimc2_resource,
36};
diff --git a/arch/arm/plat-s5p/dev-pmu.c b/arch/arm/plat-s5p/dev-pmu.c
new file mode 100644
index 000000000000..a08576da72b0
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-pmu.c
@@ -0,0 +1,36 @@
1/*
2 * linux/arch/arm/plat-s5p/dev-pmu.c
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/platform_device.h>
15#include <asm/pmu.h>
16#include <mach/irqs.h>
17
18static struct resource s5p_pmu_resource = {
19 .start = IRQ_PMU,
20 .end = IRQ_PMU,
21 .flags = IORESOURCE_IRQ,
22};
23
24struct platform_device s5p_device_pmu = {
25 .name = "arm-pmu",
26 .id = ARM_PMU_DEVICE_CPU,
27 .num_resources = 1,
28 .resource = &s5p_pmu_resource,
29};
30
31static int __init s5p_pmu_init(void)
32{
33 platform_device_register(&s5p_device_pmu);
34 return 0;
35}
36arch_initcall(s5p_pmu_init);
diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h
index 14828521f70c..54e9fb9d315e 100644
--- a/arch/arm/plat-s5p/include/plat/map-s5p.h
+++ b/arch/arm/plat-s5p/include/plat/map-s5p.h
@@ -18,12 +18,27 @@
18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) 18#define S5P_VA_SYSTIMER S3C_ADDR(0x01200000)
19#define S5P_VA_SROMC S3C_ADDR(0x01100000) 19#define S5P_VA_SROMC S3C_ADDR(0x01100000)
20 20
21#define S5P_VA_UART0 (S3C_VA_UART + 0x0) 21#define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000)
22#define S5P_VA_UART1 (S3C_VA_UART + 0x400) 22#define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10)
23#define S5P_VA_UART2 (S3C_VA_UART + 0x800)
24#define S5P_VA_UART3 (S3C_VA_UART + 0xC00)
25 23
24#define S5P_VA_COREPERI_BASE S3C_ADDR(0x00800000)
25#define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x))
26#define S5P_VA_SCU S5P_VA_COREPERI(0x0)
27#define S5P_VA_GIC_CPU S5P_VA_COREPERI(0x100)
28#define S5P_VA_TWD S5P_VA_COREPERI(0x600)
29#define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000)
30
31#define S5P_VA_L2CC S3C_ADDR(0x00900000)
32
33#define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET))
34#define S5P_VA_UART0 S5P_VA_UART(0)
35#define S5P_VA_UART1 S5P_VA_UART(1)
36#define S5P_VA_UART2 S5P_VA_UART(2)
37#define S5P_VA_UART3 S5P_VA_UART(3)
38
39#ifndef S3C_UART_OFFSET
26#define S3C_UART_OFFSET (0x400) 40#define S3C_UART_OFFSET (0x400)
41#endif
27 42
28#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) 43#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
29#define VA_VIC0 VA_VIC(0) 44#define VA_VIC0 VA_VIC(0)
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index 7db322726bc2..4e8fe08cb70d 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -46,6 +46,47 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
46 return (unsigned long)fvco; 46 return (unsigned long)fvco;
47} 47}
48 48
49#define PLL46XX_KDIV_MASK (0xFFFF)
50#define PLL46XX_MDIV_MASK (0x1FF)
51#define PLL46XX_PDIV_MASK (0x3F)
52#define PLL46XX_SDIV_MASK (0x7)
53#define PLL46XX_MDIV_SHIFT (16)
54#define PLL46XX_PDIV_SHIFT (8)
55#define PLL46XX_SDIV_SHIFT (0)
56
57enum pll46xx_type_t {
58 pll_4600,
59 pll_4650,
60};
61
62static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
63 u32 pll_con0, u32 pll_con1,
64 enum pll46xx_type_t pll_type)
65{
66 unsigned long result;
67 u32 mdiv, pdiv, sdiv, kdiv;
68 u64 tmp;
69
70 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
71 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
72 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
73 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
74
75 tmp = baseclk;
76
77 if (pll_type == pll_4600) {
78 tmp *= (mdiv << 16) + kdiv;
79 do_div(tmp, (pdiv << sdiv));
80 result = tmp >> 16;
81 } else {
82 tmp *= (mdiv << 10) + kdiv;
83 do_div(tmp, (pdiv << sdiv));
84 result = tmp >> 10;
85 }
86
87 return result;
88}
89
49#define PLL90XX_MDIV_MASK (0xFF) 90#define PLL90XX_MDIV_MASK (0xFF)
50#define PLL90XX_PDIV_MASK (0x3F) 91#define PLL90XX_PDIV_MASK (0x3F)
51#define PLL90XX_SDIV_MASK (0x7) 92#define PLL90XX_SDIV_MASK (0x7)
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-s5p/include/plat/reset.h
new file mode 100644
index 000000000000..335e97812eed
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/reset.h
@@ -0,0 +1,16 @@
1/* linux/arch/arm/plat-s5p/include/plat/reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __ASM_PLAT_S5P_RESET_H
12#define __ASM_PLAT_S5P_RESET_H __FILE__
13
14extern void (*s5p_reset_hook)(void);
15
16#endif /* __ASM_PLAT_S5P_RESET_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5pv310.h b/arch/arm/plat-s5p/include/plat/s5pv310.h
new file mode 100644
index 000000000000..769c991ceb37
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5pv310.h
@@ -0,0 +1,34 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5pv310.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv310 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV310 related SoCs */
14
15extern void s5pv310_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv310_register_clocks(void);
17extern void s5pv310_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV310
20
21extern int s5pv310_init(void);
22extern void s5pv310_init_irq(void);
23extern void s5pv310_map_io(void);
24extern void s5pv310_init_clocks(int xtal);
25extern struct sys_timer s5pv310_timer;
26
27#define s5pv310_init_uarts s5pv310_common_init_uarts
28
29#else
30#define s5pv310_init_clocks NULL
31#define s5pv310_init_uarts NULL
32#define s5pv310_map_io NULL
33#define s5pv310_init NULL
34#endif
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-s5p/include/plat/system-reset.h
new file mode 100644
index 000000000000..f307f34e6422
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/system-reset.h
@@ -0,0 +1,31 @@
1/* linux/arch/arm/plat-s5p/include/plat/system-reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
7 *
8 * S5P - System define for arch_reset()
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/watchdog-reset.h>
16
17void (*s5p_reset_hook)(void);
18
19static void arch_reset(char mode, const char *cmd)
20{
21 /* SWRESET support in s5p_reset_hook() */
22
23 if (s5p_reset_hook)
24 s5p_reset_hook();
25
26 /* Perform reset using Watchdog reset
27 * if there is no s5p_reset_hook()
28 */
29
30 arch_wdt_reset();
31}
diff --git a/arch/arm/plat-s5p/irq.c b/arch/arm/plat-s5p/irq.c
index 25e1eb6de59e..5560b12035d1 100644
--- a/arch/arm/plat-s5p/irq.c
+++ b/arch/arm/plat-s5p/irq.c
@@ -56,11 +56,13 @@ static struct s3c_uart_irq uart_irqs[] = {
56 56
57void __init s5p_init_irq(u32 *vic, u32 num_vic) 57void __init s5p_init_irq(u32 *vic, u32 num_vic)
58{ 58{
59#ifdef CONFIG_ARM_VIC
59 int irq; 60 int irq;
60 61
61 /* initialize the VICs */ 62 /* initialize the VICs */
62 for (irq = 0; irq < num_vic; irq++) 63 for (irq = 0; irq < num_vic; irq++)
63 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0); 64 vic_init(VA_VIC(irq), VIC_BASE(irq), vic[irq], 0);
65#endif
64 66
65 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0); 67 s3c_init_vic_timer_irq(IRQ_TIMER0_VIC, IRQ_TIMER0);
66 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1); 68 s3c_init_vic_timer_irq(IRQ_TIMER1_VIC, IRQ_TIMER1);