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authorLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 21:18:05 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-11-05 21:18:05 -0400
commit7abec10c623d9e0416dab6919a0ea22e6283516b (patch)
tree83aa79c369e99c4fc60eea91ebd399b7689b312e /arch/arm/plat-s5p
parent0de9adf284ec20454ecf37ffd98e7e98ba7292d6 (diff)
parentcfaf8fc5b59527281e9ddc2e0e04e1127936e17f (diff)
Merge branch 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc
* 'next/cleanup3' of git://git.linaro.org/people/arnd/arm-soc: (79 commits) ARM: SAMSUNG: Move fimc plat. device from board files to plat-samsung ARM: SAMSUNG: Cleanup resources by using macro ARM: SAMSUNG: Cleanup plat-samsung/devs.c and devs.h ARM: S5P: To merge devs.c files to one devs.c ARM: S3C64XX: To merge devs.c files to one devs.c ARM: S3C24XX: To merge s3c24xx devs.c files to one devs.c ARM: S5P64X0: Add Power Management support ARM: S5P: Make the sleep code common for S5P series SoCs ARM: S5P: Make the common S5P PM code conditionally compile ARM: SAMSUNG: Move S5P header files to plat-samsung ARM: SAMSUNG: Move S3C24XX header files to plat-samsung ARM: SAMSUNG: Moving each SoC support header files ARM: SAMSUNG: Consolidate plat/pll.h ARM: SAMSUNG: Consolidate plat/pwm-clock.h ARM: SAMSUNG: Cleanup mach/clkdev.h ARM: SAMSUNG: remove sdhci default configuration setup platform helper ARM: EXYNOS4: Add FIMC device on SMDKV310 board ARM: EXYNOS4: Add header file protection macros ARM: EXYNOS4: Add usb ehci device to the SMDKV310 ARM: S3C2443: Add hsspi-clock from pclk and rename S3C2443 hsspi sclk ... Fix up conflicts in - arch/arm/mach-exynos4/{Kconfig,clock.c} ARM_CPU_SUSPEND, various random device tables (gah!) - drivers/gpio/Makefile sa1100 gpio added, samsung gpio drivers merged
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r--arch/arm/plat-s5p/Kconfig25
-rw-r--r--arch/arm/plat-s5p/Makefile14
-rw-r--r--arch/arm/plat-s5p/dev-csis0.c34
-rw-r--r--arch/arm/plat-s5p/dev-csis1.c34
-rw-r--r--arch/arm/plat-s5p/dev-ehci.c57
-rw-r--r--arch/arm/plat-s5p/dev-fimc0.c43
-rw-r--r--arch/arm/plat-s5p/dev-fimc1.c43
-rw-r--r--arch/arm/plat-s5p/dev-fimc2.c43
-rw-r--r--arch/arm/plat-s5p/dev-fimc3.c43
-rw-r--r--arch/arm/plat-s5p/dev-fimd0.c67
-rw-r--r--arch/arm/plat-s5p/dev-mfc.c50
-rw-r--r--arch/arm/plat-s5p/dev-onenand.c45
-rw-r--r--arch/arm/plat-s5p/dev-pmu.c36
-rw-r--r--arch/arm/plat-s5p/include/plat/camport.h28
-rw-r--r--arch/arm/plat-s5p/include/plat/ehci.h21
-rw-r--r--arch/arm/plat-s5p/include/plat/exynos4.h35
-rw-r--r--arch/arm/plat-s5p/include/plat/irqs.h80
-rw-r--r--arch/arm/plat-s5p/include/plat/mfc.h27
-rw-r--r--arch/arm/plat-s5p/include/plat/mipi_csis.h43
-rw-r--r--arch/arm/plat-s5p/include/plat/pll.h203
-rw-r--r--arch/arm/plat-s5p/include/plat/regs-srom.h54
-rw-r--r--arch/arm/plat-s5p/include/plat/reset.h16
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-clock.h55
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p-time.h40
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6440.h36
-rw-r--r--arch/arm/plat-s5p/include/plat/s5p6450.h36
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pc100.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/s5pv210.h33
-rw-r--r--arch/arm/plat-s5p/include/plat/sysmmu.h95
-rw-r--r--arch/arm/plat-s5p/include/plat/system-reset.h31
-rw-r--r--arch/arm/plat-s5p/include/plat/usb-phy.h22
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c10
-rw-r--r--arch/arm/plat-s5p/sleep.S49
33 files changed, 78 insertions, 1403 deletions
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 9a197e55f669..ab16e5568c4c 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -16,9 +16,6 @@ config PLAT_S5P
16 select S3C_GPIO_TRACK 16 select S3C_GPIO_TRACK
17 select S5P_GPIO_DRVSTR 17 select S5P_GPIO_DRVSTR
18 select SAMSUNG_GPIOLIB_4BIT 18 select SAMSUNG_GPIOLIB_4BIT
19 select S3C_GPIO_CFG_S3C64XX
20 select S3C_GPIO_PULL_UPDOWN
21 select S3C_GPIO_CFG_S3C24XX
22 select PLAT_SAMSUNG 19 select PLAT_SAMSUNG
23 select SAMSUNG_CLKSRC 20 select SAMSUNG_CLKSRC
24 select SAMSUNG_IRQ_VIC_TIMER 21 select SAMSUNG_IRQ_VIC_TIMER
@@ -42,6 +39,12 @@ config S5P_HRT
42 help 39 help
43 Use the High Resolution timer support 40 Use the High Resolution timer support
44 41
42config S5P_PM
43 bool
44 help
45 Common code for power management support on S5P and newer SoCs
46 Note: Do not select this for S5P6440 and S5P6450.
47
45comment "System MMU" 48comment "System MMU"
46 49
47config S5P_SYSTEM_MMU 50config S5P_SYSTEM_MMU
@@ -50,6 +53,12 @@ config S5P_SYSTEM_MMU
50 help 53 help
51 Say Y here if you want to enable System MMU 54 Say Y here if you want to enable System MMU
52 55
56config S5P_SLEEP
57 bool
58 help
59 Internal config node to apply common S5P sleep management code.
60 Can be selected by S5P and newer SoCs with similar sleep procedure.
61
53config S5P_DEV_FIMC0 62config S5P_DEV_FIMC0
54 bool 63 bool
55 help 64 help
@@ -75,6 +84,11 @@ config S5P_DEV_FIMD0
75 help 84 help
76 Compile in platform device definitions for FIMD controller 0 85 Compile in platform device definitions for FIMD controller 0
77 86
87config S5P_DEV_I2C_HDMIPHY
88 bool
89 help
90 Compile in platform device definitions for I2C HDMIPHY controller
91
78config S5P_DEV_MFC 92config S5P_DEV_MFC
79 bool 93 bool
80 help 94 help
@@ -95,6 +109,11 @@ config S5P_DEV_CSIS1
95 help 109 help
96 Compile in platform device definitions for MIPI-CSIS channel 1 110 Compile in platform device definitions for MIPI-CSIS channel 1
97 111
112config S5P_DEV_TV
113 bool
114 help
115 Compile in platform device definition for TV interface
116
98config S5P_DEV_USB_EHCI 117config S5P_DEV_USB_EHCI
99 bool 118 bool
100 help 119 help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index 4b53e04eeca4..876344038b8d 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -12,7 +12,6 @@ obj- :=
12 12
13# Core files 13# Core files
14 14
15obj-y += dev-pmu.o
16obj-y += dev-uart.o 15obj-y += dev-uart.o
17obj-y += cpu.o 16obj-y += cpu.o
18obj-y += clock.o 17obj-y += clock.o
@@ -20,19 +19,10 @@ obj-y += irq.o
20obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o 19obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o
21obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o 20obj-$(CONFIG_S5P_GPIO_INT) += irq-gpioint.o
22obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o 21obj-$(CONFIG_S5P_SYSTEM_MMU) += sysmmu.o
23obj-$(CONFIG_PM) += pm.o 22obj-$(CONFIG_S5P_PM) += pm.o irq-pm.o
24obj-$(CONFIG_PM) += irq-pm.o 23obj-$(CONFIG_S5P_SLEEP) += sleep.o
25obj-$(CONFIG_S5P_HRT) += s5p-time.o 24obj-$(CONFIG_S5P_HRT) += s5p-time.o
26 25
27# devices 26# devices
28obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o 27obj-$(CONFIG_S5P_DEV_MFC) += dev-mfc.o
29obj-$(CONFIG_S5P_DEV_FIMC0) += dev-fimc0.o
30obj-$(CONFIG_S5P_DEV_FIMC1) += dev-fimc1.o
31obj-$(CONFIG_S5P_DEV_FIMC2) += dev-fimc2.o
32obj-$(CONFIG_S5P_DEV_FIMC3) += dev-fimc3.o
33obj-$(CONFIG_S5P_DEV_FIMD0) += dev-fimd0.o
34obj-$(CONFIG_S5P_DEV_ONENAND) += dev-onenand.o
35obj-$(CONFIG_S5P_DEV_CSIS0) += dev-csis0.o
36obj-$(CONFIG_S5P_DEV_CSIS1) += dev-csis1.o
37obj-$(CONFIG_S5P_DEV_USB_EHCI) += dev-ehci.o
38obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o 28obj-$(CONFIG_S5P_SETUP_MIPIPHY) += setup-mipiphy.o
diff --git a/arch/arm/plat-s5p/dev-csis0.c b/arch/arm/plat-s5p/dev-csis0.c
deleted file mode 100644
index e3aabef5e347..000000000000
--- a/arch/arm/plat-s5p/dev-csis0.c
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series device definition for MIPI-CSIS channel 0
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <mach/map.h>
15
16static struct resource s5p_mipi_csis0_resource[] = {
17 [0] = {
18 .start = S5P_PA_MIPI_CSIS0,
19 .end = S5P_PA_MIPI_CSIS0 + SZ_4K - 1,
20 .flags = IORESOURCE_MEM,
21 },
22 [1] = {
23 .start = IRQ_MIPI_CSIS0,
24 .end = IRQ_MIPI_CSIS0,
25 .flags = IORESOURCE_IRQ,
26 }
27};
28
29struct platform_device s5p_device_mipi_csis0 = {
30 .name = "s5p-mipi-csis",
31 .id = 0,
32 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
33 .resource = s5p_mipi_csis0_resource,
34};
diff --git a/arch/arm/plat-s5p/dev-csis1.c b/arch/arm/plat-s5p/dev-csis1.c
deleted file mode 100644
index 08b91b580207..000000000000
--- a/arch/arm/plat-s5p/dev-csis1.c
+++ /dev/null
@@ -1,34 +0,0 @@
1/*
2 * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series device definition for MIPI-CSIS channel 1
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/kernel.h>
12#include <linux/interrupt.h>
13#include <linux/platform_device.h>
14#include <mach/map.h>
15
16static struct resource s5p_mipi_csis1_resource[] = {
17 [0] = {
18 .start = S5P_PA_MIPI_CSIS1,
19 .end = S5P_PA_MIPI_CSIS1 + SZ_4K - 1,
20 .flags = IORESOURCE_MEM,
21 },
22 [1] = {
23 .start = IRQ_MIPI_CSIS1,
24 .end = IRQ_MIPI_CSIS1,
25 .flags = IORESOURCE_IRQ,
26 },
27};
28
29struct platform_device s5p_device_mipi_csis1 = {
30 .name = "s5p-mipi-csis",
31 .id = 1,
32 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
33 .resource = s5p_mipi_csis1_resource,
34};
diff --git a/arch/arm/plat-s5p/dev-ehci.c b/arch/arm/plat-s5p/dev-ehci.c
deleted file mode 100644
index 94080fff9e9b..000000000000
--- a/arch/arm/plat-s5p/dev-ehci.c
+++ /dev/null
@@ -1,57 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include <linux/platform_device.h>
13#include <mach/irqs.h>
14#include <mach/map.h>
15#include <plat/devs.h>
16#include <plat/ehci.h>
17#include <plat/usb-phy.h>
18
19/* USB EHCI Host Controller registration */
20static struct resource s5p_ehci_resource[] = {
21 [0] = {
22 .start = S5P_PA_EHCI,
23 .end = S5P_PA_EHCI + SZ_256 - 1,
24 .flags = IORESOURCE_MEM,
25 },
26 [1] = {
27 .start = IRQ_USB_HOST,
28 .end = IRQ_USB_HOST,
29 .flags = IORESOURCE_IRQ,
30 }
31};
32
33static u64 s5p_device_ehci_dmamask = 0xffffffffUL;
34
35struct platform_device s5p_device_ehci = {
36 .name = "s5p-ehci",
37 .id = -1,
38 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
39 .resource = s5p_ehci_resource,
40 .dev = {
41 .dma_mask = &s5p_device_ehci_dmamask,
42 .coherent_dma_mask = 0xffffffffUL
43 }
44};
45
46void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
47{
48 struct s5p_ehci_platdata *npd;
49
50 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
51 &s5p_device_ehci);
52
53 if (!npd->phy_init)
54 npd->phy_init = s5p_usb_phy_init;
55 if (!npd->phy_exit)
56 npd->phy_exit = s5p_usb_phy_exit;
57}
diff --git a/arch/arm/plat-s5p/dev-fimc0.c b/arch/arm/plat-s5p/dev-fimc0.c
deleted file mode 100644
index 608770fc1531..000000000000
--- a/arch/arm/plat-s5p/dev-fimc0.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-fimc0.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC0 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <mach/map.h>
18
19static struct resource s5p_fimc0_resource[] = {
20 [0] = {
21 .start = S5P_PA_FIMC0,
22 .end = S5P_PA_FIMC0 + SZ_4K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_FIMC0,
27 .end = IRQ_FIMC0,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32static u64 s5p_fimc0_dma_mask = DMA_BIT_MASK(32);
33
34struct platform_device s5p_device_fimc0 = {
35 .name = "s5p-fimc",
36 .id = 0,
37 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
38 .resource = s5p_fimc0_resource,
39 .dev = {
40 .dma_mask = &s5p_fimc0_dma_mask,
41 .coherent_dma_mask = DMA_BIT_MASK(32),
42 },
43};
diff --git a/arch/arm/plat-s5p/dev-fimc1.c b/arch/arm/plat-s5p/dev-fimc1.c
deleted file mode 100644
index 76e3a97a87d3..000000000000
--- a/arch/arm/plat-s5p/dev-fimc1.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-fimc1.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC1 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <mach/map.h>
18
19static struct resource s5p_fimc1_resource[] = {
20 [0] = {
21 .start = S5P_PA_FIMC1,
22 .end = S5P_PA_FIMC1 + SZ_4K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_FIMC1,
27 .end = IRQ_FIMC1,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32static u64 s5p_fimc1_dma_mask = DMA_BIT_MASK(32);
33
34struct platform_device s5p_device_fimc1 = {
35 .name = "s5p-fimc",
36 .id = 1,
37 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
38 .resource = s5p_fimc1_resource,
39 .dev = {
40 .dma_mask = &s5p_fimc1_dma_mask,
41 .coherent_dma_mask = DMA_BIT_MASK(32),
42 },
43};
diff --git a/arch/arm/plat-s5p/dev-fimc2.c b/arch/arm/plat-s5p/dev-fimc2.c
deleted file mode 100644
index 24d29816fa2c..000000000000
--- a/arch/arm/plat-s5p/dev-fimc2.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-fimc2.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC2 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <mach/map.h>
18
19static struct resource s5p_fimc2_resource[] = {
20 [0] = {
21 .start = S5P_PA_FIMC2,
22 .end = S5P_PA_FIMC2 + SZ_4K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_FIMC2,
27 .end = IRQ_FIMC2,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32static u64 s5p_fimc2_dma_mask = DMA_BIT_MASK(32);
33
34struct platform_device s5p_device_fimc2 = {
35 .name = "s5p-fimc",
36 .id = 2,
37 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
38 .resource = s5p_fimc2_resource,
39 .dev = {
40 .dma_mask = &s5p_fimc2_dma_mask,
41 .coherent_dma_mask = DMA_BIT_MASK(32),
42 },
43};
diff --git a/arch/arm/plat-s5p/dev-fimc3.c b/arch/arm/plat-s5p/dev-fimc3.c
deleted file mode 100644
index ef31beca386c..000000000000
--- a/arch/arm/plat-s5p/dev-fimc3.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-fimc3.c
2 *
3 * Copyright (c) 2010 Samsung Electronics
4 *
5 * Base S5P FIMC3 resource and device definitions
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/kernel.h>
13#include <linux/dma-mapping.h>
14#include <linux/platform_device.h>
15#include <linux/interrupt.h>
16#include <linux/ioport.h>
17#include <mach/map.h>
18
19static struct resource s5p_fimc3_resource[] = {
20 [0] = {
21 .start = S5P_PA_FIMC3,
22 .end = S5P_PA_FIMC3 + SZ_4K - 1,
23 .flags = IORESOURCE_MEM,
24 },
25 [1] = {
26 .start = IRQ_FIMC3,
27 .end = IRQ_FIMC3,
28 .flags = IORESOURCE_IRQ,
29 },
30};
31
32static u64 s5p_fimc3_dma_mask = DMA_BIT_MASK(32);
33
34struct platform_device s5p_device_fimc3 = {
35 .name = "s5p-fimc",
36 .id = 3,
37 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
38 .resource = s5p_fimc3_resource,
39 .dev = {
40 .dma_mask = &s5p_fimc3_dma_mask,
41 .coherent_dma_mask = DMA_BIT_MASK(32),
42 },
43};
diff --git a/arch/arm/plat-s5p/dev-fimd0.c b/arch/arm/plat-s5p/dev-fimd0.c
deleted file mode 100644
index f728bb5abcef..000000000000
--- a/arch/arm/plat-s5p/dev-fimd0.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-fimd0.c
2 *
3 * Copyright (c) 2009-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Core file for Samsung Display Controller (FIMD) driver
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/string.h>
15#include <linux/platform_device.h>
16#include <linux/fb.h>
17#include <linux/gfp.h>
18#include <linux/dma-mapping.h>
19
20#include <mach/irqs.h>
21#include <mach/map.h>
22
23#include <plat/fb.h>
24#include <plat/devs.h>
25#include <plat/cpu.h>
26
27static struct resource s5p_fimd0_resource[] = {
28 [0] = {
29 .start = S5P_PA_FIMD0,
30 .end = S5P_PA_FIMD0 + SZ_32K - 1,
31 .flags = IORESOURCE_MEM,
32 },
33 [1] = {
34 .start = IRQ_FIMD0_VSYNC,
35 .end = IRQ_FIMD0_VSYNC,
36 .flags = IORESOURCE_IRQ,
37 },
38 [2] = {
39 .start = IRQ_FIMD0_FIFO,
40 .end = IRQ_FIMD0_FIFO,
41 .flags = IORESOURCE_IRQ,
42 },
43 [3] = {
44 .start = IRQ_FIMD0_SYSTEM,
45 .end = IRQ_FIMD0_SYSTEM,
46 .flags = IORESOURCE_IRQ,
47 },
48};
49
50static u64 fimd0_dmamask = DMA_BIT_MASK(32);
51
52struct platform_device s5p_device_fimd0 = {
53 .name = "s5p-fb",
54 .id = 0,
55 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
56 .resource = s5p_fimd0_resource,
57 .dev = {
58 .dma_mask = &fimd0_dmamask,
59 .coherent_dma_mask = DMA_BIT_MASK(32),
60 },
61};
62
63void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
64{
65 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
66 &s5p_device_fimd0);
67}
diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-s5p/dev-mfc.c
index 94226a0010f7..a30d36b7f61b 100644
--- a/arch/arm/plat-s5p/dev-mfc.c
+++ b/arch/arm/plat-s5p/dev-mfc.c
@@ -22,56 +22,6 @@
22#include <plat/irqs.h> 22#include <plat/irqs.h>
23#include <plat/mfc.h> 23#include <plat/mfc.h>
24 24
25static struct resource s5p_mfc_resource[] = {
26 [0] = {
27 .start = S5P_PA_MFC,
28 .end = S5P_PA_MFC + SZ_64K - 1,
29 .flags = IORESOURCE_MEM,
30 },
31 [1] = {
32 .start = IRQ_MFC,
33 .end = IRQ_MFC,
34 .flags = IORESOURCE_IRQ,
35 }
36};
37
38struct platform_device s5p_device_mfc = {
39 .name = "s5p-mfc",
40 .id = -1,
41 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
42 .resource = s5p_mfc_resource,
43};
44
45/*
46 * MFC hardware has 2 memory interfaces which are modelled as two separate
47 * platform devices to let dma-mapping distinguish between them.
48 *
49 * MFC parent device (s5p_device_mfc) must be registered before memory
50 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
51 */
52
53static u64 s5p_mfc_dma_mask = DMA_BIT_MASK(32);
54
55struct platform_device s5p_device_mfc_l = {
56 .name = "s5p-mfc-l",
57 .id = -1,
58 .dev = {
59 .parent = &s5p_device_mfc.dev,
60 .dma_mask = &s5p_mfc_dma_mask,
61 .coherent_dma_mask = DMA_BIT_MASK(32),
62 },
63};
64
65struct platform_device s5p_device_mfc_r = {
66 .name = "s5p-mfc-r",
67 .id = -1,
68 .dev = {
69 .parent = &s5p_device_mfc.dev,
70 .dma_mask = &s5p_mfc_dma_mask,
71 .coherent_dma_mask = DMA_BIT_MASK(32),
72 },
73};
74
75struct s5p_mfc_reserved_mem { 25struct s5p_mfc_reserved_mem {
76 phys_addr_t base; 26 phys_addr_t base;
77 unsigned long size; 27 unsigned long size;
diff --git a/arch/arm/plat-s5p/dev-onenand.c b/arch/arm/plat-s5p/dev-onenand.c
deleted file mode 100644
index 20336c8f2479..000000000000
--- a/arch/arm/plat-s5p/dev-onenand.c
+++ /dev/null
@@ -1,45 +0,0 @@
1/* linux/arch/arm/plat-s5p/dev-onenand.c
2 *
3 * Copyright 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Copyright (c) 2008-2010 Samsung Electronics
7 * Kyungmin Park <kyungmin.park@samsung.com>
8 *
9 * S5P series device definition for OneNAND devices
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18
19#include <mach/irqs.h>
20#include <mach/map.h>
21
22static struct resource s5p_onenand_resources[] = {
23 [0] = {
24 .start = S5P_PA_ONENAND,
25 .end = S5P_PA_ONENAND + SZ_128K - 1,
26 .flags = IORESOURCE_MEM,
27 },
28 [1] = {
29 .start = S5P_PA_ONENAND_DMA,
30 .end = S5P_PA_ONENAND_DMA + SZ_8K - 1,
31 .flags = IORESOURCE_MEM,
32 },
33 [2] = {
34 .start = IRQ_ONENAND_AUDI,
35 .end = IRQ_ONENAND_AUDI,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40struct platform_device s5p_device_onenand = {
41 .name = "s5pc110-onenand",
42 .id = -1,
43 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
44 .resource = s5p_onenand_resources,
45};
diff --git a/arch/arm/plat-s5p/dev-pmu.c b/arch/arm/plat-s5p/dev-pmu.c
deleted file mode 100644
index a08576da72b0..000000000000
--- a/arch/arm/plat-s5p/dev-pmu.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * linux/arch/arm/plat-s5p/dev-pmu.c
3 *
4 * Copyright (C) 2010 Samsung Electronics Co.Ltd
5 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#include <linux/platform_device.h>
15#include <asm/pmu.h>
16#include <mach/irqs.h>
17
18static struct resource s5p_pmu_resource = {
19 .start = IRQ_PMU,
20 .end = IRQ_PMU,
21 .flags = IORESOURCE_IRQ,
22};
23
24struct platform_device s5p_device_pmu = {
25 .name = "arm-pmu",
26 .id = ARM_PMU_DEVICE_CPU,
27 .num_resources = 1,
28 .resource = &s5p_pmu_resource,
29};
30
31static int __init s5p_pmu_init(void)
32{
33 platform_device_register(&s5p_device_pmu);
34 return 0;
35}
36arch_initcall(s5p_pmu_init);
diff --git a/arch/arm/plat-s5p/include/plat/camport.h b/arch/arm/plat-s5p/include/plat/camport.h
deleted file mode 100644
index 71688c8ba288..000000000000
--- a/arch/arm/plat-s5p/include/plat/camport.h
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series camera interface helper functions
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef PLAT_S5P_CAMPORT_H_
12#define PLAT_S5P_CAMPORT_H_ __FILE__
13
14enum s5p_camport_id {
15 S5P_CAMPORT_A,
16 S5P_CAMPORT_B,
17};
18
19/*
20 * The helper functions to configure GPIO for the camera parallel bus.
21 * The camera port can be multiplexed with any FIMC entity, even multiple
22 * FIMC entities are allowed to be attached to a single port simultaneously.
23 * These functions are to be used in the board setup code.
24 */
25int s5pv210_fimc_setup_gpio(enum s5p_camport_id id);
26int exynos4_fimc_setup_gpio(enum s5p_camport_id id);
27
28#endif
diff --git a/arch/arm/plat-s5p/include/plat/ehci.h b/arch/arm/plat-s5p/include/plat/ehci.h
deleted file mode 100644
index 6ae6810c7569..000000000000
--- a/arch/arm/plat-s5p/include/plat/ehci.h
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PLAT_S5P_EHCI_H
12#define __PLAT_S5P_EHCI_H
13
14struct s5p_ehci_platdata {
15 int (*phy_init)(struct platform_device *pdev, int type);
16 int (*phy_exit)(struct platform_device *pdev, int type);
17};
18
19extern void s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd);
20
21#endif /* __PLAT_S5P_EHCI_H */
diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-s5p/include/plat/exynos4.h
deleted file mode 100644
index f680a143e38c..000000000000
--- a/arch/arm/plat-s5p/include/plat/exynos4.h
+++ /dev/null
@@ -1,35 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/exynos4.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for exynos4 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for EXYNOS4 related SoCs */
14
15extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void exynos4_register_clocks(void);
17extern void exynos4210_register_clocks(void);
18extern void exynos4212_register_clocks(void);
19extern void exynos4_setup_clocks(void);
20
21#ifdef CONFIG_ARCH_EXYNOS4
22extern int exynos4_init(void);
23extern void exynos4_init_irq(void);
24extern void exynos4_map_io(void);
25extern void exynos4_init_clocks(int xtal);
26extern struct sys_timer exynos4_timer;
27
28#define exynos4_init_uarts exynos4_common_init_uarts
29
30#else
31#define exynos4_init_clocks NULL
32#define exynos4_init_uarts NULL
33#define exynos4_map_io NULL
34#define exynos4_init NULL
35#endif
diff --git a/arch/arm/plat-s5p/include/plat/irqs.h b/arch/arm/plat-s5p/include/plat/irqs.h
deleted file mode 100644
index 144dbfc6506d..000000000000
--- a/arch/arm/plat-s5p/include/plat/irqs.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/irqs.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P Common IRQ support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_IRQS_H
14#define __ASM_PLAT_S5P_IRQS_H __FILE__
15
16/* we keep the first set of CPU IRQs out of the range of
17 * the ISA space, so that the PC104 has them to itself
18 * and we don't end up having to do horrible things to the
19 * standard ISA drivers....
20 *
21 * note, since we're using the VICs, our start must be a
22 * mulitple of 32 to allow the common code to work
23 */
24
25#define S5P_IRQ_OFFSET (32)
26
27#define S5P_IRQ(x) ((x) + S5P_IRQ_OFFSET)
28
29#define S5P_VIC0_BASE S5P_IRQ(0)
30#define S5P_VIC1_BASE S5P_IRQ(32)
31#define S5P_VIC2_BASE S5P_IRQ(64)
32#define S5P_VIC3_BASE S5P_IRQ(96)
33
34#define VIC_BASE(x) (S5P_VIC0_BASE + ((x)*32))
35
36#define IRQ_VIC0_BASE S5P_VIC0_BASE
37#define IRQ_VIC1_BASE S5P_VIC1_BASE
38#define IRQ_VIC2_BASE S5P_VIC2_BASE
39
40/* VIC based IRQs */
41
42#define S5P_IRQ_VIC0(x) (S5P_VIC0_BASE + (x))
43#define S5P_IRQ_VIC1(x) (S5P_VIC1_BASE + (x))
44#define S5P_IRQ_VIC2(x) (S5P_VIC2_BASE + (x))
45#define S5P_IRQ_VIC3(x) (S5P_VIC3_BASE + (x))
46
47#define S5P_TIMER_IRQ(x) (11 + (x))
48
49#define IRQ_TIMER0 S5P_TIMER_IRQ(0)
50#define IRQ_TIMER1 S5P_TIMER_IRQ(1)
51#define IRQ_TIMER2 S5P_TIMER_IRQ(2)
52#define IRQ_TIMER3 S5P_TIMER_IRQ(3)
53#define IRQ_TIMER4 S5P_TIMER_IRQ(4)
54
55#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_EINT_BASE1) \
56 : ((x) - 16 + S5P_EINT_BASE2))
57
58#define EINT_OFFSET(irq) ((irq) < S5P_EINT_BASE2 ? \
59 ((irq) - S5P_EINT_BASE1) : \
60 ((irq) + 16 - S5P_EINT_BASE2))
61
62#define IRQ_EINT_BIT(x) EINT_OFFSET(x)
63
64/* Typically only a few gpio chips require gpio interrupt support.
65 To avoid memory waste irq descriptors are allocated only for
66 S5P_GPIOINT_GROUP_COUNT chips, each with total number of
67 S5P_GPIOINT_GROUP_SIZE pins/irqs. Each GPIOINT group can be assiged
68 to any gpio chip with the s5p_register_gpio_interrupt() function */
69#define S5P_GPIOINT_GROUP_COUNT 4
70#define S5P_GPIOINT_GROUP_SIZE 8
71#define S5P_GPIOINT_COUNT (S5P_GPIOINT_GROUP_COUNT * S5P_GPIOINT_GROUP_SIZE)
72
73/* IRQ types common for all s5p platforms */
74#define S5P_IRQ_TYPE_LEVEL_LOW (0x00)
75#define S5P_IRQ_TYPE_LEVEL_HIGH (0x01)
76#define S5P_IRQ_TYPE_EDGE_FALLING (0x02)
77#define S5P_IRQ_TYPE_EDGE_RISING (0x03)
78#define S5P_IRQ_TYPE_EDGE_BOTH (0x04)
79
80#endif /* __ASM_PLAT_S5P_IRQS_H */
diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-s5p/include/plat/mfc.h
deleted file mode 100644
index 6697f8cb2949..000000000000
--- a/arch/arm/plat-s5p/include/plat/mfc.h
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#ifndef __PLAT_S5P_MFC_H
11#define __PLAT_S5P_MFC_H
12
13/**
14 * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
15 * @rbase: base address for MFC 'right' memory interface
16 * @rsize: size of the memory reserved for MFC 'right' interface
17 * @lbase: base address for MFC 'left' memory interface
18 * @lsize: size of the memory reserved for MFC 'left' interface
19 *
20 * This function reserves system memory for both MFC device memory
21 * interfaces and registers it to respective struct device entries as
22 * coherent memory.
23 */
24void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
25 phys_addr_t lbase, unsigned int lsize);
26
27#endif /* __PLAT_S5P_MFC_H */
diff --git a/arch/arm/plat-s5p/include/plat/mipi_csis.h b/arch/arm/plat-s5p/include/plat/mipi_csis.h
deleted file mode 100644
index 9bd254c5ed22..000000000000
--- a/arch/arm/plat-s5p/include/plat/mipi_csis.h
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.
3 *
4 * S5P series MIPI CSI slave device support
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef PLAT_S5P_MIPI_CSIS_H_
12#define PLAT_S5P_MIPI_CSIS_H_ __FILE__
13
14struct platform_device;
15
16/**
17 * struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
18 * @clk_rate: bus clock frequency
19 * @lanes: number of data lanes used
20 * @alignment: data alignment in bits
21 * @hs_settle: HS-RX settle time
22 * @fixed_phy_vdd: false to enable external D-PHY regulator management in the
23 * driver or true in case this regulator has no enable function
24 * @phy_enable: pointer to a callback controlling D-PHY enable/reset
25 */
26struct s5p_platform_mipi_csis {
27 unsigned long clk_rate;
28 u8 lanes;
29 u8 alignment;
30 u8 hs_settle;
31 bool fixed_phy_vdd;
32 int (*phy_enable)(struct platform_device *pdev, bool on);
33};
34
35/**
36 * s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
37 * @pdev: MIPI-CSIS platform device
38 * @on: true to enable D-PHY and deassert its reset
39 * false to disable D-PHY
40 */
41int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
42
43#endif /* PLAT_S5P_MIPI_CSIS_H_ */
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
deleted file mode 100644
index 3e21b9444cc5..000000000000
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ /dev/null
@@ -1,203 +0,0 @@
1/* arch/arm/plat-s5p/include/plat/pll.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * S5P PLL code
7 *
8 * Based on arch/arm/plat-s3c64xx/include/plat/pll.h
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <asm/div64.h>
16
17#define PLL35XX_MDIV_MASK (0x3FF)
18#define PLL35XX_PDIV_MASK (0x3F)
19#define PLL35XX_SDIV_MASK (0x7)
20#define PLL35XX_MDIV_SHIFT (16)
21#define PLL35XX_PDIV_SHIFT (8)
22#define PLL35XX_SDIV_SHIFT (0)
23
24static inline unsigned long s5p_get_pll35xx(unsigned long baseclk, u32 pll_con)
25{
26 u32 mdiv, pdiv, sdiv;
27 u64 fvco = baseclk;
28
29 mdiv = (pll_con >> PLL35XX_MDIV_SHIFT) & PLL35XX_MDIV_MASK;
30 pdiv = (pll_con >> PLL35XX_PDIV_SHIFT) & PLL35XX_PDIV_MASK;
31 sdiv = (pll_con >> PLL35XX_SDIV_SHIFT) & PLL35XX_SDIV_MASK;
32
33 fvco *= mdiv;
34 do_div(fvco, (pdiv << sdiv));
35
36 return (unsigned long)fvco;
37}
38
39#define PLL36XX_KDIV_MASK (0xFFFF)
40#define PLL36XX_MDIV_MASK (0x1FF)
41#define PLL36XX_PDIV_MASK (0x3F)
42#define PLL36XX_SDIV_MASK (0x7)
43#define PLL36XX_MDIV_SHIFT (16)
44#define PLL36XX_PDIV_SHIFT (8)
45#define PLL36XX_SDIV_SHIFT (0)
46
47static inline unsigned long s5p_get_pll36xx(unsigned long baseclk,
48 u32 pll_con0, u32 pll_con1)
49{
50 unsigned long result;
51 u32 mdiv, pdiv, sdiv, kdiv;
52 u64 tmp;
53
54 mdiv = (pll_con0 >> PLL36XX_MDIV_SHIFT) & PLL36XX_MDIV_MASK;
55 pdiv = (pll_con0 >> PLL36XX_PDIV_SHIFT) & PLL36XX_PDIV_MASK;
56 sdiv = (pll_con0 >> PLL36XX_SDIV_SHIFT) & PLL36XX_SDIV_MASK;
57 kdiv = pll_con1 & PLL36XX_KDIV_MASK;
58
59 tmp = baseclk;
60
61 tmp *= (mdiv << 16) + kdiv;
62 do_div(tmp, (pdiv << sdiv));
63 result = tmp >> 16;
64
65 return result;
66}
67
68#define PLL45XX_MDIV_MASK (0x3FF)
69#define PLL45XX_PDIV_MASK (0x3F)
70#define PLL45XX_SDIV_MASK (0x7)
71#define PLL45XX_MDIV_SHIFT (16)
72#define PLL45XX_PDIV_SHIFT (8)
73#define PLL45XX_SDIV_SHIFT (0)
74
75enum pll45xx_type_t {
76 pll_4500,
77 pll_4502,
78 pll_4508
79};
80
81static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
82 enum pll45xx_type_t pll_type)
83{
84 u32 mdiv, pdiv, sdiv;
85 u64 fvco = baseclk;
86
87 mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK;
88 pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK;
89 sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK;
90
91 if (pll_type == pll_4508)
92 sdiv = sdiv - 1;
93
94 fvco *= mdiv;
95 do_div(fvco, (pdiv << sdiv));
96
97 return (unsigned long)fvco;
98}
99
100#define PLL46XX_KDIV_MASK (0xFFFF)
101#define PLL4650C_KDIV_MASK (0xFFF)
102#define PLL46XX_MDIV_MASK (0x1FF)
103#define PLL46XX_PDIV_MASK (0x3F)
104#define PLL46XX_SDIV_MASK (0x7)
105#define PLL46XX_MDIV_SHIFT (16)
106#define PLL46XX_PDIV_SHIFT (8)
107#define PLL46XX_SDIV_SHIFT (0)
108
109enum pll46xx_type_t {
110 pll_4600,
111 pll_4650,
112 pll_4650c,
113};
114
115static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
116 u32 pll_con0, u32 pll_con1,
117 enum pll46xx_type_t pll_type)
118{
119 unsigned long result;
120 u32 mdiv, pdiv, sdiv, kdiv;
121 u64 tmp;
122
123 mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK;
124 pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK;
125 sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
126
127 if (pll_type == pll_4650c)
128 kdiv = pll_con1 & PLL4650C_KDIV_MASK;
129 else
130 kdiv = pll_con1 & PLL46XX_KDIV_MASK;
131
132 tmp = baseclk;
133
134 if (pll_type == pll_4600) {
135 tmp *= (mdiv << 16) + kdiv;
136 do_div(tmp, (pdiv << sdiv));
137 result = tmp >> 16;
138 } else {
139 tmp *= (mdiv << 10) + kdiv;
140 do_div(tmp, (pdiv << sdiv));
141 result = tmp >> 10;
142 }
143
144 return result;
145}
146
147#define PLL90XX_MDIV_MASK (0xFF)
148#define PLL90XX_PDIV_MASK (0x3F)
149#define PLL90XX_SDIV_MASK (0x7)
150#define PLL90XX_KDIV_MASK (0xffff)
151#define PLL90XX_MDIV_SHIFT (16)
152#define PLL90XX_PDIV_SHIFT (8)
153#define PLL90XX_SDIV_SHIFT (0)
154#define PLL90XX_KDIV_SHIFT (0)
155
156static inline unsigned long s5p_get_pll90xx(unsigned long baseclk,
157 u32 pll_con, u32 pll_conk)
158{
159 unsigned long result;
160 u32 mdiv, pdiv, sdiv, kdiv;
161 u64 tmp;
162
163 mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK;
164 pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK;
165 sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK;
166 kdiv = pll_conk & PLL90XX_KDIV_MASK;
167
168 /* We need to multiple baseclk by mdiv (the integer part) and kdiv
169 * which is in 2^16ths, so shift mdiv up (does not overflow) and
170 * add kdiv before multiplying. The use of tmp is to avoid any
171 * overflows before shifting bac down into result when multipling
172 * by the mdiv and kdiv pair.
173 */
174
175 tmp = baseclk;
176 tmp *= (mdiv << 16) + kdiv;
177 do_div(tmp, (pdiv << sdiv));
178 result = tmp >> 16;
179
180 return result;
181}
182
183#define PLL65XX_MDIV_MASK (0x3FF)
184#define PLL65XX_PDIV_MASK (0x3F)
185#define PLL65XX_SDIV_MASK (0x7)
186#define PLL65XX_MDIV_SHIFT (16)
187#define PLL65XX_PDIV_SHIFT (8)
188#define PLL65XX_SDIV_SHIFT (0)
189
190static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con)
191{
192 u32 mdiv, pdiv, sdiv;
193 u64 fvco = baseclk;
194
195 mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK;
196 pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK;
197 sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK;
198
199 fvco *= mdiv;
200 do_div(fvco, (pdiv << sdiv));
201
202 return (unsigned long)fvco;
203}
diff --git a/arch/arm/plat-s5p/include/plat/regs-srom.h b/arch/arm/plat-s5p/include/plat/regs-srom.h
deleted file mode 100644
index f121ab5e76cb..000000000000
--- a/arch/arm/plat-s5p/include/plat/regs-srom.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/regs-srom.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * S5P SROMC register definitions
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_REGS_SROM_H
14#define __ASM_PLAT_S5P_REGS_SROM_H __FILE__
15
16#include <mach/map.h>
17
18#define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
19
20#define S5P_SROM_BW S5P_SROMREG(0x0)
21#define S5P_SROM_BC0 S5P_SROMREG(0x4)
22#define S5P_SROM_BC1 S5P_SROMREG(0x8)
23#define S5P_SROM_BC2 S5P_SROMREG(0xc)
24#define S5P_SROM_BC3 S5P_SROMREG(0x10)
25#define S5P_SROM_BC4 S5P_SROMREG(0x14)
26#define S5P_SROM_BC5 S5P_SROMREG(0x18)
27
28/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
29
30#define S5P_SROM_BW__DATAWIDTH__SHIFT 0
31#define S5P_SROM_BW__ADDRMODE__SHIFT 1
32#define S5P_SROM_BW__WAITENABLE__SHIFT 2
33#define S5P_SROM_BW__BYTEENABLE__SHIFT 3
34
35#define S5P_SROM_BW__CS_MASK 0xf
36
37#define S5P_SROM_BW__NCS0__SHIFT 0
38#define S5P_SROM_BW__NCS1__SHIFT 4
39#define S5P_SROM_BW__NCS2__SHIFT 8
40#define S5P_SROM_BW__NCS3__SHIFT 12
41#define S5P_SROM_BW__NCS4__SHIFT 16
42#define S5P_SROM_BW__NCS5__SHIFT 20
43
44/* applies to same to BCS0 - BCS3 */
45
46#define S5P_SROM_BCX__PMC__SHIFT 0
47#define S5P_SROM_BCX__TACP__SHIFT 4
48#define S5P_SROM_BCX__TCAH__SHIFT 8
49#define S5P_SROM_BCX__TCOH__SHIFT 12
50#define S5P_SROM_BCX__TACC__SHIFT 16
51#define S5P_SROM_BCX__TCOS__SHIFT 24
52#define S5P_SROM_BCX__TACS__SHIFT 28
53
54#endif /* __ASM_PLAT_S5P_REGS_SROM_H */
diff --git a/arch/arm/plat-s5p/include/plat/reset.h b/arch/arm/plat-s5p/include/plat/reset.h
deleted file mode 100644
index 335e97812eed..000000000000
--- a/arch/arm/plat-s5p/include/plat/reset.h
+++ /dev/null
@@ -1,16 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#ifndef __ASM_PLAT_S5P_RESET_H
12#define __ASM_PLAT_S5P_RESET_H __FILE__
13
14extern void (*s5p_reset_hook)(void);
15
16#endif /* __ASM_PLAT_S5P_RESET_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
deleted file mode 100644
index 769b5bdfb046..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
2 *
3 * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p clock support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_CLOCK_H
14#define __ASM_PLAT_S5P_CLOCK_H __FILE__
15
16#include <linux/clk.h>
17
18#define GET_DIV(clk, field) ((((clk) & field##_MASK) >> field##_SHIFT) + 1)
19
20#define clk_fin_apll clk_ext_xtal_mux
21#define clk_fin_mpll clk_ext_xtal_mux
22#define clk_fin_epll clk_ext_xtal_mux
23#define clk_fin_dpll clk_ext_xtal_mux
24#define clk_fin_vpll clk_ext_xtal_mux
25#define clk_fin_hpll clk_ext_xtal_mux
26
27extern struct clk clk_ext_xtal_mux;
28extern struct clk clk_xusbxti;
29extern struct clk clk_48m;
30extern struct clk s5p_clk_27m;
31extern struct clk clk_fout_apll;
32extern struct clk clk_fout_mpll;
33extern struct clk clk_fout_epll;
34extern struct clk clk_fout_dpll;
35extern struct clk clk_fout_vpll;
36extern struct clk clk_arm;
37extern struct clk clk_vpll;
38
39extern struct clksrc_sources clk_src_apll;
40extern struct clksrc_sources clk_src_mpll;
41extern struct clksrc_sources clk_src_epll;
42extern struct clksrc_sources clk_src_dpll;
43
44extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
45
46/* Common EPLL operations for S5P platform */
47extern int s5p_epll_enable(struct clk *clk, int enable);
48extern unsigned long s5p_epll_get_rate(struct clk *clk);
49
50/* SPDIF clk operations common for S5PC100/V210/C110 and Exynos4 */
51extern int s5p_spdif_set_rate(struct clk *clk, unsigned long rate);
52extern unsigned long s5p_spdif_get_rate(struct clk *clk);
53
54extern struct clk_ops s5p_sclk_spdif_ops;
55#endif /* __ASM_PLAT_S5P_CLOCK_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p-time.h b/arch/arm/plat-s5p/include/plat/s5p-time.h
deleted file mode 100644
index 575e88109db8..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p-time.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5p-time.h
2 *
3 * Copyright 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p time support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_PLAT_S5P_TIME_H
14#define __ASM_PLAT_S5P_TIME_H __FILE__
15
16/* S5P HR-Timer Clock mode */
17enum s5p_timer_mode {
18 S5P_PWM0,
19 S5P_PWM1,
20 S5P_PWM2,
21 S5P_PWM3,
22 S5P_PWM4,
23};
24
25struct s5p_timer_source {
26 unsigned int event_id;
27 unsigned int source_id;
28};
29
30/* Be able to sleep for atleast 4 seconds (usually more) */
31#define S5PTIMER_MIN_RANGE 4
32
33#define TCNT_MAX 0xffffffff
34#define NON_PERIODIC 0
35#define PERIODIC 1
36
37extern void __init s5p_set_timer_source(enum s5p_timer_mode event,
38 enum s5p_timer_mode source);
39extern struct sys_timer s5p_timer;
40#endif /* __ASM_PLAT_S5P_TIME_H */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
deleted file mode 100644
index 528585d2cafc..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p6440.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* arch/arm/plat-s5p/include/plat/s5p6440.h
2 *
3 * Copyright (c) 2009 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5p6440 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13 /* Common init code for S5P6440 related SoCs */
14
15extern void s5p6440_register_clocks(void);
16extern void s5p6440_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6440
19
20extern int s5p64x0_init(void);
21extern void s5p6440_init_irq(void);
22extern void s5p6440_map_io(void);
23extern void s5p6440_init_clocks(int xtal);
24
25extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6440_init_clocks NULL
29#define s5p6440_init_uarts NULL
30#define s5p6440_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6440 timer */
35
36extern struct sys_timer s5p6440_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-s5p/include/plat/s5p6450.h
deleted file mode 100644
index 640a41c26be3..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5p6450.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/* arch/arm/plat-s5p/include/plat/s5p6450.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Header file for s5p6450 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5P6450 related SoCs */
14
15extern void s5p6450_register_clocks(void);
16extern void s5p6450_setup_clocks(void);
17
18#ifdef CONFIG_CPU_S5P6450
19
20extern int s5p64x0_init(void);
21extern void s5p6450_init_irq(void);
22extern void s5p6450_map_io(void);
23extern void s5p6450_init_clocks(int xtal);
24
25extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
26
27#else
28#define s5p6450_init_clocks NULL
29#define s5p6450_init_uarts NULL
30#define s5p6450_map_io NULL
31#define s5p64x0_init NULL
32#endif
33
34/* S5P6450 timer */
35
36extern struct sys_timer s5p6450_timer;
diff --git a/arch/arm/plat-s5p/include/plat/s5pc100.h b/arch/arm/plat-s5p/include/plat/s5pc100.h
deleted file mode 100644
index 5f6099dd7cad..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5pc100.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* arch/arm/plat-s5p/include/plat/s5pc100.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pc100 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PC100 related SoCs */
14
15extern void s5pc100_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pc100_register_clocks(void);
17extern void s5pc100_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PC100
20
21extern int s5pc100_init(void);
22extern void s5pc100_init_irq(void);
23extern void s5pc100_map_io(void);
24extern void s5pc100_init_clocks(int xtal);
25
26#define s5pc100_init_uarts s5pc100_common_init_uarts
27
28#else
29#define s5pc100_init_clocks NULL
30#define s5pc100_init_uarts NULL
31#define s5pc100_map_io NULL
32#define s5pc100_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/include/plat/s5pv210.h b/arch/arm/plat-s5p/include/plat/s5pv210.h
deleted file mode 100644
index 6c93a0c78100..000000000000
--- a/arch/arm/plat-s5p/include/plat/s5pv210.h
+++ /dev/null
@@ -1,33 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/s5pv210.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Header file for s5pv210 cpu support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13/* Common init code for S5PV210 related SoCs */
14
15extern void s5pv210_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
16extern void s5pv210_register_clocks(void);
17extern void s5pv210_setup_clocks(void);
18
19#ifdef CONFIG_CPU_S5PV210
20
21extern int s5pv210_init(void);
22extern void s5pv210_init_irq(void);
23extern void s5pv210_map_io(void);
24extern void s5pv210_init_clocks(int xtal);
25
26#define s5pv210_init_uarts s5pv210_common_init_uarts
27
28#else
29#define s5pv210_init_clocks NULL
30#define s5pv210_init_uarts NULL
31#define s5pv210_map_io NULL
32#define s5pv210_init NULL
33#endif
diff --git a/arch/arm/plat-s5p/include/plat/sysmmu.h b/arch/arm/plat-s5p/include/plat/sysmmu.h
deleted file mode 100644
index bf5283c2a19d..000000000000
--- a/arch/arm/plat-s5p/include/plat/sysmmu.h
+++ /dev/null
@@ -1,95 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/sysmmu.h
2 *
3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Samsung System MMU driver for S5P platform
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM__PLAT_SYSMMU_H
14#define __ASM__PLAT_SYSMMU_H __FILE__
15
16enum S5P_SYSMMU_INTERRUPT_TYPE {
17 SYSMMU_PAGEFAULT,
18 SYSMMU_AR_MULTIHIT,
19 SYSMMU_AW_MULTIHIT,
20 SYSMMU_BUSERROR,
21 SYSMMU_AR_SECURITY,
22 SYSMMU_AR_ACCESS,
23 SYSMMU_AW_SECURITY,
24 SYSMMU_AW_PROTECTION, /* 7 */
25 SYSMMU_FAULTS_NUM
26};
27
28#ifdef CONFIG_S5P_SYSTEM_MMU
29
30#include <mach/sysmmu.h>
31
32/**
33 * s5p_sysmmu_enable() - enable system mmu of ip
34 * @ips: The ip connected system mmu.
35 * #pgd: Base physical address of the 1st level page table
36 *
37 * This function enable system mmu to transfer address
38 * from virtual address to physical address
39 */
40void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd);
41
42/**
43 * s5p_sysmmu_disable() - disable sysmmu mmu of ip
44 * @ips: The ip connected system mmu.
45 *
46 * This function disable system mmu to transfer address
47 * from virtual address to physical address
48 */
49void s5p_sysmmu_disable(sysmmu_ips ips);
50
51/**
52 * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table
53 * @ips: The ip connected system mmu.
54 * @pgd: The page table base address.
55 *
56 * This function set page table base address
57 * When system mmu transfer address from virtaul address to physical address,
58 * system mmu refer address information from page table
59 */
60void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd);
61
62/**
63 * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu
64 * @ips: The ip connected system mmu.
65 *
66 * This function flush all TLB entry in system mmu
67 */
68void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips);
69
70/** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs
71 * @itype: type of fault.
72 * @pgtable_base: the physical address of page table base. This is 0 if @ips is
73 * SYSMMU_BUSERROR.
74 * @fault_addr: the device (virtual) address that the System MMU tried to
75 * translated. This is 0 if @ips is SYSMMU_BUSERROR.
76 * Called when interrupt occurred by the System MMUs
77 * The device drivers of peripheral devices that has a System MMU can implement
78 * a fault handler to resolve address translation fault by System MMU.
79 * The meanings of return value and parameters are described below.
80
81 * return value: non-zero if the fault is correctly resolved.
82 * zero if the fault is not handled.
83 */
84void s5p_sysmmu_set_fault_handler(sysmmu_ips ips,
85 int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype,
86 unsigned long pgtable_base,
87 unsigned long fault_addr));
88#else
89#define s5p_sysmmu_enable(ips, pgd) do { } while (0)
90#define s5p_sysmmu_disable(ips) do { } while (0)
91#define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0)
92#define s5p_sysmmu_tlb_invalidate(ips) do { } while (0)
93#define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0)
94#endif
95#endif /* __ASM_PLAT_SYSMMU_H */
diff --git a/arch/arm/plat-s5p/include/plat/system-reset.h b/arch/arm/plat-s5p/include/plat/system-reset.h
deleted file mode 100644
index f307f34e6422..000000000000
--- a/arch/arm/plat-s5p/include/plat/system-reset.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/* linux/arch/arm/plat-s5p/include/plat/system-reset.h
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Based on arch/arm/mach-s3c2410/include/mach/system-reset.h
7 *
8 * S5P - System define for arch_reset()
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13*/
14
15#include <plat/watchdog-reset.h>
16
17void (*s5p_reset_hook)(void);
18
19static void arch_reset(char mode, const char *cmd)
20{
21 /* SWRESET support in s5p_reset_hook() */
22
23 if (s5p_reset_hook)
24 s5p_reset_hook();
25
26 /* Perform reset using Watchdog reset
27 * if there is no s5p_reset_hook()
28 */
29
30 arch_wdt_reset();
31}
diff --git a/arch/arm/plat-s5p/include/plat/usb-phy.h b/arch/arm/plat-s5p/include/plat/usb-phy.h
deleted file mode 100644
index 6dd6bcfca3ce..000000000000
--- a/arch/arm/plat-s5p/include/plat/usb-phy.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Author: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 */
10
11#ifndef __PLAT_S5P_USB_PHY_H
12#define __PLAT_S5P_USB_PHY_H
13
14enum s5p_usb_phy_type {
15 S5P_USB_PHY_DEVICE,
16 S5P_USB_PHY_HOST,
17};
18
19extern int s5p_usb_phy_init(struct platform_device *pdev, int type);
20extern int s5p_usb_phy_exit(struct platform_device *pdev, int type);
21
22#endif /* __PLAT_S5P_REGS_USB_PHY_H */
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index c65eb791d1bb..1fdfaa4599ce 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -37,7 +37,7 @@ struct s5p_gpioint_bank {
37 int start; 37 int start;
38 int nr_groups; 38 int nr_groups;
39 int irq; 39 int irq;
40 struct s3c_gpio_chip **chips; 40 struct samsung_gpio_chip **chips;
41 void (*handler)(unsigned int, struct irq_desc *); 41 void (*handler)(unsigned int, struct irq_desc *);
42}; 42};
43 43
@@ -87,7 +87,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
87 chained_irq_enter(chip, desc); 87 chained_irq_enter(chip, desc);
88 88
89 for (group = 0; group < bank->nr_groups; group++) { 89 for (group = 0; group < bank->nr_groups; group++) {
90 struct s3c_gpio_chip *chip = bank->chips[group]; 90 struct samsung_gpio_chip *chip = bank->chips[group];
91 if (!chip) 91 if (!chip)
92 continue; 92 continue;
93 93
@@ -110,7 +110,7 @@ static void s5p_gpioint_handler(unsigned int irq, struct irq_desc *desc)
110 chained_irq_exit(chip, desc); 110 chained_irq_exit(chip, desc);
111} 111}
112 112
113static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip) 113static __init int s5p_gpioint_add(struct samsung_gpio_chip *chip)
114{ 114{
115 static int used_gpioint_groups = 0; 115 static int used_gpioint_groups = 0;
116 int group = chip->group; 116 int group = chip->group;
@@ -131,7 +131,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
131 return -EINVAL; 131 return -EINVAL;
132 132
133 if (!bank->handler) { 133 if (!bank->handler) {
134 bank->chips = kzalloc(sizeof(struct s3c_gpio_chip *) * 134 bank->chips = kzalloc(sizeof(struct samsung_gpio_chip *) *
135 bank->nr_groups, GFP_KERNEL); 135 bank->nr_groups, GFP_KERNEL);
136 if (!bank->chips) 136 if (!bank->chips)
137 return -ENOMEM; 137 return -ENOMEM;
@@ -174,7 +174,7 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
174 174
175int __init s5p_register_gpio_interrupt(int pin) 175int __init s5p_register_gpio_interrupt(int pin)
176{ 176{
177 struct s3c_gpio_chip *my_chip = s3c_gpiolib_getchip(pin); 177 struct samsung_gpio_chip *my_chip = samsung_gpiolib_getchip(pin);
178 int offset, group; 178 int offset, group;
179 int ret; 179 int ret;
180 180
diff --git a/arch/arm/plat-s5p/sleep.S b/arch/arm/plat-s5p/sleep.S
new file mode 100644
index 000000000000..0fd591bfc9fd
--- /dev/null
+++ b/arch/arm/plat-s5p/sleep.S
@@ -0,0 +1,49 @@
1/* linux/arch/arm/plat-s5p/sleep.S
2 *
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
5 *
6 * Common S5P Sleep Code
7 * Based on S3C64XX sleep code by:
8 * Ben Dooks, (c) 2008 Simtec Electronics
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23*/
24
25#include <linux/linkage.h>
26#include <asm/assembler.h>
27
28 .text
29
30 /*
31 * sleep magic, to allow the bootloader to check for an valid
32 * image to resume to. Must be the first word before the
33 * s3c_cpu_resume entry.
34 */
35
36 .word 0x2bedf00d
37
38 /*
39 * s3c_cpu_resume
40 *
41 * resume code entry for bootloader to call
42 *
43 * we must put this code here in the data segment as we have no
44 * other way of restoring the stack pointer after sleep, and we
45 * must not write to the code segment (code is read-only)
46 */
47
48ENTRY(s3c_cpu_resume)
49 b cpu_resume
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 01:54:24 -0500