diff options
author | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 06:41:43 -0400 |
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committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-10-04 06:48:42 -0400 |
commit | 52e329ebb05983153bbde7351c94449018651290 (patch) | |
tree | 13b266d0cf3210eb1fa1057176fb19249099eb95 /arch/arm/plat-s5p | |
parent | c0468b0244464a9d85e527fd0bfee91caed697a7 (diff) |
ARM: SAMSUNG: Consolidate plat/pll.h
Removed
- arch/arm/plat-s3c24xx/include/plat/pll.h
- arch/arm/mach-s3c64xx/include/mach/pll.h
- arch/arm/plat-s5p/include/plat/pll.h
- arch/arm/plat-samsung/include/plat/pll6553x.h
And created
- arch/arm/plat-samsung/include/plat/pll.h
Cc: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: changed title]
[kgene.kim@samsung.com: fixed conflicts in plat-s5p/include/pll.h]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-s5p')
-rw-r--r-- | arch/arm/plat-s5p/include/plat/pll.h | 152 |
1 files changed, 0 insertions, 152 deletions
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h deleted file mode 100644 index ebc142c5c84c..000000000000 --- a/arch/arm/plat-s5p/include/plat/pll.h +++ /dev/null | |||
@@ -1,152 +0,0 @@ | |||
1 | /* arch/arm/plat-s5p/include/plat/pll.h | ||
2 | * | ||
3 | * Copyright (c) 2009 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com/ | ||
5 | * | ||
6 | * S5P PLL code | ||
7 | * | ||
8 | * Based on arch/arm/plat-s3c64xx/include/plat/pll.h | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License version 2 as | ||
12 | * published by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | #define PLL45XX_MDIV_MASK (0x3FF) | ||
16 | #define PLL45XX_PDIV_MASK (0x3F) | ||
17 | #define PLL45XX_SDIV_MASK (0x7) | ||
18 | #define PLL45XX_MDIV_SHIFT (16) | ||
19 | #define PLL45XX_PDIV_SHIFT (8) | ||
20 | #define PLL45XX_SDIV_SHIFT (0) | ||
21 | |||
22 | #include <asm/div64.h> | ||
23 | |||
24 | enum pll45xx_type_t { | ||
25 | pll_4500, | ||
26 | pll_4502, | ||
27 | pll_4508 | ||
28 | }; | ||
29 | |||
30 | static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con, | ||
31 | enum pll45xx_type_t pll_type) | ||
32 | { | ||
33 | u32 mdiv, pdiv, sdiv; | ||
34 | u64 fvco = baseclk; | ||
35 | |||
36 | mdiv = (pll_con >> PLL45XX_MDIV_SHIFT) & PLL45XX_MDIV_MASK; | ||
37 | pdiv = (pll_con >> PLL45XX_PDIV_SHIFT) & PLL45XX_PDIV_MASK; | ||
38 | sdiv = (pll_con >> PLL45XX_SDIV_SHIFT) & PLL45XX_SDIV_MASK; | ||
39 | |||
40 | if (pll_type == pll_4508) | ||
41 | sdiv = sdiv - 1; | ||
42 | |||
43 | fvco *= mdiv; | ||
44 | do_div(fvco, (pdiv << sdiv)); | ||
45 | |||
46 | return (unsigned long)fvco; | ||
47 | } | ||
48 | |||
49 | #define PLL46XX_KDIV_MASK (0xFFFF) | ||
50 | #define PLL4650C_KDIV_MASK (0xFFF) | ||
51 | #define PLL46XX_MDIV_MASK (0x1FF) | ||
52 | #define PLL46XX_PDIV_MASK (0x3F) | ||
53 | #define PLL46XX_SDIV_MASK (0x7) | ||
54 | #define PLL46XX_MDIV_SHIFT (16) | ||
55 | #define PLL46XX_PDIV_SHIFT (8) | ||
56 | #define PLL46XX_SDIV_SHIFT (0) | ||
57 | |||
58 | enum pll46xx_type_t { | ||
59 | pll_4600, | ||
60 | pll_4650, | ||
61 | pll_4650c, | ||
62 | }; | ||
63 | |||
64 | static inline unsigned long s5p_get_pll46xx(unsigned long baseclk, | ||
65 | u32 pll_con0, u32 pll_con1, | ||
66 | enum pll46xx_type_t pll_type) | ||
67 | { | ||
68 | unsigned long result; | ||
69 | u32 mdiv, pdiv, sdiv, kdiv; | ||
70 | u64 tmp; | ||
71 | |||
72 | mdiv = (pll_con0 >> PLL46XX_MDIV_SHIFT) & PLL46XX_MDIV_MASK; | ||
73 | pdiv = (pll_con0 >> PLL46XX_PDIV_SHIFT) & PLL46XX_PDIV_MASK; | ||
74 | sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK; | ||
75 | |||
76 | if (pll_type == pll_4650c) | ||
77 | kdiv = pll_con1 & PLL4650C_KDIV_MASK; | ||
78 | else | ||
79 | kdiv = pll_con1 & PLL46XX_KDIV_MASK; | ||
80 | |||
81 | tmp = baseclk; | ||
82 | |||
83 | if (pll_type == pll_4600) { | ||
84 | tmp *= (mdiv << 16) + kdiv; | ||
85 | do_div(tmp, (pdiv << sdiv)); | ||
86 | result = tmp >> 16; | ||
87 | } else { | ||
88 | tmp *= (mdiv << 10) + kdiv; | ||
89 | do_div(tmp, (pdiv << sdiv)); | ||
90 | result = tmp >> 10; | ||
91 | } | ||
92 | |||
93 | return result; | ||
94 | } | ||
95 | |||
96 | #define PLL90XX_MDIV_MASK (0xFF) | ||
97 | #define PLL90XX_PDIV_MASK (0x3F) | ||
98 | #define PLL90XX_SDIV_MASK (0x7) | ||
99 | #define PLL90XX_KDIV_MASK (0xffff) | ||
100 | #define PLL90XX_MDIV_SHIFT (16) | ||
101 | #define PLL90XX_PDIV_SHIFT (8) | ||
102 | #define PLL90XX_SDIV_SHIFT (0) | ||
103 | #define PLL90XX_KDIV_SHIFT (0) | ||
104 | |||
105 | static inline unsigned long s5p_get_pll90xx(unsigned long baseclk, | ||
106 | u32 pll_con, u32 pll_conk) | ||
107 | { | ||
108 | unsigned long result; | ||
109 | u32 mdiv, pdiv, sdiv, kdiv; | ||
110 | u64 tmp; | ||
111 | |||
112 | mdiv = (pll_con >> PLL90XX_MDIV_SHIFT) & PLL90XX_MDIV_MASK; | ||
113 | pdiv = (pll_con >> PLL90XX_PDIV_SHIFT) & PLL90XX_PDIV_MASK; | ||
114 | sdiv = (pll_con >> PLL90XX_SDIV_SHIFT) & PLL90XX_SDIV_MASK; | ||
115 | kdiv = pll_conk & PLL90XX_KDIV_MASK; | ||
116 | |||
117 | /* We need to multiple baseclk by mdiv (the integer part) and kdiv | ||
118 | * which is in 2^16ths, so shift mdiv up (does not overflow) and | ||
119 | * add kdiv before multiplying. The use of tmp is to avoid any | ||
120 | * overflows before shifting bac down into result when multipling | ||
121 | * by the mdiv and kdiv pair. | ||
122 | */ | ||
123 | |||
124 | tmp = baseclk; | ||
125 | tmp *= (mdiv << 16) + kdiv; | ||
126 | do_div(tmp, (pdiv << sdiv)); | ||
127 | result = tmp >> 16; | ||
128 | |||
129 | return result; | ||
130 | } | ||
131 | |||
132 | #define PLL65XX_MDIV_MASK (0x3FF) | ||
133 | #define PLL65XX_PDIV_MASK (0x3F) | ||
134 | #define PLL65XX_SDIV_MASK (0x7) | ||
135 | #define PLL65XX_MDIV_SHIFT (16) | ||
136 | #define PLL65XX_PDIV_SHIFT (8) | ||
137 | #define PLL65XX_SDIV_SHIFT (0) | ||
138 | |||
139 | static inline unsigned long s5p_get_pll65xx(unsigned long baseclk, u32 pll_con) | ||
140 | { | ||
141 | u32 mdiv, pdiv, sdiv; | ||
142 | u64 fvco = baseclk; | ||
143 | |||
144 | mdiv = (pll_con >> PLL65XX_MDIV_SHIFT) & PLL65XX_MDIV_MASK; | ||
145 | pdiv = (pll_con >> PLL65XX_PDIV_SHIFT) & PLL65XX_PDIV_MASK; | ||
146 | sdiv = (pll_con >> PLL65XX_SDIV_SHIFT) & PLL65XX_SDIV_MASK; | ||
147 | |||
148 | fvco *= mdiv; | ||
149 | do_div(fvco, (pdiv << sdiv)); | ||
150 | |||
151 | return (unsigned long)fvco; | ||
152 | } | ||