ARM: S5P: Add support for MFC device

Add support for MFC device to plat-s5p, mach-exynos4, mach-s5pv210:
 - clock support
 - memory mapping and reserving
 - s5p_device_mfc platform device

Signed-off-by: Kamil Debski <k.debski@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

4 files changed, 156 insertions, 1 deletions

diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index 7537ad57c7db..9843c954c042 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -76,6 +76,11 @@ config S5P_DEV_FIMD0
         help
           Compile in platform device definitions for FIMD controller 0
 
+config S5P_DEV_MFC
+        bool
+        help
+          Compile in platform device definitions for MFC
+
 config S5P_DEV_ONENAND
         bool
         help
diff --git a/arch/arm/plat-s5p/Makefile b/arch/arm/plat-s5p/Makefile
index eec7e24c1a03..4b53e04eeca4 100644
--- a/arch/arm/plat-s5p/Makefile
+++ b/arch/arm/plat-s5p/Makefile
@@ -25,7 +25,7 @@ obj-$(CONFIG_PM)		+= irq-pm.o
 obj-$(CONFIG_S5P_HRT)           += s5p-time.o
 
 # devices
-
+obj-$(CONFIG_S5P_DEV_MFC)       += dev-mfc.o
 obj-$(CONFIG_S5P_DEV_FIMC0)     += dev-fimc0.o
 obj-$(CONFIG_S5P_DEV_FIMC1)     += dev-fimc1.o
 obj-$(CONFIG_S5P_DEV_FIMC2)     += dev-fimc2.o
diff --git a/arch/arm/plat-s5p/dev-mfc.c b/arch/arm/plat-s5p/dev-mfc.c
new file mode 100644
index 000000000000..94226a0010f7
--- /dev/null
+++ b/arch/arm/plat-s5p/dev-mfc.c
@@ -0,0 +1,123 @@
+/* linux/arch/arm/plat-s5p/dev-mfc.c
+ *
+ * Copyright (C) 2010-2011 Samsung Electronics Co.Ltd
+ *
+ * Base S5P MFC resource and device definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/memblock.h>
+#include <linux/ioport.h>
+
+#include <mach/map.h>
+#include <plat/devs.h>
+#include <plat/irqs.h>
+#include <plat/mfc.h>
+
+static struct resource s5p_mfc_resource[] = {
+        [0] = {
+                .start  = S5P_PA_MFC,
+                .end    = S5P_PA_MFC + SZ_64K - 1,
+                .flags  = IORESOURCE_MEM,
+        },
+        [1] = {
+                .start  = IRQ_MFC,
+                .end    = IRQ_MFC,
+                .flags  = IORESOURCE_IRQ,
+        }
+};
+
+struct platform_device s5p_device_mfc = {
+        .name           = "s5p-mfc",
+        .id             = -1,
+        .num_resources  = ARRAY_SIZE(s5p_mfc_resource),
+        .resource       = s5p_mfc_resource,
+};
+
+/*
+ * MFC hardware has 2 memory interfaces which are modelled as two separate
+ * platform devices to let dma-mapping distinguish between them.
+ *
+ * MFC parent device (s5p_device_mfc) must be registered before memory
+ * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
+ */
+
+static u64 s5p_mfc_dma_mask = DMA_BIT_MASK(32);
+
+struct platform_device s5p_device_mfc_l = {
+        .name           = "s5p-mfc-l",
+        .id             = -1,
+        .dev            = {
+                .parent                 = &s5p_device_mfc.dev,
+                .dma_mask               = &s5p_mfc_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+struct platform_device s5p_device_mfc_r = {
+        .name           = "s5p-mfc-r",
+        .id             = -1,
+        .dev            = {
+                .parent                 = &s5p_device_mfc.dev,
+                .dma_mask               = &s5p_mfc_dma_mask,
+                .coherent_dma_mask      = DMA_BIT_MASK(32),
+        },
+};
+
+struct s5p_mfc_reserved_mem {
+        phys_addr_t     base;
+        unsigned long   size;
+        struct device   *dev;
+};
+
+static struct s5p_mfc_reserved_mem s5p_mfc_mem[2] __initdata;
+
+void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
+                                phys_addr_t lbase, unsigned int lsize)
+{
+        int i;
+
+        s5p_mfc_mem[0].dev = &s5p_device_mfc_r.dev;
+        s5p_mfc_mem[0].base = rbase;
+        s5p_mfc_mem[0].size = rsize;
+
+        s5p_mfc_mem[1].dev = &s5p_device_mfc_l.dev;
+        s5p_mfc_mem[1].base = lbase;
+        s5p_mfc_mem[1].size = lsize;
+
+        for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) {
+                struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i];
+                if (memblock_remove(area->base, area->size)) {
+                        printk(KERN_ERR "Failed to reserve memory for MFC device (%ld bytes at 0x%08lx)\n",
+                               area->size, (unsigned long) area->base);
+                        area->base = 0;
+                }
+        }
+}
+
+static int __init s5p_mfc_memory_init(void)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(s5p_mfc_mem); i++) {
+                struct s5p_mfc_reserved_mem *area = &s5p_mfc_mem[i];
+                if (!area->base)
+                        continue;
+
+                if (dma_declare_coherent_memory(area->dev, area->base,
+                                area->base, area->size,
+                                DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE) == 0)
+                        printk(KERN_ERR "Failed to declare coherent memory for MFC device (%ld bytes at 0x%08lx)\n",
+                               area->size, (unsigned long) area->base);
+        }
+        return 0;
+}
+device_initcall(s5p_mfc_memory_init);
diff --git a/arch/arm/plat-s5p/include/plat/mfc.h b/arch/arm/plat-s5p/include/plat/mfc.h
new file mode 100644
index 000000000000..6697f8cb2949
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/mfc.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2011 Samsung Electronics Co.Ltd
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef __PLAT_S5P_MFC_H
+#define __PLAT_S5P_MFC_H
+
+/**
+ * s5p_mfc_reserve_mem - function to early reserve memory for MFC driver
+ * @rbase:      base address for MFC 'right' memory interface
+ * @rsize:      size of the memory reserved for MFC 'right' interface
+ * @lbase:      base address for MFC 'left' memory interface
+ * @lsize:      size of the memory reserved for MFC 'left' interface
+ *
+ * This function reserves system memory for both MFC device memory
+ * interfaces and registers it to respective struct device entries as
+ * coherent memory.
+ */
+void __init s5p_mfc_reserve_mem(phys_addr_t rbase, unsigned int rsize,
+                                phys_addr_t lbase, unsigned int lsize);
+
+#endif /* __PLAT_S5P_MFC_H */